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1.1 root 1: /*
1.1.1.2 root 2: DSP M56001 emulation
1.1.1.4 root 3: Instructions interpreter
1.1.1.2 root 4:
5: (C) 2003-2008 ARAnyM developer team
6:
7: This program is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 2 of the License, or
10: (at your option) any later version.
11:
12: This program is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with this program; if not, write to the Free Software
19: Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20: */
21:
22: #ifdef HAVE_CONFIG_H
23: #include "config.h"
24: #endif
25:
1.1.1.6 ! root 26: #include <stdbool.h>
! 27:
1.1.1.2 root 28: #include "dsp_core.h"
1.1 root 29: #include "dsp_cpu.h"
30: #include "dsp_disasm.h"
1.1.1.6 ! root 31: #include "log.h"
! 32: # include "main.h"
1.1 root 33:
34:
1.1.1.2 root 35: #define DSP_COUNT_IPS 0 /* Count instruction per seconds */
36:
1.1 root 37:
38: /**********************************
39: * Defines
40: **********************************/
41:
1.1.1.4 root 42: /* cycle counter wait state time when access to external memory */
1.1.1.6 ! root 43: #define XY_WAITSTATE 0
! 44: #define P_WAITSTATE 0
! 45: #define XP_WAITSTATE 0 /* X Peripheral WaitState */
! 46: #define YP_WAITSTATE 0 /* Y Peripheral WaitState */
! 47:
! 48: #define SIGN_PLUS 0
! 49: #define SIGN_MINUS 1
1.1.1.4 root 50:
1.1 root 51: /**********************************
52: * Variables
53: **********************************/
54:
1.1.1.4 root 55: /* Instructions per second */
56: static Uint32 start_time;
57: static Uint32 num_inst;
58:
1.1 root 59: /* Length of current instruction */
1.1.1.2 root 60: static Uint32 cur_inst_len; /* =0:jump, >0:increment */
1.1 root 61:
62: /* Current instruction */
1.1.1.4 root 63: static Uint32 cur_inst;
1.1 root 64:
1.1.1.6 ! root 65: /* DSP is in disasm mode ? */
! 66: /* If yes, stack overflow, underflow and illegal instructions messages are not displayed */
! 67: static bool isDsp_in_disasm_mode;
1.1 root 68:
1.1.1.5 root 69: static char str_disasm_memory[2][50]; /* Buffer for memory change text in disasm mode */
70: static Uint16 disasm_memory_ptr; /* Pointer for memory change in disasm mode */
1.1 root 71:
72: /**********************************
73: * Functions
74: **********************************/
75:
76: typedef void (*dsp_emul_t)(void);
77:
78: static void dsp_postexecute_update_pc(void);
79: static void dsp_postexecute_interrupts(void);
80:
1.1.1.5 root 81: static void dsp_setInterruptIPL(Uint32 value);
82:
1.1.1.6 ! root 83: static void dsp_ccr_update_e_u_n_z(Uint32 reg0, Uint32 reg1, Uint32 reg2);
1.1.1.2 root 84:
85: static Uint32 read_memory(int space, Uint16 address);
1.1.1.6 ! root 86: static inline Uint32 read_memory_p(Uint16 address);
1.1.1.2 root 87: static Uint32 read_memory_disasm(int space, Uint16 address);
1.1.1.6 ! root 88:
! 89: static inline void write_memory(int space, Uint16 address, Uint32 value);
! 90: static void write_memory_raw(int space, Uint16 address, Uint32 value);
1.1.1.4 root 91: static void write_memory_disasm(int space, Uint16 address, Uint32 value);
1.1.1.6 ! root 92:
1.1.1.4 root 93: static void dsp_write_reg(Uint32 numreg, Uint32 value);
1.1 root 94:
1.1.1.4 root 95: static void dsp_stack_push(Uint32 curpc, Uint32 cursr, Uint16 sshOnly);
1.1.1.2 root 96: static void dsp_stack_pop(Uint32 *curpc, Uint32 *cursr);
1.1.1.4 root 97: static void dsp_compute_ssh_ssl(void);
1.1 root 98:
99: static void opcode8h_0(void);
100:
1.1.1.2 root 101: static void dsp_update_rn(Uint32 numreg, Sint16 modifier);
102: static void dsp_update_rn_bitreverse(Uint32 numreg);
103: static void dsp_update_rn_modulo(Uint32 numreg, Sint16 modifier);
104: static int dsp_calc_ea(Uint32 ea_mode, Uint32 *dst_addr);
105: static int dsp_calc_cc(Uint32 cc_code);
1.1 root 106:
107: static void dsp_undefined(void);
108:
109: /* Instructions without parallel moves */
110: static void dsp_andi(void);
1.1.1.4 root 111: static void dsp_bchg_aa(void);
112: static void dsp_bchg_ea(void);
113: static void dsp_bchg_pp(void);
114: static void dsp_bchg_reg(void);
115: static void dsp_bclr_aa(void);
116: static void dsp_bclr_ea(void);
117: static void dsp_bclr_pp(void);
118: static void dsp_bclr_reg(void);
119: static void dsp_bset_aa(void);
120: static void dsp_bset_ea(void);
121: static void dsp_bset_pp(void);
122: static void dsp_bset_reg(void);
123: static void dsp_btst_aa(void);
124: static void dsp_btst_ea(void);
125: static void dsp_btst_pp(void);
126: static void dsp_btst_reg(void);
1.1 root 127: static void dsp_div(void);
128: static void dsp_enddo(void);
129: static void dsp_illegal(void);
1.1.1.4 root 130: static void dsp_jcc_imm(void);
131: static void dsp_jcc_ea(void);
132: static void dsp_jclr_aa(void);
133: static void dsp_jclr_ea(void);
134: static void dsp_jclr_pp(void);
135: static void dsp_jclr_reg(void);
136: static void dsp_jmp_ea(void);
137: static void dsp_jmp_imm(void);
138: static void dsp_jscc_ea(void);
139: static void dsp_jscc_imm(void);
140: static void dsp_jsclr_aa(void);
141: static void dsp_jsclr_ea(void);
142: static void dsp_jsclr_pp(void);
143: static void dsp_jsclr_reg(void);
144: static void dsp_jset_aa(void);
145: static void dsp_jset_ea(void);
146: static void dsp_jset_pp(void);
147: static void dsp_jset_reg(void);
148: static void dsp_jsr_ea(void);
149: static void dsp_jsr_imm(void);
150: static void dsp_jsset_aa(void);
151: static void dsp_jsset_ea(void);
152: static void dsp_jsset_pp(void);
153: static void dsp_jsset_reg(void);
1.1 root 154: static void dsp_lua(void);
1.1.1.4 root 155: static void dsp_movem_ea(void);
156: static void dsp_movem_aa(void);
1.1 root 157: static void dsp_nop(void);
158: static void dsp_norm(void);
159: static void dsp_ori(void);
160: static void dsp_reset(void);
161: static void dsp_rti(void);
162: static void dsp_rts(void);
163: static void dsp_stop(void);
164: static void dsp_swi(void);
165: static void dsp_tcc(void);
166: static void dsp_wait(void);
167:
1.1.1.3 root 168: static void dsp_do_ea(void);
169: static void dsp_do_aa(void);
170: static void dsp_do_imm(void);
171: static void dsp_do_reg(void);
172: static void dsp_rep_aa(void);
173: static void dsp_rep_ea(void);
174: static void dsp_rep_imm(void);
175: static void dsp_rep_reg(void);
176: static void dsp_movec_aa(void);
177: static void dsp_movec_ea(void);
178: static void dsp_movec_imm(void);
179: static void dsp_movec_reg(void);
1.1 root 180: static void dsp_movep_0(void);
181: static void dsp_movep_1(void);
1.1.1.4 root 182: static void dsp_movep_23(void);
1.1 root 183:
184: /* Parallel move analyzer */
1.1.1.2 root 185: static int dsp_pm_read_accu24(int numreg, Uint32 *dest);
1.1 root 186: static void dsp_pm_0(void);
187: static void dsp_pm_1(void);
188: static void dsp_pm_2(void);
189: static void dsp_pm_2_2(void);
190: static void dsp_pm_3(void);
191: static void dsp_pm_4(void);
1.1.1.4 root 192: static void dsp_pm_4x(void);
1.1 root 193: static void dsp_pm_5(void);
194: static void dsp_pm_8(void);
195:
196: /* 56bits arithmetic */
1.1.1.2 root 197: static Uint16 dsp_abs56(Uint32 *dest);
198: static Uint16 dsp_asl56(Uint32 *dest);
199: static Uint16 dsp_asr56(Uint32 *dest);
200: static Uint16 dsp_add56(Uint32 *source, Uint32 *dest);
201: static Uint16 dsp_sub56(Uint32 *source, Uint32 *dest);
1.1.1.5 root 202: static void dsp_mul56(Uint32 source1, Uint32 source2, Uint32 *dest, Uint8 signe);
1.1.1.2 root 203: static void dsp_rnd56(Uint32 *dest);
1.1 root 204:
205: /* Instructions with parallel moves */
1.1.1.6 ! root 206: static void dsp_abs_a(void);
! 207: static void dsp_abs_b(void);
! 208: static void dsp_adc_x_a(void);
! 209: static void dsp_adc_x_b(void);
! 210: static void dsp_adc_y_a(void);
! 211: static void dsp_adc_y_b(void);
! 212: static void dsp_add_b_a(void);
! 213: static void dsp_add_a_b(void);
! 214: static void dsp_add_x_a(void);
! 215: static void dsp_add_x_b(void);
! 216: static void dsp_add_y_a(void);
! 217: static void dsp_add_y_b(void);
! 218: static void dsp_add_x0_a(void);
! 219: static void dsp_add_x0_b(void);
! 220: static void dsp_add_y0_a(void);
! 221: static void dsp_add_y0_b(void);
! 222: static void dsp_add_x1_a(void);
! 223: static void dsp_add_x1_b(void);
! 224: static void dsp_add_y1_a(void);
! 225: static void dsp_add_y1_b(void);
! 226: static void dsp_addl_b_a(void);
! 227: static void dsp_addl_b_a(void);
! 228: static void dsp_addl_a_b(void);
! 229: static void dsp_addr_b_a(void);
! 230: static void dsp_addr_a_b(void);
! 231: static void dsp_and_x0_a(void);
! 232: static void dsp_and_x0_b(void);
! 233: static void dsp_and_y0_a(void);
! 234: static void dsp_and_y0_b(void);
! 235: static void dsp_and_x1_a(void);
! 236: static void dsp_and_x1_b(void);
! 237: static void dsp_and_y1_a(void);
! 238: static void dsp_and_y1_b(void);
! 239: static void dsp_asl_b_a(void);
! 240: static void dsp_asl_a_b(void);
! 241: static void dsp_asr_b_a(void);
! 242: static void dsp_asr_a_b(void);
! 243: static void dsp_clr_a(void);
! 244: static void dsp_clr_b(void);
! 245: static void dsp_cmp_b_a(void);
! 246: static void dsp_cmp_a_b(void);
! 247: static void dsp_cmp_x0_a(void);
! 248: static void dsp_cmp_x0_b(void);
! 249: static void dsp_cmp_y0_a(void);
! 250: static void dsp_cmp_y0_b(void);
! 251: static void dsp_cmp_x1_a(void);
! 252: static void dsp_cmp_x1_b(void);
! 253: static void dsp_cmp_y1_a(void);
! 254: static void dsp_cmp_y1_b(void);
! 255: static void dsp_cmpm_b_a(void);
! 256: static void dsp_cmpm_a_b(void);
! 257: static void dsp_cmpm_x0_a(void);
! 258: static void dsp_cmpm_x0_b(void);
! 259: static void dsp_cmpm_y0_a(void);
! 260: static void dsp_cmpm_y0_b(void);
! 261: static void dsp_cmpm_x1_a(void);
! 262: static void dsp_cmpm_x1_b(void);
! 263: static void dsp_cmpm_y1_a(void);
! 264: static void dsp_cmpm_y1_b(void);
! 265: static void dsp_eor_x0_a(void);
! 266: static void dsp_eor_x0_b(void);
! 267: static void dsp_eor_y0_a(void);
! 268: static void dsp_eor_y0_b(void);
! 269: static void dsp_eor_x1_a(void);
! 270: static void dsp_eor_x1_b(void);
! 271: static void dsp_eor_y1_a(void);
! 272: static void dsp_eor_y1_b(void);
! 273: static void dsp_lsl_a(void);
! 274: static void dsp_lsl_b(void);
! 275: static void dsp_lsr_a(void);
! 276: static void dsp_lsr_b(void);
! 277: static void dsp_mac_p_x0_x0_a(void);
! 278: static void dsp_mac_m_x0_x0_a(void);
! 279: static void dsp_mac_p_x0_x0_b(void);
! 280: static void dsp_mac_m_x0_x0_b(void);
! 281: static void dsp_mac_p_y0_y0_a(void);
! 282: static void dsp_mac_m_y0_y0_a(void);
! 283: static void dsp_mac_p_y0_y0_b(void);
! 284: static void dsp_mac_m_y0_y0_b(void);
! 285: static void dsp_mac_p_x1_x0_a(void);
! 286: static void dsp_mac_m_x1_x0_a(void);
! 287: static void dsp_mac_p_x1_x0_b(void);
! 288: static void dsp_mac_m_x1_x0_b(void);
! 289: static void dsp_mac_p_y1_y0_a(void);
! 290: static void dsp_mac_m_y1_y0_a(void);
! 291: static void dsp_mac_p_y1_y0_b(void);
! 292: static void dsp_mac_m_y1_y0_b(void);
! 293: static void dsp_mac_p_x0_y1_a(void);
! 294: static void dsp_mac_m_x0_y1_a(void);
! 295: static void dsp_mac_p_x0_y1_b(void);
! 296: static void dsp_mac_m_x0_y1_b(void);
! 297: static void dsp_mac_p_y0_x0_a(void);
! 298: static void dsp_mac_m_y0_x0_a(void);
! 299: static void dsp_mac_p_y0_x0_b(void);
! 300: static void dsp_mac_m_y0_x0_b(void);
! 301: static void dsp_mac_p_x1_y0_a(void);
! 302: static void dsp_mac_m_x1_y0_a(void);
! 303: static void dsp_mac_p_x1_y0_b(void);
! 304: static void dsp_mac_m_x1_y0_b(void);
! 305: static void dsp_mac_p_y1_x1_a(void);
! 306: static void dsp_mac_m_y1_x1_a(void);
! 307: static void dsp_mac_p_y1_x1_b(void);
! 308: static void dsp_mac_m_y1_x1_b(void);
! 309: static void dsp_macr_p_x0_x0_a(void);
! 310: static void dsp_macr_m_x0_x0_a(void);
! 311: static void dsp_macr_p_x0_x0_b(void);
! 312: static void dsp_macr_m_x0_x0_b(void);
! 313: static void dsp_macr_p_y0_y0_a(void);
! 314: static void dsp_macr_m_y0_y0_a(void);
! 315: static void dsp_macr_p_y0_y0_b(void);
! 316: static void dsp_macr_m_y0_y0_b(void);
! 317: static void dsp_macr_p_x1_x0_a(void);
! 318: static void dsp_macr_m_x1_x0_a(void);
! 319: static void dsp_macr_p_x1_x0_b(void);
! 320: static void dsp_macr_m_x1_x0_b(void);
! 321: static void dsp_macr_p_y1_y0_a(void);
! 322: static void dsp_macr_m_y1_y0_a(void);
! 323: static void dsp_macr_p_y1_y0_b(void);
! 324: static void dsp_macr_m_y1_y0_b(void);
! 325: static void dsp_macr_p_x0_y1_a(void);
! 326: static void dsp_macr_m_x0_y1_a(void);
! 327: static void dsp_macr_p_x0_y1_b(void);
! 328: static void dsp_macr_m_x0_y1_b(void);
! 329: static void dsp_macr_p_y0_x0_a(void);
! 330: static void dsp_macr_m_y0_x0_a(void);
! 331: static void dsp_macr_p_y0_x0_b(void);
! 332: static void dsp_macr_m_y0_x0_b(void);
! 333: static void dsp_macr_p_x1_y0_a(void);
! 334: static void dsp_macr_m_x1_y0_a(void);
! 335: static void dsp_macr_p_x1_y0_b(void);
! 336: static void dsp_macr_m_x1_y0_b(void);
! 337: static void dsp_macr_p_y1_x1_a(void);
! 338: static void dsp_macr_m_y1_x1_a(void);
! 339: static void dsp_macr_p_y1_x1_b(void);
! 340: static void dsp_macr_m_y1_x1_b(void);
1.1 root 341: static void dsp_move(void);
1.1.1.6 ! root 342: static void dsp_mpy_p_x0_x0_a(void);
! 343: static void dsp_mpy_m_x0_x0_a(void);
! 344: static void dsp_mpy_p_x0_x0_b(void);
! 345: static void dsp_mpy_m_x0_x0_b(void);
! 346: static void dsp_mpy_p_y0_y0_a(void);
! 347: static void dsp_mpy_m_y0_y0_a(void);
! 348: static void dsp_mpy_p_y0_y0_b(void);
! 349: static void dsp_mpy_m_y0_y0_b(void);
! 350: static void dsp_mpy_p_x1_x0_a(void);
! 351: static void dsp_mpy_m_x1_x0_a(void);
! 352: static void dsp_mpy_p_x1_x0_b(void);
! 353: static void dsp_mpy_m_x1_x0_b(void);
! 354: static void dsp_mpy_p_y1_y0_a(void);
! 355: static void dsp_mpy_m_y1_y0_a(void);
! 356: static void dsp_mpy_p_y1_y0_b(void);
! 357: static void dsp_mpy_m_y1_y0_b(void);
! 358: static void dsp_mpy_p_x0_y1_a(void);
! 359: static void dsp_mpy_m_x0_y1_a(void);
! 360: static void dsp_mpy_p_x0_y1_b(void);
! 361: static void dsp_mpy_m_x0_y1_b(void);
! 362: static void dsp_mpy_p_y0_x0_a(void);
! 363: static void dsp_mpy_m_y0_x0_a(void);
! 364: static void dsp_mpy_p_y0_x0_b(void);
! 365: static void dsp_mpy_m_y0_x0_b(void);
! 366: static void dsp_mpy_p_x1_y0_a(void);
! 367: static void dsp_mpy_m_x1_y0_a(void);
! 368: static void dsp_mpy_p_x1_y0_b(void);
! 369: static void dsp_mpy_m_x1_y0_b(void);
! 370: static void dsp_mpy_p_y1_x1_a(void);
! 371: static void dsp_mpy_m_y1_x1_a(void);
! 372: static void dsp_mpy_p_y1_x1_b(void);
! 373: static void dsp_mpy_m_y1_x1_b(void);
! 374: static void dsp_mpyr_p_x0_x0_a(void);
! 375: static void dsp_mpyr_m_x0_x0_a(void);
! 376: static void dsp_mpyr_p_x0_x0_b(void);
! 377: static void dsp_mpyr_m_x0_x0_b(void);
! 378: static void dsp_mpyr_p_y0_y0_a(void);
! 379: static void dsp_mpyr_m_y0_y0_a(void);
! 380: static void dsp_mpyr_p_y0_y0_b(void);
! 381: static void dsp_mpyr_m_y0_y0_b(void);
! 382: static void dsp_mpyr_p_x1_x0_a(void);
! 383: static void dsp_mpyr_m_x1_x0_a(void);
! 384: static void dsp_mpyr_p_x1_x0_b(void);
! 385: static void dsp_mpyr_m_x1_x0_b(void);
! 386: static void dsp_mpyr_p_y1_y0_a(void);
! 387: static void dsp_mpyr_m_y1_y0_a(void);
! 388: static void dsp_mpyr_p_y1_y0_b(void);
! 389: static void dsp_mpyr_m_y1_y0_b(void);
! 390: static void dsp_mpyr_p_x0_y1_a(void);
! 391: static void dsp_mpyr_m_x0_y1_a(void);
! 392: static void dsp_mpyr_p_x0_y1_b(void);
! 393: static void dsp_mpyr_m_x0_y1_b(void);
! 394: static void dsp_mpyr_p_y0_x0_a(void);
! 395: static void dsp_mpyr_m_y0_x0_a(void);
! 396: static void dsp_mpyr_p_y0_x0_b(void);
! 397: static void dsp_mpyr_m_y0_x0_b(void);
! 398: static void dsp_mpyr_p_x1_y0_a(void);
! 399: static void dsp_mpyr_m_x1_y0_a(void);
! 400: static void dsp_mpyr_p_x1_y0_b(void);
! 401: static void dsp_mpyr_m_x1_y0_b(void);
! 402: static void dsp_mpyr_p_y1_x1_a(void);
! 403: static void dsp_mpyr_m_y1_x1_a(void);
! 404: static void dsp_mpyr_p_y1_x1_b(void);
! 405: static void dsp_mpyr_m_y1_x1_b(void);
! 406: static void dsp_neg_a(void);
! 407: static void dsp_neg_b(void);
! 408: static void dsp_not_a(void);
! 409: static void dsp_not_b(void);
! 410: static void dsp_or_x0_a(void);
! 411: static void dsp_or_x0_b(void);
! 412: static void dsp_or_y0_a(void);
! 413: static void dsp_or_y0_b(void);
! 414: static void dsp_or_x1_a(void);
! 415: static void dsp_or_x1_b(void);
! 416: static void dsp_or_y1_a(void);
! 417: static void dsp_or_y1_b(void);
! 418: static void dsp_rnd_a(void);
! 419: static void dsp_rnd_b(void);
! 420: static void dsp_rol_a(void);
! 421: static void dsp_rol_b(void);
! 422: static void dsp_ror_a(void);
! 423: static void dsp_ror_b(void);
! 424: static void dsp_sbc_x_a(void);
! 425: static void dsp_sbc_x_b(void);
! 426: static void dsp_sbc_y_a(void);
! 427: static void dsp_sbc_y_b(void);
! 428: static void dsp_sub_b_a(void);
! 429: static void dsp_sub_a_b(void);
! 430: static void dsp_sub_x_a(void);
! 431: static void dsp_sub_x_b(void);
! 432: static void dsp_sub_y_a(void);
! 433: static void dsp_sub_y_b(void);
! 434: static void dsp_sub_x0_a(void);
! 435: static void dsp_sub_x0_b(void);
! 436: static void dsp_sub_y0_a(void);
! 437: static void dsp_sub_y0_b(void);
! 438: static void dsp_sub_x1_a(void);
! 439: static void dsp_sub_x1_b(void);
! 440: static void dsp_sub_y1_a(void);
! 441: static void dsp_sub_y1_b(void);
! 442: static void dsp_subl_a(void);
! 443: static void dsp_subl_b(void);
! 444: static void dsp_subr_a(void);
! 445: static void dsp_subr_b(void);
! 446: static void dsp_tfr_b_a(void);
! 447: static void dsp_tfr_a_b(void);
! 448: static void dsp_tfr_x0_a(void);
! 449: static void dsp_tfr_x0_b(void);
! 450: static void dsp_tfr_y0_a(void);
! 451: static void dsp_tfr_y0_b(void);
! 452: static void dsp_tfr_x1_a(void);
! 453: static void dsp_tfr_x1_b(void);
! 454: static void dsp_tfr_y1_a(void);
! 455: static void dsp_tfr_y1_b(void);
! 456: static void dsp_tst_a(void);
! 457: static void dsp_tst_b(void);
1.1 root 458:
1.1.1.6 ! root 459: static const dsp_emul_t opcodes8h[512] = {
1.1.1.4 root 460: /* 0x00 - 0x3f */
461: opcode8h_0, dsp_undefined, dsp_undefined, dsp_undefined, opcode8h_0, dsp_andi, dsp_undefined, dsp_ori,
462: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_andi, dsp_undefined, dsp_ori,
463: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_andi, dsp_undefined, dsp_ori,
464: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_andi, dsp_undefined, dsp_ori,
465: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
466: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
467: dsp_undefined, dsp_undefined, dsp_div, dsp_div, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
468: dsp_norm, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
469:
470: /* 0x40 - 0x7f */
471: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
472: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
473: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
474: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
475: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
476: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
477: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
478: dsp_tcc, dsp_tcc, dsp_tcc, dsp_tcc, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
479:
480: /* 0x80 - 0xbf */
481: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
482: dsp_lua, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_movec_reg, dsp_undefined, dsp_undefined,
483: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
484: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_movec_reg, dsp_undefined, dsp_undefined,
485: dsp_undefined, dsp_movec_aa, dsp_undefined, dsp_movec_aa, dsp_undefined, dsp_movec_imm, dsp_undefined, dsp_undefined,
486: dsp_undefined, dsp_movec_ea, dsp_undefined, dsp_movec_ea, dsp_undefined, dsp_movec_imm, dsp_undefined, dsp_undefined,
487: dsp_undefined, dsp_movec_aa, dsp_undefined, dsp_movec_aa, dsp_undefined, dsp_movec_imm, dsp_undefined, dsp_undefined,
488: dsp_undefined, dsp_movec_ea, dsp_undefined, dsp_movec_ea, dsp_undefined, dsp_movec_imm, dsp_undefined, dsp_undefined,
489:
490: /* 0xc0 - 0xff */
491: dsp_do_aa, dsp_rep_aa, dsp_do_aa, dsp_rep_aa, dsp_do_imm, dsp_rep_imm, dsp_undefined, dsp_undefined,
492: dsp_do_ea, dsp_rep_ea, dsp_do_ea, dsp_rep_ea, dsp_do_imm, dsp_rep_imm, dsp_undefined, dsp_undefined,
493: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_do_imm, dsp_rep_imm, dsp_undefined, dsp_undefined,
494: dsp_do_reg, dsp_rep_reg, dsp_undefined, dsp_undefined, dsp_do_imm, dsp_rep_imm, dsp_undefined, dsp_undefined,
495: dsp_movem_aa, dsp_movem_aa, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
496: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_movem_ea, dsp_movem_ea, dsp_undefined, dsp_undefined,
497: dsp_movem_aa, dsp_movem_aa, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
498: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_movem_ea, dsp_movem_ea, dsp_undefined, dsp_undefined,
499:
500: /* 0x100 - 0x13f */
1.1.1.6 ! root 501: dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0,
1.1.1.4 root 502: dsp_movep_0, dsp_movep_0, dsp_movep_1, dsp_movep_1, dsp_movep_23, dsp_movep_23, dsp_movep_23, dsp_movep_23,
1.1.1.6 ! root 503: dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0,
1.1.1.4 root 504: dsp_movep_0, dsp_movep_0, dsp_movep_1, dsp_movep_1, dsp_movep_23, dsp_movep_23, dsp_movep_23, dsp_movep_23,
1.1.1.6 ! root 505: dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0,
1.1.1.4 root 506: dsp_movep_0, dsp_movep_0, dsp_movep_1, dsp_movep_1, dsp_movep_23, dsp_movep_23, dsp_movep_23, dsp_movep_23,
1.1.1.6 ! root 507: dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0, dsp_pm_0,
1.1.1.4 root 508: dsp_movep_0, dsp_movep_0, dsp_movep_1, dsp_movep_1, dsp_movep_23, dsp_movep_23, dsp_movep_23, dsp_movep_23,
509:
510: /* 0x140 - 0x17f */
511: dsp_bclr_aa, dsp_bset_aa, dsp_bclr_aa, dsp_bset_aa, dsp_jclr_aa, dsp_jset_aa, dsp_jclr_aa, dsp_jset_aa,
512: dsp_bclr_ea, dsp_bset_ea, dsp_bclr_ea, dsp_bset_ea, dsp_jclr_ea, dsp_jset_ea, dsp_jclr_ea, dsp_jset_ea,
513: dsp_bclr_pp, dsp_bset_pp, dsp_bclr_pp, dsp_bset_pp, dsp_jclr_pp, dsp_jset_pp, dsp_jclr_pp, dsp_jset_pp,
514: dsp_jclr_reg, dsp_jset_reg, dsp_bclr_reg, dsp_bset_reg, dsp_jmp_ea, dsp_jcc_ea, dsp_undefined, dsp_undefined,
515: dsp_bchg_aa, dsp_btst_aa, dsp_bchg_aa, dsp_btst_aa, dsp_jsclr_aa, dsp_jsset_aa, dsp_jsclr_aa, dsp_jsset_aa,
516: dsp_bchg_ea, dsp_btst_ea, dsp_bchg_ea, dsp_btst_ea, dsp_jsclr_ea, dsp_jsset_ea, dsp_jsclr_ea, dsp_jsset_ea,
517: dsp_bchg_pp, dsp_btst_pp, dsp_bchg_pp, dsp_btst_pp, dsp_jsclr_pp, dsp_jsset_pp, dsp_jsclr_pp, dsp_jsset_pp,
518: dsp_jsclr_reg, dsp_jsset_reg, dsp_bchg_reg, dsp_btst_reg, dsp_jsr_ea, dsp_jscc_ea, dsp_undefined, dsp_undefined,
519:
520: /* 0x180 - 0x1bf */
521: dsp_jmp_imm, dsp_jmp_imm, dsp_jmp_imm, dsp_jmp_imm, dsp_jmp_imm, dsp_jmp_imm, dsp_jmp_imm, dsp_jmp_imm,
522: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
523: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
524: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
525: dsp_jsr_imm, dsp_jsr_imm, dsp_jsr_imm, dsp_jsr_imm, dsp_jsr_imm, dsp_jsr_imm, dsp_jsr_imm, dsp_jsr_imm,
526: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
527: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
528: dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined, dsp_undefined,
529:
530: /* 0x1c0 - 0x1ff */
531: dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm,
532: dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm,
533: dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm,
534: dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm, dsp_jcc_imm,
535: dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm,
536: dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm,
537: dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm,
538: dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm, dsp_jscc_imm,
1.1 root 539: };
540:
1.1.1.6 ! root 541: static const dsp_emul_t opcodes_parmove[16] = {
! 542: dsp_pm_0, dsp_pm_1, dsp_pm_2, dsp_pm_3, dsp_pm_4, dsp_pm_5, dsp_pm_5, dsp_pm_5,
! 543: dsp_pm_8, dsp_pm_8, dsp_pm_8, dsp_pm_8, dsp_pm_8, dsp_pm_8, dsp_pm_8, dsp_pm_8
1.1 root 544: };
545:
1.1.1.6 ! root 546: static const dsp_emul_t opcodes_alu[256] = {
1.1.1.4 root 547: /* 0x00 - 0x3f */
1.1.1.6 ! root 548: dsp_move , dsp_tfr_b_a, dsp_addr_b_a, dsp_tst_a, dsp_undefined, dsp_cmp_b_a, dsp_subr_a, dsp_cmpm_b_a,
! 549: dsp_undefined, dsp_tfr_a_b, dsp_addr_a_b, dsp_tst_b, dsp_undefined, dsp_cmp_a_b, dsp_subr_b, dsp_cmpm_a_b,
! 550: dsp_add_b_a, dsp_rnd_a, dsp_addl_b_a, dsp_clr_a, dsp_sub_b_a, dsp_undefined, dsp_subl_a, dsp_not_a,
! 551: dsp_add_a_b, dsp_rnd_b, dsp_addl_a_b, dsp_clr_b, dsp_sub_a_b, dsp_undefined, dsp_subl_b, dsp_not_b,
! 552: dsp_add_x_a, dsp_adc_x_a, dsp_asr_b_a, dsp_lsr_a, dsp_sub_x_a, dsp_sbc_x_a, dsp_abs_a, dsp_ror_a,
! 553: dsp_add_x_b, dsp_adc_x_b, dsp_asr_a_b, dsp_lsr_b, dsp_sub_x_b, dsp_sbc_x_b, dsp_abs_b, dsp_ror_b,
! 554: dsp_add_y_a, dsp_adc_y_a, dsp_asl_b_a, dsp_lsl_a, dsp_sub_y_a, dsp_sbc_y_a, dsp_neg_a, dsp_rol_a,
! 555: dsp_add_y_b, dsp_adc_y_b, dsp_asl_a_b, dsp_lsl_b, dsp_sub_y_b, dsp_sbc_y_b, dsp_neg_b, dsp_rol_b,
1.1.1.4 root 556:
557: /* 0x40 - 0x7f */
1.1.1.6 ! root 558: dsp_add_x0_a, dsp_tfr_x0_a, dsp_or_x0_a, dsp_eor_x0_a, dsp_sub_x0_a, dsp_cmp_x0_a, dsp_and_x0_a, dsp_cmpm_x0_a,
! 559: dsp_add_x0_b, dsp_tfr_x0_b, dsp_or_x0_b, dsp_eor_x0_b, dsp_sub_x0_b, dsp_cmp_x0_b, dsp_and_x0_b, dsp_cmpm_x0_b,
! 560: dsp_add_y0_a, dsp_tfr_y0_a, dsp_or_y0_a, dsp_eor_y0_a, dsp_sub_y0_a, dsp_cmp_y0_a, dsp_and_y0_a, dsp_cmpm_y0_a,
! 561: dsp_add_y0_b, dsp_tfr_y0_b, dsp_or_y0_b, dsp_eor_y0_b, dsp_sub_y0_b, dsp_cmp_y0_b, dsp_and_y0_b, dsp_cmpm_y0_b,
! 562: dsp_add_x1_a, dsp_tfr_x1_a, dsp_or_x1_a, dsp_eor_x1_a, dsp_sub_x1_a, dsp_cmp_x1_a, dsp_and_x1_a, dsp_cmpm_x1_a,
! 563: dsp_add_x1_b, dsp_tfr_x1_b, dsp_or_x1_b, dsp_eor_x1_b, dsp_sub_x1_b, dsp_cmp_x1_b, dsp_and_x1_b, dsp_cmpm_x1_b,
! 564: dsp_add_y1_a, dsp_tfr_y1_a, dsp_or_y1_a, dsp_eor_y1_a, dsp_sub_y1_a, dsp_cmp_y1_a, dsp_and_y1_a, dsp_cmpm_y1_a,
! 565: dsp_add_y1_b, dsp_tfr_y1_b, dsp_or_y1_b, dsp_eor_y1_b, dsp_sub_y1_b, dsp_cmp_y1_b, dsp_and_y1_b, dsp_cmpm_y1_b,
1.1.1.4 root 566:
567: /* 0x80 - 0xbf */
1.1.1.6 ! root 568: dsp_mpy_p_x0_x0_a, dsp_mpyr_p_x0_x0_a, dsp_mac_p_x0_x0_a, dsp_macr_p_x0_x0_a, dsp_mpy_m_x0_x0_a, dsp_mpyr_m_x0_x0_a, dsp_mac_m_x0_x0_a, dsp_macr_m_x0_x0_a,
! 569: dsp_mpy_p_x0_x0_b, dsp_mpyr_p_x0_x0_b, dsp_mac_p_x0_x0_b, dsp_macr_p_x0_x0_b, dsp_mpy_m_x0_x0_b, dsp_mpyr_m_x0_x0_b, dsp_mac_m_x0_x0_b, dsp_macr_m_x0_x0_b,
! 570: dsp_mpy_p_y0_y0_a, dsp_mpyr_p_y0_y0_a, dsp_mac_p_y0_y0_a, dsp_macr_p_y0_y0_a, dsp_mpy_m_y0_y0_a, dsp_mpyr_m_y0_y0_a, dsp_mac_m_y0_y0_a, dsp_macr_m_y0_y0_a,
! 571: dsp_mpy_p_y0_y0_b, dsp_mpyr_p_y0_y0_b, dsp_mac_p_y0_y0_b, dsp_macr_p_y0_y0_b, dsp_mpy_m_y0_y0_b, dsp_mpyr_m_y0_y0_b, dsp_mac_m_y0_y0_b, dsp_macr_m_y0_y0_b,
! 572: dsp_mpy_p_x1_x0_a, dsp_mpyr_p_x1_x0_a, dsp_mac_p_x1_x0_a, dsp_macr_p_x1_x0_a, dsp_mpy_m_x1_x0_a, dsp_mpyr_m_x1_x0_a, dsp_mac_m_x1_x0_a, dsp_macr_m_x1_x0_a,
! 573: dsp_mpy_p_x1_x0_b, dsp_mpyr_p_x1_x0_b, dsp_mac_p_x1_x0_b, dsp_macr_p_x1_x0_b, dsp_mpy_m_x1_x0_b, dsp_mpyr_m_x1_x0_b, dsp_mac_m_x1_x0_b, dsp_macr_m_x1_x0_b,
! 574: dsp_mpy_p_y1_y0_a, dsp_mpyr_p_y1_y0_a, dsp_mac_p_y1_y0_a, dsp_macr_p_y1_y0_a, dsp_mpy_m_y1_y0_a, dsp_mpyr_m_y1_y0_a, dsp_mac_m_y1_y0_a, dsp_macr_m_y1_y0_a,
! 575: dsp_mpy_p_y1_y0_b, dsp_mpyr_p_y1_y0_b, dsp_mac_p_y1_y0_b, dsp_macr_p_y1_y0_b, dsp_mpy_m_y1_y0_b, dsp_mpyr_m_y1_y0_b, dsp_mac_m_y1_y0_b, dsp_macr_m_y1_y0_b,
! 576:
! 577: /* 0xc0_m_ 0xff */
! 578: dsp_mpy_p_x0_y1_a, dsp_mpyr_p_x0_y1_a, dsp_mac_p_x0_y1_a, dsp_macr_p_x0_y1_a, dsp_mpy_m_x0_y1_a, dsp_mpyr_m_x0_y1_a, dsp_mac_m_x0_y1_a, dsp_macr_m_x0_y1_a,
! 579: dsp_mpy_p_x0_y1_b, dsp_mpyr_p_x0_y1_b, dsp_mac_p_x0_y1_b, dsp_macr_p_x0_y1_b, dsp_mpy_m_x0_y1_b, dsp_mpyr_m_x0_y1_b, dsp_mac_m_x0_y1_b, dsp_macr_m_x0_y1_b,
! 580: dsp_mpy_p_y0_x0_a, dsp_mpyr_p_y0_x0_a, dsp_mac_p_y0_x0_a, dsp_macr_p_y0_x0_a, dsp_mpy_m_y0_x0_a, dsp_mpyr_m_y0_x0_a, dsp_mac_m_y0_x0_a, dsp_macr_m_y0_x0_a,
! 581: dsp_mpy_p_y0_x0_b, dsp_mpyr_p_y0_x0_b, dsp_mac_p_y0_x0_b, dsp_macr_p_y0_x0_b, dsp_mpy_m_y0_x0_b, dsp_mpyr_m_y0_x0_b, dsp_mac_m_y0_x0_b, dsp_macr_m_y0_x0_b,
! 582: dsp_mpy_p_x1_y0_a, dsp_mpyr_p_x1_y0_a, dsp_mac_p_x1_y0_a, dsp_macr_p_x1_y0_a, dsp_mpy_m_x1_y0_a, dsp_mpyr_m_x1_y0_a, dsp_mac_m_x1_y0_a, dsp_macr_m_x1_y0_a,
! 583: dsp_mpy_p_x1_y0_b, dsp_mpyr_p_x1_y0_b, dsp_mac_p_x1_y0_b, dsp_macr_p_x1_y0_b, dsp_mpy_m_x1_y0_b, dsp_mpyr_m_x1_y0_b, dsp_mac_m_x1_y0_b, dsp_macr_m_x1_y0_b,
! 584: dsp_mpy_p_y1_x1_a, dsp_mpyr_p_y1_x1_a, dsp_mac_p_y1_x1_a, dsp_macr_p_y1_x1_a, dsp_mpy_m_y1_x1_a, dsp_mpyr_m_y1_x1_a, dsp_mac_m_y1_x1_a, dsp_macr_m_y1_x1_a,
! 585: dsp_mpy_p_y1_x1_b, dsp_mpyr_p_y1_x1_b, dsp_mac_p_y1_x1_b, dsp_macr_p_y1_x1_b, dsp_mpy_m_y1_x1_b, dsp_mpyr_m_y1_x1_b, dsp_mac_m_y1_x1_b, dsp_macr_m_y1_x1_b
1.1 root 586: };
587:
1.1.1.6 ! root 588: static const int registers_tcc[16][2] = {
1.1 root 589: {DSP_REG_B,DSP_REG_A},
590: {DSP_REG_A,DSP_REG_B},
591: {DSP_REG_NULL,DSP_REG_NULL},
592: {DSP_REG_NULL,DSP_REG_NULL},
593:
594: {DSP_REG_NULL,DSP_REG_NULL},
595: {DSP_REG_NULL,DSP_REG_NULL},
596: {DSP_REG_NULL,DSP_REG_NULL},
597: {DSP_REG_NULL,DSP_REG_NULL},
598:
599: {DSP_REG_X0,DSP_REG_A},
600: {DSP_REG_X0,DSP_REG_B},
601: {DSP_REG_Y0,DSP_REG_A},
602: {DSP_REG_Y0,DSP_REG_B},
1.1.1.2 root 603:
604: {DSP_REG_X1,DSP_REG_A},
605: {DSP_REG_X1,DSP_REG_B},
1.1 root 606: {DSP_REG_Y1,DSP_REG_A},
607: {DSP_REG_Y1,DSP_REG_B}
608: };
609:
1.1.1.6 ! root 610: static const int registers_mask[64] = {
1.1 root 611: 0, 0, 0, 0,
612: 24, 24, 24, 24,
613: 24, 24, 8, 8,
614: 24, 24, 24, 24,
615:
616: 16, 16, 16, 16,
617: 16, 16, 16, 16,
618: 16, 16, 16, 16,
619: 16, 16, 16, 16,
620:
621: 16, 16, 16, 16,
622: 16, 16, 16, 16,
623: 0, 0, 0, 0,
624: 0, 0, 0, 0,
625:
626: 0, 0, 0, 0,
627: 0, 0, 0, 0,
628: 0, 16, 8, 6,
1.1.1.4 root 629: 16, 16, 16, 16
630: };
631:
1.1.1.6 ! root 632: static const dsp_interrupt_t dsp_interrupt[12] = {
1.1.1.5 root 633: {DSP_INTER_RESET , 0x00, 0, "Reset"},
634: {DSP_INTER_ILLEGAL , 0x3e, 0, "Illegal"},
635: {DSP_INTER_STACK_ERROR , 0x02, 0, "Stack Error"},
636: {DSP_INTER_TRACE , 0x04, 0, "Trace"},
637: {DSP_INTER_SWI , 0x06, 0, "Swi"},
638: {DSP_INTER_HOST_COMMAND , 0xff, 1, "Host Command"},
639: {DSP_INTER_HOST_RCV_DATA, 0x20, 1, "Host receive"},
640: {DSP_INTER_HOST_TRX_DATA, 0x22, 1, "Host transmit"},
641: {DSP_INTER_SSI_RCV_DATA_E, 0x0e, 2, "SSI receive with exception"},
642: {DSP_INTER_SSI_RCV_DATA , 0x0c, 2, "SSI receive"},
643: {DSP_INTER_SSI_TRX_DATA_E, 0x12, 2, "SSI transmit with exception"},
644: {DSP_INTER_SSI_TRX_DATA , 0x10, 2, "SSI tramsmit"}
1.1.1.4 root 645: };
646:
1.1 root 647:
648: /**********************************
649: * Emulator kernel
650: **********************************/
651:
1.1.1.6 ! root 652: void dsp56k_init_cpu(void)
1.1 root 653: {
1.1.1.6 ! root 654: dsp56k_disasm_init();
! 655: isDsp_in_disasm_mode = false;
1.1.1.2 root 656: start_time = SDL_GetTicks();
657: num_inst = 0;
1.1 root 658: }
659:
1.1.1.6 ! root 660: /**
! 661: * Execute one instruction in trace mode at a given PC address.
! 662: * */
! 663: Uint32 dsp56k_execute_one_disasm_instruction(Uint32 pc)
! 664: {
! 665: dsp_core_t *ptr1, *ptr2;
! 666: static dsp_core_t dsp_core_save;
! 667: Uint32 instruction_length;
! 668:
! 669: ptr1 = &dsp_core;
! 670: ptr2 = &dsp_core_save;
! 671:
! 672: /* Set DSP in disasm mode */
! 673: isDsp_in_disasm_mode = true;
! 674:
! 675: /* Save DSP context before executing instruction */
! 676: memcpy(ptr2, ptr1, sizeof(dsp_core));
! 677:
! 678: /* execute and disasm instruction */
! 679: dsp_core.pc = pc;
! 680:
! 681: /* Disasm instruction */
! 682: instruction_length = dsp56k_disasm(DSP_DISASM_MODE) - 1;
! 683:
! 684: /* Execute instruction at address given in parameter to get the number of cycles it takes */
! 685: dsp56k_execute_instruction();
! 686:
! 687: fprintf(stderr, "%s", dsp56k_getInstructionText());
! 688:
! 689: /* Restore DSP context after executing instruction */
! 690: memcpy(ptr1, ptr2, sizeof(dsp_core));
! 691:
! 692: /* Unset DSP in disasm mode */
! 693: isDsp_in_disasm_mode = false;
! 694:
! 695: return instruction_length;
! 696: }
! 697:
1.1.1.4 root 698: void dsp56k_execute_instruction(void)
1.1 root 699: {
1.1.1.2 root 700: Uint32 value;
1.1.1.6 ! root 701: Uint32 disasm_return = 0;
1.1.1.5 root 702: disasm_memory_ptr = 0;
703:
1.1 root 704: /* Decode and execute current instruction */
1.1.1.6 ! root 705: cur_inst = read_memory_p(dsp_core.pc);
1.1 root 706: cur_inst_len = 1;
1.1.1.4 root 707:
708: /* Initialize instruction cycle counter */
1.1.1.6 ! root 709: dsp_core.instr_cycle = 2;
1.1 root 710:
1.1.1.6 ! root 711: /* Disasm current instruction ? (trace mode only) */
! 712: if (LOG_TRACE_LEVEL(TRACE_DSP_DISASM)) {
! 713: /* Call dsp56k_disasm only when DSP is called in trace mode */
! 714: if (isDsp_in_disasm_mode == false) {
! 715: disasm_return = dsp56k_disasm(DSP_TRACE_MODE);
! 716:
! 717: if (disasm_return != 0 && LOG_TRACE_LEVEL(TRACE_DSP_DISASM_REG)) {
! 718: /* DSP regs trace enabled only if DSP DISASM is enabled */
! 719: dsp56k_disasm_reg_save();
! 720: }
! 721: }
! 722: }
! 723:
1.1.1.4 root 724: if (cur_inst < 0x100000) {
725: value = (cur_inst >> 11) & (BITMASK(6) << 3);
726: value += (cur_inst >> 5) & BITMASK(3);
1.1 root 727: opcodes8h[value]();
728: } else {
1.1.1.6 ! root 729: /* Do parallel move read */
! 730: opcodes_parmove[(cur_inst>>20) & BITMASK(4)]();
! 731: }
! 732:
! 733: /* Disasm current instruction ? (trace mode only) */
! 734: if (LOG_TRACE_LEVEL(TRACE_DSP_DISASM)) {
! 735: /* Display only when DSP is called in trace mode */
! 736: if (isDsp_in_disasm_mode == false) {
! 737: if (disasm_return != 0) {
! 738: fprintf(stderr, "%s", dsp56k_getInstructionText());
! 739:
! 740: /* DSP regs trace enabled only if DSP DISASM is enabled */
! 741: if (LOG_TRACE_LEVEL(TRACE_DSP_DISASM_REG))
! 742: dsp56k_disasm_reg_compare();
! 743:
! 744: if (LOG_TRACE_LEVEL(TRACE_DSP_DISASM_MEM)) {
! 745: /* 1 memory change to display ? */
! 746: if (disasm_memory_ptr == 1)
! 747: fprintf(stderr, "\t%s\n", str_disasm_memory[0]);
! 748: /* 2 memory changes to display ? */
! 749: else if (disasm_memory_ptr == 2) {
! 750: fprintf(stderr, "\t%s\n", str_disasm_memory[0]);
! 751: fprintf(stderr, "\t%s\n", str_disasm_memory[1]);
! 752: }
! 753: }
! 754: }
! 755: }
1.1 root 756: }
757:
1.1.1.4 root 758: /* Process the PC */
759: dsp_postexecute_update_pc();
1.1 root 760:
1.1.1.4 root 761: /* Process Interrupts */
1.1 root 762: dsp_postexecute_interrupts();
763:
1.1.1.4 root 764: #if DSP_COUNT_IPS
765: ++num_inst;
766: if ((num_inst & 63) == 0) {
767: /* Evaluate time after <N> instructions have been executed to avoid asking too frequently */
768: Uint32 cur_time = SDL_GetTicks();
769: if (cur_time-start_time>1000) {
770: fprintf(stderr, "Dsp: %d i/s\n", (num_inst*1000)/(cur_time-start_time));
771: start_time=cur_time;
772: num_inst=0;
773: }
774: }
775: #endif
1.1 root 776: }
777:
778: /**********************************
779: * Update the PC
780: **********************************/
781:
782: static void dsp_postexecute_update_pc(void)
783: {
784: /* When running a REP, PC must stay on the current instruction */
1.1.1.6 ! root 785: if (dsp_core.loop_rep) {
1.1 root 786: /* Is PC on the instruction to repeat ? */
1.1.1.6 ! root 787: if (dsp_core.pc_on_rep==0) {
! 788: --dsp_core.registers[DSP_REG_LC];
! 789: dsp_core.registers[DSP_REG_LC] &= BITMASK(16);
1.1 root 790:
1.1.1.6 ! root 791: if (dsp_core.registers[DSP_REG_LC] > 0) {
1.1 root 792: cur_inst_len=0; /* Stay on this instruction */
793: } else {
1.1.1.6 ! root 794: dsp_core.loop_rep = 0;
! 795: dsp_core.registers[DSP_REG_LC] = dsp_core.registers[DSP_REG_LCSAVE];
1.1 root 796: }
797: } else {
798: /* Init LC at right value */
1.1.1.6 ! root 799: if (dsp_core.registers[DSP_REG_LC] == 0) {
! 800: dsp_core.registers[DSP_REG_LC] = 0x010000;
1.1 root 801: }
1.1.1.6 ! root 802: dsp_core.pc_on_rep = 0;
1.1 root 803: }
804: }
805:
806: /* Normal execution, go to next instruction */
1.1.1.6 ! root 807: dsp_core.pc += cur_inst_len;
1.1 root 808:
809: /* When running a DO loop, we test the end of loop with the */
810: /* updated PC, pointing to last instruction of the loop */
1.1.1.6 ! root 811: if (dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_LF)) {
1.1 root 812:
813: /* Did we execute the last instruction in loop ? */
1.1.1.6 ! root 814: if (dsp_core.pc == dsp_core.registers[DSP_REG_LA]+1) {
! 815: --dsp_core.registers[DSP_REG_LC];
! 816: dsp_core.registers[DSP_REG_LC] &= BITMASK(16);
1.1 root 817:
1.1.1.6 ! root 818: if (dsp_core.registers[DSP_REG_LC]==0) {
1.1 root 819: /* end of loop */
1.1.1.4 root 820: Uint32 saved_pc, saved_sr;
821:
822: dsp_stack_pop(&saved_pc, &saved_sr);
1.1.1.6 ! root 823: dsp_core.registers[DSP_REG_SR] &= 0x7f;
! 824: dsp_core.registers[DSP_REG_SR] |= saved_sr & (1<<DSP_SR_LF);
! 825: dsp_stack_pop(&dsp_core.registers[DSP_REG_LA], &dsp_core.registers[DSP_REG_LC]);
1.1 root 826: } else {
827: /* Loop one more time */
1.1.1.6 ! root 828: dsp_core.pc = dsp_core.registers[DSP_REG_SSH];
1.1 root 829: }
830: }
831: }
832: }
833:
834: /**********************************
835: * Interrupts
836: **********************************/
837:
1.1.1.5 root 838: /* Post a new interrupt to the interrupt table */
839: void dsp_add_interrupt(Uint16 inter)
840: {
841: /* detect if this interrupt is used or not */
1.1.1.6 ! root 842: if (dsp_core.interrupt_ipl[inter] == -1)
1.1.1.5 root 843: return;
844:
845: /* add this interrupt to the pending interrupts table */
1.1.1.6 ! root 846: if (dsp_core.interrupt_isPending[inter] == 0) {
! 847: dsp_core.interrupt_isPending[inter] = 1;
! 848: dsp_core.interrupt_counter ++;
1.1.1.5 root 849: }
850: }
851:
852: static void dsp_setInterruptIPL(Uint32 value)
853: {
854: Uint32 ipl_ssi, ipl_hi, i;
855:
856: ipl_ssi = ((value >> 12) & 3) - 1;
857: ipl_hi = ((value >> 10) & 3) - 1;
858:
859: /* set IPL_HI */
860: for (i=5;i<8;i++) {
1.1.1.6 ! root 861: dsp_core.interrupt_ipl[i] = ipl_hi;
1.1.1.5 root 862: }
863:
864: /* set IPL_SSI */
865: for (i=8;i<12;i++) {
1.1.1.6 ! root 866: dsp_core.interrupt_ipl[i] = ipl_ssi;
1.1.1.5 root 867: }
868: }
869:
1.1 root 870: static void dsp_postexecute_interrupts(void)
871: {
1.1.1.5 root 872: Uint32 index, instr, i;
873: Sint32 ipl_to_raise, ipl_sr;
1.1.1.4 root 874:
875: /* REP is not interruptible */
1.1.1.6 ! root 876: if (dsp_core.loop_rep) {
1.1.1.4 root 877: return;
878: }
879:
880: /* A fast interrupt can not be interrupted. */
1.1.1.6 ! root 881: if (dsp_core.interrupt_state == DSP_INTERRUPT_DISABLED) {
1.1.1.5 root 882:
1.1.1.6 ! root 883: switch (dsp_core.interrupt_pipeline_count) {
1.1.1.5 root 884: case 5:
1.1.1.6 ! root 885: dsp_core.interrupt_pipeline_count --;
1.1.1.5 root 886: return;
887: case 4:
888: /* Prefetch interrupt instruction 1 */
1.1.1.6 ! root 889: dsp_core.interrupt_save_pc = dsp_core.pc;
! 890: dsp_core.pc = dsp_core.interrupt_instr_fetch;
1.1.1.5 root 891:
892: /* is it a LONG interrupt ? */
1.1.1.6 ! root 893: instr = read_memory_p(dsp_core.interrupt_instr_fetch);
1.1.1.5 root 894: if ( ((instr & 0xfff000) == 0x0d0000) || ((instr & 0xffc0ff) == 0x0bc080) ) {
1.1.1.6 ! root 895: dsp_core.interrupt_state = DSP_INTERRUPT_LONG;
! 896: dsp_stack_push(dsp_core.interrupt_save_pc, dsp_core.registers[DSP_REG_SR], 0);
! 897: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_LF)|(1<<DSP_SR_T) |
1.1.1.5 root 898: (1<<DSP_SR_S1)|(1<<DSP_SR_S0) |
899: (1<<DSP_SR_I0)|(1<<DSP_SR_I1));
1.1.1.6 ! root 900: dsp_core.registers[DSP_REG_SR] |= dsp_core.interrupt_IplToRaise<<DSP_SR_I0;
1.1.1.5 root 901: }
1.1.1.6 ! root 902: dsp_core.interrupt_pipeline_count --;
1.1.1.5 root 903: return;
904: case 3:
905: /* Prefetch interrupt instruction 2 */
1.1.1.6 ! root 906: if (dsp_core.pc == dsp_core.interrupt_instr_fetch+1) {
! 907: instr = read_memory_p(dsp_core.pc);
1.1.1.5 root 908: if ( ((instr & 0xfff000) == 0x0d0000) || ((instr & 0xffc0ff) == 0x0bc080) ) {
1.1.1.6 ! root 909: dsp_core.interrupt_state = DSP_INTERRUPT_LONG;
! 910: dsp_stack_push(dsp_core.interrupt_save_pc, dsp_core.registers[DSP_REG_SR], 0);
! 911: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_LF)|(1<<DSP_SR_T) |
1.1.1.5 root 912: (1<<DSP_SR_S1)|(1<<DSP_SR_S0) |
913: (1<<DSP_SR_I0)|(1<<DSP_SR_I1));
1.1.1.6 ! root 914: dsp_core.registers[DSP_REG_SR] |= dsp_core.interrupt_IplToRaise<<DSP_SR_I0;
1.1.1.5 root 915: }
916: }
1.1.1.6 ! root 917: dsp_core.interrupt_pipeline_count --;
1.1.1.5 root 918: return;
919: case 2:
920: /* 1 instruction executed after interrupt */
921: /* before re enable interrupts */
922: /* Was it a FAST interrupt ? */
1.1.1.6 ! root 923: if (dsp_core.pc == dsp_core.interrupt_instr_fetch+2) {
! 924: dsp_core.pc = dsp_core.interrupt_save_pc;
1.1.1.5 root 925: }
1.1.1.6 ! root 926: dsp_core.interrupt_pipeline_count --;
1.1.1.5 root 927: return;
928: case 1:
929: /* Last instruction executed after interrupt */
930: /* before re enable interrupts */
1.1.1.6 ! root 931: dsp_core.interrupt_pipeline_count --;
1.1.1.5 root 932: return;
933: case 0:
934: /* Re enable interrupts */
1.1.1.6 ! root 935: /* All 6 instruction are done, Interrupts can be enabled again */
! 936: dsp_core.interrupt_save_pc = -1;
! 937: dsp_core.interrupt_instr_fetch = -1;
! 938: dsp_core.interrupt_state = DSP_INTERRUPT_NONE;
! 939: break;
1.1.1.4 root 940: }
941: }
1.1 root 942:
1.1.1.4 root 943: /* Trace Interrupt ? */
1.1.1.6 ! root 944: if (dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_T)) {
1.1.1.5 root 945: dsp_add_interrupt(DSP_INTER_TRACE);
1.1.1.4 root 946: }
947:
948: /* No interrupt to execute */
1.1.1.6 ! root 949: if (dsp_core.interrupt_counter == 0) {
1.1.1.4 root 950: return;
1.1 root 951: }
952:
1.1.1.5 root 953: /* search for an interrupt */
1.1.1.6 ! root 954: ipl_sr = (dsp_core.registers[DSP_REG_SR]>>DSP_SR_I0) & BITMASK(2);
1.1.1.5 root 955: index = 0xffff;
956: ipl_to_raise = -1;
957:
958: /* Arbitrate between all pending interrupts */
959: for (i=0; i<12; i++) {
1.1.1.6 ! root 960: if (dsp_core.interrupt_isPending[i] == 1) {
1.1.1.5 root 961:
962: /* level 3 interrupt ? */
1.1.1.6 ! root 963: if (dsp_core.interrupt_ipl[i] == 3) {
1.1.1.5 root 964: index = i;
965: break;
966: }
1.1 root 967:
1.1.1.5 root 968: /* level 0, 1 ,2 interrupt ? */
969: /* if interrupt is masked in SR, don't process it */
1.1.1.6 ! root 970: if (dsp_core.interrupt_ipl[i] < ipl_sr)
1.1.1.5 root 971: continue;
1.1 root 972:
1.1.1.5 root 973: /* if interrupt is lower or equal than current arbitrated interrupt */
1.1.1.6 ! root 974: if (dsp_core.interrupt_ipl[i] <= ipl_to_raise)
1.1.1.5 root 975: continue;
976:
977: /* save current arbitrated interrupt */
978: index = i;
1.1.1.6 ! root 979: ipl_to_raise = dsp_core.interrupt_ipl[i];
1.1 root 980: }
981: }
1.1.1.4 root 982:
1.1.1.5 root 983: /* If there's no interrupt to process, return */
984: if (index == 0xffff) {
1.1.1.4 root 985: return;
986: }
987:
1.1.1.5 root 988: /* remove this interrupt from the pending interrupts table */
1.1.1.6 ! root 989: dsp_core.interrupt_isPending[index] = 0;
! 990: dsp_core.interrupt_counter --;
1.1.1.5 root 991:
992: /* process arbritrated interrupt */
1.1.1.6 ! root 993: ipl_to_raise = dsp_core.interrupt_ipl[index] + 1;
1.1.1.5 root 994: if (ipl_to_raise > 3) {
995: ipl_to_raise = 3;
996: }
997:
1.1.1.6 ! root 998: dsp_core.interrupt_instr_fetch = dsp_interrupt[index].vectorAddr;
! 999: dsp_core.interrupt_pipeline_count = 5;
! 1000: dsp_core.interrupt_state = DSP_INTERRUPT_DISABLED;
! 1001: dsp_core.interrupt_IplToRaise = ipl_to_raise;
! 1002:
! 1003: LOG_TRACE(TRACE_DSP_INTERRUPT, "Dsp interrupt: %s\n", dsp_interrupt[index].name);
1.1.1.5 root 1004:
1005: /* SSI receive data with exception ? */
1.1.1.6 ! root 1006: if (dsp_core.interrupt_instr_fetch == 0xe) {
! 1007: dsp_core.periph[DSP_SPACE_X][DSP_SSI_SR] &= 0xff-(1<<DSP_SSI_SR_ROE);
1.1.1.4 root 1008: }
1009:
1.1.1.5 root 1010: /* SSI transmit data with exception ? */
1.1.1.6 ! root 1011: else if (dsp_core.interrupt_instr_fetch == 0x12) {
! 1012: dsp_core.periph[DSP_SPACE_X][DSP_SSI_SR] &= 0xff-(1<<DSP_SSI_SR_TUE);
1.1.1.4 root 1013: }
1014:
1015: /* host command ? */
1.1.1.6 ! root 1016: else if (dsp_core.interrupt_instr_fetch == 0xff) {
1.1.1.4 root 1017: /* Clear HC and HCP interrupt */
1.1.1.6 ! root 1018: dsp_core.periph[DSP_SPACE_X][DSP_HOST_HSR] &= 0xff - (1<<DSP_HOST_HSR_HCP);
! 1019: dsp_core.hostport[CPU_HOST_CVR] &= 0xff - (1<<CPU_HOST_CVR_HC);
1.1.1.4 root 1020:
1.1.1.6 ! root 1021: dsp_core.interrupt_instr_fetch = dsp_core.hostport[CPU_HOST_CVR] & BITMASK(5);
! 1022: dsp_core.interrupt_instr_fetch *= 2;
1.1.1.4 root 1023: }
1.1 root 1024: }
1025:
1026: /**********************************
1027: * Set/clear ccr bits
1028: **********************************/
1029:
1030: /* reg0 has bits 55..48 */
1031: /* reg1 has bits 47..24 */
1032: /* reg2 has bits 23..0 */
1033:
1.1.1.6 ! root 1034: static void dsp_ccr_update_e_u_n_z(Uint32 reg0, Uint32 reg1, Uint32 reg2)
! 1035: {
! 1036: Uint32 scaling, value_e, value_u;
1.1.1.4 root 1037:
1.1.1.6 ! root 1038: /* Initialize SR register */
! 1039: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_E) | (1<<DSP_SR_U) | (1<<DSP_SR_N) | (1<<DSP_SR_Z));
1.1.1.4 root 1040:
1.1.1.6 ! root 1041: scaling = (dsp_core.registers[DSP_REG_SR]>>DSP_SR_S0) & BITMASK(2);
1.1 root 1042: switch(scaling) {
1043: case 0:
1.1.1.6 ! root 1044: /* Extension Bit (E) */
! 1045: value_e = (reg0<<1) + (reg1>>23);
! 1046: if ((value_e != 0) && (value_e != BITMASK(9)))
! 1047: dsp_core.registers[DSP_REG_SR] |= 1 << DSP_SR_E;
! 1048:
! 1049: /* Unnormalized bit (U) */
! 1050: if ((reg1 & 0xc00000) == 0 || (reg1 & 0xc00000) == 0xc00000)
! 1051: dsp_core.registers[DSP_REG_SR] |= 1 << DSP_SR_U;
1.1 root 1052: break;
1053: case 1:
1.1.1.6 ! root 1054: /* Extension Bit (E) */
! 1055: if ((reg0 != 0) && (reg0 != BITMASK(8)))
! 1056: dsp_core.registers[DSP_REG_SR] |= 1 << DSP_SR_E;
! 1057:
! 1058: /* Unnormalized bit (U) */
! 1059: value_u = ((reg0<<1) + (reg1>>23)) & 3;
! 1060: if (value_u == 0 || value_u == 3)
! 1061: dsp_core.registers[DSP_REG_SR] |= 1 << DSP_SR_U;
1.1 root 1062: break;
1063: case 2:
1.1.1.6 ! root 1064: /* Extension Bit (E) */
! 1065: value_e = (reg0<<2) + (reg1>>22);
! 1066: if ((value_e != 0) && (value_e != BITMASK(10)))
! 1067: dsp_core.registers[DSP_REG_SR] |= 1 << DSP_SR_E;
! 1068:
! 1069: /* Unnormalized bit (U) */
! 1070: if ((reg1 & 0x600000) == 0 || (reg1 & 0x600000) == 0x600000)
! 1071: dsp_core.registers[DSP_REG_SR] |= 1 << DSP_SR_U;
1.1 root 1072: break;
1073: default:
1074: return;
1075: break;
1076: }
1077:
1.1.1.6 ! root 1078: /* Zero Flag (Z) */
! 1079: if ((reg1 == 0) && (reg2 == 0) && (reg0 == 0))
! 1080: dsp_core.registers[DSP_REG_SR] |= 1 << DSP_SR_Z;
1.1.1.4 root 1081:
1.1.1.6 ! root 1082: /* Negative Flag (N) */
! 1083: dsp_core.registers[DSP_REG_SR] |= (reg0>>4) & 0x8;
1.1 root 1084: }
1085:
1086: /**********************************
1087: * Read/Write memory functions
1088: **********************************/
1089:
1.1.1.2 root 1090: static Uint32 read_memory_disasm(int space, Uint16 address)
1.1 root 1091: {
1.1.1.4 root 1092: /* Internal RAM ? */
1093: if (address<0x100) {
1.1.1.6 ! root 1094: return dsp_core.ramint[space][address] & BITMASK(24);
1.1.1.4 root 1095: }
1.1 root 1096:
1.1.1.4 root 1097: if (space==DSP_SPACE_P) {
1098: return read_memory_p(address);
1.1 root 1099: }
1100:
1.1.1.4 root 1101: /* Internal ROM? */
1.1.1.6 ! root 1102: if ((dsp_core.registers[DSP_REG_OMR] & (1<<DSP_OMR_DE)) &&
1.1.1.4 root 1103: (address<0x200)) {
1.1.1.6 ! root 1104: return dsp_core.rom[space][address] & BITMASK(24);
1.1.1.4 root 1105: }
1106:
1107: /* Peripheral address ? */
1108: if (address >= 0xffc0) {
1.1.1.6 ! root 1109: if ((space==DSP_SPACE_X) && (address==0xffc0+DSP_HOST_HTX)) {
! 1110: return dsp_core.dsp_host_htx;
1.1.1.4 root 1111: }
1112: if ((space==DSP_SPACE_X) && (address==0xffc0+DSP_SSI_TX)) {
1.1.1.6 ! root 1113: return dsp_core.ssi.transmit_value;
1.1.1.4 root 1114: }
1.1.1.6 ! root 1115: return dsp_core.periph[space][address-0xffc0] & BITMASK(24);
1.1.1.4 root 1116: }
1117:
1118: /* Falcon: External RAM, map X to upper 16K of matching space in Y,P */
1119: address &= (DSP_RAMSIZE>>1) - 1;
1120: if (space == DSP_SPACE_X) {
1121: address += DSP_RAMSIZE>>1;
1122: }
1123:
1124: /* Falcon: External RAM, finally map X,Y to P */
1.1.1.6 ! root 1125: return dsp_core.ramext[address & (DSP_RAMSIZE-1)] & BITMASK(24);
1.1 root 1126: }
1127:
1.1.1.4 root 1128: static inline Uint32 read_memory_p(Uint16 address)
1129: {
1130: /* Internal RAM ? */
1131: if (address<0x200) {
1.1.1.6 ! root 1132: return dsp_core.ramint[DSP_SPACE_P][address] & BITMASK(24);
1.1.1.4 root 1133: }
1134:
1135: /* External RAM, mask address to available ram size */
1.1.1.6 ! root 1136: // dsp_core.instr_cycle += P_WAITSTATE;
! 1137: return dsp_core.ramext[address & (DSP_RAMSIZE-1)] & BITMASK(24);
1.1.1.4 root 1138: }
1139:
1.1.1.2 root 1140: static Uint32 read_memory(int space, Uint16 address)
1.1 root 1141: {
1.1.1.4 root 1142: Uint32 value;
1.1 root 1143:
1.1.1.4 root 1144: /* Internal RAM ? */
1145: if (address < 0x100) {
1.1.1.6 ! root 1146: return dsp_core.ramint[space][address] & BITMASK(24);
1.1.1.4 root 1147: }
1.1 root 1148:
1.1.1.4 root 1149: if (space == DSP_SPACE_P) {
1150: return read_memory_p(address);
1151: }
1152:
1153: /* Internal ROM ? */
1154: if (address < 0x200) {
1.1.1.6 ! root 1155: if (dsp_core.registers[DSP_REG_OMR] & (1<<DSP_OMR_DE)) {
! 1156: return dsp_core.rom[space][address] & BITMASK(24);
1.1.1.4 root 1157: }
1158: }
1159:
1160: /* Peripheral address ? */
1161: if (address >= 0xffc0) {
1.1.1.6 ! root 1162: value = dsp_core.periph[space][address-0xffc0] & BITMASK(24);
1.1.1.4 root 1163: if (space == DSP_SPACE_X) {
1164: if (address == 0xffc0+DSP_HOST_HRX) {
1.1.1.6 ! root 1165: value = dsp_core.dsp_host_rtx;
! 1166: dsp_core_hostport_dspread();
1.1.1.4 root 1167: }
1168: else if (address == 0xffc0+DSP_SSI_RX) {
1.1.1.6 ! root 1169: value = dsp_core_ssi_readRX();
1.1 root 1170: }
1.1.1.6 ! root 1171: dsp_core.instr_cycle += XP_WAITSTATE;
1.1.1.4 root 1172: }
1173: else {
1.1.1.6 ! root 1174: dsp_core.instr_cycle += YP_WAITSTATE;
1.1.1.4 root 1175: }
1176: return value;
1.1 root 1177: }
1178:
1.1.1.4 root 1179: /* 1 more cycle for external RAM access */
1.1.1.6 ! root 1180: dsp_core.instr_cycle += XY_WAITSTATE;
1.1.1.4 root 1181:
1182: /* Falcon: External RAM, map X to upper 16K of matching space in Y,P */
1183: address &= (DSP_RAMSIZE>>1) - 1;
1184:
1185: if (space == DSP_SPACE_X) {
1186: address += DSP_RAMSIZE>>1;
1187: }
1188:
1189: /* Falcon: External RAM, finally map X,Y to P */
1.1.1.6 ! root 1190: return dsp_core.ramext[address & (DSP_RAMSIZE-1)] & BITMASK(24);
! 1191: }
! 1192:
! 1193: static inline void write_memory(int space, Uint16 address, Uint32 value)
! 1194: {
! 1195: if (LOG_TRACE_LEVEL(TRACE_DSP_DISASM_MEM))
! 1196: write_memory_disasm(space, address, value);
! 1197: else
! 1198: write_memory_raw(space, address, value);
1.1 root 1199: }
1200:
1.1.1.4 root 1201: static void write_memory_raw(int space, Uint16 address, Uint32 value)
1.1 root 1202: {
1203: value &= BITMASK(24);
1204:
1.1.1.4 root 1205: /* Peripheral address ? */
1206: if (address >= 0xffc0) {
1207: if (space == DSP_SPACE_X) {
1208: switch(address-0xffc0) {
1209: case DSP_HOST_HTX:
1.1.1.6 ! root 1210: dsp_core.dsp_host_htx = value;
! 1211: dsp_core_hostport_dspwrite();
1.1.1.4 root 1212: break;
1213: case DSP_HOST_HCR:
1.1.1.6 ! root 1214: dsp_core.periph[DSP_SPACE_X][DSP_HOST_HCR] = value;
1.1.1.4 root 1215: /* Set HF3 and HF2 accordingly on the host side */
1.1.1.6 ! root 1216: dsp_core.hostport[CPU_HOST_ISR] &=
1.1.1.4 root 1217: BITMASK(8)-((1<<CPU_HOST_ISR_HF3)|(1<<CPU_HOST_ISR_HF2));
1.1.1.6 ! root 1218: dsp_core.hostport[CPU_HOST_ISR] |=
! 1219: dsp_core.periph[DSP_SPACE_X][DSP_HOST_HCR] & ((1<<CPU_HOST_ISR_HF3)|(1<<CPU_HOST_ISR_HF2));
1.1.1.4 root 1220: break;
1221: case DSP_HOST_HSR:
1222: /* Read only */
1223: break;
1224: case DSP_SSI_CRA:
1225: case DSP_SSI_CRB:
1.1.1.6 ! root 1226: dsp_core.periph[DSP_SPACE_X][address-0xffc0] = value;
! 1227: dsp_core_ssi_configure(address-0xffc0, value);
1.1.1.4 root 1228: break;
1229: case DSP_SSI_TSR:
1.1.1.6 ! root 1230: dsp_core_ssi_writeTSR();
1.1.1.4 root 1231: break;
1232: case DSP_SSI_TX:
1.1.1.6 ! root 1233: dsp_core_ssi_writeTX(value);
1.1.1.4 root 1234: break;
1.1.1.5 root 1235: case DSP_IPR:
1.1.1.6 ! root 1236: dsp_core.periph[DSP_SPACE_X][DSP_IPR] = value;
1.1.1.5 root 1237: dsp_setInterruptIPL(value);
1238: break;
1239: case DSP_PCD:
1.1.1.6 ! root 1240: dsp_core.periph[DSP_SPACE_X][DSP_PCD] = value;
! 1241: dsp_core_setPortCDataRegister(value);
1.1.1.5 root 1242: break;
1.1.1.4 root 1243: default:
1.1.1.6 ! root 1244: dsp_core.periph[DSP_SPACE_X][address-0xffc0] = value;
1.1.1.4 root 1245: break;
1.1 root 1246: }
1.1.1.6 ! root 1247: dsp_core.instr_cycle += XP_WAITSTATE;
1.1.1.4 root 1248: return;
1249: }
1250: else if (space == DSP_SPACE_Y) {
1.1.1.6 ! root 1251: dsp_core.periph[DSP_SPACE_Y][address-0xffc0] = value;
! 1252: dsp_core.instr_cycle += YP_WAITSTATE;
1.1.1.4 root 1253: return;
1254: }
1255: }
1256:
1257: /* Internal RAM ? */
1258: if (address < 0x100) {
1.1.1.6 ! root 1259: dsp_core.ramint[space][address] = value;
1.1.1.4 root 1260: return;
1261: }
1.1.1.2 root 1262:
1.1.1.4 root 1263: /* Internal ROM ? */
1264: if (address < 0x200) {
1265: if (space != DSP_SPACE_P) {
1.1.1.6 ! root 1266: if (dsp_core.registers[DSP_REG_OMR] & (1<<DSP_OMR_DE)) {
1.1.1.2 root 1267: /* Can not write to ROM space */
1.1 root 1268: return;
1269: }
1.1.1.4 root 1270: }
1271: else {
1272: /* Space P RAM */
1.1.1.6 ! root 1273: dsp_core.ramint[DSP_SPACE_P][address] = value;
1.1.1.4 root 1274: return;
1275: }
1.1 root 1276: }
1277:
1.1.1.4 root 1278: /* 1 more cycle for external RAM access */
1.1.1.6 ! root 1279: dsp_core.instr_cycle += XY_WAITSTATE;
1.1.1.4 root 1280:
1281: /* Falcon: External RAM, map X to upper 16K of matching space in Y,P */
1282: if (space != DSP_SPACE_P) {
1283: address &= (DSP_RAMSIZE>>1) - 1;
1284: }
1285:
1286: if (space == DSP_SPACE_X) {
1287: address += DSP_RAMSIZE>>1;
1288: }
1289:
1290: /* Falcon: External RAM, map X,Y to P */
1.1.1.6 ! root 1291: dsp_core.ramext[address & (DSP_RAMSIZE-1)] = value;
1.1.1.2 root 1292: }
1293:
1.1.1.4 root 1294: static void write_memory_disasm(int space, Uint16 address, Uint32 value)
1.1.1.2 root 1295: {
1.1.1.4 root 1296: Uint32 oldvalue, curvalue;
1297: Uint8 space_c = 'p';
1298:
1.1.1.2 root 1299: value &= BITMASK(24);
1.1.1.6 ! root 1300: oldvalue = read_memory_disasm(space, address);
1.1.1.2 root 1301:
1302: write_memory_raw(space,address,value);
1303:
1.1 root 1304: switch(space) {
1305: case DSP_SPACE_X:
1.1.1.4 root 1306: space_c = 'x';
1.1 root 1307: break;
1308: case DSP_SPACE_Y:
1.1.1.4 root 1309: space_c = 'y';
1310: break;
1311: default:
1.1 root 1312: break;
1313: }
1.1.1.4 root 1314:
1.1.1.6 ! root 1315: curvalue = read_memory_disasm(space, address);
1.1.1.5 root 1316: sprintf(str_disasm_memory[disasm_memory_ptr],"Mem: %c:0x%04x 0x%06x -> 0x%06x", space_c, address, oldvalue, curvalue);
1317: disasm_memory_ptr ++;
1.1 root 1318: }
1319:
1.1.1.4 root 1320: static void dsp_write_reg(Uint32 numreg, Uint32 value)
1321: {
1.1.1.5 root 1322: Uint32 stack_error;
1.1.1.4 root 1323:
1.1.1.5 root 1324: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
1325: numreg &= 1;
1.1.1.6 ! root 1326: dsp_core.registers[DSP_REG_A0+numreg]= 0;
! 1327: dsp_core.registers[DSP_REG_A1+numreg]= value;
! 1328: dsp_core.registers[DSP_REG_A2+numreg]= 0;
1.1.1.4 root 1329: if (value & (1<<23)) {
1.1.1.6 ! root 1330: dsp_core.registers[DSP_REG_A2+numreg]= 0xff;
1.1.1.4 root 1331: }
1332: } else {
1.1.1.5 root 1333: switch (numreg) {
1.1.1.4 root 1334: case DSP_REG_OMR:
1.1.1.6 ! root 1335: dsp_core.registers[DSP_REG_OMR] = value & 0xc7;
1.1.1.4 root 1336: break;
1337: case DSP_REG_SR:
1.1.1.6 ! root 1338: dsp_core.registers[DSP_REG_SR] = value & 0xaf7f;
1.1.1.4 root 1339: break;
1340: case DSP_REG_SP:
1.1.1.6 ! root 1341: stack_error = dsp_core.registers[DSP_REG_SP] & (1<<DSP_SP_SE);
1.1.1.5 root 1342: if ((stack_error==0) && (value & (1<<DSP_SP_SE))) {
1343: /* Stack full, raise interrupt */
1344: dsp_add_interrupt(DSP_INTER_STACK_ERROR);
1.1.1.6 ! root 1345: if (!isDsp_in_disasm_mode)
! 1346: fprintf(stderr,"Dsp: Stack Overflow\n");
1.1.1.5 root 1347: }
1.1.1.6 ! root 1348: dsp_core.registers[DSP_REG_SP] = value & BITMASK(6);
1.1.1.4 root 1349: dsp_compute_ssh_ssl();
1350: break;
1351: case DSP_REG_SSH:
1352: dsp_stack_push(value, 0, 1);
1353: break;
1354: case DSP_REG_SSL:
1.1.1.6 ! root 1355: numreg = dsp_core.registers[DSP_REG_SP] & BITMASK(4);
1.1.1.5 root 1356: if (numreg == 0) {
1.1.1.4 root 1357: value = 0;
1358: }
1.1.1.6 ! root 1359: dsp_core.stack[1][numreg] = value & BITMASK(16);
! 1360: dsp_core.registers[DSP_REG_SSL] = value & BITMASK(16);
1.1.1.4 root 1361: break;
1362: default:
1.1.1.6 ! root 1363: dsp_core.registers[numreg] = value;
! 1364: dsp_core.registers[numreg] &= BITMASK(registers_mask[numreg]);
1.1.1.4 root 1365: break;
1366: }
1367: }
1368: }
1369:
1.1 root 1370: /**********************************
1371: * Stack push/pop
1372: **********************************/
1373:
1.1.1.4 root 1374: static void dsp_stack_push(Uint32 curpc, Uint32 cursr, Uint16 sshOnly)
1.1 root 1375: {
1.1.1.4 root 1376: Uint32 stack_error, underflow, stack;
1377:
1.1.1.6 ! root 1378: stack_error = dsp_core.registers[DSP_REG_SP] & (1<<DSP_SP_SE);
! 1379: underflow = dsp_core.registers[DSP_REG_SP] & (1<<DSP_SP_UF);
! 1380: stack = (dsp_core.registers[DSP_REG_SP] & BITMASK(4)) + 1;
1.1.1.4 root 1381:
1382:
1383: if ((stack_error==0) && (stack & (1<<DSP_SP_SE))) {
1.1 root 1384: /* Stack full, raise interrupt */
1.1.1.5 root 1385: dsp_add_interrupt(DSP_INTER_STACK_ERROR);
1.1.1.6 ! root 1386: if (!isDsp_in_disasm_mode)
! 1387: fprintf(stderr,"Dsp: Stack Overflow\n");
1.1 root 1388: }
1.1.1.4 root 1389:
1.1.1.6 ! root 1390: dsp_core.registers[DSP_REG_SP] = (underflow | stack_error | stack) & BITMASK(6);
1.1.1.4 root 1391: stack &= BITMASK(4);
1.1 root 1392:
1.1.1.4 root 1393: if (stack) {
1394: /* SSH part */
1.1.1.6 ! root 1395: dsp_core.stack[0][stack] = curpc & BITMASK(16);
1.1.1.4 root 1396: /* SSL part, if instruction is not like "MOVEC xx, SSH" */
1397: if (sshOnly == 0) {
1.1.1.6 ! root 1398: dsp_core.stack[1][stack] = cursr & BITMASK(16);
1.1.1.4 root 1399: }
1400: } else {
1.1.1.6 ! root 1401: dsp_core.stack[0][0] = 0;
! 1402: dsp_core.stack[1][0] = 0;
1.1.1.4 root 1403: }
1.1 root 1404:
1.1.1.4 root 1405: /* Update SSH and SSL registers */
1.1.1.6 ! root 1406: dsp_core.registers[DSP_REG_SSH] = dsp_core.stack[0][stack];
! 1407: dsp_core.registers[DSP_REG_SSL] = dsp_core.stack[1][stack];
1.1 root 1408: }
1409:
1.1.1.2 root 1410: static void dsp_stack_pop(Uint32 *newpc, Uint32 *newsr)
1.1 root 1411: {
1.1.1.4 root 1412: Uint32 stack_error, underflow, stack;
1413:
1.1.1.6 ! root 1414: stack_error = dsp_core.registers[DSP_REG_SP] & (1<<DSP_SP_SE);
! 1415: underflow = dsp_core.registers[DSP_REG_SP] & (1<<DSP_SP_UF);
! 1416: stack = (dsp_core.registers[DSP_REG_SP] & BITMASK(4)) - 1;
1.1.1.4 root 1417:
1418: if ((stack_error==0) && (stack & (1<<DSP_SP_SE))) {
1419: /* Stack empty*/
1.1.1.5 root 1420: dsp_add_interrupt(DSP_INTER_STACK_ERROR);
1.1.1.6 ! root 1421: if (!isDsp_in_disasm_mode)
! 1422: fprintf(stderr,"Dsp: Stack underflow\n");
1.1 root 1423: }
1424:
1.1.1.6 ! root 1425: dsp_core.registers[DSP_REG_SP] = (underflow | stack_error | stack) & BITMASK(6);
1.1.1.4 root 1426: stack &= BITMASK(4);
1.1.1.6 ! root 1427: *newpc = dsp_core.registers[DSP_REG_SSH];
! 1428: *newsr = dsp_core.registers[DSP_REG_SSL];
1.1.1.4 root 1429:
1.1.1.6 ! root 1430: dsp_core.registers[DSP_REG_SSH] = dsp_core.stack[0][stack];
! 1431: dsp_core.registers[DSP_REG_SSL] = dsp_core.stack[1][stack];
1.1.1.4 root 1432: }
1433:
1434: static void dsp_compute_ssh_ssl(void)
1435: {
1436: Uint32 stack;
1.1 root 1437:
1.1.1.6 ! root 1438: stack = dsp_core.registers[DSP_REG_SP];
1.1.1.4 root 1439: stack &= BITMASK(4);
1.1.1.6 ! root 1440: dsp_core.registers[DSP_REG_SSH] = dsp_core.stack[0][stack];
! 1441: dsp_core.registers[DSP_REG_SSL] = dsp_core.stack[1][stack];
1.1 root 1442: }
1443:
1444: /**********************************
1445: * Effective address calculation
1446: **********************************/
1447:
1.1.1.2 root 1448: static void dsp_update_rn(Uint32 numreg, Sint16 modifier)
1.1 root 1449: {
1.1.1.2 root 1450: Sint16 value;
1451: Uint16 m_reg;
1.1 root 1452:
1.1.1.6 ! root 1453: m_reg = (Uint16) dsp_core.registers[DSP_REG_M0+numreg];
1.1 root 1454: if (m_reg == 0) {
1455: /* Bit reversed carry update */
1456: dsp_update_rn_bitreverse(numreg);
1.1.1.4 root 1457: } else if (m_reg<=32767) {
1.1 root 1458: /* Modulo update */
1459: dsp_update_rn_modulo(numreg, modifier);
1460: } else if (m_reg == 65535) {
1461: /* Linear addressing mode */
1.1.1.6 ! root 1462: value = (Sint16) dsp_core.registers[DSP_REG_R0+numreg];
1.1 root 1463: value += modifier;
1.1.1.6 ! root 1464: dsp_core.registers[DSP_REG_R0+numreg] = ((Uint32) value) & BITMASK(16);
1.1 root 1465: } else {
1466: /* Undefined */
1467: }
1468: }
1469:
1.1.1.2 root 1470: static void dsp_update_rn_bitreverse(Uint32 numreg)
1.1 root 1471: {
1472: int revbits, i;
1.1.1.2 root 1473: Uint32 value, r_reg;
1.1 root 1474:
1475: /* Check how many bits to reverse */
1.1.1.6 ! root 1476: value = dsp_core.registers[DSP_REG_N0+numreg];
1.1 root 1477: for (revbits=0;revbits<16;revbits++) {
1478: if (value & (1<<revbits)) {
1479: break;
1480: }
1481: }
1482: revbits++;
1483:
1484: /* Reverse Rn bits */
1.1.1.6 ! root 1485: r_reg = dsp_core.registers[DSP_REG_R0+numreg];
1.1 root 1486: value = r_reg & (BITMASK(16)-BITMASK(revbits));
1487: for (i=0;i<revbits;i++) {
1488: if (r_reg & (1<<i)) {
1489: value |= 1<<(revbits-i-1);
1490: }
1491: }
1492:
1493: /* Increment */
1494: value++;
1495: value &= BITMASK(revbits);
1496:
1497: /* Reverse Rn bits */
1498: r_reg &= (BITMASK(16)-BITMASK(revbits));
1499: r_reg |= value;
1500:
1501: value = r_reg & (BITMASK(16)-BITMASK(revbits));
1502: for (i=0;i<revbits;i++) {
1503: if (r_reg & (1<<i)) {
1504: value |= 1<<(revbits-i-1);
1505: }
1506: }
1507:
1.1.1.6 ! root 1508: dsp_core.registers[DSP_REG_R0+numreg] = value;
1.1 root 1509: }
1510:
1.1.1.2 root 1511: static void dsp_update_rn_modulo(Uint32 numreg, Sint16 modifier)
1.1 root 1512: {
1.1.1.2 root 1513: Uint16 bufsize, modulo, lobound, hibound, bufmask;
1.1.1.4 root 1514: Sint16 r_reg, orig_modifier=modifier;
1.1 root 1515:
1.1.1.6 ! root 1516: modulo = dsp_core.registers[DSP_REG_M0+numreg]+1;
1.1 root 1517: bufsize = 1;
1.1.1.2 root 1518: bufmask = BITMASK(16);
1.1 root 1519: while (bufsize < modulo) {
1520: bufsize <<= 1;
1.1.1.2 root 1521: bufmask <<= 1;
1.1 root 1522: }
1523:
1.1.1.6 ! root 1524: lobound = dsp_core.registers[DSP_REG_R0+numreg] & bufmask;
1.1.1.2 root 1525: hibound = lobound + modulo - 1;
1.1 root 1526:
1.1.1.6 ! root 1527: r_reg = (Sint16) dsp_core.registers[DSP_REG_R0+numreg];
1.1.1.4 root 1528:
1529: if (orig_modifier>modulo) {
1530: while (modifier>bufsize) {
1531: r_reg += bufsize;
1532: modifier -= bufsize;
1533: }
1534: while (modifier<-bufsize) {
1535: r_reg -= bufsize;
1536: modifier += bufsize;
1537: }
1.1.1.2 root 1538: }
1.1.1.4 root 1539:
1.1 root 1540: r_reg += modifier;
1.1.1.4 root 1541:
1542: if (orig_modifier!=modulo) {
1543: if (r_reg>hibound) {
1544: r_reg -= modulo;
1545: } else if (r_reg<lobound) {
1546: r_reg += modulo;
1547: }
1.1 root 1548: }
1549:
1.1.1.6 ! root 1550: dsp_core.registers[DSP_REG_R0+numreg] = ((Uint32) r_reg) & BITMASK(16);
1.1 root 1551: }
1552:
1.1.1.2 root 1553: static int dsp_calc_ea(Uint32 ea_mode, Uint32 *dst_addr)
1.1 root 1554: {
1.1.1.2 root 1555: Uint32 value, numreg, curreg;
1.1 root 1556:
1557: value = (ea_mode >> 3) & BITMASK(3);
1558: numreg = ea_mode & BITMASK(3);
1559: switch (value) {
1560: case 0:
1561: /* (Rx)-Nx */
1.1.1.6 ! root 1562: *dst_addr = dsp_core.registers[DSP_REG_R0+numreg];
! 1563: dsp_update_rn(numreg, -dsp_core.registers[DSP_REG_N0+numreg]);
1.1 root 1564: break;
1565: case 1:
1566: /* (Rx)+Nx */
1.1.1.6 ! root 1567: *dst_addr = dsp_core.registers[DSP_REG_R0+numreg];
! 1568: dsp_update_rn(numreg, dsp_core.registers[DSP_REG_N0+numreg]);
1.1 root 1569: break;
1570: case 2:
1571: /* (Rx)- */
1.1.1.6 ! root 1572: *dst_addr = dsp_core.registers[DSP_REG_R0+numreg];
1.1 root 1573: dsp_update_rn(numreg, -1);
1574: break;
1575: case 3:
1576: /* (Rx)+ */
1.1.1.6 ! root 1577: *dst_addr = dsp_core.registers[DSP_REG_R0+numreg];
1.1 root 1578: dsp_update_rn(numreg, +1);
1579: break;
1580: case 4:
1581: /* (Rx) */
1.1.1.6 ! root 1582: *dst_addr = dsp_core.registers[DSP_REG_R0+numreg];
1.1 root 1583: break;
1584: case 5:
1585: /* (Rx+Nx) */
1.1.1.6 ! root 1586: dsp_core.instr_cycle += 2;
! 1587: curreg = dsp_core.registers[DSP_REG_R0+numreg];
! 1588: dsp_update_rn(numreg, dsp_core.registers[DSP_REG_N0+numreg]);
! 1589: *dst_addr = dsp_core.registers[DSP_REG_R0+numreg];
! 1590: dsp_core.registers[DSP_REG_R0+numreg] = curreg;
1.1 root 1591: break;
1592: case 6:
1593: /* aa */
1.1.1.6 ! root 1594: dsp_core.instr_cycle += 2;
! 1595: *dst_addr = read_memory_p(dsp_core.pc+1);
1.1 root 1596: cur_inst_len++;
1597: if (numreg != 0) {
1598: return 1; /* immediate value */
1599: }
1600: break;
1601: case 7:
1602: /* -(Rx) */
1.1.1.6 ! root 1603: dsp_core.instr_cycle += 2;
1.1 root 1604: dsp_update_rn(numreg, -1);
1.1.1.6 ! root 1605: *dst_addr = dsp_core.registers[DSP_REG_R0+numreg];
1.1 root 1606: break;
1607: }
1608: /* address */
1609: return 0;
1610: }
1611:
1612: /**********************************
1613: * Condition code test
1614: **********************************/
1615:
1.1.1.2 root 1616: static int dsp_calc_cc(Uint32 cc_code)
1.1 root 1617: {
1.1.1.4 root 1618: Uint16 value1, value2, value3;
1.1 root 1619:
1.1.1.4 root 1620: switch (cc_code) {
1621: case 0: /* CC (HS) */
1.1.1.6 ! root 1622: value1 = dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_C);
1.1.1.4 root 1623: return (value1==0);
1624: case 1: /* GE */
1.1.1.6 ! root 1625: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_N) & 1;
! 1626: value2 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_V) & 1;
1.1.1.4 root 1627: return ((value1 ^ value2) == 0);
1628: case 2: /* NE */
1.1.1.6 ! root 1629: value1 = dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_Z);
1.1.1.4 root 1630: return (value1==0);
1631: case 3: /* PL */
1.1.1.6 ! root 1632: value1 = dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_N);
1.1.1.4 root 1633: return (value1==0);
1634: case 4: /* NN */
1.1.1.6 ! root 1635: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_Z) & 1;
! 1636: value2 = (~(dsp_core.registers[DSP_REG_SR] >> DSP_SR_U)) & 1;
! 1637: value3 = (~(dsp_core.registers[DSP_REG_SR] >> DSP_SR_E)) & 1;
1.1.1.4 root 1638: return ((value1 | (value2 & value3)) == 0);
1639: case 5: /* EC */
1.1.1.6 ! root 1640: value1 = dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_E);
1.1.1.4 root 1641: return (value1==0);
1642: case 6: /* LC */
1.1.1.6 ! root 1643: value1 = dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_L);
1.1.1.4 root 1644: return (value1==0);
1645: case 7: /* GT */
1.1.1.6 ! root 1646: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_N) & 1;
! 1647: value2 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_V) & 1;
! 1648: value3 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_Z) & 1;
1.1.1.4 root 1649: return ((value3 | (value1 ^ value2)) == 0);
1650: case 8: /* CS (LO) */
1.1.1.6 ! root 1651: value1 = dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_C);
1.1.1.4 root 1652: return (value1==1);
1653: case 9: /* LT */
1.1.1.6 ! root 1654: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_N) & 1;
! 1655: value2 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_V) & 1;
1.1.1.4 root 1656: return ((value1 ^ value2) == 1);
1657: case 10: /* EQ */
1.1.1.6 ! root 1658: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_Z) & 1;
1.1.1.4 root 1659: return (value1==1);
1660: case 11: /* MI */
1.1.1.6 ! root 1661: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_N) & 1;
1.1.1.4 root 1662: return (value1==1);
1663: case 12: /* NR */
1.1.1.6 ! root 1664: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_Z) & 1;
! 1665: value2 = (~(dsp_core.registers[DSP_REG_SR] >> DSP_SR_U)) & 1;
! 1666: value3 = (~(dsp_core.registers[DSP_REG_SR] >> DSP_SR_E)) & 1;
1.1.1.4 root 1667: return ((value1 | (value2 & value3)) == 1);
1668: case 13: /* ES */
1.1.1.6 ! root 1669: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_E) & 1;
1.1.1.4 root 1670: return (value1==1);
1671: case 14: /* LS */
1.1.1.6 ! root 1672: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_L) & 1;
1.1.1.4 root 1673: return (value1==1);
1674: case 15: /* LE */
1.1.1.6 ! root 1675: value1 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_N) & 1;
! 1676: value2 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_V) & 1;
! 1677: value3 = (dsp_core.registers[DSP_REG_SR] >> DSP_SR_Z) & 1;
1.1.1.4 root 1678: return ((value3 | (value1 ^ value2)) == 1);
1679: }
1680: return 0;
1.1 root 1681: }
1682:
1683: /**********************************
1684: * Highbyte opcodes dispatchers
1685: **********************************/
1686:
1687: static void opcode8h_0(void)
1688: {
1.1.1.4 root 1689: switch(cur_inst) {
1690: case 0x000000:
1691: dsp_nop();
1.1 root 1692: break;
1.1.1.4 root 1693: case 0x000004:
1694: dsp_rti();
1.1 root 1695: break;
1.1.1.4 root 1696: case 0x000005:
1697: dsp_illegal();
1.1 root 1698: break;
1.1.1.4 root 1699: case 0x000006:
1700: dsp_swi();
1701: break;
1702: case 0x00000c:
1703: dsp_rts();
1704: break;
1705: case 0x000084:
1706: dsp_reset();
1707: break;
1708: case 0x000086:
1709: dsp_wait();
1710: break;
1711: case 0x000087:
1712: dsp_stop();
1713: break;
1714: case 0x00008c:
1715: dsp_enddo();
1.1 root 1716: break;
1717: }
1718: }
1719:
1720: /**********************************
1721: * Non-parallel moves instructions
1722: **********************************/
1723:
1724: static void dsp_undefined(void)
1725: {
1.1.1.6 ! root 1726: if (isDsp_in_disasm_mode == false) {
! 1727: cur_inst_len = 0;
! 1728: fprintf(stderr, "Dsp: 0x%04x: 0x%06x Illegal instruction\n",dsp_core.pc, cur_inst);
! 1729: /* Add some CPU cycles to avoid being stuck in an infinite loop */
! 1730: dsp_core.instr_cycle += 100;
! 1731: }
! 1732: else {
! 1733: cur_inst_len = 1;
! 1734: dsp_core.instr_cycle = 0;
! 1735: }
1.1 root 1736: }
1737:
1738: static void dsp_andi(void)
1739: {
1.1.1.2 root 1740: Uint32 regnum, value;
1.1 root 1741:
1742: value = (cur_inst >> 8) & BITMASK(8);
1743: regnum = cur_inst & BITMASK(2);
1744: switch(regnum) {
1745: case 0:
1746: /* mr */
1.1.1.6 ! root 1747: dsp_core.registers[DSP_REG_SR] &= (value<<8)|BITMASK(8);
1.1 root 1748: break;
1749: case 1:
1750: /* ccr */
1.1.1.6 ! root 1751: dsp_core.registers[DSP_REG_SR] &= (BITMASK(8)<<8)|value;
1.1 root 1752: break;
1753: case 2:
1754: /* omr */
1.1.1.6 ! root 1755: dsp_core.registers[DSP_REG_OMR] &= value;
1.1 root 1756: break;
1757: }
1758: }
1759:
1.1.1.4 root 1760: static void dsp_bchg_aa(void)
1.1 root 1761: {
1.1.1.4 root 1762: Uint32 memspace, addr, value, newcarry, numbit;
1.1 root 1763:
1764: memspace = (cur_inst>>6) & 1;
1765: value = (cur_inst>>8) & BITMASK(6);
1766: numbit = cur_inst & BITMASK(5);
1767:
1.1.1.4 root 1768: addr = value;
1769: value = read_memory(memspace, addr);
1770: newcarry = (value>>numbit) & 1;
1771: if (newcarry) {
1772: value -= (1<<numbit);
1773: } else {
1774: value += (1<<numbit);
1.1 root 1775: }
1.1.1.4 root 1776: write_memory(memspace, addr, value);
1.1 root 1777:
1778: /* Set carry */
1.1.1.6 ! root 1779: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1780: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 1781:
1.1.1.6 ! root 1782: dsp_core.instr_cycle += 2;
1.1 root 1783: }
1784:
1.1.1.4 root 1785: static void dsp_bchg_ea(void)
1.1 root 1786: {
1.1.1.4 root 1787: Uint32 memspace, addr, value, newcarry, numbit;
1.1 root 1788:
1789: memspace = (cur_inst>>6) & 1;
1790: value = (cur_inst>>8) & BITMASK(6);
1791: numbit = cur_inst & BITMASK(5);
1792:
1.1.1.4 root 1793: dsp_calc_ea(value, &addr);
1794: value = read_memory(memspace, addr);
1795: newcarry = (value>>numbit) & 1;
1796: if (newcarry) {
1797: value -= (1<<numbit);
1798: } else {
1799: value += (1<<numbit);
1.1 root 1800: }
1.1.1.4 root 1801: write_memory(memspace, addr, value);
1.1 root 1802:
1803: /* Set carry */
1.1.1.6 ! root 1804: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1805: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 1806:
1.1.1.6 ! root 1807: dsp_core.instr_cycle += 2;
1.1.1.4 root 1808: if (addr>=0x200) {
1.1.1.6 ! root 1809: dsp_core.instr_cycle += XY_WAITSTATE;
1.1.1.4 root 1810: }
1.1 root 1811: }
1812:
1.1.1.4 root 1813: static void dsp_bchg_pp(void)
1.1 root 1814: {
1.1.1.4 root 1815: Uint32 memspace, addr, value, newcarry, numbit;
1.1 root 1816:
1817: memspace = (cur_inst>>6) & 1;
1818: value = (cur_inst>>8) & BITMASK(6);
1819: numbit = cur_inst & BITMASK(5);
1820:
1.1.1.4 root 1821: addr = 0xffc0 + value;
1822: value = read_memory(memspace, addr);
1823: newcarry = (value>>numbit) & 1;
1824: if (newcarry) {
1825: value -= (1<<numbit);
1826: } else {
1827: value += (1<<numbit);
1.1 root 1828: }
1.1.1.4 root 1829: write_memory(memspace, addr, value);
1.1 root 1830:
1831: /* Set carry */
1.1.1.6 ! root 1832: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1833: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 1834:
1.1.1.6 ! root 1835: dsp_core.instr_cycle += 2;
1.1.1.4 root 1836: if (memspace == DSP_SPACE_X) {
1.1.1.6 ! root 1837: dsp_core.instr_cycle += XP_WAITSTATE;
1.1.1.4 root 1838: } else {
1.1.1.6 ! root 1839: dsp_core.instr_cycle += YP_WAITSTATE;
1.1.1.4 root 1840: }
1.1 root 1841: }
1842:
1.1.1.4 root 1843: static void dsp_bchg_reg(void)
1.1 root 1844: {
1.1.1.4 root 1845: Uint32 value, numreg, newcarry, numbit;
1.1 root 1846:
1.1.1.4 root 1847: numreg = (cur_inst>>8) & BITMASK(6);
1.1 root 1848: numbit = cur_inst & BITMASK(5);
1849:
1.1.1.4 root 1850: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
1851: dsp_pm_read_accu24(numreg, &value);
1852: } else {
1.1.1.6 ! root 1853: value = dsp_core.registers[numreg];
1.1 root 1854: }
1855:
1.1.1.4 root 1856: newcarry = (value>>numbit) & 1;
1857: if (newcarry) {
1858: value -= (1<<numbit);
1859: } else {
1860: value += (1<<numbit);
1861: }
1862:
1863: dsp_write_reg(numreg, value);
1864:
1.1 root 1865: /* Set carry */
1.1.1.6 ! root 1866: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1867: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 1868:
1.1.1.6 ! root 1869: dsp_core.instr_cycle += 2;
1.1 root 1870: }
1871:
1.1.1.4 root 1872: static void dsp_bclr_aa(void)
1.1 root 1873: {
1.1.1.4 root 1874: Uint32 memspace, addr, value, newcarry, numbit;
1875:
1876: memspace = (cur_inst>>6) & 1;
1877: addr = (cur_inst>>8) & BITMASK(6);
1878: numbit = cur_inst & BITMASK(5);
1.1 root 1879:
1.1.1.4 root 1880: value = read_memory(memspace, addr);
1881: newcarry = (value>>numbit) & 1;
1882: value &= 0xffffffff-(1<<numbit);
1883: write_memory(memspace, addr, value);
1.1.1.2 root 1884:
1.1.1.4 root 1885: /* Set carry */
1.1.1.6 ! root 1886: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1887: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1 root 1888:
1.1.1.6 ! root 1889: dsp_core.instr_cycle += 2;
1.1.1.4 root 1890: }
1.1 root 1891:
1.1.1.4 root 1892: static void dsp_bclr_ea(void)
1893: {
1894: Uint32 memspace, addr, value, newcarry, numbit;
1895:
1896: memspace = (cur_inst>>6) & 1;
1897: value = (cur_inst>>8) & BITMASK(6);
1898: numbit = cur_inst & BITMASK(5);
1.1 root 1899:
1.1.1.4 root 1900: dsp_calc_ea(value, &addr);
1901: value = read_memory(memspace, addr);
1902: newcarry = (value>>numbit) & 1;
1903: value &= 0xffffffff-(1<<numbit);
1904: write_memory(memspace, addr, value);
1.1.1.2 root 1905:
1.1.1.4 root 1906: /* Set carry */
1.1.1.6 ! root 1907: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1908: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 1909:
1.1.1.6 ! root 1910: dsp_core.instr_cycle += 2;
1.1.1.4 root 1911: if (addr>=0x200) {
1.1.1.6 ! root 1912: dsp_core.instr_cycle += XY_WAITSTATE;
1.1.1.4 root 1913: }
1.1 root 1914: }
1915:
1.1.1.4 root 1916: static void dsp_bclr_pp(void)
1917: {
1918: Uint32 memspace, addr, value, newcarry, numbit;
1919:
1920: memspace = (cur_inst>>6) & 1;
1921: value = (cur_inst>>8) & BITMASK(6);
1922: numbit = cur_inst & BITMASK(5);
1.1.1.3 root 1923:
1.1.1.4 root 1924: addr = 0xffc0 + value;
1925: value = read_memory(memspace, addr);
1926: newcarry = (value>>numbit) & 1;
1927: value &= 0xffffffff-(1<<numbit);
1928: write_memory(memspace, addr, value);
1.1.1.3 root 1929:
1.1.1.4 root 1930: /* Set carry */
1.1.1.6 ! root 1931: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1932: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1 root 1933:
1.1.1.6 ! root 1934: dsp_core.instr_cycle += 2;
1.1.1.4 root 1935: if (memspace == DSP_SPACE_X) {
1.1.1.6 ! root 1936: dsp_core.instr_cycle += XP_WAITSTATE;
1.1.1.4 root 1937: } else {
1.1.1.6 ! root 1938: dsp_core.instr_cycle += YP_WAITSTATE;
1.1.1.4 root 1939: }
1940: }
1.1 root 1941:
1.1.1.4 root 1942: static void dsp_bclr_reg(void)
1943: {
1944: Uint32 value, numreg, newcarry, numbit;
1945:
1946: numreg = (cur_inst>>8) & BITMASK(6);
1947: numbit = cur_inst & BITMASK(5);
1.1 root 1948:
1.1.1.4 root 1949: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
1950: dsp_pm_read_accu24(numreg, &value);
1951: } else {
1.1.1.6 ! root 1952: value = dsp_core.registers[numreg];
1.1.1.4 root 1953: }
1.1 root 1954:
1.1.1.4 root 1955: newcarry = (value>>numbit) & 1;
1956: value &= 0xffffffff-(1<<numbit);
1.1 root 1957:
1.1.1.4 root 1958: dsp_write_reg(numreg, value);
1959:
1960: /* Set carry */
1.1.1.6 ! root 1961: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1962: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1 root 1963:
1.1.1.6 ! root 1964: dsp_core.instr_cycle += 2;
1.1 root 1965: }
1966:
1.1.1.4 root 1967: static void dsp_bset_aa(void)
1.1 root 1968: {
1.1.1.4 root 1969: Uint32 memspace, addr, value, newcarry, numbit;
1970:
1971: memspace = (cur_inst>>6) & 1;
1972: value = (cur_inst>>8) & BITMASK(6);
1973: numbit = cur_inst & BITMASK(5);
1.1 root 1974:
1.1.1.4 root 1975: addr = value;
1976: value = read_memory(memspace, addr);
1977: newcarry = (value>>numbit) & 1;
1978: value |= (1<<numbit);
1979: write_memory(memspace, addr, value);
1980:
1981: /* Set carry */
1.1.1.6 ! root 1982: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 1983: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 1984:
1.1.1.6 ! root 1985: dsp_core.instr_cycle += 2;
1.1.1.4 root 1986: }
1987:
1988: static void dsp_bset_ea(void)
1989: {
1990: Uint32 memspace, addr, value, newcarry, numbit;
1991:
1992: memspace = (cur_inst>>6) & 1;
1993: value = (cur_inst>>8) & BITMASK(6);
1994: numbit = cur_inst & BITMASK(5);
1995:
1996: dsp_calc_ea(value, &addr);
1997: value = read_memory(memspace, addr);
1998: newcarry = (value>>numbit) & 1;
1999: value |= (1<<numbit);
2000: write_memory(memspace, addr, value);
2001:
2002: /* Set carry */
1.1.1.6 ! root 2003: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 2004: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 2005:
1.1.1.6 ! root 2006: dsp_core.instr_cycle += 2;
1.1.1.4 root 2007: if (addr>=0x200) {
1.1.1.6 ! root 2008: dsp_core.instr_cycle += XY_WAITSTATE;
1.1.1.4 root 2009: }
2010: }
2011:
2012: static void dsp_bset_pp(void)
2013: {
2014: Uint32 memspace, addr, value, newcarry, numbit;
2015:
2016: memspace = (cur_inst>>6) & 1;
2017: value = (cur_inst>>8) & BITMASK(6);
2018: numbit = cur_inst & BITMASK(5);
2019: addr = 0xffc0 + value;
2020: value = read_memory(memspace, addr);
2021: newcarry = (value>>numbit) & 1;
2022: value |= (1<<numbit);
2023: write_memory(memspace, addr, value);
2024:
2025: /* Set carry */
1.1.1.6 ! root 2026: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 2027: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 2028:
1.1.1.6 ! root 2029: dsp_core.instr_cycle += 2;
1.1.1.4 root 2030: if (memspace == DSP_SPACE_X) {
1.1.1.6 ! root 2031: dsp_core.instr_cycle += XP_WAITSTATE;
1.1.1.4 root 2032: } else {
1.1.1.6 ! root 2033: dsp_core.instr_cycle += YP_WAITSTATE;
1.1.1.4 root 2034: }
2035: }
2036:
2037: static void dsp_bset_reg(void)
2038: {
2039: Uint32 value, numreg, newcarry, numbit;
2040:
2041: numreg = (cur_inst>>8) & BITMASK(6);
2042: numbit = cur_inst & BITMASK(5);
2043:
2044: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
2045: dsp_pm_read_accu24(numreg, &value);
2046: } else {
1.1.1.6 ! root 2047: value = dsp_core.registers[numreg];
1.1.1.4 root 2048: }
2049:
2050: newcarry = (value>>numbit) & 1;
2051: value |= (1<<numbit);
2052:
2053: dsp_write_reg(numreg, value);
2054:
2055: /* Set carry */
1.1.1.6 ! root 2056: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 2057: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 2058:
1.1.1.6 ! root 2059: dsp_core.instr_cycle += 2;
1.1.1.4 root 2060: }
2061:
2062: static void dsp_btst_aa(void)
2063: {
2064: Uint32 memspace, addr, value, newcarry, numbit;
2065:
2066: memspace = (cur_inst>>6) & 1;
2067: value = (cur_inst>>8) & BITMASK(6);
2068: numbit = cur_inst & BITMASK(5);
2069:
2070: addr = value;
2071: value = read_memory(memspace, addr);
2072: newcarry = (value>>numbit) & 1;
2073:
2074: /* Set carry */
1.1.1.6 ! root 2075: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 2076: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 2077:
1.1.1.6 ! root 2078: dsp_core.instr_cycle += 2;
1.1.1.4 root 2079: }
2080:
2081: static void dsp_btst_ea(void)
2082: {
2083: Uint32 memspace, addr, value, newcarry, numbit;
2084:
2085: memspace = (cur_inst>>6) & 1;
2086: value = (cur_inst>>8) & BITMASK(6);
2087: numbit = cur_inst & BITMASK(5);
2088:
2089: dsp_calc_ea(value, &addr);
2090: value = read_memory(memspace, addr);
2091: newcarry = (value>>numbit) & 1;
2092:
2093: /* Set carry */
1.1.1.6 ! root 2094: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 2095: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 2096:
1.1.1.6 ! root 2097: dsp_core.instr_cycle += 2;
1.1.1.4 root 2098: }
2099:
2100: static void dsp_btst_pp(void)
2101: {
2102: Uint32 memspace, addr, value, newcarry, numbit;
2103:
2104: memspace = (cur_inst>>6) & 1;
2105: value = (cur_inst>>8) & BITMASK(6);
2106: numbit = cur_inst & BITMASK(5);
2107:
2108: addr = 0xffc0 + value;
2109: value = read_memory(memspace, addr);
2110: newcarry = (value>>numbit) & 1;
2111:
2112: /* Set carry */
1.1.1.6 ! root 2113: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 2114: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 2115:
1.1.1.6 ! root 2116: dsp_core.instr_cycle += 2;
1.1.1.4 root 2117: }
2118:
2119: static void dsp_btst_reg(void)
2120: {
2121: Uint32 value, numreg, newcarry, numbit;
2122:
2123: numreg = (cur_inst>>8) & BITMASK(6);
2124: numbit = cur_inst & BITMASK(5);
2125:
2126: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
2127: dsp_pm_read_accu24(numreg, &value);
2128: } else {
1.1.1.6 ! root 2129: value = dsp_core.registers[numreg];
1.1.1.4 root 2130: }
2131:
2132: newcarry = (value>>numbit) & 1;
2133:
2134: /* Set carry */
1.1.1.6 ! root 2135: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_C);
! 2136: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_C;
1.1.1.4 root 2137:
1.1.1.6 ! root 2138: dsp_core.instr_cycle += 2;
1.1.1.4 root 2139: }
2140:
2141: static void dsp_div(void)
2142: {
2143: Uint32 srcreg, destreg, source[3], dest[3];
2144: Uint16 newsr;
2145:
2146: srcreg = DSP_REG_NULL;
2147: switch((cur_inst>>4) & BITMASK(2)) {
2148: case 0: srcreg = DSP_REG_X0; break;
2149: case 1: srcreg = DSP_REG_Y0; break;
2150: case 2: srcreg = DSP_REG_X1; break;
2151: case 3: srcreg = DSP_REG_Y1; break;
2152: }
2153: destreg = DSP_REG_A+((cur_inst>>3) & 1);
2154:
2155: source[0] = 0;
1.1.1.6 ! root 2156: source[1] = dsp_core.registers[srcreg];
1.1.1.4 root 2157: if (source[1] & (1<<23)) {
2158: source[0] = 0xff;
2159: }
2160: source[2] = 0;
2161:
1.1.1.6 ! root 2162: dest[0] = dsp_core.registers[DSP_REG_A2+(destreg & 1)];
! 2163: dest[1] = dsp_core.registers[DSP_REG_A1+(destreg & 1)];
! 2164: dest[2] = dsp_core.registers[DSP_REG_A0+(destreg & 1)];
1.1.1.4 root 2165:
2166: if (((dest[0]>>7) & 1) ^ ((source[1]>>23) & 1)) {
2167: /* D += S */
2168: newsr = dsp_asl56(dest);
2169: dsp_add56(source, dest);
2170: } else {
2171: /* D -= S */
2172: newsr = dsp_asl56(dest);
2173: dsp_sub56(source, dest);
2174: }
2175:
1.1.1.6 ! root 2176: dest[2] |= (dsp_core.registers[DSP_REG_SR]>>DSP_SR_C) & 1;
1.1.1.4 root 2177:
1.1.1.6 ! root 2178: dsp_core.registers[DSP_REG_A2+(destreg & 1)] = dest[0];
! 2179: dsp_core.registers[DSP_REG_A1+(destreg & 1)] = dest[1];
! 2180: dsp_core.registers[DSP_REG_A0+(destreg & 1)] = dest[2];
! 2181:
! 2182: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_V));
! 2183: dsp_core.registers[DSP_REG_SR] |= (1-((dest[0]>>7) & 1))<<DSP_SR_C;
! 2184: dsp_core.registers[DSP_REG_SR] |= newsr & (1<<DSP_SR_L);
! 2185: dsp_core.registers[DSP_REG_SR] |= newsr & (1<<DSP_SR_V);
1.1.1.4 root 2186: }
2187:
2188: /*
2189: DO instruction parameter encoding
2190:
2191: xxxxxxxx 00xxxxxx 0xxxxxxx aa
2192: xxxxxxxx 01xxxxxx 0xxxxxxx ea
2193: xxxxxxxx YYxxxxxx 1xxxxxxx imm
2194: xxxxxxxx 11xxxxxx 0xxxxxxx reg
2195: */
2196:
2197: static void dsp_do_aa(void)
2198: {
2199: Uint32 memspace, addr;
2200:
2201: /* x:aa */
2202: /* y:aa */
2203:
1.1.1.6 ! root 2204: dsp_stack_push(dsp_core.registers[DSP_REG_LA], dsp_core.registers[DSP_REG_LC], 0);
! 2205: dsp_core.registers[DSP_REG_LA] = read_memory_p(dsp_core.pc+1) & BITMASK(16);
1.1.1.4 root 2206: cur_inst_len++;
1.1.1.6 ! root 2207: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
! 2208: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_LF);
1.1 root 2209:
2210: memspace = (cur_inst>>6) & 1;
2211: addr = (cur_inst>>8) & BITMASK(6);
1.1.1.6 ! root 2212: dsp_core.registers[DSP_REG_LC] = read_memory(memspace, addr) & BITMASK(16);
1.1.1.4 root 2213:
1.1.1.6 ! root 2214: dsp_core.instr_cycle += 4;
1.1 root 2215: }
2216:
1.1.1.3 root 2217: static void dsp_do_imm(void)
1.1 root 2218: {
2219: /* #xx */
1.1.1.3 root 2220:
1.1.1.6 ! root 2221: dsp_stack_push(dsp_core.registers[DSP_REG_LA], dsp_core.registers[DSP_REG_LC], 0);
! 2222: dsp_core.registers[DSP_REG_LA] = read_memory_p(dsp_core.pc+1) & BITMASK(16);
1.1.1.4 root 2223: cur_inst_len++;
1.1.1.6 ! root 2224: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
! 2225: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_LF);
1.1.1.4 root 2226:
1.1.1.6 ! root 2227: dsp_core.registers[DSP_REG_LC] = ((cur_inst>>8) & BITMASK(8))
1.1.1.3 root 2228: + ((cur_inst & BITMASK(4))<<8);
1.1.1.4 root 2229:
1.1.1.6 ! root 2230: dsp_core.instr_cycle += 4;
1.1 root 2231: }
2232:
1.1.1.3 root 2233: static void dsp_do_ea(void)
1.1 root 2234: {
1.1.1.2 root 2235: Uint32 memspace, ea_mode, addr;
1.1 root 2236:
2237: /* x:ea */
2238: /* y:ea */
2239:
1.1.1.6 ! root 2240: dsp_stack_push(dsp_core.registers[DSP_REG_LA], dsp_core.registers[DSP_REG_LC], 0);
! 2241: dsp_core.registers[DSP_REG_LA] = read_memory_p(dsp_core.pc+1) & BITMASK(16);
1.1.1.4 root 2242: cur_inst_len++;
1.1.1.6 ! root 2243: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
! 2244: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_LF);
1.1.1.4 root 2245:
1.1 root 2246: memspace = (cur_inst>>6) & 1;
2247: ea_mode = (cur_inst>>8) & BITMASK(6);
2248: dsp_calc_ea(ea_mode, &addr);
1.1.1.6 ! root 2249: dsp_core.registers[DSP_REG_LC] = read_memory(memspace, addr) & BITMASK(16);
1.1.1.4 root 2250:
1.1.1.6 ! root 2251: dsp_core.instr_cycle += 4;
1.1 root 2252: }
2253:
1.1.1.3 root 2254: static void dsp_do_reg(void)
1.1 root 2255: {
1.1.1.2 root 2256: Uint32 numreg;
1.1 root 2257:
2258: /* S */
2259:
1.1.1.6 ! root 2260: dsp_stack_push(dsp_core.registers[DSP_REG_LA], dsp_core.registers[DSP_REG_LC], 0);
! 2261: dsp_core.registers[DSP_REG_LA] = read_memory_p(dsp_core.pc+1) & BITMASK(16);
1.1.1.4 root 2262: cur_inst_len++;
2263:
1.1 root 2264: numreg = (cur_inst>>8) & BITMASK(6);
2265: if ((numreg == DSP_REG_A) || (numreg == DSP_REG_B)) {
1.1.1.6 ! root 2266: dsp_pm_read_accu24(numreg, &dsp_core.registers[DSP_REG_LC]);
1.1 root 2267: } else {
1.1.1.6 ! root 2268: dsp_core.registers[DSP_REG_LC] = dsp_core.registers[numreg];
1.1 root 2269: }
1.1.1.6 ! root 2270: dsp_core.registers[DSP_REG_LC] &= BITMASK(16);
1.1.1.4 root 2271:
1.1.1.6 ! root 2272: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
! 2273: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_LF);
1.1.1.4 root 2274:
1.1.1.6 ! root 2275: dsp_core.instr_cycle += 4;
1.1 root 2276: }
2277:
2278: static void dsp_enddo(void)
2279: {
1.1.1.4 root 2280: Uint32 saved_pc, saved_sr;
1.1 root 2281:
1.1.1.4 root 2282: dsp_stack_pop(&saved_pc, &saved_sr);
1.1.1.6 ! root 2283: dsp_core.registers[DSP_REG_SR] &= 0x7f;
! 2284: dsp_core.registers[DSP_REG_SR] |= saved_sr & (1<<DSP_SR_LF);
! 2285: dsp_stack_pop(&dsp_core.registers[DSP_REG_LA], &dsp_core.registers[DSP_REG_LC]);
1.1 root 2286: }
2287:
2288: static void dsp_illegal(void)
2289: {
2290: /* Raise interrupt p:0x003e */
1.1.1.5 root 2291: dsp_add_interrupt(DSP_INTER_ILLEGAL);
1.1 root 2292: }
2293:
1.1.1.4 root 2294: static void dsp_jcc_imm(void)
1.1 root 2295: {
1.1.1.4 root 2296: Uint32 cc_code, newpc;
1.1 root 2297:
1.1.1.4 root 2298: newpc = cur_inst & BITMASK(12);
2299: cc_code=(cur_inst>>12) & BITMASK(4);
2300: if (dsp_calc_cc(cc_code)) {
1.1.1.6 ! root 2301: dsp_core.pc = newpc;
1.1.1.4 root 2302: cur_inst_len = 0;
2303: }
2304:
1.1.1.6 ! root 2305: dsp_core.instr_cycle += 2;
1.1.1.4 root 2306: if (newpc >= 0x200) {
1.1.1.6 ! root 2307: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2308: }
1.1.1.4 root 2309: }
2310:
2311: static void dsp_jcc_ea(void)
2312: {
2313: Uint32 newpc, cc_code;
2314:
2315: dsp_calc_ea((cur_inst >>8) & BITMASK(6), &newpc);
2316: cc_code=cur_inst & BITMASK(4);
1.1 root 2317:
2318: if (dsp_calc_cc(cc_code)) {
1.1.1.6 ! root 2319: dsp_core.pc = newpc;
1.1 root 2320: cur_inst_len = 0;
2321: }
1.1.1.4 root 2322:
1.1.1.6 ! root 2323: dsp_core.instr_cycle += 2;
1.1.1.4 root 2324: if (newpc >= 0x200) {
1.1.1.6 ! root 2325: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2326: }
1.1 root 2327: }
2328:
1.1.1.4 root 2329: static void dsp_jclr_aa(void)
1.1 root 2330: {
1.1.1.4 root 2331: Uint32 memspace, addr, value, numbit, newaddr;
1.1 root 2332:
2333: memspace = (cur_inst>>6) & 1;
1.1.1.4 root 2334: addr = (cur_inst>>8) & BITMASK(6);
1.1 root 2335: numbit = cur_inst & BITMASK(5);
1.1.1.4 root 2336: value = read_memory(memspace, addr);
1.1.1.6 ! root 2337: newaddr = read_memory_p(dsp_core.pc+1);
1.1 root 2338:
1.1.1.6 ! root 2339: dsp_core.instr_cycle += 4;
1.1.1.4 root 2340: if (newaddr >= 0x200) {
1.1.1.6 ! root 2341: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2342: }
2343:
1.1.1.4 root 2344: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2345: dsp_core.pc = newaddr;
1.1.1.4 root 2346: cur_inst_len = 0;
2347: return;
2348: }
1.1.1.2 root 2349: ++cur_inst_len;
1.1.1.4 root 2350: }
2351:
2352: static void dsp_jclr_ea(void)
2353: {
2354: Uint32 memspace, addr, value, numbit, newaddr;
2355:
2356: memspace = (cur_inst>>6) & 1;
2357: value = (cur_inst>>8) & BITMASK(6);
2358: numbit = cur_inst & BITMASK(5);
1.1.1.6 ! root 2359: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2360:
2361: dsp_calc_ea(value, &addr);
2362: value = read_memory(memspace, addr);
2363:
1.1.1.6 ! root 2364: dsp_core.instr_cycle += 4;
1.1.1.4 root 2365: if (newaddr >= 0x200) {
1.1.1.6 ! root 2366: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2367: }
1.1 root 2368:
2369: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2370: dsp_core.pc = newaddr;
1.1.1.4 root 2371: cur_inst_len = 0;
2372: return;
2373: }
2374: ++cur_inst_len;
2375: }
1.1 root 2376:
1.1.1.4 root 2377: static void dsp_jclr_pp(void)
2378: {
2379: Uint32 memspace, addr, value, numbit, newaddr;
2380:
2381: memspace = (cur_inst>>6) & 1;
2382: value = (cur_inst>>8) & BITMASK(6);
2383: numbit = cur_inst & BITMASK(5);
2384: addr = 0xffc0 + value;
2385: value = read_memory(memspace, addr);
1.1.1.6 ! root 2386: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2387:
1.1.1.6 ! root 2388: dsp_core.instr_cycle += 4;
1.1.1.4 root 2389: if (newaddr >= 0x200) {
1.1.1.6 ! root 2390: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2391: }
1.1 root 2392:
1.1.1.4 root 2393: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2394: dsp_core.pc = newaddr;
1.1.1.4 root 2395: cur_inst_len = 0;
2396: return;
2397: }
2398: ++cur_inst_len;
2399: }
1.1.1.2 root 2400:
1.1.1.4 root 2401: static void dsp_jclr_reg(void)
2402: {
2403: Uint32 value, numreg, numbit, newaddr;
2404:
2405: numreg = (cur_inst>>8) & BITMASK(6);
2406: numbit = cur_inst & BITMASK(5);
1.1.1.6 ! root 2407: newaddr = read_memory_p(dsp_core.pc+1);
1.1 root 2408:
1.1.1.4 root 2409: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
2410: dsp_pm_read_accu24(numreg, &value);
2411: } else {
1.1.1.6 ! root 2412: value = dsp_core.registers[numreg];
1.1.1.4 root 2413: }
1.1 root 2414:
1.1.1.6 ! root 2415: dsp_core.instr_cycle += 4;
1.1.1.4 root 2416: if (newaddr >= 0x200) {
1.1.1.6 ! root 2417: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2418: }
2419:
2420: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2421: dsp_core.pc = newaddr;
1.1 root 2422: cur_inst_len = 0;
2423: return;
2424: }
1.1.1.4 root 2425: ++cur_inst_len;
1.1 root 2426: }
2427:
1.1.1.4 root 2428: static void dsp_jmp_ea(void)
1.1 root 2429: {
1.1.1.2 root 2430: Uint32 newpc;
1.1 root 2431:
1.1.1.4 root 2432: dsp_calc_ea((cur_inst>>8) & BITMASK(6), &newpc);
1.1 root 2433: cur_inst_len = 0;
1.1.1.6 ! root 2434: dsp_core.pc = newpc;
1.1 root 2435:
1.1.1.6 ! root 2436: dsp_core.instr_cycle += 2;
1.1.1.4 root 2437: if (newpc >= 0x200) {
1.1.1.6 ! root 2438: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2439: }
1.1.1.4 root 2440: }
2441:
2442: static void dsp_jmp_imm(void)
2443: {
2444: Uint32 newpc;
1.1 root 2445:
1.1.1.4 root 2446: newpc = cur_inst & BITMASK(12);
2447: cur_inst_len = 0;
1.1.1.6 ! root 2448: dsp_core.pc = newpc;
1.1.1.4 root 2449:
1.1.1.6 ! root 2450: dsp_core.instr_cycle += 2;
1.1.1.4 root 2451: if (newpc >= 0x200) {
1.1.1.6 ! root 2452: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2453: }
1.1 root 2454: }
2455:
1.1.1.4 root 2456: static void dsp_jscc_ea(void)
1.1 root 2457: {
1.1.1.2 root 2458: Uint32 newpc, cc_code;
1.1 root 2459:
1.1.1.4 root 2460: dsp_calc_ea((cur_inst >>8) & BITMASK(6), &newpc);
2461: cc_code=cur_inst & BITMASK(4);
2462:
2463: if (dsp_calc_cc(cc_code)) {
1.1.1.6 ! root 2464: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
! 2465: dsp_core.pc = newpc;
1.1.1.4 root 2466: cur_inst_len = 0;
2467: }
2468:
1.1.1.6 ! root 2469: dsp_core.instr_cycle += 2;
1.1.1.4 root 2470: if (newpc >= 0x200) {
1.1.1.6 ! root 2471: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2472: }
1.1.1.4 root 2473: }
1.1 root 2474:
1.1.1.4 root 2475: static void dsp_jscc_imm(void)
2476: {
2477: Uint32 cc_code, newpc;
2478:
2479: newpc = cur_inst & BITMASK(12);
2480: cc_code=(cur_inst>>12) & BITMASK(4);
1.1 root 2481: if (dsp_calc_cc(cc_code)) {
1.1.1.6 ! root 2482: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
! 2483: dsp_core.pc = newpc;
1.1.1.4 root 2484: cur_inst_len = 0;
2485: }
2486:
1.1.1.6 ! root 2487: dsp_core.instr_cycle += 2;
1.1.1.4 root 2488: if (newpc >= 0x200) {
1.1.1.6 ! root 2489: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2490: }
2491: }
1.1 root 2492:
1.1.1.4 root 2493: static void dsp_jsclr_aa(void)
2494: {
2495: Uint32 memspace, addr, value, newpc, numbit, newaddr;
2496:
2497: memspace = (cur_inst>>6) & 1;
2498: addr = (cur_inst>>8) & BITMASK(6);
2499: numbit = cur_inst & BITMASK(5);
2500: value = read_memory(memspace, addr);
1.1.1.6 ! root 2501: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2502:
1.1.1.6 ! root 2503: dsp_core.instr_cycle += 4;
1.1.1.4 root 2504: if (newaddr >= 0x200) {
1.1.1.6 ! root 2505: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2506: }
2507:
2508: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2509: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2510: newpc = newaddr;
1.1.1.6 ! root 2511: dsp_core.pc = newpc;
1.1 root 2512: cur_inst_len = 0;
1.1.1.4 root 2513: return;
1.1 root 2514: }
1.1.1.4 root 2515: ++cur_inst_len;
1.1 root 2516: }
2517:
1.1.1.4 root 2518: static void dsp_jsclr_ea(void)
1.1 root 2519: {
1.1.1.4 root 2520: Uint32 memspace, addr, value, newpc, numbit, newaddr;
1.1 root 2521:
2522: memspace = (cur_inst>>6) & 1;
2523: value = (cur_inst>>8) & BITMASK(6);
2524: numbit = cur_inst & BITMASK(5);
1.1.1.4 root 2525: dsp_calc_ea(value, &addr);
2526: value = read_memory(memspace, addr);
1.1.1.6 ! root 2527: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2528:
1.1.1.6 ! root 2529: dsp_core.instr_cycle += 4;
1.1.1.4 root 2530: if (newaddr >= 0x200) {
1.1.1.6 ! root 2531: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2532: }
1.1.1.4 root 2533:
2534: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2535: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2536: newpc = newaddr;
1.1.1.6 ! root 2537: dsp_core.pc = newpc;
1.1.1.4 root 2538: cur_inst_len = 0;
2539: return;
2540: }
1.1.1.2 root 2541: ++cur_inst_len;
1.1.1.4 root 2542: }
2543:
2544: static void dsp_jsclr_pp(void)
2545: {
2546: Uint32 memspace, addr, value, newpc, numbit, newaddr;
2547:
2548: memspace = (cur_inst>>6) & 1;
2549: value = (cur_inst>>8) & BITMASK(6);
2550: numbit = cur_inst & BITMASK(5);
2551: addr = 0xffc0 + value;
2552: value = read_memory(memspace, addr);
1.1.1.6 ! root 2553: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2554:
1.1.1.6 ! root 2555: dsp_core.instr_cycle += 4;
1.1.1.4 root 2556: if (newaddr >= 0x200) {
1.1.1.6 ! root 2557: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2558: }
2559:
1.1 root 2560: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2561: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2562: newpc = newaddr;
1.1.1.6 ! root 2563: dsp_core.pc = newpc;
1.1.1.4 root 2564: cur_inst_len = 0;
2565: return;
2566: }
2567: ++cur_inst_len;
2568: }
2569:
2570: static void dsp_jsclr_reg(void)
2571: {
2572: Uint32 value, numreg, newpc, numbit, newaddr;
2573:
2574: numreg = (cur_inst>>8) & BITMASK(6);
2575: numbit = cur_inst & BITMASK(5);
1.1.1.6 ! root 2576: newaddr = read_memory_p(dsp_core.pc+1);
1.1 root 2577:
1.1.1.4 root 2578: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
2579: dsp_pm_read_accu24(numreg, &value);
2580: } else {
1.1.1.6 ! root 2581: value = dsp_core.registers[numreg];
1.1.1.4 root 2582: }
2583:
1.1.1.6 ! root 2584: dsp_core.instr_cycle += 4;
1.1.1.4 root 2585: if (newaddr >= 0x200) {
1.1.1.6 ! root 2586: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2587: }
2588:
2589: if ((value & (1<<numbit))==0) {
1.1.1.6 ! root 2590: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2591: newpc = newaddr;
1.1.1.6 ! root 2592: dsp_core.pc = newpc;
1.1 root 2593: cur_inst_len = 0;
1.1.1.4 root 2594: return;
1.1 root 2595: }
1.1.1.4 root 2596: ++cur_inst_len;
1.1 root 2597: }
2598:
1.1.1.4 root 2599: static void dsp_jset_aa(void)
1.1 root 2600: {
1.1.1.4 root 2601: Uint32 memspace, addr, value, numbit, newpc, newaddr;
2602:
2603: memspace = (cur_inst>>6) & 1;
2604: addr = (cur_inst>>8) & BITMASK(6);
2605: numbit = cur_inst & BITMASK(5);
2606: value = read_memory(memspace, addr);
1.1.1.6 ! root 2607: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2608:
1.1.1.6 ! root 2609: dsp_core.instr_cycle += 4;
1.1.1.4 root 2610: if (newaddr >= 0x200) {
1.1.1.6 ! root 2611: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2612: }
2613:
2614: if (value & (1<<numbit)) {
2615: newpc = newaddr;
1.1.1.6 ! root 2616: dsp_core.pc = newpc;
1.1.1.4 root 2617: cur_inst_len=0;
2618: return;
2619: }
2620: ++cur_inst_len;
2621: }
2622:
2623: static void dsp_jset_ea(void)
2624: {
2625: Uint32 memspace, addr, value, numbit, newpc, newaddr;
1.1 root 2626:
2627: memspace = (cur_inst>>6) & 1;
2628: value = (cur_inst>>8) & BITMASK(6);
2629: numbit = cur_inst & BITMASK(5);
1.1.1.4 root 2630: dsp_calc_ea(value, &addr);
2631: value = read_memory(memspace, addr);
1.1.1.6 ! root 2632: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2633:
1.1.1.6 ! root 2634: dsp_core.instr_cycle += 4;
1.1.1.4 root 2635: if (newaddr >= 0x200) {
1.1.1.6 ! root 2636: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2637: }
2638:
2639: if (value & (1<<numbit)) {
2640: newpc = newaddr;
1.1.1.6 ! root 2641: dsp_core.pc = newpc;
1.1.1.4 root 2642: cur_inst_len=0;
2643: return;
2644: }
2645: ++cur_inst_len;
2646: }
1.1 root 2647:
1.1.1.4 root 2648: static void dsp_jset_pp(void)
2649: {
2650: Uint32 memspace, addr, value, numbit, newpc, newaddr;
2651:
2652: memspace = (cur_inst>>6) & 1;
2653: value = (cur_inst>>8) & BITMASK(6);
2654: numbit = cur_inst & BITMASK(5);
2655: addr = 0xffc0 + value;
2656: value = read_memory(memspace, addr);
1.1.1.6 ! root 2657: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2658:
1.1.1.6 ! root 2659: dsp_core.instr_cycle += 4;
1.1.1.4 root 2660: if (newaddr >= 0x200) {
1.1.1.6 ! root 2661: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2662: }
2663:
2664: if (value & (1<<numbit)) {
2665: newpc = newaddr;
1.1.1.6 ! root 2666: dsp_core.pc = newpc;
1.1.1.4 root 2667: cur_inst_len=0;
2668: return;
2669: }
2670: ++cur_inst_len;
2671: }
2672:
2673: static void dsp_jset_reg(void)
2674: {
2675: Uint32 value, numreg, numbit, newpc, newaddr;
2676:
2677: numreg = (cur_inst>>8) & BITMASK(6);
2678: numbit = cur_inst & BITMASK(5);
1.1.1.6 ! root 2679: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2680:
2681: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
2682: dsp_pm_read_accu24(numreg, &value);
2683: } else {
1.1.1.6 ! root 2684: value = dsp_core.registers[numreg];
1.1.1.4 root 2685: }
2686:
1.1.1.6 ! root 2687: dsp_core.instr_cycle += 4;
1.1.1.4 root 2688: if (newaddr >= 0x200) {
1.1.1.6 ! root 2689: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2690: }
2691:
2692: if (value & (1<<numbit)) {
2693: newpc = newaddr;
1.1.1.6 ! root 2694: dsp_core.pc = newpc;
1.1.1.4 root 2695: cur_inst_len=0;
2696: return;
2697: }
2698: ++cur_inst_len;
2699: }
2700:
2701: static void dsp_jsr_imm(void)
2702: {
2703: Uint32 newpc;
2704:
2705: newpc = cur_inst & BITMASK(12);
2706:
1.1.1.6 ! root 2707: if (dsp_core.interrupt_state != DSP_INTERRUPT_LONG){
! 2708: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2709: }
2710: else {
1.1.1.6 ! root 2711: dsp_core.interrupt_state = DSP_INTERRUPT_DISABLED;
1.1.1.4 root 2712: }
2713:
1.1.1.6 ! root 2714: dsp_core.pc = newpc;
1.1.1.4 root 2715: cur_inst_len = 0;
2716:
1.1.1.6 ! root 2717: dsp_core.instr_cycle += 2;
1.1.1.4 root 2718: if (newpc >= 0x200) {
1.1.1.6 ! root 2719: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2720: }
2721: }
2722:
2723: static void dsp_jsr_ea(void)
2724: {
2725: Uint32 newpc;
2726:
2727: dsp_calc_ea((cur_inst>>8) & BITMASK(6),&newpc);
2728:
1.1.1.6 ! root 2729: if (dsp_core.interrupt_state != DSP_INTERRUPT_LONG){
! 2730: dsp_stack_push(dsp_core.pc+cur_inst_len, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2731: }
2732: else {
1.1.1.6 ! root 2733: dsp_core.interrupt_state = DSP_INTERRUPT_DISABLED;
1.1.1.4 root 2734: }
2735:
1.1.1.6 ! root 2736: dsp_core.pc = newpc;
1.1.1.4 root 2737: cur_inst_len = 0;
2738:
1.1.1.6 ! root 2739: dsp_core.instr_cycle += 2;
1.1.1.4 root 2740: if (newpc >= 0x200) {
1.1.1.6 ! root 2741: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2742: }
2743: }
2744:
2745: static void dsp_jsset_aa(void)
2746: {
2747: Uint32 memspace, addr, value, newpc, numbit, newaddr;
2748:
2749: memspace = (cur_inst>>6) & 1;
2750: addr = (cur_inst>>8) & BITMASK(6);
2751: numbit = cur_inst & BITMASK(5);
2752: value = read_memory(memspace, addr);
1.1.1.6 ! root 2753: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2754:
1.1.1.6 ! root 2755: dsp_core.instr_cycle += 4;
1.1.1.4 root 2756: if (newaddr >= 0x200) {
1.1.1.6 ! root 2757: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 2758: }
2759:
2760: if (value & (1<<numbit)) {
1.1.1.6 ! root 2761: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2762: newpc = newaddr;
1.1.1.6 ! root 2763: dsp_core.pc = newpc;
1.1.1.4 root 2764: cur_inst_len = 0;
2765: return;
2766: }
2767: ++cur_inst_len;
2768: }
2769:
2770: static void dsp_jsset_ea(void)
2771: {
2772: Uint32 memspace, addr, value, newpc, numbit, newaddr;
2773:
2774: memspace = (cur_inst>>6) & 1;
2775: value = (cur_inst>>8) & BITMASK(6);
2776: numbit = cur_inst & BITMASK(5);
2777: dsp_calc_ea(value, &addr);
2778: value = read_memory(memspace, addr);
1.1.1.6 ! root 2779: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2780:
1.1.1.6 ! root 2781: dsp_core.instr_cycle += 4;
1.1.1.4 root 2782: if (newaddr >= 0x200) {
1.1.1.6 ! root 2783: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2784: }
2785:
2786: if (value & (1<<numbit)) {
1.1.1.6 ! root 2787: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2788: newpc = newaddr;
1.1.1.6 ! root 2789: dsp_core.pc = newpc;
1.1.1.4 root 2790: cur_inst_len = 0;
2791: return;
1.1 root 2792: }
1.1.1.4 root 2793: ++cur_inst_len;
1.1 root 2794: }
2795:
1.1.1.4 root 2796: static void dsp_jsset_pp(void)
1.1 root 2797: {
1.1.1.4 root 2798: Uint32 memspace, addr, value, newpc, numbit, newaddr;
2799:
2800: memspace = (cur_inst>>6) & 1;
2801: value = (cur_inst>>8) & BITMASK(6);
2802: numbit = cur_inst & BITMASK(5);
2803: addr = 0xffc0 + value;
2804: value = read_memory(memspace, addr);
1.1.1.6 ! root 2805: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2806:
1.1.1.6 ! root 2807: dsp_core.instr_cycle += 4;
1.1.1.4 root 2808: if (newaddr >= 0x200) {
1.1.1.6 ! root 2809: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2810: }
2811:
1.1.1.4 root 2812: if (value & (1<<numbit)) {
1.1.1.6 ! root 2813: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2814: newpc = newaddr;
1.1.1.6 ! root 2815: dsp_core.pc = newpc;
1.1.1.4 root 2816: cur_inst_len = 0;
2817: return;
2818: }
2819: ++cur_inst_len;
1.1 root 2820: }
2821:
1.1.1.4 root 2822: static void dsp_jsset_reg(void)
1.1 root 2823: {
1.1.1.4 root 2824: Uint32 value, numreg, newpc, numbit, newaddr;
1.1 root 2825:
1.1.1.4 root 2826: numreg = (cur_inst>>8) & BITMASK(6);
1.1 root 2827: numbit = cur_inst & BITMASK(5);
1.1.1.6 ! root 2828: newaddr = read_memory_p(dsp_core.pc+1);
1.1.1.4 root 2829:
2830: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B)) {
2831: dsp_pm_read_accu24(numreg, &value);
2832: } else {
1.1.1.6 ! root 2833: value = dsp_core.registers[numreg];
1.1.1.4 root 2834: }
1.1 root 2835:
1.1.1.6 ! root 2836: dsp_core.instr_cycle += 4;
1.1.1.4 root 2837: if (newaddr >= 0x200) {
1.1.1.6 ! root 2838: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1 root 2839: }
2840:
2841: if (value & (1<<numbit)) {
1.1.1.6 ! root 2842: dsp_stack_push(dsp_core.pc+2, dsp_core.registers[DSP_REG_SR], 0);
1.1.1.4 root 2843: newpc = newaddr;
1.1.1.6 ! root 2844: dsp_core.pc = newpc;
1.1 root 2845: cur_inst_len = 0;
1.1.1.4 root 2846: return;
1.1 root 2847: }
1.1.1.4 root 2848: ++cur_inst_len;
1.1 root 2849: }
2850:
2851: static void dsp_lua(void)
2852: {
1.1.1.2 root 2853: Uint32 value, srcreg, dstreg, srcsave, srcnew;
2854:
1.1 root 2855: srcreg = (cur_inst>>8) & BITMASK(3);
1.1.1.2 root 2856:
1.1.1.6 ! root 2857: srcsave = dsp_core.registers[DSP_REG_R0+srcreg];
1.1.1.2 root 2858: dsp_calc_ea((cur_inst>>8) & BITMASK(5), &value);
1.1.1.6 ! root 2859: srcnew = dsp_core.registers[DSP_REG_R0+srcreg];
! 2860: dsp_core.registers[DSP_REG_R0+srcreg] = srcsave;
1.1.1.2 root 2861:
1.1 root 2862: dstreg = cur_inst & BITMASK(3);
2863:
2864: if (cur_inst & (1<<3)) {
1.1.1.6 ! root 2865: dsp_core.registers[DSP_REG_N0+dstreg] = srcnew;
1.1 root 2866: } else {
1.1.1.6 ! root 2867: dsp_core.registers[DSP_REG_R0+dstreg] = srcnew;
1.1 root 2868: }
2869:
1.1.1.6 ! root 2870: dsp_core.instr_cycle += 2;
1.1 root 2871: }
2872:
1.1.1.3 root 2873: static void dsp_movec_reg(void)
1.1 root 2874: {
1.1.1.4 root 2875: Uint32 numreg1, numreg2, value, dummy;
1.1 root 2876:
2877: /* S1,D2 */
2878: /* S2,D1 */
2879:
2880: numreg2 = (cur_inst>>8) & BITMASK(6);
1.1.1.4 root 2881: numreg1 = cur_inst & BITMASK(6);
1.1 root 2882:
2883: if (cur_inst & (1<<15)) {
2884: /* Write D1 */
2885:
2886: if ((numreg2 == DSP_REG_A) || (numreg2 == DSP_REG_B)) {
1.1.1.4 root 2887: dsp_pm_read_accu24(numreg2, &value);
1.1 root 2888: } else {
1.1.1.6 ! root 2889: value = dsp_core.registers[numreg2];
1.1 root 2890: }
1.1.1.4 root 2891: value &= BITMASK(registers_mask[numreg1]);
2892: dsp_write_reg(numreg1, value);
1.1 root 2893: } else {
2894: /* Read S1 */
1.1.1.4 root 2895: if (numreg1 == DSP_REG_SSH) {
2896: dsp_stack_pop(&value, &dummy);
2897: }
2898: else {
1.1.1.6 ! root 2899: value = dsp_core.registers[numreg1];
1.1.1.4 root 2900: }
1.1 root 2901:
2902: if ((numreg2 == DSP_REG_A) || (numreg2 == DSP_REG_B)) {
1.1.1.6 ! root 2903: dsp_core.registers[DSP_REG_A2+(numreg2 & 1)] = 0;
1.1 root 2904: if (value & (1<<23)) {
1.1.1.6 ! root 2905: dsp_core.registers[DSP_REG_A2+(numreg2 & 1)] = 0xff;
1.1 root 2906: }
1.1.1.6 ! root 2907: dsp_core.registers[DSP_REG_A1+(numreg2 & 1)] = value & BITMASK(24);
! 2908: dsp_core.registers[DSP_REG_A0+(numreg2 & 1)] = 0;
1.1 root 2909: } else {
1.1.1.6 ! root 2910: dsp_core.registers[numreg2] = value & BITMASK(registers_mask[numreg2]);
1.1 root 2911: }
2912: }
2913: }
2914:
1.1.1.3 root 2915: static void dsp_movec_aa(void)
1.1 root 2916: {
1.1.1.4 root 2917: Uint32 numreg, addr, memspace, value, dummy;
1.1 root 2918:
2919: /* x:aa,D1 */
2920: /* S1,x:aa */
2921: /* y:aa,D1 */
2922: /* S1,y:aa */
2923:
1.1.1.4 root 2924: numreg = cur_inst & BITMASK(6);
1.1 root 2925: addr = (cur_inst>>8) & BITMASK(6);
2926: memspace = (cur_inst>>6) & 1;
2927:
2928: if (cur_inst & (1<<15)) {
2929: /* Write D1 */
1.1.1.4 root 2930: value = read_memory(memspace, addr);
2931: value &= BITMASK(registers_mask[numreg]);
2932: dsp_write_reg(numreg, value);
1.1 root 2933: } else {
2934: /* Read S1 */
1.1.1.4 root 2935: if (numreg == DSP_REG_SSH) {
2936: dsp_stack_pop(&value, &dummy);
2937: }
2938: else {
1.1.1.6 ! root 2939: value = dsp_core.registers[numreg];
1.1.1.4 root 2940: }
2941: write_memory(memspace, addr, value);
1.1 root 2942: }
2943: }
2944:
1.1.1.3 root 2945: static void dsp_movec_imm(void)
1.1 root 2946: {
1.1.1.4 root 2947: Uint32 numreg, value;
1.1 root 2948:
2949: /* #xx,D1 */
1.1.1.4 root 2950: numreg = cur_inst & BITMASK(6);
2951: value = (cur_inst>>8) & BITMASK(8);
2952: value &= BITMASK(registers_mask[numreg]);
2953: dsp_write_reg(numreg, value);
1.1 root 2954: }
2955:
1.1.1.3 root 2956: static void dsp_movec_ea(void)
1.1 root 2957: {
1.1.1.4 root 2958: Uint32 numreg, addr, memspace, ea_mode, value, dummy;
1.1 root 2959: int retour;
2960:
2961: /* x:ea,D1 */
2962: /* S1,x:ea */
2963: /* y:ea,D1 */
2964: /* S1,y:ea */
2965: /* #xxxx,D1 */
2966:
1.1.1.4 root 2967: numreg = cur_inst & BITMASK(6);
1.1 root 2968: ea_mode = (cur_inst>>8) & BITMASK(6);
2969: memspace = (cur_inst>>6) & 1;
2970:
2971: if (cur_inst & (1<<15)) {
2972: /* Write D1 */
2973: retour = dsp_calc_ea(ea_mode, &addr);
2974: if (retour) {
1.1.1.4 root 2975: value = addr;
1.1 root 2976: } else {
1.1.1.4 root 2977: value = read_memory(memspace, addr);
1.1 root 2978: }
1.1.1.4 root 2979: value &= BITMASK(registers_mask[numreg]);
2980: dsp_write_reg(numreg, value);
1.1 root 2981: } else {
2982: /* Read S1 */
1.1.1.4 root 2983: dsp_calc_ea(ea_mode, &addr);
2984: if (numreg == DSP_REG_SSH) {
2985: dsp_stack_pop(&value, &dummy);
2986: }
2987: else {
1.1.1.6 ! root 2988: value = dsp_core.registers[numreg];
1.1.1.4 root 2989: }
2990: write_memory(memspace, addr, value);
1.1 root 2991: }
2992: }
2993:
1.1.1.4 root 2994: static void dsp_movem_aa(void)
1.1 root 2995: {
1.1.1.4 root 2996: Uint32 numreg, addr, value, dummy;
1.1 root 2997:
2998: numreg = cur_inst & BITMASK(6);
1.1.1.4 root 2999: addr = (cur_inst>>8) & BITMASK(6);
1.1 root 3000:
1.1.1.4 root 3001: if (cur_inst & (1<<15)) {
3002: /* Write D */
3003: value = read_memory_p(addr);
3004: value &= BITMASK(registers_mask[numreg]);
3005: dsp_write_reg(numreg, value);
1.1 root 3006: } else {
1.1.1.4 root 3007: /* Read S */
3008: if (numreg == DSP_REG_SSH) {
3009: dsp_stack_pop(&value, &dummy);
3010: }
3011: else if ((numreg == DSP_REG_A) || (numreg == DSP_REG_B)) {
3012: dsp_pm_read_accu24(numreg, &value);
3013: }
3014: else {
1.1.1.6 ! root 3015: value = dsp_core.registers[numreg];
1.1.1.4 root 3016: }
3017: write_memory(DSP_SPACE_P, addr, value);
3018: }
1.1 root 3019:
1.1.1.6 ! root 3020: dsp_core.instr_cycle += 4;
1.1.1.4 root 3021: if (addr>=0x200) {
1.1.1.6 ! root 3022: dsp_core.instr_cycle += P_WAITSTATE;
1.1 root 3023: }
1.1.1.4 root 3024: }
3025:
3026: static void dsp_movem_ea(void)
3027: {
3028: Uint32 numreg, addr, ea_mode, value, dummy;
3029:
3030: numreg = cur_inst & BITMASK(6);
3031: ea_mode = (cur_inst>>8) & BITMASK(6);
3032: dsp_calc_ea(ea_mode, &addr);
1.1 root 3033:
3034: if (cur_inst & (1<<15)) {
3035: /* Write D */
1.1.1.4 root 3036: value = read_memory_p(addr);
3037: value &= BITMASK(registers_mask[numreg]);
3038: dsp_write_reg(numreg, value);
1.1 root 3039: } else {
3040: /* Read S */
1.1.1.4 root 3041: if (numreg == DSP_REG_SSH) {
3042: dsp_stack_pop(&value, &dummy);
3043: }
3044: else if ((numreg == DSP_REG_A) || (numreg == DSP_REG_B)) {
1.1 root 3045: dsp_pm_read_accu24(numreg, &value);
1.1.1.4 root 3046: }
3047: else {
1.1.1.6 ! root 3048: value = dsp_core.registers[numreg];
1.1 root 3049: }
3050: write_memory(DSP_SPACE_P, addr, value);
3051: }
3052:
1.1.1.6 ! root 3053: dsp_core.instr_cycle += 4;
1.1.1.4 root 3054: if (addr>=0x200) {
1.1.1.6 ! root 3055: dsp_core.instr_cycle += P_WAITSTATE;
1.1.1.4 root 3056: }
1.1 root 3057: }
3058:
3059: static void dsp_movep_0(void)
3060: {
3061: /* S,x:pp */
3062: /* x:pp,D */
3063: /* S,y:pp */
3064: /* y:pp,D */
3065:
1.1.1.4 root 3066: Uint32 addr, memspace, numreg, value, dummy;
1.1 root 3067:
3068: addr = 0xffc0 + (cur_inst & BITMASK(6));
3069: memspace = (cur_inst>>16) & 1;
3070: numreg = (cur_inst>>8) & BITMASK(6);
3071:
3072: if (cur_inst & (1<<15)) {
3073: /* Write pp */
3074: if ((numreg == DSP_REG_A) || (numreg == DSP_REG_B)) {
3075: dsp_pm_read_accu24(numreg, &value);
1.1.1.4 root 3076: }
3077: else if (numreg == DSP_REG_SSH) {
3078: dsp_stack_pop(&value, &dummy);
3079: }
3080: else {
1.1.1.6 ! root 3081: value = dsp_core.registers[numreg];
1.1 root 3082: }
3083: write_memory(memspace, addr, value);
3084: } else {
3085: /* Read pp */
3086: value = read_memory(memspace, addr);
1.1.1.4 root 3087: value &= BITMASK(registers_mask[numreg]);
3088: dsp_write_reg(numreg, value);
1.1 root 3089: }
1.1.1.4 root 3090:
1.1.1.6 ! root 3091: dsp_core.instr_cycle += 2;
1.1 root 3092: }
3093:
3094: static void dsp_movep_1(void)
3095: {
3096: /* p:ea,x:pp */
3097: /* x:pp,p:ea */
3098: /* p:ea,y:pp */
3099: /* y:pp,p:ea */
3100:
1.1.1.2 root 3101: Uint32 xyaddr, memspace, paddr;
1.1 root 3102:
3103: xyaddr = 0xffc0 + (cur_inst & BITMASK(6));
3104: dsp_calc_ea((cur_inst>>8) & BITMASK(6), &paddr);
3105: memspace = (cur_inst>>16) & 1;
3106:
3107: if (cur_inst & (1<<15)) {
3108: /* Write pp */
1.1.1.4 root 3109: write_memory(memspace, xyaddr, read_memory_p(paddr));
1.1 root 3110: } else {
3111: /* Read pp */
3112: write_memory(DSP_SPACE_P, paddr, read_memory(memspace, xyaddr));
3113: }
1.1.1.4 root 3114:
1.1.1.6 ! root 3115: dsp_core.instr_cycle += 2;
1.1 root 3116: }
3117:
1.1.1.4 root 3118: static void dsp_movep_23(void)
1.1 root 3119: {
3120: /* x:ea,x:pp */
3121: /* y:ea,x:pp */
3122: /* #xxxxxx,x:pp */
3123: /* x:pp,x:ea */
3124: /* x:pp,y:pp */
3125: /* x:ea,y:pp */
3126: /* y:ea,y:pp */
3127: /* #xxxxxx,y:pp */
3128: /* y:pp,y:ea */
3129: /* y:pp,x:ea */
3130:
1.1.1.2 root 3131: Uint32 addr, peraddr, easpace, perspace, ea_mode;
1.1 root 3132: int retour;
3133:
3134: peraddr = 0xffc0 + (cur_inst & BITMASK(6));
3135: perspace = (cur_inst>>16) & 1;
3136:
3137: ea_mode = (cur_inst>>8) & BITMASK(6);
3138: easpace = (cur_inst>>6) & 1;
3139: retour = dsp_calc_ea(ea_mode, &addr);
3140:
3141: if (cur_inst & (1<<15)) {
3142: /* Write pp */
3143:
3144: if (retour) {
3145: write_memory(perspace, peraddr, addr);
3146: } else {
1.1.1.4 root 3147: if (peraddr>=0x200) {
1.1.1.6 ! root 3148: dsp_core.instr_cycle += P_WAITSTATE;
1.1.1.4 root 3149: }
1.1 root 3150: write_memory(perspace, peraddr, read_memory(easpace, addr));
3151: }
3152: } else {
3153: /* Read pp */
1.1.1.4 root 3154: if (peraddr>=0x200) {
1.1.1.6 ! root 3155: dsp_core.instr_cycle += P_WAITSTATE;
1.1.1.4 root 3156: }
1.1 root 3157: write_memory(easpace, addr, read_memory(perspace, peraddr));
3158: }
1.1.1.4 root 3159:
1.1.1.6 ! root 3160: dsp_core.instr_cycle += 2;
1.1 root 3161: }
3162:
3163: static void dsp_norm(void)
3164: {
1.1.1.2 root 3165: Uint32 cursr,cur_e, cur_euz, dest[3], numreg, rreg;
3166: Uint16 newsr;
1.1 root 3167:
1.1.1.6 ! root 3168: cursr = dsp_core.registers[DSP_REG_SR];
1.1 root 3169: cur_e = (cursr>>DSP_SR_E) & 1; /* E */
3170: cur_euz = ~cur_e; /* (not E) and U and (not Z) */
3171: cur_euz &= (cursr>>DSP_SR_U) & 1;
3172: cur_euz &= ~((cursr>>DSP_SR_Z) & 1);
3173: cur_euz &= 1;
3174:
3175: numreg = (cur_inst>>3) & 1;
1.1.1.6 ! root 3176: dest[0] = dsp_core.registers[DSP_REG_A2+numreg];
! 3177: dest[1] = dsp_core.registers[DSP_REG_A1+numreg];
! 3178: dest[2] = dsp_core.registers[DSP_REG_A0+numreg];
1.1 root 3179: rreg = DSP_REG_R0+((cur_inst>>8) & BITMASK(3));
3180:
3181: if (cur_euz) {
3182: newsr = dsp_asl56(dest);
1.1.1.6 ! root 3183: --dsp_core.registers[rreg];
! 3184: dsp_core.registers[rreg] &= BITMASK(16);
1.1 root 3185: } else if (cur_e) {
3186: newsr = dsp_asr56(dest);
1.1.1.6 ! root 3187: ++dsp_core.registers[rreg];
! 3188: dsp_core.registers[rreg] &= BITMASK(16);
1.1 root 3189: } else {
3190: newsr = 0;
3191: }
3192:
1.1.1.6 ! root 3193: dsp_core.registers[DSP_REG_A2+numreg] = dest[0];
! 3194: dsp_core.registers[DSP_REG_A1+numreg] = dest[1];
! 3195: dsp_core.registers[DSP_REG_A0+numreg] = dest[2];
1.1.1.2 root 3196:
1.1.1.6 ! root 3197: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 3198:
1.1.1.6 ! root 3199: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 3200: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 3201: }
3202:
3203: static void dsp_ori(void)
3204: {
1.1.1.2 root 3205: Uint32 regnum, value;
1.1 root 3206:
3207: value = (cur_inst >> 8) & BITMASK(8);
3208: regnum = cur_inst & BITMASK(2);
3209: switch(regnum) {
3210: case 0:
3211: /* mr */
1.1.1.6 ! root 3212: dsp_core.registers[DSP_REG_SR] |= value<<8;
1.1 root 3213: break;
3214: case 1:
3215: /* ccr */
1.1.1.6 ! root 3216: dsp_core.registers[DSP_REG_SR] |= value;
1.1 root 3217: break;
3218: case 2:
3219: /* omr */
1.1.1.6 ! root 3220: dsp_core.registers[DSP_REG_OMR] |= value;
1.1 root 3221: break;
3222: }
3223: }
3224:
1.1.1.3 root 3225: /*
3226: REP instruction parameter encoding
3227:
3228: xxxxxxxx 00xxxxxx 0xxxxxxx aa
3229: xxxxxxxx 01xxxxxx 0xxxxxxx ea
3230: xxxxxxxx YYxxxxxx 1xxxxxxx imm
3231: xxxxxxxx 11xxxxxx 0xxxxxxx reg
3232: */
3233:
3234: static void dsp_rep_aa(void)
1.1 root 3235: {
3236: /* x:aa */
3237: /* y:aa */
1.1.1.6 ! root 3238: dsp_core.registers[DSP_REG_LCSAVE] = dsp_core.registers[DSP_REG_LC];
! 3239: dsp_core.pc_on_rep = 1; /* Not decrement LC at first time */
! 3240: dsp_core.loop_rep = 1; /* We are now running rep */
1.1 root 3241:
1.1.1.6 ! root 3242: dsp_core.registers[DSP_REG_LC]=read_memory((cur_inst>>6) & 1,(cur_inst>>8) & BITMASK(6));
1.1.1.4 root 3243:
1.1.1.6 ! root 3244: dsp_core.instr_cycle += 2;
1.1 root 3245: }
3246:
1.1.1.3 root 3247: static void dsp_rep_imm(void)
1.1 root 3248: {
3249: /* #xxx */
3250:
1.1.1.6 ! root 3251: dsp_core.registers[DSP_REG_LCSAVE] = dsp_core.registers[DSP_REG_LC];
! 3252: dsp_core.pc_on_rep = 1; /* Not decrement LC at first time */
! 3253: dsp_core.loop_rep = 1; /* We are now running rep */
1.1.1.4 root 3254:
1.1.1.6 ! root 3255: dsp_core.registers[DSP_REG_LC] = ((cur_inst>>8) & BITMASK(8))
1.1.1.3 root 3256: + ((cur_inst & BITMASK(4))<<8);
1.1.1.4 root 3257:
1.1.1.6 ! root 3258: dsp_core.instr_cycle += 2;
1.1 root 3259: }
3260:
1.1.1.3 root 3261: static void dsp_rep_ea(void)
1.1 root 3262: {
1.1.1.2 root 3263: Uint32 value;
1.1 root 3264:
3265: /* x:ea */
3266: /* y:ea */
3267:
1.1.1.6 ! root 3268: dsp_core.registers[DSP_REG_LCSAVE] = dsp_core.registers[DSP_REG_LC];
! 3269: dsp_core.pc_on_rep = 1; /* Not decrement LC at first time */
! 3270: dsp_core.loop_rep = 1; /* We are now running rep */
1.1.1.4 root 3271:
1.1 root 3272: dsp_calc_ea((cur_inst>>8) & BITMASK(6),&value);
1.1.1.6 ! root 3273: dsp_core.registers[DSP_REG_LC]= read_memory((cur_inst>>6) & 1, value);
1.1.1.4 root 3274:
1.1.1.6 ! root 3275: dsp_core.instr_cycle += 2;
1.1 root 3276: }
3277:
1.1.1.3 root 3278: static void dsp_rep_reg(void)
1.1 root 3279: {
1.1.1.2 root 3280: Uint32 numreg;
1.1 root 3281:
3282: /* R */
3283:
1.1.1.6 ! root 3284: dsp_core.registers[DSP_REG_LCSAVE] = dsp_core.registers[DSP_REG_LC];
! 3285: dsp_core.pc_on_rep = 1; /* Not decrement LC at first time */
! 3286: dsp_core.loop_rep = 1; /* We are now running rep */
1.1.1.4 root 3287:
1.1 root 3288: numreg = (cur_inst>>8) & BITMASK(6);
3289: if ((numreg == DSP_REG_A) || (numreg == DSP_REG_B)) {
1.1.1.6 ! root 3290: dsp_pm_read_accu24(numreg, &dsp_core.registers[DSP_REG_LC]);
1.1 root 3291: } else {
1.1.1.6 ! root 3292: dsp_core.registers[DSP_REG_LC] = dsp_core.registers[numreg];
1.1 root 3293: }
1.1.1.6 ! root 3294: dsp_core.registers[DSP_REG_LC] &= BITMASK(16);
1.1.1.4 root 3295:
1.1.1.6 ! root 3296: dsp_core.instr_cycle += 2;
1.1 root 3297: }
3298:
3299: static void dsp_reset(void)
3300: {
3301: /* Reset external peripherals */
1.1.1.6 ! root 3302: dsp_core.instr_cycle += 2;
1.1 root 3303: }
3304:
3305: static void dsp_rti(void)
3306: {
1.1.1.2 root 3307: Uint32 newpc = 0, newsr = 0;
1.1 root 3308:
3309: dsp_stack_pop(&newpc, &newsr);
1.1.1.6 ! root 3310: dsp_core.pc = newpc;
! 3311: dsp_core.registers[DSP_REG_SR] = newsr;
1.1 root 3312: cur_inst_len = 0;
1.1.1.4 root 3313:
1.1.1.6 ! root 3314: dsp_core.instr_cycle += 2;
1.1.1.4 root 3315: if (newpc >= 0x200) {
1.1.1.6 ! root 3316: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 3317: }
1.1 root 3318: }
3319:
3320: static void dsp_rts(void)
3321: {
1.1.1.2 root 3322: Uint32 newpc = 0, newsr;
1.1 root 3323:
3324: dsp_stack_pop(&newpc, &newsr);
1.1.1.6 ! root 3325: dsp_core.pc = newpc;
1.1 root 3326: cur_inst_len = 0;
1.1.1.4 root 3327:
1.1.1.6 ! root 3328: dsp_core.instr_cycle += 2;
1.1.1.4 root 3329: if (newpc >= 0x200) {
1.1.1.6 ! root 3330: dsp_core.instr_cycle += 2*P_WAITSTATE;
1.1.1.4 root 3331: }
1.1 root 3332: }
3333:
3334: static void dsp_stop(void)
3335: {
1.1.1.6 ! root 3336: LOG_TRACE(TRACE_DSP_STATE, "Dsp: STOP instruction\n");
1.1 root 3337: }
3338:
3339: static void dsp_swi(void)
3340: {
3341: /* Raise interrupt p:0x0006 */
1.1.1.6 ! root 3342: dsp_core.instr_cycle += 6;
1.1 root 3343: }
3344:
3345: static void dsp_tcc(void)
3346: {
1.1.1.6 ! root 3347: Uint32 cc_code, regsrc1, regdest1;
1.1.1.2 root 3348: Uint32 regsrc2, regdest2;
1.1.1.6 ! root 3349: Uint32 val0, val1, val2;
! 3350:
1.1 root 3351: cc_code = (cur_inst>>12) & BITMASK(4);
3352:
3353: if (dsp_calc_cc(cc_code)) {
3354: regsrc1 = registers_tcc[(cur_inst>>3) & BITMASK(4)][0];
1.1.1.2 root 3355: regdest1 = registers_tcc[(cur_inst>>3) & BITMASK(4)][1];
1.1 root 3356:
3357: /* Read S1 */
3358: if ((regsrc1 == DSP_REG_A) || (regsrc1 == DSP_REG_B)) {
1.1.1.6 ! root 3359: val0 = dsp_core.registers[DSP_REG_A0+(regsrc1 & 1)];
! 3360: val1 = dsp_core.registers[DSP_REG_A1+(regsrc1 & 1)];
! 3361: val2 = dsp_core.registers[DSP_REG_A2+(regsrc1 & 1)];
1.1 root 3362: } else {
1.1.1.6 ! root 3363: val0 = 0;
! 3364: val1 = dsp_core.registers[regsrc1];
! 3365: if (val1 & (1<<23))
! 3366: val2 = 0xff;
! 3367: else
! 3368: val2 = 0x0;
1.1 root 3369: }
3370:
3371: /* Write D1 */
1.1.1.6 ! root 3372: dsp_core.registers[DSP_REG_A2+(regdest1 & 1)] = val2;
! 3373: dsp_core.registers[DSP_REG_A1+(regdest1 & 1)] = val1;
! 3374: dsp_core.registers[DSP_REG_A0+(regdest1 & 1)] = val0;
1.1 root 3375:
3376: /* S2,D2 transfer */
3377: if (cur_inst & (1<<16)) {
1.1.1.2 root 3378: regsrc2 = DSP_REG_R0+((cur_inst>>8) & BITMASK(3));
3379: regdest2 = DSP_REG_R0+(cur_inst & BITMASK(3));
1.1 root 3380:
1.1.1.6 ! root 3381: dsp_core.registers[regdest2] = dsp_core.registers[regsrc2];
1.1 root 3382: }
3383: }
3384: }
3385:
3386: static void dsp_wait(void)
3387: {
1.1.1.6 ! root 3388: LOG_TRACE(TRACE_DSP_STATE, "Dsp: WAIT instruction\n");
1.1 root 3389: }
3390:
1.1.1.2 root 3391: static int dsp_pm_read_accu24(int numreg, Uint32 *dest)
1.1 root 3392: {
1.1.1.4 root 3393: Uint32 scaling, value, reg;
1.1.1.2 root 3394: int got_limited=0;
1.1 root 3395:
3396: /* Read an accumulator, stores it limited */
3397:
1.1.1.6 ! root 3398: scaling = (dsp_core.registers[DSP_REG_SR]>>DSP_SR_S0) & BITMASK(2);
1.1.1.4 root 3399: reg = numreg & 1;
1.1 root 3400:
1.1.1.6 ! root 3401: value = (dsp_core.registers[DSP_REG_A2+reg]) << 24;
! 3402: value += dsp_core.registers[DSP_REG_A1+reg];
1.1 root 3403:
3404: switch(scaling) {
3405: case 0:
1.1.1.4 root 3406: /* No scaling */
3407: break;
3408: case 1:
3409: /* scaling down */
3410: value >>= 1;
1.1 root 3411: break;
3412: case 2:
1.1.1.4 root 3413: /* scaling up */
3414: value <<= 1;
1.1.1.6 ! root 3415: value |= (dsp_core.registers[DSP_REG_A0+reg]>>23) & 1;
1.1 root 3416: break;
1.1.1.4 root 3417: /* indeterminate */
3418: case 3:
3419: break;
3420: }
3421:
3422: /* limiting ? */
3423: value &= BITMASK(24);
3424:
1.1.1.6 ! root 3425: if (dsp_core.registers[DSP_REG_A2+reg] == 0) {
1.1.1.4 root 3426: if (value <= 0x007fffff) {
3427: /* No limiting */
3428: *dest=value;
3429: return 0;
3430: }
3431: }
3432:
1.1.1.6 ! root 3433: if (dsp_core.registers[DSP_REG_A2+reg] == 0xff) {
1.1.1.4 root 3434: if (value >= 0x00800000) {
3435: /* No limiting */
3436: *dest=value;
3437: return 0;
3438: }
1.1 root 3439: }
3440:
1.1.1.6 ! root 3441: if (dsp_core.registers[DSP_REG_A2+reg] & (1<<7)) {
1.1 root 3442: /* Limited to maximum negative value */
3443: *dest=0x00800000;
1.1.1.6 ! root 3444: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_L);
1.1.1.2 root 3445: got_limited=1;
1.1 root 3446: } else {
3447: /* Limited to maximal positive value */
3448: *dest=0x007fffff;
1.1.1.6 ! root 3449: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_L);
1.1.1.2 root 3450: got_limited=1;
1.1 root 3451: }
1.1.1.2 root 3452:
3453: return got_limited;
1.1 root 3454: }
3455:
3456: static void dsp_pm_0(void)
3457: {
1.1.1.6 ! root 3458: Uint32 memspace, numreg, addr, save_accu, save_xy0;
1.1 root 3459: /*
3460: 0000 100d 00mm mrrr S,x:ea x0,D
3461: 0000 100d 10mm mrrr S,y:ea y0,D
3462: */
3463: memspace = (cur_inst>>15) & 1;
3464: numreg = (cur_inst>>16) & 1;
1.1.1.6 ! root 3465: dsp_calc_ea((cur_inst>>8) & BITMASK(6), &addr);
! 3466:
! 3467: /* Save A or B */
! 3468: dsp_pm_read_accu24(numreg, &save_accu);
1.1 root 3469:
1.1.1.6 ! root 3470: /* Save X0 or Y0 */
! 3471: save_xy0 = dsp_core.registers[DSP_REG_X0+(memspace<<1)];
! 3472:
! 3473: /* Execute parallel instruction */
! 3474: opcodes_alu[cur_inst & BITMASK(8)]();
! 3475:
! 3476: /* Move [A|B] to [x|y]:ea */
! 3477: write_memory(memspace, addr, save_accu);
! 3478:
! 3479: /* Move [x|y]0 to [A|B] */
! 3480: dsp_core.registers[DSP_REG_A0+numreg] = 0;
! 3481: dsp_core.registers[DSP_REG_A1+numreg] = save_xy0;
! 3482: if (save_xy0 & (1<<23))
! 3483: dsp_core.registers[DSP_REG_A2+numreg] = 0xff;
! 3484: else
! 3485: dsp_core.registers[DSP_REG_A2+numreg] = 0x0;
1.1 root 3486: }
3487:
3488: static void dsp_pm_1(void)
3489: {
1.1.1.6 ! root 3490: Uint32 memspace, numreg1, numreg2, value, xy_addr, retour, save_1, save_2;
1.1 root 3491: /*
3492: 0001 ffdf w0mm mrrr x:ea,D1 S2,D2
3493: S1,x:ea S2,D2
3494: #xxxxxx,D1 S2,D2
3495: 0001 deff w1mm mrrr S1,D1 y:ea,D2
3496: S1,D1 S2,y:ea
3497: S1,D1 #xxxxxx,D2
3498: */
3499: value = (cur_inst>>8) & BITMASK(6);
3500: retour = dsp_calc_ea(value, &xy_addr);
3501: memspace = (cur_inst>>14) & 1;
1.1.1.6 ! root 3502: numreg1 = numreg2 = DSP_REG_NULL;
1.1 root 3503:
3504: if (memspace) {
3505: /* Y: */
3506: switch((cur_inst>>16) & BITMASK(2)) {
1.1.1.6 ! root 3507: case 0: numreg1 = DSP_REG_Y0; break;
! 3508: case 1: numreg1 = DSP_REG_Y1; break;
! 3509: case 2: numreg1 = DSP_REG_A; break;
! 3510: case 3: numreg1 = DSP_REG_B; break;
1.1 root 3511: }
3512: } else {
3513: /* X: */
3514: switch((cur_inst>>18) & BITMASK(2)) {
1.1.1.6 ! root 3515: case 0: numreg1 = DSP_REG_X0; break;
! 3516: case 1: numreg1 = DSP_REG_X1; break;
! 3517: case 2: numreg1 = DSP_REG_A; break;
! 3518: case 3: numreg1 = DSP_REG_B; break;
1.1 root 3519: }
3520: }
3521:
3522: if (cur_inst & (1<<15)) {
3523: /* Write D1 */
1.1.1.6 ! root 3524: if (retour)
! 3525: save_1 = xy_addr;
! 3526: else
! 3527: save_1 = read_memory(memspace, xy_addr);
1.1 root 3528: } else {
3529: /* Read S1 */
1.1.1.6 ! root 3530: if ((numreg1==DSP_REG_A) || (numreg1==DSP_REG_B))
! 3531: dsp_pm_read_accu24(numreg1, &save_1);
! 3532: else
! 3533: save_1 = dsp_core.registers[numreg1];
1.1 root 3534: }
1.1.1.6 ! root 3535:
1.1 root 3536: /* S2 */
3537: if (memspace) {
3538: /* Y: */
1.1.1.6 ! root 3539: numreg2 = DSP_REG_A + ((cur_inst>>19) & 1);
1.1 root 3540: } else {
3541: /* X: */
1.1.1.6 ! root 3542: numreg2 = DSP_REG_A + ((cur_inst>>17) & 1);
1.1 root 3543: }
1.1.1.6 ! root 3544: dsp_pm_read_accu24(numreg2, &save_2);
1.1 root 3545:
1.1.1.6 ! root 3546:
! 3547: /* Execute parallel instruction */
! 3548: opcodes_alu[cur_inst & BITMASK(8)]();
! 3549:
! 3550:
! 3551: /* Write parallel move values */
! 3552: if (cur_inst & (1<<15)) {
! 3553: /* Write D1 */
! 3554: if (numreg1 == DSP_REG_A) {
! 3555: dsp_core.registers[DSP_REG_A0] = 0x0;
! 3556: dsp_core.registers[DSP_REG_A1] = save_1;
! 3557: dsp_core.registers[DSP_REG_A2] = save_1 & (1<<23) ? 0xff : 0x0;
! 3558: }
! 3559: else if (numreg1 == DSP_REG_B) {
! 3560: dsp_core.registers[DSP_REG_B0] = 0x0;
! 3561: dsp_core.registers[DSP_REG_B1] = save_1;
! 3562: dsp_core.registers[DSP_REG_B2] = save_1 & (1<<23) ? 0xff : 0x0;
! 3563: }
! 3564: else {
! 3565: } dsp_core.registers[numreg1] = save_1;
! 3566: } else {
! 3567: /* Read S1 */
! 3568: write_memory(memspace, xy_addr, save_1);
! 3569: }
! 3570:
! 3571: /* S2 -> D2 */
1.1 root 3572: if (memspace) {
3573: /* Y: */
1.1.1.6 ! root 3574: numreg2 = DSP_REG_X0 + ((cur_inst>>18) & 1);
1.1 root 3575: } else {
3576: /* X: */
1.1.1.6 ! root 3577: numreg2 = DSP_REG_Y0 + ((cur_inst>>16) & 1);
1.1 root 3578: }
1.1.1.6 ! root 3579: dsp_core.registers[numreg2] = save_2;
1.1 root 3580: }
3581:
3582: static void dsp_pm_2(void)
3583: {
1.1.1.2 root 3584: Uint32 dummy;
1.1 root 3585: /*
3586: 0010 0000 0000 0000 nop
3587: 0010 0000 010m mrrr R update
3588: 0010 00ee eeed dddd S,D
3589: 001d dddd iiii iiii #xx,D
3590: */
1.1.1.4 root 3591: if ((cur_inst & 0xffff00) == 0x200000) {
1.1.1.6 ! root 3592: /* Execute parallel instruction */
! 3593: opcodes_alu[cur_inst & BITMASK(8)]();
1.1 root 3594: return;
3595: }
3596:
1.1.1.4 root 3597: if ((cur_inst & 0xffe000) == 0x204000) {
1.1 root 3598: dsp_calc_ea((cur_inst>>8) & BITMASK(5), &dummy);
1.1.1.6 ! root 3599: /* Execute parallel instruction */
! 3600: opcodes_alu[cur_inst & BITMASK(8)]();
1.1 root 3601: return;
3602: }
3603:
1.1.1.4 root 3604: if ((cur_inst & 0xfc0000) == 0x200000) {
1.1 root 3605: dsp_pm_2_2();
3606: return;
3607: }
3608:
3609: dsp_pm_3();
3610: }
3611:
3612: static void dsp_pm_2_2(void)
3613: {
3614: /*
3615: 0010 00ee eeed dddd S,D
3616: */
1.1.1.6 ! root 3617: Uint32 srcreg, dstreg, save_reg;
1.1 root 3618:
3619: srcreg = (cur_inst >> 13) & BITMASK(5);
3620: dstreg = (cur_inst >> 8) & BITMASK(5);
3621:
1.1.1.6 ! root 3622: if ((srcreg == DSP_REG_A) || (srcreg == DSP_REG_B))
! 3623: /* Accu to register: limited 24 bits */
! 3624: dsp_pm_read_accu24(srcreg, &save_reg);
! 3625: else
! 3626: save_reg = dsp_core.registers[srcreg];
! 3627:
! 3628: /* Execute parallel instruction */
! 3629: opcodes_alu[cur_inst & BITMASK(8)]();
! 3630:
! 3631: /* Write reg */
! 3632: if (dstreg == DSP_REG_A) {
! 3633: dsp_core.registers[DSP_REG_A0] = 0x0;
! 3634: dsp_core.registers[DSP_REG_A1] = save_reg;
! 3635: dsp_core.registers[DSP_REG_A2] = save_reg & (1<<23) ? 0xff : 0x0;
! 3636: }
! 3637: else if (dstreg == DSP_REG_B) {
! 3638: dsp_core.registers[DSP_REG_B0] = 0x0;
! 3639: dsp_core.registers[DSP_REG_B1] = save_reg;
! 3640: dsp_core.registers[DSP_REG_B2] = save_reg & (1<<23) ? 0xff : 0x0;
! 3641: }
! 3642: else {
! 3643: dsp_core.registers[dstreg] = save_reg & BITMASK(registers_mask[dstreg]);
1.1 root 3644: }
3645: }
3646:
3647: static void dsp_pm_3(void)
3648: {
1.1.1.6 ! root 3649: Uint32 dstreg, srcvalue;
1.1 root 3650: /*
3651: 001d dddd iiii iiii #xx,R
3652: */
1.1.1.6 ! root 3653:
! 3654: /* Execute parallel instruction */
! 3655: opcodes_alu[cur_inst & BITMASK(8)]();
! 3656:
! 3657: /* Write reg */
! 3658: dstreg = (cur_inst >> 16) & BITMASK(5);
1.1 root 3659: srcvalue = (cur_inst >> 8) & BITMASK(8);
3660:
1.1.1.6 ! root 3661: switch(dstreg) {
1.1 root 3662: case DSP_REG_X0:
3663: case DSP_REG_X1:
3664: case DSP_REG_Y0:
3665: case DSP_REG_Y1:
3666: case DSP_REG_A:
3667: case DSP_REG_B:
3668: srcvalue <<= 16;
3669: break;
3670: }
3671:
1.1.1.6 ! root 3672: if (dstreg == DSP_REG_A) {
! 3673: dsp_core.registers[DSP_REG_A0] = 0x0;
! 3674: dsp_core.registers[DSP_REG_A1] = srcvalue;
! 3675: dsp_core.registers[DSP_REG_A2] = srcvalue & (1<<23) ? 0xff : 0x0;
! 3676: }
! 3677: else if (dstreg == DSP_REG_B) {
! 3678: dsp_core.registers[DSP_REG_B0] = 0x0;
! 3679: dsp_core.registers[DSP_REG_B1] = srcvalue;
! 3680: dsp_core.registers[DSP_REG_B2] = srcvalue & (1<<23) ? 0xff : 0x0;
! 3681: }
! 3682: else {
! 3683: dsp_core.registers[dstreg] = srcvalue & BITMASK(registers_mask[dstreg]);
1.1 root 3684: }
3685: }
3686:
3687: static void dsp_pm_4(void)
3688: {
3689: /*
1.1.1.4 root 3690: 0100 l0ll w0aa aaaa l:aa,D
1.1 root 3691: S,l:aa
1.1.1.4 root 3692: 0100 l0ll w1mm mrrr l:ea,D
1.1 root 3693: S,l:ea
1.1.1.4 root 3694: 01dd 0ddd w0aa aaaa x:aa,D
1.1 root 3695: S,x:aa
1.1.1.4 root 3696: 01dd 0ddd w1mm mrrr x:ea,D
1.1 root 3697: S,x:ea
3698: #xxxxxx,D
1.1.1.4 root 3699: 01dd 1ddd w0aa aaaa y:aa,D
1.1 root 3700: S,y:aa
1.1.1.4 root 3701: 01dd 1ddd w1mm mrrr y:ea,D
1.1 root 3702: S,y:ea
3703: #xxxxxx,D
3704: */
1.1.1.4 root 3705: if ((cur_inst & 0xf40000)==0x400000) {
3706: dsp_pm_4x();
1.1 root 3707: return;
3708: }
3709:
3710: dsp_pm_5();
3711: }
3712:
1.1.1.4 root 3713: static void dsp_pm_4x(void)
1.1 root 3714: {
1.1.1.6 ! root 3715: Uint32 value, numreg, l_addr, save_lx, save_ly;
1.1 root 3716: /*
1.1.1.4 root 3717: 0100 l0ll w0aa aaaa l:aa,D
3718: S,l:aa
3719: 0100 l0ll w1mm mrrr l:ea,D
3720: S,l:ea
1.1 root 3721: */
1.1.1.4 root 3722: value = (cur_inst>>8) & BITMASK(6);
3723: if (cur_inst & (1<<14)) {
3724: dsp_calc_ea(value, &l_addr);
3725: } else {
3726: l_addr = value;
3727: }
3728:
1.1 root 3729: numreg = (cur_inst>>16) & BITMASK(2);
3730: numreg |= (cur_inst>>17) & (1<<2);
3731:
1.1.1.4 root 3732: /* 2 more cycles are needed if address is in external memory */
3733: if (l_addr>=0x200) {
1.1.1.6 ! root 3734: dsp_core.instr_cycle += 2;
1.1.1.4 root 3735: }
3736:
1.1 root 3737: if (cur_inst & (1<<15)) {
3738: /* Write D */
1.1.1.6 ! root 3739: save_lx = read_memory(DSP_SPACE_X,l_addr);
! 3740: save_ly = read_memory(DSP_SPACE_Y,l_addr);
! 3741: }
! 3742: else {
! 3743: /* Read S */
1.1.1.4 root 3744: switch(numreg) {
3745: case 0:
3746: /* A10 */
1.1.1.6 ! root 3747: save_lx = dsp_core.registers[DSP_REG_A1];
! 3748: save_ly = dsp_core.registers[DSP_REG_A0];
1.1.1.4 root 3749: break;
3750: case 1:
3751: /* B10 */
1.1.1.6 ! root 3752: save_lx = dsp_core.registers[DSP_REG_B1];
! 3753: save_ly = dsp_core.registers[DSP_REG_B0];
1.1.1.4 root 3754: break;
3755: case 2:
3756: /* X */
1.1.1.6 ! root 3757: save_lx = dsp_core.registers[DSP_REG_X1];
! 3758: save_ly = dsp_core.registers[DSP_REG_X0];
1.1.1.4 root 3759: break;
3760: case 3:
3761: /* Y */
1.1.1.6 ! root 3762: save_lx = dsp_core.registers[DSP_REG_Y1];
! 3763: save_ly = dsp_core.registers[DSP_REG_Y0];
1.1.1.4 root 3764: break;
3765: case 4:
3766: /* A */
1.1.1.6 ! root 3767: if (dsp_pm_read_accu24(DSP_REG_A, &save_lx)) {
! 3768: /* Was limited, set lower part */
! 3769: save_ly = (save_lx & (1<<23) ? 0 : 0xffffff);
! 3770: } else {
! 3771: /* Not limited */
! 3772: save_ly = dsp_core.registers[DSP_REG_A0];
! 3773: }
1.1.1.4 root 3774: break;
3775: case 5:
3776: /* B */
1.1.1.6 ! root 3777: if (dsp_pm_read_accu24(DSP_REG_B, &save_lx)) {
! 3778: /* Was limited, set lower part */
! 3779: save_ly = (save_lx & (1<<23) ? 0 : 0xffffff);
! 3780: } else {
! 3781: /* Not limited */
! 3782: save_ly = dsp_core.registers[DSP_REG_B0];
! 3783: }
1.1.1.4 root 3784: break;
3785: case 6:
3786: /* AB */
1.1.1.6 ! root 3787: dsp_pm_read_accu24(DSP_REG_A, &save_lx);
! 3788: dsp_pm_read_accu24(DSP_REG_B, &save_ly);
1.1.1.4 root 3789: break;
3790: case 7:
3791: /* BA */
1.1.1.6 ! root 3792: dsp_pm_read_accu24(DSP_REG_B, &save_lx);
! 3793: dsp_pm_read_accu24(DSP_REG_A, &save_ly);
1.1.1.4 root 3794: break;
1.1 root 3795: }
1.1.1.6 ! root 3796: }
1.1 root 3797:
1.1.1.6 ! root 3798: /* Execute parallel instruction */
! 3799: opcodes_alu[cur_inst & BITMASK(8)]();
1.1 root 3800:
1.1.1.6 ! root 3801:
! 3802: if (cur_inst & (1<<15)) {
! 3803: /* Write D */
1.1.1.4 root 3804: switch(numreg) {
1.1.1.6 ! root 3805: case 0: /* A10 */
! 3806: dsp_core.registers[DSP_REG_A1] = save_lx;
! 3807: dsp_core.registers[DSP_REG_A0] = save_ly;
1.1.1.4 root 3808: break;
1.1.1.6 ! root 3809: case 1: /* B10 */
! 3810: dsp_core.registers[DSP_REG_B1] = save_lx;
! 3811: dsp_core.registers[DSP_REG_B0] = save_ly;
1.1.1.4 root 3812: break;
1.1.1.6 ! root 3813: case 2: /* X */
! 3814: dsp_core.registers[DSP_REG_X1] = save_lx;
! 3815: dsp_core.registers[DSP_REG_X0] = save_ly;
1.1.1.4 root 3816: break;
1.1.1.6 ! root 3817: case 3: /* Y */
! 3818: dsp_core.registers[DSP_REG_Y1] = save_lx;
! 3819: dsp_core.registers[DSP_REG_Y0] = save_ly;
1.1.1.4 root 3820: break;
1.1.1.6 ! root 3821: case 4: /* A */
! 3822: dsp_core.registers[DSP_REG_A0] = save_ly;
! 3823: dsp_core.registers[DSP_REG_A1] = save_lx;
! 3824: dsp_core.registers[DSP_REG_A2] = save_lx & (1<<23) ? 0xff : 0;
1.1.1.4 root 3825: break;
1.1.1.6 ! root 3826: case 5: /* B */
! 3827: dsp_core.registers[DSP_REG_B0] = save_ly;
! 3828: dsp_core.registers[DSP_REG_B1] = save_lx;
! 3829: dsp_core.registers[DSP_REG_B2] = save_lx & (1<<23) ? 0xff : 0;
1.1.1.4 root 3830: break;
1.1.1.6 ! root 3831: case 6: /* AB */
! 3832: dsp_core.registers[DSP_REG_A0] = 0;
! 3833: dsp_core.registers[DSP_REG_A1] = save_lx;
! 3834: dsp_core.registers[DSP_REG_A2] = save_lx & (1<<23) ? 0xff : 0;
! 3835: dsp_core.registers[DSP_REG_B0] = 0;
! 3836: dsp_core.registers[DSP_REG_B1] = save_ly;
! 3837: dsp_core.registers[DSP_REG_B2] = save_ly & (1<<23) ? 0xff : 0;
1.1.1.4 root 3838: break;
1.1.1.6 ! root 3839: case 7: /* BA */
! 3840: dsp_core.registers[DSP_REG_B0] = 0;
! 3841: dsp_core.registers[DSP_REG_B1] = save_lx;
! 3842: dsp_core.registers[DSP_REG_B2] = save_lx & (1<<23) ? 0xff : 0;
! 3843: dsp_core.registers[DSP_REG_A0] = 0;
! 3844: dsp_core.registers[DSP_REG_A1] = save_ly;
! 3845: dsp_core.registers[DSP_REG_A2] = save_ly & (1<<23) ? 0xff : 0;
1.1.1.4 root 3846: break;
1.1 root 3847: }
1.1.1.6 ! root 3848: }
! 3849: else {
! 3850: /* Read S */
! 3851: write_memory(DSP_SPACE_X, l_addr, save_lx);
! 3852: write_memory(DSP_SPACE_Y, l_addr, save_ly);
1.1 root 3853: }
3854: }
3855:
3856: static void dsp_pm_5(void)
3857: {
1.1.1.2 root 3858: Uint32 memspace, numreg, value, xy_addr, retour;
1.1 root 3859: /*
1.1.1.4 root 3860: 01dd 0ddd w0aa aaaa x:aa,D
1.1 root 3861: S,x:aa
1.1.1.4 root 3862: 01dd 0ddd w1mm mrrr x:ea,D
1.1 root 3863: S,x:ea
3864: #xxxxxx,D
1.1.1.4 root 3865: 01dd 1ddd w0aa aaaa y:aa,D
1.1 root 3866: S,y:aa
1.1.1.4 root 3867: 01dd 1ddd w1mm mrrr y:ea,D
1.1 root 3868: S,y:ea
3869: #xxxxxx,D
3870: */
3871:
3872: value = (cur_inst>>8) & BITMASK(6);
3873:
3874: if (cur_inst & (1<<14)) {
3875: retour = dsp_calc_ea(value, &xy_addr);
3876: } else {
3877: xy_addr = value;
3878: retour = 0;
3879: }
3880:
3881: memspace = (cur_inst>>19) & 1;
3882: numreg = (cur_inst>>16) & BITMASK(3);
3883: numreg |= (cur_inst>>17) & (BITMASK(2)<<3);
3884:
3885: if (cur_inst & (1<<15)) {
3886: /* Write D */
1.1.1.6 ! root 3887: if (retour)
1.1 root 3888: value = xy_addr;
1.1.1.6 ! root 3889: else
1.1 root 3890: value = read_memory(memspace, xy_addr);
1.1.1.6 ! root 3891: }
! 3892: else {
1.1 root 3893: /* Read S */
1.1.1.6 ! root 3894: if ((numreg==DSP_REG_A) || (numreg==DSP_REG_B))
! 3895: dsp_pm_read_accu24(numreg, &value);
! 3896: else
! 3897: value = dsp_core.registers[numreg];
! 3898: }
1.1 root 3899:
3900:
1.1.1.6 ! root 3901: /* Execute parallel instruction */
! 3902: opcodes_alu[cur_inst & BITMASK(8)]();
1.1 root 3903:
1.1.1.6 ! root 3904: if (cur_inst & (1<<15)) {
! 3905: /* Write D */
! 3906: if (numreg == DSP_REG_A) {
! 3907: dsp_core.registers[DSP_REG_A0] = 0x0;
! 3908: dsp_core.registers[DSP_REG_A1] = value;
! 3909: dsp_core.registers[DSP_REG_A2] = value & (1<<23) ? 0xff : 0x0;
! 3910: }
! 3911: else if (numreg == DSP_REG_B) {
! 3912: dsp_core.registers[DSP_REG_B0] = 0x0;
! 3913: dsp_core.registers[DSP_REG_B1] = value;
! 3914: dsp_core.registers[DSP_REG_B2] = value & (1<<23) ? 0xff : 0x0;
! 3915: }
! 3916: else {
! 3917: dsp_core.registers[numreg] = value & BITMASK(registers_mask[numreg]);
! 3918: }
! 3919: }
! 3920: else {
! 3921: write_memory(memspace, xy_addr, value);
1.1 root 3922: }
3923: }
3924:
3925: static void dsp_pm_8(void)
3926: {
1.1.1.2 root 3927: Uint32 ea1, ea2;
3928: Uint32 numreg1, numreg2;
1.1.1.6 ! root 3929: Uint32 save_reg1, save_reg2, x_addr, y_addr;
1.1 root 3930: /*
1.1.1.4 root 3931: 1wmm eeff WrrM MRRR x:ea,D1 y:ea,D2
1.1 root 3932: x:ea,D1 S2,y:ea
3933: S1,x:ea y:ea,D2
3934: S1,x:ea S2,y:ea
3935: */
3936: numreg1 = numreg2 = DSP_REG_NULL;
3937:
3938: ea1 = (cur_inst>>8) & BITMASK(5);
3939: if ((ea1>>3) == 0) {
3940: ea1 |= (1<<5);
3941: }
3942: ea2 = (cur_inst>>13) & BITMASK(2);
3943: ea2 |= (cur_inst>>17) & (BITMASK(2)<<3);
3944: if ((ea1 & (1<<2))==0) {
3945: ea2 |= 1<<2;
3946: }
3947: if ((ea2>>3) == 0) {
3948: ea2 |= (1<<5);
3949: }
3950:
1.1.1.4 root 3951: dsp_calc_ea(ea1, &x_addr);
3952: dsp_calc_ea(ea2, &y_addr);
3953:
3954: /* 2 more cycles are needed if X:address1 and Y:address2 are both in external memory */
3955: if ((x_addr>=0x200) && (y_addr>=0x200)) {
1.1.1.6 ! root 3956: dsp_core.instr_cycle += 2;
1.1.1.4 root 3957: }
1.1 root 3958:
3959: switch((cur_inst>>18) & BITMASK(2)) {
3960: case 0: numreg1=DSP_REG_X0; break;
3961: case 1: numreg1=DSP_REG_X1; break;
3962: case 2: numreg1=DSP_REG_A; break;
3963: case 3: numreg1=DSP_REG_B; break;
3964: }
3965: switch((cur_inst>>16) & BITMASK(2)) {
3966: case 0: numreg2=DSP_REG_Y0; break;
3967: case 1: numreg2=DSP_REG_Y1; break;
3968: case 2: numreg2=DSP_REG_A; break;
3969: case 3: numreg2=DSP_REG_B; break;
3970: }
3971:
3972: if (cur_inst & (1<<15)) {
3973: /* Write D1 */
1.1.1.6 ! root 3974: save_reg1 = read_memory(DSP_SPACE_X, x_addr);
1.1 root 3975: } else {
3976: /* Read S1 */
1.1.1.6 ! root 3977: if ((numreg1==DSP_REG_A) || (numreg1==DSP_REG_B))
! 3978: dsp_pm_read_accu24(numreg1, &save_reg1);
! 3979: else
! 3980: save_reg1 = dsp_core.registers[numreg1];
1.1 root 3981: }
3982:
3983: if (cur_inst & (1<<22)) {
3984: /* Write D2 */
1.1.1.6 ! root 3985: save_reg2 = read_memory(DSP_SPACE_Y, y_addr);
1.1 root 3986: } else {
3987: /* Read S2 */
1.1.1.6 ! root 3988: if ((numreg2==DSP_REG_A) || (numreg2==DSP_REG_B))
! 3989: dsp_pm_read_accu24(numreg2, &save_reg2);
! 3990: else
! 3991: save_reg2 = dsp_core.registers[numreg2];
1.1 root 3992: }
3993:
3994:
1.1.1.6 ! root 3995: /* Execute parallel instruction */
! 3996: opcodes_alu[cur_inst & BITMASK(8)]();
1.1 root 3997:
1.1.1.6 ! root 3998: /* Write first parallel move */
! 3999: if (cur_inst & (1<<15)) {
! 4000: /* Write D1 */
! 4001: if (numreg1 == DSP_REG_A) {
! 4002: dsp_core.registers[DSP_REG_A0] = 0x0;
! 4003: dsp_core.registers[DSP_REG_A1] = save_reg1;
! 4004: dsp_core.registers[DSP_REG_A2] = save_reg1 & (1<<23) ? 0xff : 0x0;
! 4005: }
! 4006: else if (numreg1 == DSP_REG_B) {
! 4007: dsp_core.registers[DSP_REG_B0] = 0x0;
! 4008: dsp_core.registers[DSP_REG_B1] = save_reg1;
! 4009: dsp_core.registers[DSP_REG_B2] = save_reg1 & (1<<23) ? 0xff : 0x0;
! 4010: }
! 4011: else {
! 4012: dsp_core.registers[numreg1] = save_reg1;
! 4013: }
! 4014: } else {
! 4015: /* Read S1 */
! 4016: write_memory(DSP_SPACE_X, x_addr, save_reg1);
! 4017: }
! 4018:
! 4019: /* Write second parallel move */
! 4020: if (cur_inst & (1<<22)) {
! 4021: /* Write D2 */
! 4022: if (numreg2 == DSP_REG_A) {
! 4023: dsp_core.registers[DSP_REG_A0] = 0x0;
! 4024: dsp_core.registers[DSP_REG_A1] = save_reg2;
! 4025: dsp_core.registers[DSP_REG_A2] = save_reg2 & (1<<23) ? 0xff : 0x0;
! 4026: }
! 4027: else if (numreg2 == DSP_REG_B) {
! 4028: dsp_core.registers[DSP_REG_B0] = 0x0;
! 4029: dsp_core.registers[DSP_REG_B1] = save_reg2;
! 4030: dsp_core.registers[DSP_REG_B2] = save_reg2 & (1<<23) ? 0xff : 0x0;
! 4031: }
! 4032: else {
! 4033: dsp_core.registers[numreg2] = save_reg2;
! 4034: }
! 4035: } else {
! 4036: /* Read S2 */
! 4037: write_memory(DSP_SPACE_Y, y_addr, save_reg2);
! 4038: }
! 4039: }
! 4040:
! 4041: /**********************************
! 4042: * 56bit arithmetic
! 4043: **********************************/
! 4044:
! 4045: /* source,dest[0] is 55:48 */
! 4046: /* source,dest[1] is 47:24 */
! 4047: /* source,dest[2] is 23:00 */
! 4048:
! 4049: static Uint16 dsp_abs56(Uint32 *dest)
1.1 root 4050: {
1.1.1.2 root 4051: Uint32 zerodest[3];
4052: Uint16 newsr;
1.1 root 4053:
4054: /* D=|D| */
4055:
4056: if (dest[0] & (1<<7)) {
4057: zerodest[0] = zerodest[1] = zerodest[2] = 0;
4058:
4059: newsr = dsp_sub56(dest, zerodest);
4060:
4061: dest[0] = zerodest[0];
4062: dest[1] = zerodest[1];
4063: dest[2] = zerodest[2];
4064: } else {
4065: newsr = 0;
4066: }
4067:
4068: return newsr;
4069: }
4070:
1.1.1.2 root 4071: static Uint16 dsp_asl56(Uint32 *dest)
1.1 root 4072: {
1.1.1.2 root 4073: Uint16 overflow, carry;
1.1 root 4074:
4075: /* Shift left dest 1 bit: D<<=1 */
4076:
4077: carry = (dest[0]>>7) & 1;
4078:
4079: dest[0] <<= 1;
4080: dest[0] |= (dest[1]>>23) & 1;
4081: dest[0] &= BITMASK(8);
4082:
4083: dest[1] <<= 1;
4084: dest[1] |= (dest[2]>>23) & 1;
4085: dest[1] &= BITMASK(24);
4086:
4087: dest[2] <<= 1;
4088: dest[2] &= BITMASK(24);
4089:
4090: overflow = (carry != ((dest[0]>>7) & 1));
4091:
4092: return (overflow<<DSP_SR_L)|(overflow<<DSP_SR_V)|(carry<<DSP_SR_C);
4093: }
4094:
1.1.1.2 root 4095: static Uint16 dsp_asr56(Uint32 *dest)
1.1 root 4096: {
1.1.1.2 root 4097: Uint16 carry;
1.1 root 4098:
4099: /* Shift right dest 1 bit: D>>=1 */
4100:
4101: carry = dest[2] & 1;
4102:
4103: dest[2] >>= 1;
4104: dest[2] |= (dest[1] & 1)<<23;
4105:
4106: dest[1] >>= 1;
4107: dest[1] |= (dest[0] & 1)<<23;
4108:
4109: dest[0] >>= 1;
4110: dest[0] |= (dest[0] & (1<<6))<<1;
4111:
4112: return (carry<<DSP_SR_C);
4113: }
4114:
1.1.1.2 root 4115: static Uint16 dsp_add56(Uint32 *source, Uint32 *dest)
1.1 root 4116: {
1.1.1.4 root 4117: Uint16 overflow, carry, flg_s, flg_d, flg_r;
4118:
4119: flg_s = (source[0]>>7) & 1;
4120: flg_d = (dest[0]>>7) & 1;
4121:
1.1 root 4122: /* Add source to dest: D = D+S */
1.1.1.2 root 4123: dest[2] += source[2];
4124: dest[1] += source[1]+((dest[2]>>24) & 1);
4125: dest[0] += source[0]+((dest[1]>>24) & 1);
1.1 root 4126:
1.1.1.5 root 4127: carry = (dest[0]>>8) & 1;
4128:
1.1 root 4129: dest[2] &= BITMASK(24);
4130: dest[1] &= BITMASK(24);
4131: dest[0] &= BITMASK(8);
4132:
1.1.1.4 root 4133: flg_r = (dest[0]>>7) & 1;
4134:
4135: /*set overflow*/
4136: overflow = (flg_s ^ flg_r) & (flg_d ^ flg_r);
4137:
1.1 root 4138: return (overflow<<DSP_SR_L)|(overflow<<DSP_SR_V)|(carry<<DSP_SR_C);
4139: }
4140:
1.1.1.2 root 4141: static Uint16 dsp_sub56(Uint32 *source, Uint32 *dest)
1.1 root 4142: {
1.1.1.5 root 4143: Uint16 overflow, carry, flg_s, flg_d, flg_r, dest_save;
1.1.1.4 root 4144:
1.1.1.5 root 4145: dest_save = dest[0];
1.1 root 4146:
4147: /* Substract source from dest: D = D-S */
1.1.1.2 root 4148: dest[2] -= source[2];
4149: dest[1] -= source[1]+((dest[2]>>24) & 1);
4150: dest[0] -= source[0]+((dest[1]>>24) & 1);
1.1 root 4151:
1.1.1.5 root 4152: carry = (dest[0]>>8) & 1;
4153:
1.1 root 4154: dest[2] &= BITMASK(24);
4155: dest[1] &= BITMASK(24);
4156: dest[0] &= BITMASK(8);
4157:
1.1.1.4 root 4158: flg_s = (source[0]>>7) & 1;
1.1.1.5 root 4159: flg_d = (dest_save>>7) & 1;
1.1.1.4 root 4160: flg_r = (dest[0]>>7) & 1;
4161:
4162: /* set overflow */
4163: overflow = (flg_s ^ flg_d) & (flg_r ^ flg_d);
4164:
1.1 root 4165: return (overflow<<DSP_SR_L)|(overflow<<DSP_SR_V)|(carry<<DSP_SR_C);
4166: }
4167:
1.1.1.5 root 4168: static void dsp_mul56(Uint32 source1, Uint32 source2, Uint32 *dest, Uint8 signe)
1.1 root 4169: {
1.1.1.2 root 4170: Uint32 part[4], zerodest[3], value;
1.1 root 4171:
4172: /* Multiply: D = S1*S2 */
4173: if (source1 & (1<<23)) {
1.1.1.5 root 4174: signe ^= 1;
1.1.1.6 ! root 4175: source1 = (1<<24) - source1;
1.1 root 4176: }
4177: if (source2 & (1<<23)) {
1.1.1.5 root 4178: signe ^= 1;
1.1.1.6 ! root 4179: source2 = (1<<24) - source2;
1.1 root 4180: }
4181:
4182: /* bits 0-11 * bits 0-11 */
4183: part[0]=(source1 & BITMASK(12))*(source2 & BITMASK(12));
4184: /* bits 12-23 * bits 0-11 */
4185: part[1]=((source1>>12) & BITMASK(12))*(source2 & BITMASK(12));
4186: /* bits 0-11 * bits 12-23 */
4187: part[2]=(source1 & BITMASK(12))*((source2>>12) & BITMASK(12));
4188: /* bits 12-23 * bits 12-23 */
4189: part[3]=((source1>>12) & BITMASK(12))*((source2>>12) & BITMASK(12));
4190:
4191: /* Calc dest 2 */
4192: dest[2] = part[0];
4193: dest[2] += (part[1] & BITMASK(12)) << 12;
4194: dest[2] += (part[2] & BITMASK(12)) << 12;
4195:
4196: /* Calc dest 1 */
4197: dest[1] = (part[1]>>12) & BITMASK(12);
4198: dest[1] += (part[2]>>12) & BITMASK(12);
4199: dest[1] += part[3];
4200:
4201: /* Calc dest 0 */
4202: dest[0] = 0;
4203:
4204: /* Add carries */
4205: value = (dest[2]>>24) & BITMASK(8);
4206: if (value) {
4207: dest[1] += value;
4208: dest[2] &= BITMASK(24);
4209: }
4210: value = (dest[1]>>24) & BITMASK(8);
4211: if (value) {
4212: dest[0] += value;
4213: dest[1] &= BITMASK(24);
4214: }
4215:
4216: /* Get rid of extra sign bit */
4217: dsp_asl56(dest);
4218:
1.1.1.5 root 4219: if (signe) {
1.1 root 4220: zerodest[0] = zerodest[1] = zerodest[2] = 0;
4221:
4222: dsp_sub56(dest, zerodest);
4223:
4224: dest[0] = zerodest[0];
4225: dest[1] = zerodest[1];
4226: dest[2] = zerodest[2];
4227: }
4228: }
4229:
1.1.1.2 root 4230: static void dsp_rnd56(Uint32 *dest)
1.1 root 4231: {
1.1.1.4 root 4232: Uint32 rnd_const[3];
1.1 root 4233:
1.1.1.4 root 4234: rnd_const[0] = 0;
1.1 root 4235:
1.1.1.4 root 4236: /* Scaling mode S0 */
1.1.1.6 ! root 4237: if (dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_S0)) {
1.1.1.4 root 4238: rnd_const[1] = 1;
4239: rnd_const[2] = 0;
4240: dsp_add56(rnd_const, dest);
4241:
4242: if ((dest[2]==0) && ((dest[1] & 1) == 0)) {
4243: dest[1] &= (0xffffff - 0x3);
4244: }
4245: dest[1] &= 0xfffffe;
4246: dest[2]=0;
4247: }
4248: /* Scaling mode S1 */
1.1.1.6 ! root 4249: else if (dsp_core.registers[DSP_REG_SR] & (1<<DSP_SR_S1)) {
1.1.1.4 root 4250: rnd_const[1] = 0;
4251: rnd_const[2] = (1<<22);
4252: dsp_add56(rnd_const, dest);
4253:
4254: if ((dest[2] & 0x7fffff) == 0){
4255: dest[2] = 0;
4256: }
4257: dest[2] &= 0x800000;
4258: }
4259: /* No Scaling */
4260: else {
4261: rnd_const[1] = 0;
4262: rnd_const[2] = (1<<23);
4263: dsp_add56(rnd_const, dest);
4264:
4265: if (dest[2] == 0) {
4266: dest[1] &= 0xfffffe;
1.1 root 4267: }
1.1.1.4 root 4268: dest[2]=0;
1.1 root 4269: }
4270: }
4271:
4272: /**********************************
4273: * Parallel moves instructions
4274: **********************************/
4275:
1.1.1.6 ! root 4276: static void dsp_abs_a(void)
1.1 root 4277: {
1.1.1.6 ! root 4278: Uint32 dest[3], overflowed;
1.1 root 4279:
1.1.1.6 ! root 4280: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4281: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4282: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4283:
! 4284: overflowed = ((dest[2]==0) && (dest[1]==0) && (dest[0]==0x80));
! 4285:
! 4286: dsp_abs56(dest);
! 4287:
! 4288: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4289: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4290: dsp_core.registers[DSP_REG_A0] = dest[2];
! 4291:
! 4292: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 4293: dsp_core.registers[DSP_REG_SR] |= (overflowed<<DSP_SR_L)|(overflowed<<DSP_SR_V);
! 4294:
! 4295: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 4296: }
! 4297:
! 4298: static void dsp_abs_b(void)
! 4299: {
! 4300: Uint32 dest[3], overflowed;
1.1 root 4301:
1.1.1.6 ! root 4302: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4303: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4304: dest[2] = dsp_core.registers[DSP_REG_B0];
1.1 root 4305:
4306: overflowed = ((dest[2]==0) && (dest[1]==0) && (dest[0]==0x80));
4307:
4308: dsp_abs56(dest);
4309:
1.1.1.6 ! root 4310: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4311: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4312: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1.1.2 root 4313:
1.1.1.6 ! root 4314: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 4315: dsp_core.registers[DSP_REG_SR] |= (overflowed<<DSP_SR_L)|(overflowed<<DSP_SR_V);
1.1.1.2 root 4316:
1.1.1.6 ! root 4317: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4318: }
4319:
1.1.1.6 ! root 4320: static void dsp_adc_x_a(void)
1.1 root 4321: {
1.1.1.6 ! root 4322: Uint32 source[3], dest[3], curcarry;
1.1.1.2 root 4323: Uint16 newsr;
1.1 root 4324:
1.1.1.6 ! root 4325: curcarry = (dsp_core.registers[DSP_REG_SR]>>DSP_SR_C) & 1;
1.1 root 4326:
1.1.1.6 ! root 4327: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4328: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4329: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4330:
! 4331: source[2] = dsp_core.registers[DSP_REG_X0];
! 4332: source[1] = dsp_core.registers[DSP_REG_X1];
! 4333: if (source[1] & (1<<23))
! 4334: source[0] = 0xff;
! 4335: else
! 4336: source[0] = 0x0;
1.1 root 4337:
4338: newsr = dsp_add56(source, dest);
4339:
4340: if (curcarry) {
1.1.1.6 ! root 4341: source[0]=0; source[1]=0; source[2]=1;
1.1 root 4342: newsr |= dsp_add56(source, dest);
4343: }
4344:
1.1.1.6 ! root 4345: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4346: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4347: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1.1.2 root 4348:
1.1.1.6 ! root 4349: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4350:
1.1.1.6 ! root 4351: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4352: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4353: }
4354:
1.1.1.6 ! root 4355: static void dsp_adc_x_b(void)
1.1 root 4356: {
1.1.1.6 ! root 4357: Uint32 source[3], dest[3], curcarry;
1.1.1.2 root 4358: Uint16 newsr;
1.1 root 4359:
1.1.1.6 ! root 4360: curcarry = (dsp_core.registers[DSP_REG_SR]>>DSP_SR_C) & 1;
! 4361:
! 4362: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4363: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4364: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4365:
! 4366: source[2] = dsp_core.registers[DSP_REG_X0];
! 4367: source[1] = dsp_core.registers[DSP_REG_X1];
! 4368: if (source[1] & (1<<23))
! 4369: source[0] = 0xff;
! 4370: else
! 4371: source[0] = 0x0;
1.1 root 4372:
4373: newsr = dsp_add56(source, dest);
1.1.1.6 ! root 4374:
! 4375: if (curcarry) {
! 4376: source[0]=0; source[1]=0; source[2]=1;
! 4377: newsr |= dsp_add56(source, dest);
! 4378: }
1.1 root 4379:
1.1.1.6 ! root 4380: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4381: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4382: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1.1.2 root 4383:
1.1.1.6 ! root 4384: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4385:
1.1.1.6 ! root 4386: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4387: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4388: }
4389:
1.1.1.6 ! root 4390: static void dsp_adc_y_a(void)
1.1 root 4391: {
1.1.1.6 ! root 4392: Uint32 source[3], dest[3], curcarry;
1.1.1.2 root 4393: Uint16 newsr;
1.1 root 4394:
1.1.1.6 ! root 4395: curcarry = (dsp_core.registers[DSP_REG_SR]>>DSP_SR_C) & 1;
1.1 root 4396:
1.1.1.6 ! root 4397: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4398: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4399: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4400:
! 4401: source[2] = dsp_core.registers[DSP_REG_Y0];
! 4402: source[1] = dsp_core.registers[DSP_REG_Y1];
! 4403: if (source[1] & (1<<23))
! 4404: source[0] = 0xff;
! 4405: else
! 4406: source[0] = 0x0;
1.1 root 4407:
1.1.1.6 ! root 4408: newsr = dsp_add56(source, dest);
! 4409:
! 4410: if (curcarry) {
! 4411: source[0]=0; source[1]=0; source[2]=1;
! 4412: newsr |= dsp_add56(source, dest);
! 4413: }
1.1 root 4414:
1.1.1.6 ! root 4415: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4416: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4417: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1.1.2 root 4418:
1.1.1.6 ! root 4419: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4420:
1.1.1.6 ! root 4421: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4422: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4423: }
4424:
1.1.1.6 ! root 4425: static void dsp_adc_y_b(void)
1.1 root 4426: {
1.1.1.6 ! root 4427: Uint32 source[3], dest[3], curcarry;
1.1.1.2 root 4428: Uint16 newsr;
1.1 root 4429:
1.1.1.6 ! root 4430: curcarry = (dsp_core.registers[DSP_REG_SR]>>DSP_SR_C) & 1;
1.1 root 4431:
1.1.1.6 ! root 4432: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4433: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4434: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4435:
! 4436: source[2] = dsp_core.registers[DSP_REG_Y0];
! 4437: source[1] = dsp_core.registers[DSP_REG_Y1];
! 4438: if (source[1] & (1<<23))
! 4439: source[0] = 0xff;
! 4440: else
! 4441: source[0] = 0x0;
1.1 root 4442:
1.1.1.6 ! root 4443: newsr = dsp_add56(source, dest);
! 4444:
! 4445: if (curcarry) {
! 4446: source[0]=0; source[1]=0; source[2]=1;
! 4447: newsr |= dsp_add56(source, dest);
! 4448: }
1.1 root 4449:
1.1.1.6 ! root 4450: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4451: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4452: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1.1.2 root 4453:
1.1.1.6 ! root 4454: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4455:
1.1.1.6 ! root 4456: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4457: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4458: }
4459:
1.1.1.6 ! root 4460: static void dsp_add_b_a(void)
1.1 root 4461: {
1.1.1.6 ! root 4462: Uint32 source[3], dest[3];
! 4463: Uint16 newsr;
1.1 root 4464:
1.1.1.6 ! root 4465: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4466: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4467: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4468:
! 4469: source[0] = dsp_core.registers[DSP_REG_B2];
! 4470: source[1] = dsp_core.registers[DSP_REG_B1];
! 4471: source[2] = dsp_core.registers[DSP_REG_B0];
! 4472:
! 4473: newsr = dsp_add56(source, dest);
! 4474:
! 4475: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4476: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4477: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1 root 4478:
1.1.1.6 ! root 4479: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4480:
1.1.1.6 ! root 4481: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4482: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4483: }
4484:
1.1.1.6 ! root 4485: static void dsp_add_a_b(void)
1.1 root 4486: {
1.1.1.6 ! root 4487: Uint32 source[3], dest[3];
1.1.1.2 root 4488: Uint16 newsr;
1.1 root 4489:
1.1.1.6 ! root 4490: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4491: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4492: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4493:
! 4494: source[0] = dsp_core.registers[DSP_REG_A2];
! 4495: source[1] = dsp_core.registers[DSP_REG_A1];
! 4496: source[2] = dsp_core.registers[DSP_REG_A0];
1.1 root 4497:
1.1.1.6 ! root 4498: newsr = dsp_add56(source, dest);
1.1 root 4499:
1.1.1.6 ! root 4500: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4501: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4502: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1.1.2 root 4503:
1.1.1.6 ! root 4504: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1.1.2 root 4505:
1.1.1.6 ! root 4506: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4507: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4508: }
4509:
1.1.1.6 ! root 4510: static void dsp_add_x_a(void)
1.1 root 4511: {
1.1.1.6 ! root 4512: Uint32 source[3], dest[3];
! 4513: Uint16 newsr;
1.1 root 4514:
1.1.1.6 ! root 4515: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4516: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4517: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4518:
! 4519: source[1] = dsp_core.registers[DSP_REG_X1];
! 4520: source[2] = dsp_core.registers[DSP_REG_X0];
! 4521: if (source[1] & (1<<23))
! 4522: source[0] = 0xff;
! 4523: else
! 4524: source[0] = 0x0;
1.1 root 4525:
1.1.1.6 ! root 4526: newsr = dsp_add56(source, dest);
1.1 root 4527:
1.1.1.6 ! root 4528: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4529: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4530: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1.1.2 root 4531:
1.1.1.6 ! root 4532: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1.1.2 root 4533:
1.1.1.6 ! root 4534: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4535: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4536: }
4537:
1.1.1.6 ! root 4538: static void dsp_add_x_b(void)
1.1 root 4539: {
1.1.1.6 ! root 4540: Uint32 source[3], dest[3];
! 4541: Uint16 newsr;
1.1 root 4542:
1.1.1.6 ! root 4543: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4544: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4545: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4546:
! 4547: source[1] = dsp_core.registers[DSP_REG_X1];
! 4548: source[2] = dsp_core.registers[DSP_REG_X0];
! 4549: if (source[1] & (1<<23))
! 4550: source[0] = 0xff;
! 4551: else
! 4552: source[0] = 0x0;
! 4553:
! 4554: newsr = dsp_add56(source, dest);
1.1 root 4555:
1.1.1.6 ! root 4556: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4557: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4558: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1 root 4559:
1.1.1.6 ! root 4560: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 4561:
! 4562: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4563: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4564: }
4565:
1.1.1.6 ! root 4566: static void dsp_add_y_a(void)
1.1 root 4567: {
1.1.1.6 ! root 4568: Uint32 source[3], dest[3];
1.1.1.2 root 4569: Uint16 newsr;
1.1 root 4570:
1.1.1.6 ! root 4571: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4572: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4573: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4574:
! 4575: source[1] = dsp_core.registers[DSP_REG_Y1];
! 4576: source[2] = dsp_core.registers[DSP_REG_Y0];
! 4577: if (source[1] & (1<<23))
! 4578: source[0] = 0xff;
! 4579: else
! 4580: source[0] = 0x0;
1.1 root 4581:
1.1.1.6 ! root 4582: newsr = dsp_add56(source, dest);
1.1 root 4583:
1.1.1.6 ! root 4584: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4585: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4586: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1 root 4587:
1.1.1.6 ! root 4588: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 4589:
! 4590: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4591: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4592: }
4593:
1.1.1.6 ! root 4594: static void dsp_add_y_b(void)
1.1 root 4595: {
1.1.1.6 ! root 4596: Uint32 source[3], dest[3];
1.1.1.2 root 4597: Uint16 newsr;
1.1 root 4598:
1.1.1.6 ! root 4599: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4600: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4601: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4602:
! 4603: source[1] = dsp_core.registers[DSP_REG_Y1];
! 4604: source[2] = dsp_core.registers[DSP_REG_Y0];
! 4605: if (source[1] & (1<<23))
! 4606: source[0] = 0xff;
! 4607: else
! 4608: source[0] = 0x0;
1.1 root 4609:
1.1.1.6 ! root 4610: newsr = dsp_add56(source, dest);
1.1 root 4611:
1.1.1.6 ! root 4612: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4613: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4614: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1 root 4615:
1.1.1.6 ! root 4616: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4617:
1.1.1.6 ! root 4618: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4619: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4620: }
4621:
1.1.1.6 ! root 4622: static void dsp_add_x0_a(void)
1.1 root 4623: {
1.1.1.6 ! root 4624: Uint32 source[3], dest[3];
! 4625: Uint16 newsr;
1.1 root 4626:
1.1.1.6 ! root 4627: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4628: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4629: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4630:
! 4631: source[2] = 0;
! 4632: source[1] = dsp_core.registers[DSP_REG_X0];
! 4633: if (source[1] & (1<<23))
! 4634: source[0] = 0xff;
! 4635: else
! 4636: source[0] = 0x0;
! 4637:
! 4638: newsr = dsp_add56(source, dest);
! 4639:
! 4640: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4641: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4642: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1 root 4643:
1.1.1.6 ! root 4644: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4645:
1.1.1.6 ! root 4646: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4647: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4648: }
4649:
1.1.1.6 ! root 4650: static void dsp_add_x0_b(void)
1.1 root 4651: {
1.1.1.6 ! root 4652: Uint32 source[3], dest[3];
! 4653: Uint16 newsr;
! 4654:
! 4655: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4656: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4657: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4658:
! 4659: source[2] = 0;
! 4660: source[1] = dsp_core.registers[DSP_REG_X0];
! 4661: if (source[1] & (1<<23))
! 4662: source[0] = 0xff;
! 4663: else
! 4664: source[0] = 0x0;
1.1 root 4665:
1.1.1.6 ! root 4666: newsr = dsp_add56(source, dest);
1.1 root 4667:
1.1.1.6 ! root 4668: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4669: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4670: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1 root 4671:
1.1.1.6 ! root 4672: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4673:
1.1.1.6 ! root 4674: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4675: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4676: }
4677:
1.1.1.6 ! root 4678: static void dsp_add_y0_a(void)
1.1 root 4679: {
1.1.1.6 ! root 4680: Uint32 source[3], dest[3];
! 4681: Uint16 newsr;
1.1 root 4682:
1.1.1.6 ! root 4683: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4684: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4685: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4686:
! 4687: source[2] = 0;
! 4688: source[1] = dsp_core.registers[DSP_REG_Y0];
! 4689: if (source[1] & (1<<23))
! 4690: source[0] = 0xff;
! 4691: else
! 4692: source[0] = 0x0;
1.1 root 4693:
1.1.1.6 ! root 4694: newsr = dsp_add56(source, dest);
! 4695:
! 4696: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4697: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4698: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1 root 4699:
1.1.1.6 ! root 4700: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4701:
1.1.1.6 ! root 4702: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4703: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4704: }
4705:
1.1.1.6 ! root 4706: static void dsp_add_y0_b(void)
1.1 root 4707: {
1.1.1.6 ! root 4708: Uint32 source[3], dest[3];
1.1.1.2 root 4709: Uint16 newsr;
1.1 root 4710:
1.1.1.6 ! root 4711: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4712: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4713: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4714:
! 4715: source[2] = 0;
! 4716: source[1] = dsp_core.registers[DSP_REG_Y0];
! 4717: if (source[1] & (1<<23))
! 4718: source[0] = 0xff;
! 4719: else
! 4720: source[0] = 0x0;
1.1 root 4721:
4722: newsr = dsp_add56(source, dest);
4723:
1.1.1.6 ! root 4724: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4725: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4726: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1.1.2 root 4727:
1.1.1.6 ! root 4728: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4729:
1.1.1.6 ! root 4730: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4731: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4732: }
4733:
1.1.1.6 ! root 4734: static void dsp_add_x1_a(void)
1.1 root 4735: {
1.1.1.6 ! root 4736: Uint32 source[3], dest[3];
1.1.1.2 root 4737: Uint16 newsr;
1.1 root 4738:
1.1.1.6 ! root 4739: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4740: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4741: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4742:
! 4743: source[2] = 0;
! 4744: source[1] = dsp_core.registers[DSP_REG_X1];
! 4745: if (source[1] & (1<<23))
! 4746: source[0] = 0xff;
! 4747: else
! 4748: source[0] = 0x0;
1.1 root 4749:
4750: newsr = dsp_add56(source, dest);
4751:
1.1.1.6 ! root 4752: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4753: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4754: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1.1.2 root 4755:
1.1.1.6 ! root 4756: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4757:
1.1.1.6 ! root 4758: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4759: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4760: }
4761:
1.1.1.6 ! root 4762: static void dsp_add_x1_b(void)
1.1 root 4763: {
1.1.1.6 ! root 4764: Uint32 source[3], dest[3];
! 4765: Uint16 newsr;
! 4766:
! 4767: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4768: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4769: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4770:
! 4771: source[2] = 0;
! 4772: source[1] = dsp_core.registers[DSP_REG_X1];
! 4773: if (source[1] & (1<<23))
! 4774: source[0] = 0xff;
! 4775: else
! 4776: source[0] = 0x0;
! 4777:
! 4778: newsr = dsp_add56(source, dest);
! 4779:
! 4780: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4781: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4782: dsp_core.registers[DSP_REG_B0] = dest[2];
! 4783:
! 4784: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 4785:
! 4786: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4787: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4788: }
4789:
1.1.1.6 ! root 4790: static void dsp_add_y1_a(void)
1.1 root 4791: {
1.1.1.6 ! root 4792: Uint32 source[3], dest[3];
! 4793: Uint16 newsr;
1.1 root 4794:
1.1.1.6 ! root 4795: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4796: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4797: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4798:
! 4799: source[2] = 0;
! 4800: source[1] = dsp_core.registers[DSP_REG_Y1];
! 4801: if (source[1] & (1<<23))
! 4802: source[0] = 0xff;
! 4803: else
! 4804: source[0] = 0x0;
1.1 root 4805:
1.1.1.6 ! root 4806: newsr = dsp_add56(source, dest);
1.1 root 4807:
1.1.1.6 ! root 4808: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4809: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4810: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1 root 4811:
1.1.1.6 ! root 4812: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4813:
1.1.1.6 ! root 4814: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4815: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4816: }
4817:
1.1.1.6 ! root 4818: static void dsp_add_y1_b(void)
1.1 root 4819: {
1.1.1.6 ! root 4820: Uint32 source[3], dest[3];
! 4821: Uint16 newsr;
1.1 root 4822:
1.1.1.6 ! root 4823: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4824: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4825: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4826:
! 4827: source[2] = 0;
! 4828: source[1] = dsp_core.registers[DSP_REG_Y1];
! 4829: if (source[1] & (1<<23))
! 4830: source[0] = 0xff;
! 4831: else
! 4832: source[0] = 0x0;
1.1 root 4833:
1.1.1.6 ! root 4834: newsr = dsp_add56(source, dest);
1.1 root 4835:
1.1.1.6 ! root 4836: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4837: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4838: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1 root 4839:
1.1.1.6 ! root 4840: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4841:
1.1.1.6 ! root 4842: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4843: dsp_core.registers[DSP_REG_SR] |= newsr;
! 4844: }
1.1 root 4845:
1.1.1.6 ! root 4846: static void dsp_addl_b_a(void)
! 4847: {
! 4848: Uint32 source[3], dest[3];
! 4849: Uint16 newsr;
1.1.1.2 root 4850:
1.1.1.6 ! root 4851: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4852: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4853: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4854: newsr = dsp_asl56(dest);
1.1 root 4855:
1.1.1.6 ! root 4856: source[0] = dsp_core.registers[DSP_REG_B2];
! 4857: source[1] = dsp_core.registers[DSP_REG_B1];
! 4858: source[2] = dsp_core.registers[DSP_REG_B0];
! 4859: newsr |= dsp_add56(source, dest);
1.1 root 4860:
1.1.1.6 ! root 4861: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4862: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4863: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1 root 4864:
1.1.1.6 ! root 4865: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4866:
1.1.1.6 ! root 4867: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4868: dsp_core.registers[DSP_REG_SR] |= newsr;
! 4869: }
1.1 root 4870:
1.1.1.6 ! root 4871: static void dsp_addl_a_b(void)
! 4872: {
! 4873: Uint32 source[3], dest[3];
! 4874: Uint16 newsr;
1.1 root 4875:
1.1.1.6 ! root 4876: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4877: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4878: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4879: newsr = dsp_asl56(dest);
1.1 root 4880:
1.1.1.6 ! root 4881: source[0] = dsp_core.registers[DSP_REG_A2];
! 4882: source[1] = dsp_core.registers[DSP_REG_A1];
! 4883: source[2] = dsp_core.registers[DSP_REG_A0];
! 4884: newsr |= dsp_add56(source, dest);
! 4885:
! 4886: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4887: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4888: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1.1.2 root 4889:
1.1.1.6 ! root 4890: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1.1.2 root 4891:
1.1.1.6 ! root 4892: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4893: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4894: }
4895:
1.1.1.6 ! root 4896: static void dsp_addr_b_a(void)
1.1 root 4897: {
1.1.1.6 ! root 4898: Uint32 source[3], dest[3];
! 4899: Uint16 newsr;
! 4900:
! 4901: dest[0] = dsp_core.registers[DSP_REG_A2];
! 4902: dest[1] = dsp_core.registers[DSP_REG_A1];
! 4903: dest[2] = dsp_core.registers[DSP_REG_A0];
! 4904: newsr = dsp_asr56(dest);
! 4905:
! 4906: source[0] = dsp_core.registers[DSP_REG_B2];
! 4907: source[1] = dsp_core.registers[DSP_REG_B1];
! 4908: source[2] = dsp_core.registers[DSP_REG_B0];
! 4909: newsr |= dsp_add56(source, dest);
! 4910:
! 4911: dsp_core.registers[DSP_REG_A2] = dest[0];
! 4912: dsp_core.registers[DSP_REG_A1] = dest[1];
! 4913: dsp_core.registers[DSP_REG_A0] = dest[2];
! 4914:
! 4915: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 4916:
! 4917: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4918: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4919: }
4920:
1.1.1.6 ! root 4921: static void dsp_addr_a_b(void)
1.1 root 4922: {
1.1.1.6 ! root 4923: Uint32 source[3], dest[3];
! 4924: Uint16 newsr;
! 4925:
! 4926: dest[0] = dsp_core.registers[DSP_REG_B2];
! 4927: dest[1] = dsp_core.registers[DSP_REG_B1];
! 4928: dest[2] = dsp_core.registers[DSP_REG_B0];
! 4929: newsr = dsp_asr56(dest);
! 4930:
! 4931: source[0] = dsp_core.registers[DSP_REG_A2];
! 4932: source[1] = dsp_core.registers[DSP_REG_A1];
! 4933: source[2] = dsp_core.registers[DSP_REG_A0];
! 4934: newsr |= dsp_add56(source, dest);
1.1 root 4935:
1.1.1.6 ! root 4936: dsp_core.registers[DSP_REG_B2] = dest[0];
! 4937: dsp_core.registers[DSP_REG_B1] = dest[1];
! 4938: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1 root 4939:
1.1.1.6 ! root 4940: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 4941:
1.1.1.6 ! root 4942: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 4943: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 4944: }
4945:
1.1.1.6 ! root 4946: static void dsp_and_x0_a(void)
1.1 root 4947: {
1.1.1.6 ! root 4948: dsp_core.registers[DSP_REG_A1] &= dsp_core.registers[DSP_REG_X0];
1.1 root 4949:
1.1.1.6 ! root 4950: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 4951: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 4952: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 4953: }
1.1 root 4954:
1.1.1.6 ! root 4955: static void dsp_and_x0_b(void)
! 4956: {
! 4957: dsp_core.registers[DSP_REG_B1] &= dsp_core.registers[DSP_REG_X0];
1.1 root 4958:
1.1.1.6 ! root 4959: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 4960: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 4961: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
1.1 root 4962: }
4963:
1.1.1.6 ! root 4964: static void dsp_and_y0_a(void)
1.1 root 4965: {
1.1.1.6 ! root 4966: dsp_core.registers[DSP_REG_A1] &= dsp_core.registers[DSP_REG_Y0];
1.1 root 4967:
1.1.1.6 ! root 4968: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 4969: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 4970: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 4971: }
1.1 root 4972:
1.1.1.6 ! root 4973: static void dsp_and_y0_b(void)
! 4974: {
! 4975: dsp_core.registers[DSP_REG_B1] &= dsp_core.registers[DSP_REG_Y0];
1.1 root 4976:
1.1.1.6 ! root 4977: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 4978: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 4979: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 4980: }
1.1 root 4981:
1.1.1.6 ! root 4982: static void dsp_and_x1_a(void)
! 4983: {
! 4984: dsp_core.registers[DSP_REG_A1] &= dsp_core.registers[DSP_REG_X1];
1.1.1.2 root 4985:
1.1.1.6 ! root 4986: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 4987: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 4988: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
1.1 root 4989: }
4990:
1.1.1.6 ! root 4991: static void dsp_and_x1_b(void)
1.1 root 4992: {
1.1.1.6 ! root 4993: dsp_core.registers[DSP_REG_B1] &= dsp_core.registers[DSP_REG_X1];
! 4994:
! 4995: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 4996: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 4997: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 4998: }
1.1 root 4999:
1.1.1.6 ! root 5000: static void dsp_and_y1_a(void)
! 5001: {
! 5002: dsp_core.registers[DSP_REG_A1] &= dsp_core.registers[DSP_REG_Y1];
1.1 root 5003:
1.1.1.6 ! root 5004: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5005: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 5006: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 5007: }
1.1 root 5008:
1.1.1.6 ! root 5009: static void dsp_and_y1_b(void)
! 5010: {
! 5011: dsp_core.registers[DSP_REG_B1] &= dsp_core.registers[DSP_REG_Y1];
1.1.1.2 root 5012:
1.1.1.6 ! root 5013: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5014: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 5015: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
1.1 root 5016: }
5017:
1.1.1.6 ! root 5018: static void dsp_asl_b_a(void)
1.1 root 5019: {
1.1.1.6 ! root 5020: Uint32 dest[3];
! 5021: Uint16 newsr;
1.1 root 5022:
1.1.1.6 ! root 5023: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5024: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5025: dest[2] = dsp_core.registers[DSP_REG_A0];
1.1 root 5026:
1.1.1.6 ! root 5027: newsr = dsp_asl56(dest);
! 5028:
! 5029: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5030: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5031: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1 root 5032:
1.1.1.6 ! root 5033: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_V));
! 5034: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1.1.2 root 5035:
1.1.1.6 ! root 5036: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 5037: }
5038:
1.1.1.6 ! root 5039: static void dsp_asl_a_b(void)
1.1 root 5040: {
1.1.1.6 ! root 5041: Uint32 dest[3];
1.1.1.2 root 5042: Uint16 newsr;
1.1 root 5043:
1.1.1.6 ! root 5044: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5045: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5046: dest[2] = dsp_core.registers[DSP_REG_B0];
1.1 root 5047:
1.1.1.6 ! root 5048: newsr = dsp_asl56(dest);
1.1 root 5049:
1.1.1.6 ! root 5050: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5051: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5052: dsp_core.registers[DSP_REG_B0] = dest[2];
1.1.1.2 root 5053:
1.1.1.6 ! root 5054: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_V));
! 5055: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 5056:
1.1.1.6 ! root 5057: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 5058: }
5059:
1.1.1.6 ! root 5060: static void dsp_asr_b_a(void)
1.1 root 5061: {
1.1.1.6 ! root 5062: Uint32 dest[3];
! 5063: Uint16 newsr;
! 5064:
! 5065: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5066: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5067: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5068:
! 5069: newsr = dsp_asr56(dest);
! 5070:
! 5071: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5072: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5073: dsp_core.registers[DSP_REG_A0] = dest[2];
! 5074:
! 5075: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_V));
! 5076: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5077:
! 5078: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5079: }
! 5080:
! 5081: static void dsp_asr_a_b(void)
! 5082: {
! 5083: Uint32 dest[3];
! 5084: Uint16 newsr;
! 5085:
! 5086: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5087: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5088: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5089:
! 5090: newsr = dsp_asr56(dest);
! 5091:
! 5092: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5093: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5094: dsp_core.registers[DSP_REG_B0] = dest[2];
! 5095:
! 5096: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_V));
! 5097: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5098:
! 5099: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5100: }
! 5101:
! 5102: static void dsp_clr_a(void)
! 5103: {
! 5104: dsp_core.registers[DSP_REG_A2]=0;
! 5105: dsp_core.registers[DSP_REG_A1]=0;
! 5106: dsp_core.registers[DSP_REG_A0]=0;
! 5107:
! 5108: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_E)|(1<<DSP_SR_N)|(1<<DSP_SR_V));
! 5109: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_U)|(1<<DSP_SR_Z);
! 5110: }
! 5111:
! 5112: static void dsp_clr_b(void)
! 5113: {
! 5114: dsp_core.registers[DSP_REG_B2]=0;
! 5115: dsp_core.registers[DSP_REG_B1]=0;
! 5116: dsp_core.registers[DSP_REG_B0]=0;
! 5117:
! 5118: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_E)|(1<<DSP_SR_N)|(1<<DSP_SR_V));
! 5119: dsp_core.registers[DSP_REG_SR] |= (1<<DSP_SR_U)|(1<<DSP_SR_Z);
! 5120: }
! 5121:
! 5122: static void dsp_cmp_b_a(void)
! 5123: {
! 5124: Uint32 source[3], dest[3];
! 5125: Uint16 newsr;
! 5126:
! 5127: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5128: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5129: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5130:
! 5131: source[0] = dsp_core.registers[DSP_REG_B2];
! 5132: source[1] = dsp_core.registers[DSP_REG_B1];
! 5133: source[2] = dsp_core.registers[DSP_REG_B0];
! 5134:
! 5135: newsr = dsp_sub56(source, dest);
! 5136:
! 5137: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5138:
! 5139: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5140: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5141: }
! 5142:
! 5143: static void dsp_cmp_a_b(void)
! 5144: {
! 5145: Uint32 source[3], dest[3];
! 5146: Uint16 newsr;
! 5147:
! 5148: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5149: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5150: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5151:
! 5152: source[0] = dsp_core.registers[DSP_REG_A2];
! 5153: source[1] = dsp_core.registers[DSP_REG_A1];
! 5154: source[2] = dsp_core.registers[DSP_REG_A0];
! 5155:
! 5156: newsr = dsp_sub56(source, dest);
! 5157:
! 5158: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5159:
! 5160: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5161: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5162: }
! 5163:
! 5164: static void dsp_cmp_x0_a(void)
! 5165: {
! 5166: Uint32 source[3], dest[3];
! 5167: Uint16 newsr;
! 5168:
! 5169: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5170: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5171: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5172:
! 5173: source[2] = 0;
! 5174: source[1] = dsp_core.registers[DSP_REG_X0];
! 5175: if (source[1] & (1<<23))
! 5176: source[0] = 0xff;
! 5177: else
! 5178: source[0] = 0;
! 5179:
! 5180: newsr = dsp_sub56(source, dest);
! 5181:
! 5182: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5183:
! 5184: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5185: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5186: }
! 5187:
! 5188: static void dsp_cmp_x0_b(void)
! 5189: {
! 5190: Uint32 source[3], dest[3];
! 5191: Uint16 newsr;
! 5192:
! 5193: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5194: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5195: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5196:
! 5197: source[2] = 0;
! 5198: source[1] = dsp_core.registers[DSP_REG_X0];
! 5199: if (source[1] & (1<<23))
! 5200: source[0] = 0xff;
! 5201: else
! 5202: source[0] = 0;
! 5203:
! 5204: newsr = dsp_sub56(source, dest);
! 5205:
! 5206: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5207:
! 5208: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5209: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5210: }
! 5211:
! 5212: static void dsp_cmp_y0_a(void)
! 5213: {
! 5214: Uint32 source[3], dest[3];
! 5215: Uint16 newsr;
! 5216:
! 5217: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5218: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5219: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5220:
! 5221: source[2] = 0;
! 5222: source[1] = dsp_core.registers[DSP_REG_Y0];
! 5223: if (source[1] & (1<<23))
! 5224: source[0] = 0xff;
! 5225: else
! 5226: source[0] = 0;
! 5227:
! 5228: newsr = dsp_sub56(source, dest);
! 5229:
! 5230: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5231:
! 5232: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5233: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5234: }
! 5235:
! 5236: static void dsp_cmp_y0_b(void)
! 5237: {
! 5238: Uint32 source[3], dest[3];
! 5239: Uint16 newsr;
! 5240:
! 5241: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5242: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5243: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5244:
! 5245: source[2] = 0;
! 5246: source[1] = dsp_core.registers[DSP_REG_Y0];
! 5247: if (source[1] & (1<<23))
! 5248: source[0] = 0xff;
! 5249: else
! 5250: source[0] = 0;
! 5251:
! 5252: newsr = dsp_sub56(source, dest);
! 5253:
! 5254: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5255:
! 5256: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5257: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5258: }
! 5259: static void dsp_cmp_x1_a(void)
! 5260: {
! 5261: Uint32 source[3], dest[3];
! 5262: Uint16 newsr;
! 5263:
! 5264: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5265: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5266: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5267:
! 5268: source[2] = 0;
! 5269: source[1] = dsp_core.registers[DSP_REG_X1];
! 5270: if (source[1] & (1<<23))
! 5271: source[0] = 0xff;
! 5272: else
! 5273: source[0] = 0;
! 5274:
! 5275: newsr = dsp_sub56(source, dest);
! 5276:
! 5277: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5278:
! 5279: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5280: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5281: }
! 5282:
! 5283: static void dsp_cmp_x1_b(void)
! 5284: {
! 5285: Uint32 source[3], dest[3];
! 5286: Uint16 newsr;
! 5287:
! 5288: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5289: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5290: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5291:
! 5292: source[2] = 0;
! 5293: source[1] = dsp_core.registers[DSP_REG_X1];
! 5294: if (source[1] & (1<<23))
! 5295: source[0] = 0xff;
! 5296: else
! 5297: source[0] = 0;
! 5298:
! 5299: newsr = dsp_sub56(source, dest);
! 5300:
! 5301: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5302:
! 5303: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5304: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5305: }
! 5306:
! 5307: static void dsp_cmp_y1_a(void)
! 5308: {
! 5309: Uint32 source[3], dest[3];
! 5310: Uint16 newsr;
! 5311:
! 5312: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5313: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5314: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5315:
! 5316: source[2] = 0;
! 5317: source[1] = dsp_core.registers[DSP_REG_Y1];
! 5318: if (source[1] & (1<<23))
! 5319: source[0] = 0xff;
! 5320: else
! 5321: source[0] = 0;
! 5322:
! 5323: newsr = dsp_sub56(source, dest);
! 5324:
! 5325: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5326:
! 5327: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5328: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5329: }
! 5330:
! 5331: static void dsp_cmp_y1_b(void)
! 5332: {
! 5333: Uint32 source[3], dest[3];
! 5334: Uint16 newsr;
! 5335:
! 5336: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5337: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5338: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5339:
! 5340: source[2] = 0;
! 5341: source[1] = dsp_core.registers[DSP_REG_Y1];
! 5342: if (source[1] & (1<<23))
! 5343: source[0] = 0xff;
! 5344: else
! 5345: source[0] = 0;
! 5346:
! 5347: newsr = dsp_sub56(source, dest);
! 5348:
! 5349: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5350:
! 5351: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5352: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5353: }
! 5354:
! 5355: static void dsp_cmpm_b_a(void)
! 5356: {
! 5357: Uint32 source[3], dest[3];
! 5358: Uint16 newsr;
! 5359:
! 5360: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5361: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5362: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5363: dsp_abs56(dest);
! 5364:
! 5365: source[0] = dsp_core.registers[DSP_REG_B2];
! 5366: source[1] = dsp_core.registers[DSP_REG_B1];
! 5367: source[2] = dsp_core.registers[DSP_REG_B0];
! 5368: dsp_abs56(source);
! 5369:
! 5370: newsr = dsp_sub56(source, dest);
! 5371:
! 5372: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5373:
! 5374: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5375: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5376: }
! 5377:
! 5378: static void dsp_cmpm_a_b(void)
! 5379: {
! 5380: Uint32 source[3], dest[3];
! 5381: Uint16 newsr;
! 5382:
! 5383: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5384: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5385: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5386: dsp_abs56(dest);
! 5387:
! 5388: source[0] = dsp_core.registers[DSP_REG_A2];
! 5389: source[1] = dsp_core.registers[DSP_REG_A1];
! 5390: source[2] = dsp_core.registers[DSP_REG_A0];
! 5391: dsp_abs56(source);
! 5392:
! 5393: newsr = dsp_sub56(source, dest);
! 5394:
! 5395: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5396:
! 5397: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5398: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5399: }
! 5400:
! 5401: static void dsp_cmpm_x0_a(void)
! 5402: {
! 5403: Uint32 source[3], dest[3];
! 5404: Uint16 newsr;
! 5405:
! 5406: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5407: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5408: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5409: dsp_abs56(dest);
! 5410:
! 5411: source[2] = 0;
! 5412: source[1] = dsp_core.registers[DSP_REG_X0];
! 5413: if (source[1] & (1<<23))
! 5414: source[0] = 0xff;
! 5415: else
! 5416: source[0] = 0x0;
! 5417: dsp_abs56(source);
! 5418:
! 5419: newsr = dsp_sub56(source, dest);
! 5420:
! 5421: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5422:
! 5423: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5424: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5425: }
! 5426:
! 5427: static void dsp_cmpm_x0_b(void)
! 5428: {
! 5429: Uint32 source[3], dest[3];
! 5430: Uint16 newsr;
! 5431:
! 5432: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5433: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5434: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5435: dsp_abs56(dest);
! 5436:
! 5437: source[2] = 0;
! 5438: source[1] = dsp_core.registers[DSP_REG_X0];
! 5439: if (source[1] & (1<<23))
! 5440: source[0] = 0xff;
! 5441: else
! 5442: source[0] = 0x0;
! 5443: dsp_abs56(source);
! 5444:
! 5445: newsr = dsp_sub56(source, dest);
! 5446:
! 5447: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5448:
! 5449: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5450: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5451: }
! 5452:
! 5453: static void dsp_cmpm_y0_a(void)
! 5454: {
! 5455: Uint32 source[3], dest[3];
! 5456: Uint16 newsr;
! 5457:
! 5458: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5459: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5460: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5461: dsp_abs56(dest);
! 5462:
! 5463: source[2] = 0;
! 5464: source[1] = dsp_core.registers[DSP_REG_Y0];
! 5465: if (source[1] & (1<<23))
! 5466: source[0] = 0xff;
! 5467: else
! 5468: source[0] = 0x0;
! 5469: dsp_abs56(source);
! 5470:
! 5471: newsr = dsp_sub56(source, dest);
! 5472:
! 5473: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5474:
! 5475: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5476: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5477: }
! 5478:
! 5479: static void dsp_cmpm_y0_b(void)
! 5480: {
! 5481: Uint32 source[3], dest[3];
! 5482: Uint16 newsr;
! 5483:
! 5484: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5485: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5486: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5487: dsp_abs56(dest);
! 5488:
! 5489: source[2] = 0;
! 5490: source[1] = dsp_core.registers[DSP_REG_Y0];
! 5491: if (source[1] & (1<<23))
! 5492: source[0] = 0xff;
! 5493: else
! 5494: source[0] = 0x0;
! 5495: dsp_abs56(source);
! 5496:
! 5497: newsr = dsp_sub56(source, dest);
! 5498:
! 5499: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5500:
! 5501: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5502: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5503: }
! 5504:
! 5505: static void dsp_cmpm_x1_a(void)
! 5506: {
! 5507: Uint32 source[3], dest[3];
! 5508: Uint16 newsr;
! 5509:
! 5510: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5511: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5512: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5513: dsp_abs56(dest);
! 5514:
! 5515: source[2] = 0;
! 5516: source[1] = dsp_core.registers[DSP_REG_X1];
! 5517: if (source[1] & (1<<23))
! 5518: source[0] = 0xff;
! 5519: else
! 5520: source[0] = 0x0;
! 5521: dsp_abs56(source);
! 5522:
! 5523: newsr = dsp_sub56(source, dest);
! 5524:
! 5525: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5526:
! 5527: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5528: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5529: }
! 5530:
! 5531: static void dsp_cmpm_x1_b(void)
! 5532: {
! 5533: Uint32 source[3], dest[3];
! 5534: Uint16 newsr;
! 5535:
! 5536: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5537: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5538: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5539: dsp_abs56(dest);
! 5540:
! 5541: source[2] = 0;
! 5542: source[1] = dsp_core.registers[DSP_REG_X1];
! 5543: if (source[1] & (1<<23))
! 5544: source[0] = 0xff;
! 5545: else
! 5546: source[0] = 0x0;
! 5547: dsp_abs56(source);
! 5548:
! 5549: newsr = dsp_sub56(source, dest);
! 5550:
! 5551: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5552:
! 5553: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5554: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5555: }
! 5556:
! 5557: static void dsp_cmpm_y1_a(void)
! 5558: {
! 5559: Uint32 source[3], dest[3];
! 5560: Uint16 newsr;
! 5561:
! 5562: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5563: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5564: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5565: dsp_abs56(dest);
! 5566:
! 5567: source[2] = 0;
! 5568: source[1] = dsp_core.registers[DSP_REG_Y1];
! 5569: if (source[1] & (1<<23))
! 5570: source[0] = 0xff;
! 5571: else
! 5572: source[0] = 0x0;
! 5573: dsp_abs56(source);
! 5574:
! 5575: newsr = dsp_sub56(source, dest);
! 5576:
! 5577: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5578:
! 5579: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5580: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5581: }
! 5582:
! 5583: static void dsp_cmpm_y1_b(void)
! 5584: {
! 5585: Uint32 source[3], dest[3];
! 5586: Uint16 newsr;
! 5587:
! 5588: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5589: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5590: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5591: dsp_abs56(dest);
! 5592:
! 5593: source[2] = 0;
! 5594: source[1] = dsp_core.registers[DSP_REG_Y1];
! 5595: if (source[1] & (1<<23))
! 5596: source[0] = 0xff;
! 5597: else
! 5598: source[0] = 0x0;
! 5599: dsp_abs56(source);
! 5600:
! 5601: newsr = dsp_sub56(source, dest);
! 5602:
! 5603: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5604:
! 5605: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 5606: dsp_core.registers[DSP_REG_SR] |= newsr;
! 5607: }
! 5608:
! 5609: static void dsp_eor_x0_a(void)
! 5610: {
! 5611: dsp_core.registers[DSP_REG_A1] ^= dsp_core.registers[DSP_REG_X0];
! 5612: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 5613:
! 5614: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5615: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 5616: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 5617: }
! 5618:
! 5619: static void dsp_eor_x0_b(void)
! 5620: {
! 5621: dsp_core.registers[DSP_REG_B1] ^= dsp_core.registers[DSP_REG_X0];
! 5622: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 5623:
! 5624: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5625: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 5626: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 5627: }
! 5628:
! 5629: static void dsp_eor_y0_a(void)
! 5630: {
! 5631: dsp_core.registers[DSP_REG_A1] ^= dsp_core.registers[DSP_REG_Y0];
! 5632: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 5633:
! 5634: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5635: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 5636: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 5637: }
! 5638:
! 5639: static void dsp_eor_y0_b(void)
! 5640: {
! 5641: dsp_core.registers[DSP_REG_B1] ^= dsp_core.registers[DSP_REG_Y0];
! 5642: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 5643:
! 5644: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5645: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 5646: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 5647: }
! 5648:
! 5649: static void dsp_eor_x1_a(void)
! 5650: {
! 5651: dsp_core.registers[DSP_REG_A1] ^= dsp_core.registers[DSP_REG_X1];
! 5652: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 5653:
! 5654: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5655: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 5656: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 5657: }
! 5658:
! 5659: static void dsp_eor_x1_b(void)
! 5660: {
! 5661: dsp_core.registers[DSP_REG_B1] ^= dsp_core.registers[DSP_REG_X1];
! 5662: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 5663:
! 5664: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5665: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 5666: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 5667: }
! 5668:
! 5669: static void dsp_eor_y1_a(void)
! 5670: {
! 5671: dsp_core.registers[DSP_REG_A1] ^= dsp_core.registers[DSP_REG_Y1];
! 5672: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 5673:
! 5674: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5675: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 5676: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 5677: }
! 5678:
! 5679: static void dsp_eor_y1_b(void)
! 5680: {
! 5681: dsp_core.registers[DSP_REG_B1] ^= dsp_core.registers[DSP_REG_Y1];
! 5682: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 5683:
! 5684: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5685: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 5686: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 5687: }
! 5688:
! 5689: static void dsp_lsl_a(void)
! 5690: {
! 5691: Uint32 newcarry = (dsp_core.registers[DSP_REG_A1]>>23) & 1;
! 5692:
! 5693: dsp_core.registers[DSP_REG_A1] <<= 1;
! 5694: dsp_core.registers[DSP_REG_A1] &= BITMASK(24);
! 5695:
! 5696: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5697: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 5698: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 5699: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 5700: }
! 5701:
! 5702: static void dsp_lsl_b(void)
! 5703: {
! 5704: Uint32 newcarry = (dsp_core.registers[DSP_REG_B1]>>23) & 1;
! 5705:
! 5706: dsp_core.registers[DSP_REG_B1] <<= 1;
! 5707: dsp_core.registers[DSP_REG_B1] &= BITMASK(24);
! 5708:
! 5709: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5710: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 5711: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 5712: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 5713: }
! 5714:
! 5715: static void dsp_lsr_a(void)
! 5716: {
! 5717: Uint32 newcarry = dsp_core.registers[DSP_REG_A1] & 1;
! 5718: dsp_core.registers[DSP_REG_A1] >>= 1;
! 5719:
! 5720: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5721: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 5722: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 5723: }
! 5724:
! 5725: static void dsp_lsr_b(void)
! 5726: {
! 5727: Uint32 newcarry = dsp_core.registers[DSP_REG_B1] & 1;
! 5728: dsp_core.registers[DSP_REG_B1] >>= 1;
! 5729:
! 5730: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 5731: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 5732: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 5733: }
! 5734:
! 5735: static void dsp_mac_p_x0_x0_a(void)
! 5736: {
! 5737: Uint32 source[3], dest[3];
! 5738: Uint16 newsr;
! 5739:
! 5740: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 5741:
! 5742: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5743: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5744: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5745: newsr = dsp_add56(source, dest);
! 5746:
! 5747: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5748: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5749: dsp_core.registers[DSP_REG_A0] = dest[2];
! 5750:
! 5751: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5752:
! 5753: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5754: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5755: }
! 5756:
! 5757: static void dsp_mac_m_x0_x0_a(void)
! 5758: {
! 5759: Uint32 source[3], dest[3];
! 5760: Uint16 newsr;
! 5761:
! 5762: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 5763:
! 5764: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5765: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5766: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5767: newsr = dsp_add56(source, dest);
! 5768:
! 5769: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5770: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5771: dsp_core.registers[DSP_REG_A0] = dest[2];
! 5772:
! 5773: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5774:
! 5775: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5776: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5777: }
! 5778: static void dsp_mac_p_x0_x0_b(void)
! 5779: {
! 5780: Uint32 source[3], dest[3];
! 5781: Uint16 newsr;
! 5782:
! 5783: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 5784:
! 5785: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5786: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5787: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5788: newsr = dsp_add56(source, dest);
! 5789:
! 5790: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5791: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5792: dsp_core.registers[DSP_REG_B0] = dest[2];
! 5793:
! 5794: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5795:
! 5796: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5797: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5798: }
! 5799:
! 5800: static void dsp_mac_m_x0_x0_b(void)
! 5801: {
! 5802: Uint32 source[3], dest[3];
! 5803: Uint16 newsr;
! 5804:
! 5805: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 5806:
! 5807: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5808: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5809: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5810: newsr = dsp_add56(source, dest);
! 5811:
! 5812: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5813: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5814: dsp_core.registers[DSP_REG_B0] = dest[2];
! 5815:
! 5816: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5817:
! 5818: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5819: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5820: }
! 5821:
! 5822: static void dsp_mac_p_y0_y0_a(void)
! 5823: {
! 5824: Uint32 source[3], dest[3];
! 5825: Uint16 newsr;
! 5826:
! 5827: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 5828:
! 5829: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5830: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5831: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5832: newsr = dsp_add56(source, dest);
! 5833:
! 5834: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5835: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5836: dsp_core.registers[DSP_REG_A0] = dest[2];
! 5837:
! 5838: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5839:
! 5840: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5841: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5842: }
! 5843:
! 5844: static void dsp_mac_m_y0_y0_a(void)
! 5845: {
! 5846: Uint32 source[3], dest[3];
! 5847: Uint16 newsr;
! 5848:
! 5849: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 5850:
! 5851: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5852: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5853: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5854: newsr = dsp_add56(source, dest);
! 5855:
! 5856: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5857: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5858: dsp_core.registers[DSP_REG_A0] = dest[2];
! 5859:
! 5860: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5861:
! 5862: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5863: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5864: }
! 5865: static void dsp_mac_p_y0_y0_b(void)
! 5866: {
! 5867: Uint32 source[3], dest[3];
! 5868: Uint16 newsr;
! 5869:
! 5870: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 5871:
! 5872: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5873: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5874: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5875: newsr = dsp_add56(source, dest);
! 5876:
! 5877: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5878: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5879: dsp_core.registers[DSP_REG_B0] = dest[2];
! 5880:
! 5881: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5882:
! 5883: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5884: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5885: }
! 5886:
! 5887: static void dsp_mac_m_y0_y0_b(void)
! 5888: {
! 5889: Uint32 source[3], dest[3];
! 5890: Uint16 newsr;
! 5891:
! 5892: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 5893:
! 5894: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5895: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5896: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5897: newsr = dsp_add56(source, dest);
! 5898:
! 5899: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5900: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5901: dsp_core.registers[DSP_REG_B0] = dest[2];
! 5902:
! 5903: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5904:
! 5905: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5906: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5907: }
! 5908:
! 5909: static void dsp_mac_p_x1_x0_a(void)
! 5910: {
! 5911: Uint32 source[3], dest[3];
! 5912: Uint16 newsr;
! 5913:
! 5914: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 5915:
! 5916: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5917: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5918: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5919: newsr = dsp_add56(source, dest);
! 5920:
! 5921: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5922: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5923: dsp_core.registers[DSP_REG_A0] = dest[2];
! 5924:
! 5925: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5926:
! 5927: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5928: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5929: }
! 5930:
! 5931: static void dsp_mac_m_x1_x0_a(void)
! 5932: {
! 5933: Uint32 source[3], dest[3];
! 5934: Uint16 newsr;
! 5935:
! 5936: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 5937:
! 5938: dest[0] = dsp_core.registers[DSP_REG_A2];
! 5939: dest[1] = dsp_core.registers[DSP_REG_A1];
! 5940: dest[2] = dsp_core.registers[DSP_REG_A0];
! 5941: newsr = dsp_add56(source, dest);
! 5942:
! 5943: dsp_core.registers[DSP_REG_A2] = dest[0];
! 5944: dsp_core.registers[DSP_REG_A1] = dest[1];
! 5945: dsp_core.registers[DSP_REG_A0] = dest[2];
! 5946:
! 5947: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5948:
! 5949: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5950: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5951: }
! 5952:
! 5953: static void dsp_mac_p_x1_x0_b(void)
! 5954: {
! 5955: Uint32 source[3], dest[3];
! 5956: Uint16 newsr;
! 5957:
! 5958: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 5959:
! 5960: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5961: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5962: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5963: newsr = dsp_add56(source, dest);
! 5964:
! 5965: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5966: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5967: dsp_core.registers[DSP_REG_B0] = dest[2];
! 5968:
! 5969: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5970:
! 5971: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5972: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5973: }
! 5974:
! 5975: static void dsp_mac_m_x1_x0_b(void)
! 5976: {
! 5977: Uint32 source[3], dest[3];
! 5978: Uint16 newsr;
! 5979:
! 5980: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 5981:
! 5982: dest[0] = dsp_core.registers[DSP_REG_B2];
! 5983: dest[1] = dsp_core.registers[DSP_REG_B1];
! 5984: dest[2] = dsp_core.registers[DSP_REG_B0];
! 5985: newsr = dsp_add56(source, dest);
! 5986:
! 5987: dsp_core.registers[DSP_REG_B2] = dest[0];
! 5988: dsp_core.registers[DSP_REG_B1] = dest[1];
! 5989: dsp_core.registers[DSP_REG_B0] = dest[2];
! 5990:
! 5991: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 5992:
! 5993: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 5994: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 5995: }
! 5996:
! 5997: static void dsp_mac_p_y1_y0_a(void)
! 5998: {
! 5999: Uint32 source[3], dest[3];
! 6000: Uint16 newsr;
! 6001:
! 6002: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6003:
! 6004: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6005: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6006: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6007: newsr = dsp_add56(source, dest);
! 6008:
! 6009: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6010: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6011: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6012:
! 6013: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6014:
! 6015: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6016: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6017: }
! 6018:
! 6019: static void dsp_mac_m_y1_y0_a(void)
! 6020: {
! 6021: Uint32 source[3], dest[3];
! 6022: Uint16 newsr;
! 6023:
! 6024: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6025:
! 6026: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6027: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6028: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6029: newsr = dsp_add56(source, dest);
! 6030:
! 6031: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6032: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6033: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6034:
! 6035: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6036:
! 6037: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6038: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6039: }
! 6040:
! 6041: static void dsp_mac_p_y1_y0_b(void)
! 6042: {
! 6043: Uint32 source[3], dest[3];
! 6044: Uint16 newsr;
! 6045:
! 6046: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6047:
! 6048: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6049: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6050: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6051: newsr = dsp_add56(source, dest);
! 6052:
! 6053: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6054: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6055: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6056:
! 6057: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6058:
! 6059: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6060: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6061: }
! 6062:
! 6063: static void dsp_mac_m_y1_y0_b(void)
! 6064: {
! 6065: Uint32 source[3], dest[3];
! 6066: Uint16 newsr;
! 6067:
! 6068: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6069:
! 6070: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6071: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6072: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6073: newsr = dsp_add56(source, dest);
! 6074:
! 6075: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6076: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6077: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6078:
! 6079: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6080:
! 6081: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6082: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6083: }
! 6084:
! 6085: static void dsp_mac_p_x0_y1_a(void)
! 6086: {
! 6087: Uint32 source[3], dest[3];
! 6088: Uint16 newsr;
! 6089:
! 6090: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 6091:
! 6092: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6093: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6094: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6095: newsr = dsp_add56(source, dest);
! 6096:
! 6097: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6098: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6099: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6100:
! 6101: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6102:
! 6103: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6104: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6105: }
! 6106:
! 6107: static void dsp_mac_m_x0_y1_a(void)
! 6108: {
! 6109: Uint32 source[3], dest[3];
! 6110: Uint16 newsr;
! 6111:
! 6112: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 6113:
! 6114: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6115: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6116: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6117: newsr = dsp_add56(source, dest);
! 6118:
! 6119: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6120: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6121: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6122:
! 6123: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6124:
! 6125: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6126: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6127: }
! 6128:
! 6129: static void dsp_mac_p_x0_y1_b(void)
! 6130: {
! 6131: Uint32 source[3], dest[3];
! 6132: Uint16 newsr;
! 6133:
! 6134: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 6135:
! 6136: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6137: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6138: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6139: newsr = dsp_add56(source, dest);
! 6140:
! 6141: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6142: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6143: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6144:
! 6145: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6146:
! 6147: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6148: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6149: }
! 6150:
! 6151: static void dsp_mac_m_x0_y1_b(void)
! 6152: {
! 6153: Uint32 source[3], dest[3];
! 6154: Uint16 newsr;
! 6155:
! 6156: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 6157:
! 6158: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6159: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6160: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6161: newsr = dsp_add56(source, dest);
! 6162:
! 6163: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6164: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6165: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6166:
! 6167: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6168:
! 6169: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6170: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6171: }
! 6172:
! 6173: static void dsp_mac_p_y0_x0_a(void)
! 6174: {
! 6175: Uint32 source[3], dest[3];
! 6176: Uint16 newsr;
! 6177:
! 6178: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6179:
! 6180: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6181: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6182: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6183: newsr = dsp_add56(source, dest);
! 6184:
! 6185: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6186: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6187: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6188:
! 6189: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6190:
! 6191: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6192: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6193: }
! 6194:
! 6195: static void dsp_mac_m_y0_x0_a(void)
! 6196: {
! 6197: Uint32 source[3], dest[3];
! 6198: Uint16 newsr;
! 6199:
! 6200: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6201:
! 6202: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6203: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6204: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6205: newsr = dsp_add56(source, dest);
! 6206:
! 6207: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6208: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6209: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6210:
! 6211: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6212:
! 6213: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6214: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6215: }
! 6216:
! 6217: static void dsp_mac_p_y0_x0_b(void)
! 6218: {
! 6219: Uint32 source[3], dest[3];
! 6220: Uint16 newsr;
! 6221:
! 6222: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6223:
! 6224: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6225: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6226: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6227: newsr = dsp_add56(source, dest);
! 6228:
! 6229: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6230: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6231: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6232:
! 6233: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6234:
! 6235: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6236: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6237: }
! 6238:
! 6239: static void dsp_mac_m_y0_x0_b(void)
! 6240: {
! 6241: Uint32 source[3], dest[3];
! 6242: Uint16 newsr;
! 6243:
! 6244: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6245:
! 6246: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6247: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6248: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6249: newsr = dsp_add56(source, dest);
! 6250:
! 6251: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6252: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6253: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6254:
! 6255: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6256:
! 6257: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6258: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6259: }
! 6260:
! 6261: static void dsp_mac_p_x1_y0_a(void)
! 6262: {
! 6263: Uint32 source[3], dest[3];
! 6264: Uint16 newsr;
! 6265:
! 6266: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6267:
! 6268: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6269: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6270: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6271: newsr = dsp_add56(source, dest);
! 6272:
! 6273: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6274: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6275: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6276:
! 6277: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6278:
! 6279: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6280: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6281: }
! 6282:
! 6283: static void dsp_mac_m_x1_y0_a(void)
! 6284: {
! 6285: Uint32 source[3], dest[3];
! 6286: Uint16 newsr;
! 6287:
! 6288: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6289:
! 6290: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6291: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6292: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6293: newsr = dsp_add56(source, dest);
! 6294:
! 6295: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6296: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6297: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6298:
! 6299: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6300:
! 6301: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6302: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6303: }
! 6304:
! 6305: static void dsp_mac_p_x1_y0_b(void)
! 6306: {
! 6307: Uint32 source[3], dest[3];
! 6308: Uint16 newsr;
! 6309:
! 6310: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6311:
! 6312: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6313: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6314: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6315: newsr = dsp_add56(source, dest);
! 6316:
! 6317: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6318: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6319: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6320:
! 6321: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6322:
! 6323: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6324: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6325: }
! 6326:
! 6327: static void dsp_mac_m_x1_y0_b(void)
! 6328: {
! 6329: Uint32 source[3], dest[3];
! 6330: Uint16 newsr;
! 6331:
! 6332: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6333:
! 6334: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6335: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6336: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6337: newsr = dsp_add56(source, dest);
! 6338:
! 6339: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6340: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6341: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6342:
! 6343: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6344:
! 6345: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6346: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6347: }
! 6348:
! 6349: static void dsp_mac_p_y1_x1_a(void)
! 6350: {
! 6351: Uint32 source[3], dest[3];
! 6352: Uint16 newsr;
! 6353:
! 6354: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 6355:
! 6356: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6357: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6358: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6359: newsr = dsp_add56(source, dest);
! 6360:
! 6361: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6362: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6363: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6364:
! 6365: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6366:
! 6367: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6368: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6369: }
! 6370:
! 6371: static void dsp_mac_m_y1_x1_a(void)
! 6372: {
! 6373: Uint32 source[3], dest[3];
! 6374: Uint16 newsr;
! 6375:
! 6376: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 6377:
! 6378: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6379: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6380: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6381: newsr = dsp_add56(source, dest);
! 6382:
! 6383: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6384: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6385: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6386:
! 6387: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6388:
! 6389: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6390: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6391: }
! 6392:
! 6393: static void dsp_mac_p_y1_x1_b(void)
! 6394: {
! 6395: Uint32 source[3], dest[3];
! 6396: Uint16 newsr;
! 6397:
! 6398: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 6399:
! 6400: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6401: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6402: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6403: newsr = dsp_add56(source, dest);
! 6404:
! 6405: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6406: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6407: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6408:
! 6409: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6410:
! 6411: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6412: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6413: }
! 6414:
! 6415: static void dsp_mac_m_y1_x1_b(void)
! 6416: {
! 6417: Uint32 source[3], dest[3];
! 6418: Uint16 newsr;
! 6419:
! 6420: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 6421:
! 6422: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6423: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6424: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6425: newsr = dsp_add56(source, dest);
! 6426:
! 6427: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6428: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6429: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6430:
! 6431: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6432:
! 6433: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6434: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6435: }
! 6436:
! 6437: static void dsp_macr_p_x0_x0_a(void)
! 6438: {
! 6439: Uint32 source[3], dest[3];
! 6440: Uint16 newsr;
! 6441:
! 6442: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6443:
! 6444: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6445: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6446: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6447: newsr = dsp_add56(source, dest);
! 6448:
! 6449: dsp_rnd56(dest);
! 6450:
! 6451: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6452: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6453: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6454:
! 6455: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6456:
! 6457: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6458: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6459: }
! 6460:
! 6461: static void dsp_macr_m_x0_x0_a(void)
! 6462: {
! 6463: Uint32 source[3], dest[3];
! 6464: Uint16 newsr;
! 6465:
! 6466: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6467:
! 6468: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6469: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6470: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6471: newsr = dsp_add56(source, dest);
! 6472:
! 6473: dsp_rnd56(dest);
! 6474:
! 6475: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6476: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6477: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6478:
! 6479: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6480:
! 6481: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6482: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6483: }
! 6484: static void dsp_macr_p_x0_x0_b(void)
! 6485: {
! 6486: Uint32 source[3], dest[3];
! 6487: Uint16 newsr;
! 6488:
! 6489: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6490:
! 6491: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6492: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6493: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6494: newsr = dsp_add56(source, dest);
! 6495:
! 6496: dsp_rnd56(dest);
! 6497:
! 6498: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6499: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6500: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6501:
! 6502: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6503:
! 6504: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6505: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6506: }
! 6507:
! 6508: static void dsp_macr_m_x0_x0_b(void)
! 6509: {
! 6510: Uint32 source[3], dest[3];
! 6511: Uint16 newsr;
! 6512:
! 6513: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6514:
! 6515: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6516: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6517: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6518: newsr = dsp_add56(source, dest);
! 6519:
! 6520: dsp_rnd56(dest);
! 6521:
! 6522: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6523: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6524: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6525:
! 6526: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6527:
! 6528: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6529: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6530: }
! 6531:
! 6532: static void dsp_macr_p_y0_y0_a(void)
! 6533: {
! 6534: Uint32 source[3], dest[3];
! 6535: Uint16 newsr;
! 6536:
! 6537: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6538:
! 6539: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6540: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6541: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6542: newsr = dsp_add56(source, dest);
! 6543:
! 6544: dsp_rnd56(dest);
! 6545:
! 6546: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6547: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6548: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6549:
! 6550: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6551:
! 6552: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6553: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6554: }
! 6555:
! 6556: static void dsp_macr_m_y0_y0_a(void)
! 6557: {
! 6558: Uint32 source[3], dest[3];
! 6559: Uint16 newsr;
! 6560:
! 6561: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6562:
! 6563: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6564: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6565: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6566: newsr = dsp_add56(source, dest);
! 6567:
! 6568: dsp_rnd56(dest);
! 6569:
! 6570: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6571: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6572: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6573:
! 6574: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6575:
! 6576: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6577: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6578: }
! 6579: static void dsp_macr_p_y0_y0_b(void)
! 6580: {
! 6581: Uint32 source[3], dest[3];
! 6582: Uint16 newsr;
! 6583:
! 6584: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6585:
! 6586: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6587: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6588: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6589: newsr = dsp_add56(source, dest);
! 6590:
! 6591: dsp_rnd56(dest);
! 6592:
! 6593: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6594: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6595: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6596:
! 6597: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6598:
! 6599: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6600: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6601: }
! 6602:
! 6603: static void dsp_macr_m_y0_y0_b(void)
! 6604: {
! 6605: Uint32 source[3], dest[3];
! 6606: Uint16 newsr;
! 6607:
! 6608: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6609:
! 6610: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6611: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6612: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6613: newsr = dsp_add56(source, dest);
! 6614:
! 6615: dsp_rnd56(dest);
! 6616:
! 6617: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6618: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6619: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6620:
! 6621: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6622:
! 6623: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6624: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6625: }
! 6626:
! 6627: static void dsp_macr_p_x1_x0_a(void)
! 6628: {
! 6629: Uint32 source[3], dest[3];
! 6630: Uint16 newsr;
! 6631:
! 6632: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6633:
! 6634: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6635: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6636: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6637: newsr = dsp_add56(source, dest);
! 6638:
! 6639: dsp_rnd56(dest);
! 6640:
! 6641: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6642: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6643: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6644:
! 6645: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6646:
! 6647: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6648: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6649: }
! 6650:
! 6651: static void dsp_macr_m_x1_x0_a(void)
! 6652: {
! 6653: Uint32 source[3], dest[3];
! 6654: Uint16 newsr;
! 6655:
! 6656: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6657:
! 6658: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6659: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6660: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6661: newsr = dsp_add56(source, dest);
! 6662:
! 6663: dsp_rnd56(dest);
! 6664:
! 6665: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6666: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6667: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6668:
! 6669: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6670:
! 6671: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6672: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6673: }
! 6674:
! 6675: static void dsp_macr_p_x1_x0_b(void)
! 6676: {
! 6677: Uint32 source[3], dest[3];
! 6678: Uint16 newsr;
! 6679:
! 6680: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6681:
! 6682: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6683: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6684: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6685: newsr = dsp_add56(source, dest);
! 6686:
! 6687: dsp_rnd56(dest);
! 6688:
! 6689: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6690: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6691: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6692:
! 6693: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6694:
! 6695: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6696: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6697: }
! 6698:
! 6699: static void dsp_macr_m_x1_x0_b(void)
! 6700: {
! 6701: Uint32 source[3], dest[3];
! 6702: Uint16 newsr;
! 6703:
! 6704: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6705:
! 6706: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6707: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6708: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6709: newsr = dsp_add56(source, dest);
! 6710:
! 6711: dsp_rnd56(dest);
! 6712:
! 6713: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6714: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6715: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6716:
! 6717: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6718:
! 6719: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6720: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6721: }
! 6722:
! 6723: static void dsp_macr_p_y1_y0_a(void)
! 6724: {
! 6725: Uint32 source[3], dest[3];
! 6726: Uint16 newsr;
! 6727:
! 6728: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6729:
! 6730: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6731: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6732: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6733: newsr = dsp_add56(source, dest);
! 6734:
! 6735: dsp_rnd56(dest);
! 6736:
! 6737: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6738: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6739: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6740:
! 6741: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6742:
! 6743: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6744: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6745: }
! 6746:
! 6747: static void dsp_macr_m_y1_y0_a(void)
! 6748: {
! 6749: Uint32 source[3], dest[3];
! 6750: Uint16 newsr;
! 6751:
! 6752: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6753:
! 6754: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6755: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6756: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6757: newsr = dsp_add56(source, dest);
! 6758:
! 6759: dsp_rnd56(dest);
! 6760:
! 6761: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6762: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6763: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6764:
! 6765: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6766:
! 6767: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6768: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6769: }
! 6770:
! 6771: static void dsp_macr_p_y1_y0_b(void)
! 6772: {
! 6773: Uint32 source[3], dest[3];
! 6774: Uint16 newsr;
! 6775:
! 6776: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 6777:
! 6778: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6779: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6780: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6781: newsr = dsp_add56(source, dest);
! 6782:
! 6783: dsp_rnd56(dest);
! 6784:
! 6785: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6786: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6787: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6788:
! 6789: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6790:
! 6791: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6792: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6793: }
! 6794:
! 6795: static void dsp_macr_m_y1_y0_b(void)
! 6796: {
! 6797: Uint32 source[3], dest[3];
! 6798: Uint16 newsr;
! 6799:
! 6800: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 6801:
! 6802: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6803: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6804: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6805: newsr = dsp_add56(source, dest);
! 6806:
! 6807: dsp_rnd56(dest);
! 6808:
! 6809: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6810: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6811: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6812:
! 6813: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6814:
! 6815: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6816: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6817: }
! 6818:
! 6819: static void dsp_macr_p_x0_y1_a(void)
! 6820: {
! 6821: Uint32 source[3], dest[3];
! 6822: Uint16 newsr;
! 6823:
! 6824: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 6825:
! 6826: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6827: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6828: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6829: newsr = dsp_add56(source, dest);
! 6830:
! 6831: dsp_rnd56(dest);
! 6832:
! 6833: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6834: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6835: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6836:
! 6837: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6838:
! 6839: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6840: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6841: }
! 6842:
! 6843: static void dsp_macr_m_x0_y1_a(void)
! 6844: {
! 6845: Uint32 source[3], dest[3];
! 6846: Uint16 newsr;
! 6847:
! 6848: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 6849:
! 6850: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6851: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6852: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6853: newsr = dsp_add56(source, dest);
! 6854:
! 6855: dsp_rnd56(dest);
! 6856:
! 6857: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6858: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6859: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6860:
! 6861: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6862:
! 6863: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6864: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6865: }
! 6866:
! 6867: static void dsp_macr_p_x0_y1_b(void)
! 6868: {
! 6869: Uint32 source[3], dest[3];
! 6870: Uint16 newsr;
! 6871:
! 6872: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 6873:
! 6874: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6875: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6876: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6877: newsr = dsp_add56(source, dest);
! 6878:
! 6879: dsp_rnd56(dest);
! 6880:
! 6881: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6882: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6883: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6884:
! 6885: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6886:
! 6887: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6888: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6889: }
! 6890:
! 6891: static void dsp_macr_m_x0_y1_b(void)
! 6892: {
! 6893: Uint32 source[3], dest[3];
! 6894: Uint16 newsr;
! 6895:
! 6896: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 6897:
! 6898: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6899: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6900: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6901: newsr = dsp_add56(source, dest);
! 6902:
! 6903: dsp_rnd56(dest);
! 6904:
! 6905: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6906: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6907: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6908:
! 6909: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6910:
! 6911: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6912: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6913: }
! 6914:
! 6915: static void dsp_macr_p_y0_x0_a(void)
! 6916: {
! 6917: Uint32 source[3], dest[3];
! 6918: Uint16 newsr;
! 6919:
! 6920: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6921:
! 6922: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6923: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6924: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6925: newsr = dsp_add56(source, dest);
! 6926:
! 6927: dsp_rnd56(dest);
! 6928:
! 6929: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6930: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6931: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6932:
! 6933: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6934:
! 6935: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6936: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6937: }
! 6938:
! 6939: static void dsp_macr_m_y0_x0_a(void)
! 6940: {
! 6941: Uint32 source[3], dest[3];
! 6942: Uint16 newsr;
! 6943:
! 6944: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6945:
! 6946: dest[0] = dsp_core.registers[DSP_REG_A2];
! 6947: dest[1] = dsp_core.registers[DSP_REG_A1];
! 6948: dest[2] = dsp_core.registers[DSP_REG_A0];
! 6949: newsr = dsp_add56(source, dest);
! 6950:
! 6951: dsp_rnd56(dest);
! 6952:
! 6953: dsp_core.registers[DSP_REG_A2] = dest[0];
! 6954: dsp_core.registers[DSP_REG_A1] = dest[1];
! 6955: dsp_core.registers[DSP_REG_A0] = dest[2];
! 6956:
! 6957: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6958:
! 6959: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6960: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6961: }
! 6962:
! 6963: static void dsp_macr_p_y0_x0_b(void)
! 6964: {
! 6965: Uint32 source[3], dest[3];
! 6966: Uint16 newsr;
! 6967:
! 6968: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 6969:
! 6970: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6971: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6972: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6973: newsr = dsp_add56(source, dest);
! 6974:
! 6975: dsp_rnd56(dest);
! 6976:
! 6977: dsp_core.registers[DSP_REG_B2] = dest[0];
! 6978: dsp_core.registers[DSP_REG_B1] = dest[1];
! 6979: dsp_core.registers[DSP_REG_B0] = dest[2];
! 6980:
! 6981: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 6982:
! 6983: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 6984: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 6985: }
! 6986:
! 6987: static void dsp_macr_m_y0_x0_b(void)
! 6988: {
! 6989: Uint32 source[3], dest[3];
! 6990: Uint16 newsr;
! 6991:
! 6992: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 6993:
! 6994: dest[0] = dsp_core.registers[DSP_REG_B2];
! 6995: dest[1] = dsp_core.registers[DSP_REG_B1];
! 6996: dest[2] = dsp_core.registers[DSP_REG_B0];
! 6997: newsr = dsp_add56(source, dest);
! 6998:
! 6999: dsp_rnd56(dest);
! 7000:
! 7001: dsp_core.registers[DSP_REG_B2] = dest[0];
! 7002: dsp_core.registers[DSP_REG_B1] = dest[1];
! 7003: dsp_core.registers[DSP_REG_B0] = dest[2];
! 7004:
! 7005: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7006:
! 7007: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7008: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7009: }
! 7010:
! 7011: static void dsp_macr_p_x1_y0_a(void)
! 7012: {
! 7013: Uint32 source[3], dest[3];
! 7014: Uint16 newsr;
! 7015:
! 7016: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7017:
! 7018: dest[0] = dsp_core.registers[DSP_REG_A2];
! 7019: dest[1] = dsp_core.registers[DSP_REG_A1];
! 7020: dest[2] = dsp_core.registers[DSP_REG_A0];
! 7021: newsr = dsp_add56(source, dest);
! 7022:
! 7023: dsp_rnd56(dest);
! 7024:
! 7025: dsp_core.registers[DSP_REG_A2] = dest[0];
! 7026: dsp_core.registers[DSP_REG_A1] = dest[1];
! 7027: dsp_core.registers[DSP_REG_A0] = dest[2];
! 7028:
! 7029: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7030:
! 7031: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7032: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7033: }
! 7034:
! 7035: static void dsp_macr_m_x1_y0_a(void)
! 7036: {
! 7037: Uint32 source[3], dest[3];
! 7038: Uint16 newsr;
! 7039:
! 7040: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7041:
! 7042: dest[0] = dsp_core.registers[DSP_REG_A2];
! 7043: dest[1] = dsp_core.registers[DSP_REG_A1];
! 7044: dest[2] = dsp_core.registers[DSP_REG_A0];
! 7045: newsr = dsp_add56(source, dest);
! 7046:
! 7047: dsp_rnd56(dest);
! 7048:
! 7049: dsp_core.registers[DSP_REG_A2] = dest[0];
! 7050: dsp_core.registers[DSP_REG_A1] = dest[1];
! 7051: dsp_core.registers[DSP_REG_A0] = dest[2];
! 7052:
! 7053: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7054:
! 7055: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7056: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7057: }
! 7058:
! 7059: static void dsp_macr_p_x1_y0_b(void)
! 7060: {
! 7061: Uint32 source[3], dest[3];
! 7062: Uint16 newsr;
! 7063:
! 7064: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7065:
! 7066: dsp_rnd56(dest);
! 7067:
! 7068: dest[0] = dsp_core.registers[DSP_REG_B2];
! 7069: dest[1] = dsp_core.registers[DSP_REG_B1];
! 7070: dest[2] = dsp_core.registers[DSP_REG_B0];
! 7071: newsr = dsp_add56(source, dest);
! 7072:
! 7073: dsp_core.registers[DSP_REG_B2] = dest[0];
! 7074: dsp_core.registers[DSP_REG_B1] = dest[1];
! 7075: dsp_core.registers[DSP_REG_B0] = dest[2];
! 7076:
! 7077: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7078:
! 7079: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7080: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7081: }
! 7082:
! 7083: static void dsp_macr_m_x1_y0_b(void)
! 7084: {
! 7085: Uint32 source[3], dest[3];
! 7086: Uint16 newsr;
! 7087:
! 7088: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7089:
! 7090: dest[0] = dsp_core.registers[DSP_REG_B2];
! 7091: dest[1] = dsp_core.registers[DSP_REG_B1];
! 7092: dest[2] = dsp_core.registers[DSP_REG_B0];
! 7093: newsr = dsp_add56(source, dest);
! 7094:
! 7095: dsp_rnd56(dest);
! 7096:
! 7097: dsp_core.registers[DSP_REG_B2] = dest[0];
! 7098: dsp_core.registers[DSP_REG_B1] = dest[1];
! 7099: dsp_core.registers[DSP_REG_B0] = dest[2];
! 7100:
! 7101: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7102:
! 7103: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7104: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7105: }
! 7106:
! 7107: static void dsp_macr_p_y1_x1_a(void)
! 7108: {
! 7109: Uint32 source[3], dest[3];
! 7110: Uint16 newsr;
! 7111:
! 7112: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 7113:
! 7114: dest[0] = dsp_core.registers[DSP_REG_A2];
! 7115: dest[1] = dsp_core.registers[DSP_REG_A1];
! 7116: dest[2] = dsp_core.registers[DSP_REG_A0];
! 7117: newsr = dsp_add56(source, dest);
! 7118:
! 7119: dsp_rnd56(dest);
! 7120:
! 7121: dsp_core.registers[DSP_REG_A2] = dest[0];
! 7122: dsp_core.registers[DSP_REG_A1] = dest[1];
! 7123: dsp_core.registers[DSP_REG_A0] = dest[2];
! 7124:
! 7125: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7126:
! 7127: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7128: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7129: }
! 7130:
! 7131: static void dsp_macr_m_y1_x1_a(void)
! 7132: {
! 7133: Uint32 source[3], dest[3];
! 7134: Uint16 newsr;
! 7135:
! 7136: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 7137:
! 7138: dest[0] = dsp_core.registers[DSP_REG_A2];
! 7139: dest[1] = dsp_core.registers[DSP_REG_A1];
! 7140: dest[2] = dsp_core.registers[DSP_REG_A0];
! 7141: newsr = dsp_add56(source, dest);
! 7142:
! 7143: dsp_rnd56(dest);
! 7144:
! 7145: dsp_core.registers[DSP_REG_A2] = dest[0];
! 7146: dsp_core.registers[DSP_REG_A1] = dest[1];
! 7147: dsp_core.registers[DSP_REG_A0] = dest[2];
! 7148:
! 7149: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7150:
! 7151: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7152: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7153: }
! 7154:
! 7155: static void dsp_macr_p_y1_x1_b(void)
! 7156: {
! 7157: Uint32 source[3], dest[3];
! 7158: Uint16 newsr;
! 7159:
! 7160: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 7161:
! 7162: dest[0] = dsp_core.registers[DSP_REG_B2];
! 7163: dest[1] = dsp_core.registers[DSP_REG_B1];
! 7164: dest[2] = dsp_core.registers[DSP_REG_B0];
! 7165: newsr = dsp_add56(source, dest);
! 7166:
! 7167: dsp_rnd56(dest);
! 7168:
! 7169: dsp_core.registers[DSP_REG_B2] = dest[0];
! 7170: dsp_core.registers[DSP_REG_B1] = dest[1];
! 7171: dsp_core.registers[DSP_REG_B0] = dest[2];
! 7172:
! 7173: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7174:
! 7175: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7176: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7177: }
! 7178:
! 7179: static void dsp_macr_m_y1_x1_b(void)
! 7180: {
! 7181: Uint32 source[3], dest[3];
! 7182: Uint16 newsr;
! 7183:
! 7184: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 7185:
! 7186: dest[0] = dsp_core.registers[DSP_REG_B2];
! 7187: dest[1] = dsp_core.registers[DSP_REG_B1];
! 7188: dest[2] = dsp_core.registers[DSP_REG_B0];
! 7189: newsr = dsp_add56(source, dest);
! 7190:
! 7191: dsp_rnd56(dest);
! 7192:
! 7193: dsp_core.registers[DSP_REG_B2] = dest[0];
! 7194: dsp_core.registers[DSP_REG_B1] = dest[1];
! 7195: dsp_core.registers[DSP_REG_B0] = dest[2];
! 7196:
! 7197: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 7198:
! 7199: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7200: dsp_core.registers[DSP_REG_SR] |= newsr & 0xfe;
! 7201: }
! 7202:
! 7203:
! 7204: static void dsp_move(void)
! 7205: {
! 7206: /* move instruction inside alu opcodes
! 7207: taken care of by parallel move dispatcher */
! 7208: }
! 7209:
! 7210: static void dsp_mpy_p_x0_x0_a(void)
! 7211: {
! 7212: Uint32 source[3];
! 7213:
! 7214: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7215:
! 7216: dsp_core.registers[DSP_REG_A2] = source[0];
! 7217: dsp_core.registers[DSP_REG_A1] = source[1];
! 7218: dsp_core.registers[DSP_REG_A0] = source[2];
! 7219:
! 7220: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7221: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7222: }
! 7223:
! 7224: static void dsp_mpy_m_x0_x0_a(void)
! 7225: {
! 7226: Uint32 source[3];
! 7227:
! 7228: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7229:
! 7230: dsp_core.registers[DSP_REG_A2] = source[0];
! 7231: dsp_core.registers[DSP_REG_A1] = source[1];
! 7232: dsp_core.registers[DSP_REG_A0] = source[2];
! 7233:
! 7234: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7235: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7236: }
! 7237:
! 7238: static void dsp_mpy_p_x0_x0_b(void)
! 7239: {
! 7240: Uint32 source[3];
! 7241:
! 7242: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7243:
! 7244: dsp_core.registers[DSP_REG_B2] = source[0];
! 7245: dsp_core.registers[DSP_REG_B1] = source[1];
! 7246: dsp_core.registers[DSP_REG_B0] = source[2];
! 7247:
! 7248: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7249: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7250: }
! 7251:
! 7252: static void dsp_mpy_m_x0_x0_b(void)
! 7253: {
! 7254: Uint32 source[3];
! 7255:
! 7256:
! 7257: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7258:
! 7259: dsp_core.registers[DSP_REG_B2] = source[0];
! 7260: dsp_core.registers[DSP_REG_B1] = source[1];
! 7261: dsp_core.registers[DSP_REG_B0] = source[2];
! 7262:
! 7263: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7264: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7265: }
! 7266:
! 7267: static void dsp_mpy_p_y0_y0_a(void)
! 7268: {
! 7269: Uint32 source[3];
! 7270:
! 7271: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7272:
! 7273: dsp_core.registers[DSP_REG_A2] = source[0];
! 7274: dsp_core.registers[DSP_REG_A1] = source[1];
! 7275: dsp_core.registers[DSP_REG_A0] = source[2];
! 7276:
! 7277: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7278: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7279: }
! 7280:
! 7281: static void dsp_mpy_m_y0_y0_a(void)
! 7282: {
! 7283: Uint32 source[3];
! 7284:
! 7285: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7286:
! 7287: dsp_core.registers[DSP_REG_A2] = source[0];
! 7288: dsp_core.registers[DSP_REG_A1] = source[1];
! 7289: dsp_core.registers[DSP_REG_A0] = source[2];
! 7290:
! 7291: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7292: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7293: }
! 7294:
! 7295: static void dsp_mpy_p_y0_y0_b(void)
! 7296: {
! 7297: Uint32 source[3];
! 7298:
! 7299: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7300:
! 7301: dsp_core.registers[DSP_REG_B2] = source[0];
! 7302: dsp_core.registers[DSP_REG_B1] = source[1];
! 7303: dsp_core.registers[DSP_REG_B0] = source[2];
! 7304:
! 7305: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7306: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7307: }
! 7308:
! 7309: static void dsp_mpy_m_y0_y0_b(void)
! 7310: {
! 7311: Uint32 source[3];
! 7312:
! 7313: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7314:
! 7315: dsp_core.registers[DSP_REG_B2] = source[0];
! 7316: dsp_core.registers[DSP_REG_B1] = source[1];
! 7317: dsp_core.registers[DSP_REG_B0] = source[2];
! 7318:
! 7319: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7320: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7321: }
! 7322:
! 7323: static void dsp_mpy_p_x1_x0_a(void)
! 7324: {
! 7325: Uint32 source[3];
! 7326:
! 7327: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7328:
! 7329: dsp_core.registers[DSP_REG_A2] = source[0];
! 7330: dsp_core.registers[DSP_REG_A1] = source[1];
! 7331: dsp_core.registers[DSP_REG_A0] = source[2];
! 7332:
! 7333: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7334: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7335: }
! 7336:
! 7337: static void dsp_mpy_m_x1_x0_a(void)
! 7338: {
! 7339: Uint32 source[3];
! 7340:
! 7341: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7342:
! 7343: dsp_core.registers[DSP_REG_A2] = source[0];
! 7344: dsp_core.registers[DSP_REG_A1] = source[1];
! 7345: dsp_core.registers[DSP_REG_A0] = source[2];
! 7346:
! 7347: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7348: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7349: }
! 7350:
! 7351: static void dsp_mpy_p_x1_x0_b(void)
! 7352: {
! 7353: Uint32 source[3];
! 7354:
! 7355: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7356:
! 7357: dsp_core.registers[DSP_REG_B2] = source[0];
! 7358: dsp_core.registers[DSP_REG_B1] = source[1];
! 7359: dsp_core.registers[DSP_REG_B0] = source[2];
! 7360:
! 7361: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7362: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7363: }
! 7364:
! 7365: static void dsp_mpy_m_x1_x0_b(void)
! 7366: {
! 7367: Uint32 source[3];
! 7368:
! 7369: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7370:
! 7371: dsp_core.registers[DSP_REG_B2] = source[0];
! 7372: dsp_core.registers[DSP_REG_B1] = source[1];
! 7373: dsp_core.registers[DSP_REG_B0] = source[2];
! 7374:
! 7375: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7376: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7377: }
! 7378:
! 7379: static void dsp_mpy_p_y1_y0_a(void)
! 7380: {
! 7381: Uint32 source[3];
! 7382:
! 7383: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7384:
! 7385: dsp_core.registers[DSP_REG_A2] = source[0];
! 7386: dsp_core.registers[DSP_REG_A1] = source[1];
! 7387: dsp_core.registers[DSP_REG_A0] = source[2];
! 7388:
! 7389: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7390: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7391: }
! 7392:
! 7393: static void dsp_mpy_m_y1_y0_a(void)
! 7394: {
! 7395: Uint32 source[3];
! 7396:
! 7397: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7398:
! 7399: dsp_core.registers[DSP_REG_A2] = source[0];
! 7400: dsp_core.registers[DSP_REG_A1] = source[1];
! 7401: dsp_core.registers[DSP_REG_A0] = source[2];
! 7402:
! 7403: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7404: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7405: }
! 7406:
! 7407: static void dsp_mpy_p_y1_y0_b(void)
! 7408: {
! 7409: Uint32 source[3];
! 7410:
! 7411: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7412:
! 7413: dsp_core.registers[DSP_REG_B2] = source[0];
! 7414: dsp_core.registers[DSP_REG_B1] = source[1];
! 7415: dsp_core.registers[DSP_REG_B0] = source[2];
! 7416:
! 7417: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7418: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7419: }
! 7420:
! 7421: static void dsp_mpy_m_y1_y0_b(void)
! 7422: {
! 7423: Uint32 source[3];
! 7424:
! 7425: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7426:
! 7427: dsp_core.registers[DSP_REG_B2] = source[0];
! 7428: dsp_core.registers[DSP_REG_B1] = source[1];
! 7429: dsp_core.registers[DSP_REG_B0] = source[2];
! 7430:
! 7431: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7432: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7433: }
! 7434:
! 7435: static void dsp_mpy_p_x0_y1_a(void)
! 7436: {
! 7437: Uint32 source[3];
! 7438:
! 7439: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 7440:
! 7441: dsp_core.registers[DSP_REG_A2] = source[0];
! 7442: dsp_core.registers[DSP_REG_A1] = source[1];
! 7443: dsp_core.registers[DSP_REG_A0] = source[2];
! 7444:
! 7445: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7446: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7447: }
! 7448:
! 7449: static void dsp_mpy_m_x0_y1_a(void)
! 7450: {
! 7451: Uint32 source[3];
! 7452:
! 7453: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 7454:
! 7455: dsp_core.registers[DSP_REG_A2] = source[0];
! 7456: dsp_core.registers[DSP_REG_A1] = source[1];
! 7457: dsp_core.registers[DSP_REG_A0] = source[2];
! 7458:
! 7459: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7460: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7461: }
! 7462:
! 7463: static void dsp_mpy_p_x0_y1_b(void)
! 7464: {
! 7465: Uint32 source[3];
! 7466:
! 7467: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 7468:
! 7469: dsp_core.registers[DSP_REG_B2] = source[0];
! 7470: dsp_core.registers[DSP_REG_B1] = source[1];
! 7471: dsp_core.registers[DSP_REG_B0] = source[2];
! 7472:
! 7473: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7474: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7475: }
! 7476:
! 7477: static void dsp_mpy_m_x0_y1_b(void)
! 7478: {
! 7479: Uint32 source[3];
! 7480:
! 7481: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 7482:
! 7483: dsp_core.registers[DSP_REG_B2] = source[0];
! 7484: dsp_core.registers[DSP_REG_B1] = source[1];
! 7485: dsp_core.registers[DSP_REG_B0] = source[2];
! 7486:
! 7487: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7488: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7489: }
! 7490:
! 7491: static void dsp_mpy_p_y0_x0_a(void)
! 7492: {
! 7493: Uint32 source[3];
! 7494:
! 7495: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7496:
! 7497: dsp_core.registers[DSP_REG_A2] = source[0];
! 7498: dsp_core.registers[DSP_REG_A1] = source[1];
! 7499: dsp_core.registers[DSP_REG_A0] = source[2];
! 7500:
! 7501: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7502: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7503: }
! 7504:
! 7505: static void dsp_mpy_m_y0_x0_a(void)
! 7506: {
! 7507: Uint32 source[3];
! 7508:
! 7509: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7510:
! 7511: dsp_core.registers[DSP_REG_A2] = source[0];
! 7512: dsp_core.registers[DSP_REG_A1] = source[1];
! 7513: dsp_core.registers[DSP_REG_A0] = source[2];
! 7514:
! 7515: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7516: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7517: }
! 7518:
! 7519: static void dsp_mpy_p_y0_x0_b(void)
! 7520: {
! 7521: Uint32 source[3];
! 7522:
! 7523: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7524:
! 7525: dsp_core.registers[DSP_REG_B2] = source[0];
! 7526: dsp_core.registers[DSP_REG_B1] = source[1];
! 7527: dsp_core.registers[DSP_REG_B0] = source[2];
! 7528:
! 7529: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7530: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7531: }
! 7532:
! 7533: static void dsp_mpy_m_y0_x0_b(void)
! 7534: {
! 7535: Uint32 source[3];
! 7536:
! 7537: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7538:
! 7539: dsp_core.registers[DSP_REG_B2] = source[0];
! 7540: dsp_core.registers[DSP_REG_B1] = source[1];
! 7541: dsp_core.registers[DSP_REG_B0] = source[2];
! 7542:
! 7543: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7544: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7545: }
! 7546:
! 7547: static void dsp_mpy_p_x1_y0_a(void)
! 7548: {
! 7549: Uint32 source[3];
! 7550:
! 7551: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7552:
! 7553: dsp_core.registers[DSP_REG_A2] = source[0];
! 7554: dsp_core.registers[DSP_REG_A1] = source[1];
! 7555: dsp_core.registers[DSP_REG_A0] = source[2];
! 7556:
! 7557: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7558: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7559: }
! 7560:
! 7561: static void dsp_mpy_m_x1_y0_a(void)
! 7562: {
! 7563: Uint32 source[3];
! 7564:
! 7565: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7566:
! 7567: dsp_core.registers[DSP_REG_A2] = source[0];
! 7568: dsp_core.registers[DSP_REG_A1] = source[1];
! 7569: dsp_core.registers[DSP_REG_A0] = source[2];
! 7570:
! 7571: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7572: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7573: }
! 7574:
! 7575: static void dsp_mpy_p_x1_y0_b(void)
! 7576: {
! 7577: Uint32 source[3];
! 7578:
! 7579: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7580:
! 7581: dsp_core.registers[DSP_REG_B2] = source[0];
! 7582: dsp_core.registers[DSP_REG_B1] = source[1];
! 7583: dsp_core.registers[DSP_REG_B0] = source[2];
! 7584:
! 7585: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7586: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7587: }
! 7588:
! 7589: static void dsp_mpy_m_x1_y0_b(void)
! 7590: {
! 7591: Uint32 source[3];
! 7592:
! 7593: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7594:
! 7595: dsp_core.registers[DSP_REG_B2] = source[0];
! 7596: dsp_core.registers[DSP_REG_B1] = source[1];
! 7597: dsp_core.registers[DSP_REG_B0] = source[2];
! 7598:
! 7599: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7600: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7601: }
! 7602:
! 7603: static void dsp_mpy_p_y1_x1_a(void)
! 7604: {
! 7605: Uint32 source[3];
! 7606:
! 7607: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 7608:
! 7609: dsp_core.registers[DSP_REG_A2] = source[0];
! 7610: dsp_core.registers[DSP_REG_A1] = source[1];
! 7611: dsp_core.registers[DSP_REG_A0] = source[2];
! 7612:
! 7613: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7614: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7615: }
! 7616:
! 7617: static void dsp_mpy_m_y1_x1_a(void)
! 7618: {
! 7619: Uint32 source[3];
! 7620:
! 7621: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 7622:
! 7623: dsp_core.registers[DSP_REG_A2] = source[0];
! 7624: dsp_core.registers[DSP_REG_A1] = source[1];
! 7625: dsp_core.registers[DSP_REG_A0] = source[2];
! 7626:
! 7627: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7628: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7629: }
! 7630:
! 7631: static void dsp_mpy_p_y1_x1_b(void)
! 7632: {
! 7633: Uint32 source[3];
! 7634:
! 7635: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 7636:
! 7637: dsp_core.registers[DSP_REG_B2] = source[0];
! 7638: dsp_core.registers[DSP_REG_B1] = source[1];
! 7639: dsp_core.registers[DSP_REG_B0] = source[2];
! 7640:
! 7641: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7642: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7643: }
! 7644:
! 7645: static void dsp_mpy_m_y1_x1_b(void)
! 7646: {
! 7647: Uint32 source[3];
! 7648:
! 7649: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 7650:
! 7651: dsp_core.registers[DSP_REG_B2] = source[0];
! 7652: dsp_core.registers[DSP_REG_B1] = source[1];
! 7653: dsp_core.registers[DSP_REG_B0] = source[2];
! 7654:
! 7655: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7656: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7657: }
! 7658:
! 7659: static void dsp_mpyr_p_x0_x0_a(void)
! 7660: {
! 7661: Uint32 source[3];
! 7662:
! 7663: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7664: dsp_rnd56(source);
! 7665:
! 7666: dsp_core.registers[DSP_REG_A2] = source[0];
! 7667: dsp_core.registers[DSP_REG_A1] = source[1];
! 7668: dsp_core.registers[DSP_REG_A0] = source[2];
! 7669:
! 7670: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7671: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7672: }
! 7673:
! 7674: static void dsp_mpyr_m_x0_x0_a(void)
! 7675: {
! 7676: Uint32 source[3];
! 7677:
! 7678: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7679: dsp_rnd56(source);
! 7680:
! 7681: dsp_core.registers[DSP_REG_A2] = source[0];
! 7682: dsp_core.registers[DSP_REG_A1] = source[1];
! 7683: dsp_core.registers[DSP_REG_A0] = source[2];
! 7684:
! 7685: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7686: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7687: }
! 7688:
! 7689: static void dsp_mpyr_p_x0_x0_b(void)
! 7690: {
! 7691: Uint32 source[3];
! 7692:
! 7693: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7694: dsp_rnd56(source);
! 7695:
! 7696: dsp_core.registers[DSP_REG_B2] = source[0];
! 7697: dsp_core.registers[DSP_REG_B1] = source[1];
! 7698: dsp_core.registers[DSP_REG_B0] = source[2];
! 7699:
! 7700: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7701: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7702: }
! 7703:
! 7704: static void dsp_mpyr_m_x0_x0_b(void)
! 7705: {
! 7706: Uint32 source[3];
! 7707:
! 7708:
! 7709: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7710: dsp_rnd56(source);
! 7711:
! 7712: dsp_core.registers[DSP_REG_B2] = source[0];
! 7713: dsp_core.registers[DSP_REG_B1] = source[1];
! 7714: dsp_core.registers[DSP_REG_B0] = source[2];
! 7715:
! 7716: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7717: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7718: }
! 7719:
! 7720: static void dsp_mpyr_p_y0_y0_a(void)
! 7721: {
! 7722: Uint32 source[3];
! 7723:
! 7724: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7725: dsp_rnd56(source);
! 7726:
! 7727: dsp_core.registers[DSP_REG_A2] = source[0];
! 7728: dsp_core.registers[DSP_REG_A1] = source[1];
! 7729: dsp_core.registers[DSP_REG_A0] = source[2];
! 7730:
! 7731: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7732: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7733: }
! 7734:
! 7735: static void dsp_mpyr_m_y0_y0_a(void)
! 7736: {
! 7737: Uint32 source[3];
! 7738:
! 7739: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7740: dsp_rnd56(source);
! 7741:
! 7742: dsp_core.registers[DSP_REG_A2] = source[0];
! 7743: dsp_core.registers[DSP_REG_A1] = source[1];
! 7744: dsp_core.registers[DSP_REG_A0] = source[2];
! 7745:
! 7746: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7747: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7748: }
! 7749:
! 7750: static void dsp_mpyr_p_y0_y0_b(void)
! 7751: {
! 7752: Uint32 source[3];
! 7753:
! 7754: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7755: dsp_rnd56(source);
! 7756:
! 7757: dsp_core.registers[DSP_REG_B2] = source[0];
! 7758: dsp_core.registers[DSP_REG_B1] = source[1];
! 7759: dsp_core.registers[DSP_REG_B0] = source[2];
! 7760:
! 7761: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7762: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7763: }
! 7764:
! 7765: static void dsp_mpyr_m_y0_y0_b(void)
! 7766: {
! 7767: Uint32 source[3];
! 7768:
! 7769: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7770: dsp_rnd56(source);
! 7771:
! 7772: dsp_core.registers[DSP_REG_B2] = source[0];
! 7773: dsp_core.registers[DSP_REG_B1] = source[1];
! 7774: dsp_core.registers[DSP_REG_B0] = source[2];
! 7775:
! 7776: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7777: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7778: }
! 7779:
! 7780: static void dsp_mpyr_p_x1_x0_a(void)
! 7781: {
! 7782: Uint32 source[3];
! 7783:
! 7784: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7785: dsp_rnd56(source);
! 7786:
! 7787: dsp_core.registers[DSP_REG_A2] = source[0];
! 7788: dsp_core.registers[DSP_REG_A1] = source[1];
! 7789: dsp_core.registers[DSP_REG_A0] = source[2];
! 7790:
! 7791: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7792: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7793: }
! 7794:
! 7795: static void dsp_mpyr_m_x1_x0_a(void)
! 7796: {
! 7797: Uint32 source[3];
! 7798:
! 7799: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7800: dsp_rnd56(source);
! 7801:
! 7802: dsp_core.registers[DSP_REG_A2] = source[0];
! 7803: dsp_core.registers[DSP_REG_A1] = source[1];
! 7804: dsp_core.registers[DSP_REG_A0] = source[2];
! 7805:
! 7806: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7807: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7808: }
! 7809:
! 7810: static void dsp_mpyr_p_x1_x0_b(void)
! 7811: {
! 7812: Uint32 source[3];
! 7813:
! 7814: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7815: dsp_rnd56(source);
! 7816:
! 7817: dsp_core.registers[DSP_REG_B2] = source[0];
! 7818: dsp_core.registers[DSP_REG_B1] = source[1];
! 7819: dsp_core.registers[DSP_REG_B0] = source[2];
! 7820:
! 7821: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7822: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7823: }
! 7824:
! 7825: static void dsp_mpyr_m_x1_x0_b(void)
! 7826: {
! 7827: Uint32 source[3];
! 7828:
! 7829: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7830: dsp_rnd56(source);
! 7831:
! 7832: dsp_core.registers[DSP_REG_B2] = source[0];
! 7833: dsp_core.registers[DSP_REG_B1] = source[1];
! 7834: dsp_core.registers[DSP_REG_B0] = source[2];
! 7835:
! 7836: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7837: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7838: }
! 7839:
! 7840: static void dsp_mpyr_p_y1_y0_a(void)
! 7841: {
! 7842: Uint32 source[3];
! 7843:
! 7844: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7845: dsp_rnd56(source);
! 7846:
! 7847: dsp_core.registers[DSP_REG_A2] = source[0];
! 7848: dsp_core.registers[DSP_REG_A1] = source[1];
! 7849: dsp_core.registers[DSP_REG_A0] = source[2];
! 7850:
! 7851: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7852: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7853: }
! 7854:
! 7855: static void dsp_mpyr_m_y1_y0_a(void)
! 7856: {
! 7857: Uint32 source[3];
! 7858:
! 7859: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7860: dsp_rnd56(source);
! 7861:
! 7862: dsp_core.registers[DSP_REG_A2] = source[0];
! 7863: dsp_core.registers[DSP_REG_A1] = source[1];
! 7864: dsp_core.registers[DSP_REG_A0] = source[2];
! 7865:
! 7866: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7867: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7868: }
! 7869:
! 7870: static void dsp_mpyr_p_y1_y0_b(void)
! 7871: {
! 7872: Uint32 source[3];
! 7873:
! 7874: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 7875: dsp_rnd56(source);
! 7876:
! 7877: dsp_core.registers[DSP_REG_B2] = source[0];
! 7878: dsp_core.registers[DSP_REG_B1] = source[1];
! 7879: dsp_core.registers[DSP_REG_B0] = source[2];
! 7880:
! 7881: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7882: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7883: }
! 7884:
! 7885: static void dsp_mpyr_m_y1_y0_b(void)
! 7886: {
! 7887: Uint32 source[3];
! 7888:
! 7889: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 7890: dsp_rnd56(source);
! 7891:
! 7892: dsp_core.registers[DSP_REG_B2] = source[0];
! 7893: dsp_core.registers[DSP_REG_B1] = source[1];
! 7894: dsp_core.registers[DSP_REG_B0] = source[2];
! 7895:
! 7896: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7897: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7898: }
! 7899:
! 7900: static void dsp_mpyr_p_x0_y1_a(void)
! 7901: {
! 7902: Uint32 source[3];
! 7903:
! 7904: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 7905: dsp_rnd56(source);
! 7906:
! 7907: dsp_core.registers[DSP_REG_A2] = source[0];
! 7908: dsp_core.registers[DSP_REG_A1] = source[1];
! 7909: dsp_core.registers[DSP_REG_A0] = source[2];
! 7910:
! 7911: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7912: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7913: }
! 7914:
! 7915: static void dsp_mpyr_m_x0_y1_a(void)
! 7916: {
! 7917: Uint32 source[3];
! 7918:
! 7919: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 7920: dsp_rnd56(source);
! 7921:
! 7922: dsp_core.registers[DSP_REG_A2] = source[0];
! 7923: dsp_core.registers[DSP_REG_A1] = source[1];
! 7924: dsp_core.registers[DSP_REG_A0] = source[2];
! 7925:
! 7926: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7927: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7928: }
! 7929:
! 7930: static void dsp_mpyr_p_x0_y1_b(void)
! 7931: {
! 7932: Uint32 source[3];
! 7933:
! 7934: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_PLUS);
! 7935: dsp_rnd56(source);
! 7936:
! 7937: dsp_core.registers[DSP_REG_B2] = source[0];
! 7938: dsp_core.registers[DSP_REG_B1] = source[1];
! 7939: dsp_core.registers[DSP_REG_B0] = source[2];
! 7940:
! 7941: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7942: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7943: }
! 7944:
! 7945: static void dsp_mpyr_m_x0_y1_b(void)
! 7946: {
! 7947: Uint32 source[3];
! 7948:
! 7949: dsp_mul56(dsp_core.registers[DSP_REG_X0], dsp_core.registers[DSP_REG_Y1], source, SIGN_MINUS);
! 7950: dsp_rnd56(source);
! 7951:
! 7952: dsp_core.registers[DSP_REG_B2] = source[0];
! 7953: dsp_core.registers[DSP_REG_B1] = source[1];
! 7954: dsp_core.registers[DSP_REG_B0] = source[2];
! 7955:
! 7956: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7957: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7958: }
! 7959:
! 7960: static void dsp_mpyr_p_y0_x0_a(void)
! 7961: {
! 7962: Uint32 source[3];
! 7963:
! 7964: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7965: dsp_rnd56(source);
! 7966:
! 7967: dsp_core.registers[DSP_REG_A2] = source[0];
! 7968: dsp_core.registers[DSP_REG_A1] = source[1];
! 7969: dsp_core.registers[DSP_REG_A0] = source[2];
! 7970:
! 7971: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7972: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7973: }
! 7974:
! 7975: static void dsp_mpyr_m_y0_x0_a(void)
! 7976: {
! 7977: Uint32 source[3];
! 7978:
! 7979: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 7980: dsp_rnd56(source);
! 7981:
! 7982: dsp_core.registers[DSP_REG_A2] = source[0];
! 7983: dsp_core.registers[DSP_REG_A1] = source[1];
! 7984: dsp_core.registers[DSP_REG_A0] = source[2];
! 7985:
! 7986: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 7987: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 7988: }
! 7989:
! 7990: static void dsp_mpyr_p_y0_x0_b(void)
! 7991: {
! 7992: Uint32 source[3];
! 7993:
! 7994: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_PLUS);
! 7995: dsp_rnd56(source);
! 7996:
! 7997: dsp_core.registers[DSP_REG_B2] = source[0];
! 7998: dsp_core.registers[DSP_REG_B1] = source[1];
! 7999: dsp_core.registers[DSP_REG_B0] = source[2];
! 8000:
! 8001: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8002: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8003: }
! 8004:
! 8005: static void dsp_mpyr_m_y0_x0_b(void)
! 8006: {
! 8007: Uint32 source[3];
! 8008:
! 8009: dsp_mul56(dsp_core.registers[DSP_REG_Y0], dsp_core.registers[DSP_REG_X0], source, SIGN_MINUS);
! 8010: dsp_rnd56(source);
! 8011:
! 8012: dsp_core.registers[DSP_REG_B2] = source[0];
! 8013: dsp_core.registers[DSP_REG_B1] = source[1];
! 8014: dsp_core.registers[DSP_REG_B0] = source[2];
! 8015:
! 8016: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8017: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8018: }
! 8019:
! 8020: static void dsp_mpyr_p_x1_y0_a(void)
! 8021: {
! 8022: Uint32 source[3];
! 8023:
! 8024: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 8025: dsp_rnd56(source);
! 8026:
! 8027: dsp_core.registers[DSP_REG_A2] = source[0];
! 8028: dsp_core.registers[DSP_REG_A1] = source[1];
! 8029: dsp_core.registers[DSP_REG_A0] = source[2];
! 8030:
! 8031: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8032: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8033: }
! 8034:
! 8035: static void dsp_mpyr_m_x1_y0_a(void)
! 8036: {
! 8037: Uint32 source[3];
! 8038:
! 8039: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 8040: dsp_rnd56(source);
! 8041:
! 8042: dsp_core.registers[DSP_REG_A2] = source[0];
! 8043: dsp_core.registers[DSP_REG_A1] = source[1];
! 8044: dsp_core.registers[DSP_REG_A0] = source[2];
! 8045:
! 8046: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8047: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8048: }
! 8049:
! 8050: static void dsp_mpyr_p_x1_y0_b(void)
! 8051: {
! 8052: Uint32 source[3];
! 8053:
! 8054: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_PLUS);
! 8055: dsp_rnd56(source);
! 8056:
! 8057: dsp_core.registers[DSP_REG_B2] = source[0];
! 8058: dsp_core.registers[DSP_REG_B1] = source[1];
! 8059: dsp_core.registers[DSP_REG_B0] = source[2];
! 8060:
! 8061: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8062: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8063: }
! 8064:
! 8065: static void dsp_mpyr_m_x1_y0_b(void)
! 8066: {
! 8067: Uint32 source[3];
! 8068:
! 8069: dsp_mul56(dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_Y0], source, SIGN_MINUS);
! 8070: dsp_rnd56(source);
! 8071:
! 8072: dsp_core.registers[DSP_REG_B2] = source[0];
! 8073: dsp_core.registers[DSP_REG_B1] = source[1];
! 8074: dsp_core.registers[DSP_REG_B0] = source[2];
! 8075:
! 8076: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8077: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8078: }
! 8079:
! 8080: static void dsp_mpyr_p_y1_x1_a(void)
! 8081: {
! 8082: Uint32 source[3];
! 8083:
! 8084: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 8085: dsp_rnd56(source);
! 8086:
! 8087: dsp_core.registers[DSP_REG_A2] = source[0];
! 8088: dsp_core.registers[DSP_REG_A1] = source[1];
! 8089: dsp_core.registers[DSP_REG_A0] = source[2];
! 8090:
! 8091: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8092: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8093: }
! 8094:
! 8095: static void dsp_mpyr_m_y1_x1_a(void)
! 8096: {
! 8097: Uint32 source[3];
! 8098:
! 8099: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 8100: dsp_rnd56(source);
! 8101:
! 8102: dsp_core.registers[DSP_REG_A2] = source[0];
! 8103: dsp_core.registers[DSP_REG_A1] = source[1];
! 8104: dsp_core.registers[DSP_REG_A0] = source[2];
! 8105:
! 8106: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8107: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8108: }
! 8109:
! 8110: static void dsp_mpyr_p_y1_x1_b(void)
! 8111: {
! 8112: Uint32 source[3];
! 8113:
! 8114: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_PLUS);
! 8115: dsp_rnd56(source);
! 8116:
! 8117: dsp_core.registers[DSP_REG_B2] = source[0];
! 8118: dsp_core.registers[DSP_REG_B1] = source[1];
! 8119: dsp_core.registers[DSP_REG_B0] = source[2];
! 8120:
! 8121: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8122: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8123: }
! 8124:
! 8125: static void dsp_mpyr_m_y1_x1_b(void)
! 8126: {
! 8127: Uint32 source[3];
! 8128:
! 8129: dsp_mul56(dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_X1], source, SIGN_MINUS);
! 8130: dsp_rnd56(source);
! 8131:
! 8132: dsp_core.registers[DSP_REG_B2] = source[0];
! 8133: dsp_core.registers[DSP_REG_B1] = source[1];
! 8134: dsp_core.registers[DSP_REG_B0] = source[2];
! 8135:
! 8136: dsp_ccr_update_e_u_n_z(source[0], source[1], source[2]);
! 8137: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8138: }
! 8139:
! 8140: static void dsp_neg_a(void)
! 8141: {
! 8142: Uint32 source[3], dest[3], overflowed;
! 8143:
! 8144: source[0] = dsp_core.registers[DSP_REG_A2];
! 8145: source[1] = dsp_core.registers[DSP_REG_A1];
! 8146: source[2] = dsp_core.registers[DSP_REG_A0];
! 8147:
! 8148: overflowed = ((source[2]==0) && (source[1]==0) && (source[0]==0x80));
! 8149:
! 8150: dest[0] = dest[1] = dest[2] = 0;
! 8151:
! 8152: dsp_sub56(source, dest);
! 8153:
! 8154: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8155: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8156: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8157:
! 8158: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8159: dsp_core.registers[DSP_REG_SR] |= (overflowed<<DSP_SR_L)|(overflowed<<DSP_SR_V);
! 8160:
! 8161: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8162: }
! 8163:
! 8164: static void dsp_neg_b(void)
! 8165: {
! 8166: Uint32 source[3], dest[3], overflowed;
! 8167:
! 8168: source[0] = dsp_core.registers[DSP_REG_B2];
! 8169: source[1] = dsp_core.registers[DSP_REG_B1];
! 8170: source[2] = dsp_core.registers[DSP_REG_B0];
! 8171:
! 8172: overflowed = ((source[2]==0) && (source[1]==0) && (source[0]==0x80));
! 8173:
! 8174: dest[0] = dest[1] = dest[2] = 0;
! 8175:
! 8176: dsp_sub56(source, dest);
! 8177:
! 8178: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8179: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8180: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8181:
! 8182: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 8183: dsp_core.registers[DSP_REG_SR] |= (overflowed<<DSP_SR_L)|(overflowed<<DSP_SR_V);
! 8184:
! 8185: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8186: }
! 8187:
! 8188: static void dsp_nop(void)
! 8189: {
! 8190: }
! 8191:
! 8192: static void dsp_not_a(void)
! 8193: {
! 8194: dsp_core.registers[DSP_REG_A1] = ~dsp_core.registers[DSP_REG_A1];
! 8195: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 8196:
! 8197: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8198: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 8199: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 8200: }
! 8201:
! 8202: static void dsp_not_b(void)
! 8203: {
! 8204: dsp_core.registers[DSP_REG_B1] = ~dsp_core.registers[DSP_REG_B1];
! 8205: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 8206:
! 8207: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8208: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 8209: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 8210: }
! 8211:
! 8212: static void dsp_or_x0_a(void)
! 8213: {
! 8214: dsp_core.registers[DSP_REG_A1] |= dsp_core.registers[DSP_REG_X0];
! 8215: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 8216:
! 8217: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8218: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 8219: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 8220: }
! 8221:
! 8222: static void dsp_or_x0_b(void)
! 8223: {
! 8224: dsp_core.registers[DSP_REG_B1] |= dsp_core.registers[DSP_REG_X0];
! 8225: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 8226:
! 8227: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8228: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 8229: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 8230: }
! 8231:
! 8232: static void dsp_or_y0_a(void)
! 8233: {
! 8234: dsp_core.registers[DSP_REG_A1] |= dsp_core.registers[DSP_REG_Y0];
! 8235: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 8236:
! 8237: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8238: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 8239: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 8240: }
! 8241:
! 8242: static void dsp_or_y0_b(void)
! 8243: {
! 8244: dsp_core.registers[DSP_REG_B1] |= dsp_core.registers[DSP_REG_Y0];
! 8245: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 8246:
! 8247: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8248: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 8249: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 8250: }
! 8251:
! 8252: static void dsp_or_x1_a(void)
! 8253: {
! 8254: dsp_core.registers[DSP_REG_A1] |= dsp_core.registers[DSP_REG_X1];
! 8255: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 8256:
! 8257: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8258: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 8259: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 8260: }
! 8261:
! 8262: static void dsp_or_x1_b(void)
! 8263: {
! 8264: dsp_core.registers[DSP_REG_B1] |= dsp_core.registers[DSP_REG_X1];
! 8265: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 8266:
! 8267: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8268: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 8269: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 8270: }
! 8271:
! 8272: static void dsp_or_y1_a(void)
! 8273: {
! 8274: dsp_core.registers[DSP_REG_A1] |= dsp_core.registers[DSP_REG_Y1];
! 8275: dsp_core.registers[DSP_REG_A1] &= BITMASK(24); /* FIXME: useless ? */
! 8276:
! 8277: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8278: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 8279: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 8280: }
! 8281:
! 8282: static void dsp_or_y1_b(void)
! 8283: {
! 8284: dsp_core.registers[DSP_REG_B1] |= dsp_core.registers[DSP_REG_Y1];
! 8285: dsp_core.registers[DSP_REG_B1] &= BITMASK(24); /* FIXME: useless ? */
! 8286:
! 8287: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8288: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 8289: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 8290: }
! 8291:
! 8292: static void dsp_rnd_a(void)
! 8293: {
! 8294: Uint32 dest[3];
! 8295:
! 8296: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8297: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8298: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8299:
! 8300: dsp_rnd56(dest);
! 8301:
! 8302: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8303: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8304: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8305:
! 8306: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8307: }
! 8308:
! 8309: static void dsp_rnd_b(void)
! 8310: {
! 8311: Uint32 dest[3];
! 8312:
! 8313: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8314: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8315: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8316:
! 8317: dsp_rnd56(dest);
! 8318:
! 8319: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8320: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8321: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8322:
! 8323: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8324: }
! 8325:
! 8326: static void dsp_rol_a(void)
! 8327: {
! 8328: Uint32 newcarry;
! 8329:
! 8330: newcarry = (dsp_core.registers[DSP_REG_A1]>>23) & 1;
! 8331:
! 8332: dsp_core.registers[DSP_REG_A1] <<= 1;
! 8333: dsp_core.registers[DSP_REG_A1] |= newcarry;
! 8334: dsp_core.registers[DSP_REG_A1] &= BITMASK(24);
! 8335:
! 8336: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8337: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 8338: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_A1]>>23) & 1)<<DSP_SR_N;
! 8339: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 8340: }
! 8341:
! 8342: static void dsp_rol_b(void)
! 8343: {
! 8344: Uint32 newcarry;
! 8345:
! 8346: newcarry = (dsp_core.registers[DSP_REG_B1]>>23) & 1;
! 8347:
! 8348: dsp_core.registers[DSP_REG_B1] <<= 1;
! 8349: dsp_core.registers[DSP_REG_B1] |= newcarry;
! 8350: dsp_core.registers[DSP_REG_B1] &= BITMASK(24);
! 8351:
! 8352: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8353: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 8354: dsp_core.registers[DSP_REG_SR] |= ((dsp_core.registers[DSP_REG_B1]>>23) & 1)<<DSP_SR_N;
! 8355: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 8356: }
! 8357:
! 8358: static void dsp_ror_a(void)
! 8359: {
! 8360: Uint32 newcarry;
! 8361:
! 8362: newcarry = dsp_core.registers[DSP_REG_A1] & 1;
! 8363:
! 8364: dsp_core.registers[DSP_REG_A1] >>= 1;
! 8365: dsp_core.registers[DSP_REG_A1] |= newcarry<<23;
! 8366:
! 8367: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8368: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 8369: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_N;
! 8370: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_A1]==0)<<DSP_SR_Z;
! 8371: }
! 8372:
! 8373: static void dsp_ror_b(void)
! 8374: {
! 8375: Uint32 newcarry;
! 8376:
! 8377: newcarry = dsp_core.registers[DSP_REG_B1] & 1;
! 8378:
! 8379: dsp_core.registers[DSP_REG_B1] >>= 1;
! 8380: dsp_core.registers[DSP_REG_B1] |= newcarry<<23;
! 8381:
! 8382: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_C)|(1<<DSP_SR_N)|(1<<DSP_SR_Z)|(1<<DSP_SR_V));
! 8383: dsp_core.registers[DSP_REG_SR] |= newcarry;
! 8384: dsp_core.registers[DSP_REG_SR] |= newcarry<<DSP_SR_N;
! 8385: dsp_core.registers[DSP_REG_SR] |= (dsp_core.registers[DSP_REG_B1]==0)<<DSP_SR_Z;
! 8386: }
! 8387:
! 8388: static void dsp_sbc_x_a(void)
! 8389: {
! 8390: Uint32 source[3], dest[3], curcarry;
! 8391: Uint16 newsr;
! 8392:
! 8393: curcarry = (dsp_core.registers[DSP_REG_SR]>>(DSP_SR_C)) & 1;
! 8394:
! 8395: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8396: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8397: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8398:
! 8399: source[2] = dsp_core.registers[DSP_REG_X0];
! 8400: source[1] = dsp_core.registers[DSP_REG_X1];
! 8401: if (source[1] & (1<<23))
! 8402: source[0] = 0xff;
! 8403: else
! 8404: source[0] = 0x0;
! 8405:
! 8406: newsr = dsp_sub56(source, dest);
! 8407:
! 8408: if (curcarry) {
! 8409: source[0]=0; source[1]=0; source[2]=1;
! 8410: newsr |= dsp_sub56(source, dest);
! 8411: }
! 8412:
! 8413: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8414: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8415: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8416:
! 8417: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8418:
! 8419: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8420: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8421: }
! 8422:
! 8423: static void dsp_sbc_x_b(void)
! 8424: {
! 8425: Uint32 source[3], dest[3], curcarry;
! 8426: Uint16 newsr;
! 8427:
! 8428: curcarry = (dsp_core.registers[DSP_REG_SR]>>(DSP_SR_C)) & 1;
! 8429:
! 8430: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8431: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8432: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8433:
! 8434: source[2] = dsp_core.registers[DSP_REG_X0];
! 8435: source[1] = dsp_core.registers[DSP_REG_X1];
! 8436: if (source[1] & (1<<23))
! 8437: source[0] = 0xff;
! 8438: else
! 8439: source[0] = 0x0;
! 8440:
! 8441: newsr = dsp_sub56(source, dest);
! 8442:
! 8443: if (curcarry) {
! 8444: source[0]=0; source[1]=0; source[2]=1;
! 8445: newsr |= dsp_sub56(source, dest);
! 8446: }
! 8447:
! 8448: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8449: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8450: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8451:
! 8452: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8453:
! 8454: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8455: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8456: }
! 8457:
! 8458: static void dsp_sbc_y_a(void)
! 8459: {
! 8460: Uint32 source[3], dest[3], curcarry;
1.1.1.2 root 8461: Uint16 newsr;
1.1 root 8462:
1.1.1.6 ! root 8463: curcarry = (dsp_core.registers[DSP_REG_SR]>>(DSP_SR_C)) & 1;
! 8464:
! 8465: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8466: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8467: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8468:
! 8469: source[2] = dsp_core.registers[DSP_REG_Y0];
! 8470: source[1] = dsp_core.registers[DSP_REG_Y1];
! 8471: if (source[1] & (1<<23))
! 8472: source[0] = 0xff;
! 8473: else
! 8474: source[0] = 0x0;
! 8475:
! 8476: newsr = dsp_sub56(source, dest);
! 8477:
! 8478: if (curcarry) {
! 8479: source[0]=0; source[1]=0; source[2]=1;
! 8480: newsr |= dsp_sub56(source, dest);
! 8481: }
! 8482:
! 8483: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8484: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8485: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8486:
! 8487: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8488:
! 8489: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8490: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8491: }
! 8492:
! 8493: static void dsp_sbc_y_b(void)
! 8494: {
! 8495: Uint32 source[3], dest[3], curcarry;
! 8496: Uint16 newsr;
! 8497:
! 8498: curcarry = (dsp_core.registers[DSP_REG_SR]>>(DSP_SR_C)) & 1;
! 8499:
! 8500: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8501: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8502: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8503:
! 8504: source[2] = dsp_core.registers[DSP_REG_Y0];
! 8505: source[1] = dsp_core.registers[DSP_REG_Y1];
! 8506: if (source[1] & (1<<23))
! 8507: source[0] = 0xff;
! 8508: else
! 8509: source[0] = 0x0;
! 8510:
! 8511: newsr = dsp_sub56(source, dest);
! 8512:
! 8513: if (curcarry) {
! 8514: source[0]=0; source[1]=0; source[2]=1;
! 8515: newsr |= dsp_sub56(source, dest);
1.1 root 8516: }
8517:
1.1.1.6 ! root 8518: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8519: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8520: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8521:
! 8522: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8523:
! 8524: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8525: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8526: }
! 8527:
! 8528: static void dsp_sub_b_a(void)
! 8529: {
! 8530: Uint32 source[3], dest[3];
! 8531: Uint16 newsr;
! 8532:
! 8533: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8534: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8535: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8536:
! 8537: source[2] = dsp_core.registers[DSP_REG_B0];
! 8538: source[1] = dsp_core.registers[DSP_REG_B1];
! 8539: source[0] = dsp_core.registers[DSP_REG_B2];
! 8540:
1.1 root 8541: newsr = dsp_sub56(source, dest);
8542:
1.1.1.6 ! root 8543: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8544: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8545: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1.1.2 root 8546:
1.1.1.6 ! root 8547: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 8548:
1.1.1.6 ! root 8549: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8550: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 8551: }
8552:
1.1.1.6 ! root 8553: static void dsp_sub_a_b(void)
1.1 root 8554: {
1.1.1.6 ! root 8555: Uint32 source[3], dest[3];
1.1.1.2 root 8556: Uint16 newsr;
1.1 root 8557:
1.1.1.6 ! root 8558: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8559: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8560: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8561:
! 8562: source[2] = dsp_core.registers[DSP_REG_A0];
! 8563: source[1] = dsp_core.registers[DSP_REG_A1];
! 8564: source[0] = dsp_core.registers[DSP_REG_A2];
! 8565:
! 8566: newsr = dsp_sub56(source, dest);
! 8567:
! 8568: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8569: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8570: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8571:
! 8572: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8573:
! 8574: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8575: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8576: }
! 8577:
! 8578: static void dsp_sub_x_a(void)
! 8579: {
! 8580: Uint32 source[3], dest[3];
! 8581: Uint16 newsr;
! 8582:
! 8583: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8584: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8585: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8586:
! 8587: source[2] = dsp_core.registers[DSP_REG_X0];
! 8588: source[1] = dsp_core.registers[DSP_REG_X1];
! 8589: if (source[1] & (1<<23))
! 8590: source[0] = 0xff;
! 8591: else
! 8592: source[0] = 0x0;
! 8593:
! 8594:
! 8595: newsr = dsp_sub56(source, dest);
! 8596:
! 8597: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8598: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8599: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8600:
! 8601: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8602:
! 8603: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8604: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8605: }
! 8606:
! 8607: static void dsp_sub_x_b(void)
! 8608: {
! 8609: Uint32 source[3], dest[3];
! 8610: Uint16 newsr;
! 8611:
! 8612: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8613: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8614: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8615:
! 8616: source[2] = dsp_core.registers[DSP_REG_X0];
! 8617: source[1] = dsp_core.registers[DSP_REG_X1];
! 8618: if (source[1] & (1<<23))
! 8619: source[0] = 0xff;
! 8620: else
! 8621: source[0] = 0x0;
! 8622:
! 8623:
! 8624: newsr = dsp_sub56(source, dest);
! 8625:
! 8626: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8627: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8628: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8629:
! 8630: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8631:
! 8632: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8633: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8634: }
! 8635:
! 8636: static void dsp_sub_y_a(void)
! 8637: {
! 8638: Uint32 source[3], dest[3];
! 8639: Uint16 newsr;
! 8640:
! 8641: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8642: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8643: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8644:
! 8645: source[2] = dsp_core.registers[DSP_REG_Y0];
! 8646: source[1] = dsp_core.registers[DSP_REG_Y1];
! 8647: if (source[1] & (1<<23))
! 8648: source[0] = 0xff;
! 8649: else
! 8650: source[0] = 0x0;
! 8651:
! 8652:
! 8653: newsr = dsp_sub56(source, dest);
! 8654:
! 8655: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8656: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8657: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8658:
! 8659: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8660:
! 8661: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8662: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8663: }
! 8664:
! 8665: static void dsp_sub_y_b(void)
! 8666: {
! 8667: Uint32 source[3], dest[3];
! 8668: Uint16 newsr;
! 8669:
! 8670: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8671: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8672: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8673:
! 8674: source[2] = dsp_core.registers[DSP_REG_Y0];
! 8675: source[1] = dsp_core.registers[DSP_REG_Y1];
! 8676: if (source[1] & (1<<23))
! 8677: source[0] = 0xff;
! 8678: else
! 8679: source[0] = 0x0;
! 8680:
! 8681:
! 8682: newsr = dsp_sub56(source, dest);
! 8683:
! 8684: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8685: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8686: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8687:
! 8688: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8689:
! 8690: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8691: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8692: }
! 8693:
! 8694: static void dsp_sub_x0_a(void)
! 8695: {
! 8696: Uint32 source[3], dest[3];
! 8697: Uint16 newsr;
! 8698:
! 8699: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8700: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8701: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8702:
! 8703: source[2] = 0;
! 8704: source[1] = dsp_core.registers[DSP_REG_X0];
! 8705: if (source[1] & (1<<23))
! 8706: source[0] = 0xff;
! 8707: else
! 8708: source[0] = 0x0;
! 8709:
! 8710:
! 8711: newsr = dsp_sub56(source, dest);
! 8712:
! 8713: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8714: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8715: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8716:
! 8717: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8718:
! 8719: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8720: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8721: }
! 8722:
! 8723: static void dsp_sub_x0_b(void)
! 8724: {
! 8725: Uint32 source[3], dest[3];
! 8726: Uint16 newsr;
! 8727:
! 8728: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8729: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8730: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8731:
! 8732: source[2] = 0;
! 8733: source[1] = dsp_core.registers[DSP_REG_X0];
! 8734: if (source[1] & (1<<23))
! 8735: source[0] = 0xff;
! 8736: else
! 8737: source[0] = 0x0;
! 8738:
! 8739:
! 8740: newsr = dsp_sub56(source, dest);
! 8741:
! 8742: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8743: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8744: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8745:
! 8746: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8747:
! 8748: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8749: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8750: }
! 8751:
! 8752: static void dsp_sub_y0_a(void)
! 8753: {
! 8754: Uint32 source[3], dest[3];
! 8755: Uint16 newsr;
! 8756:
! 8757: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8758: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8759: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8760:
! 8761: source[2] = 0;
! 8762: source[1] = dsp_core.registers[DSP_REG_Y0];
! 8763: if (source[1] & (1<<23))
! 8764: source[0] = 0xff;
! 8765: else
! 8766: source[0] = 0x0;
! 8767:
! 8768:
! 8769: newsr = dsp_sub56(source, dest);
1.1 root 8770:
1.1.1.6 ! root 8771: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8772: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8773: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8774:
! 8775: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8776:
! 8777: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8778: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8779: }
! 8780:
! 8781: static void dsp_sub_y0_b(void)
! 8782: {
! 8783: Uint32 source[3], dest[3];
! 8784: Uint16 newsr;
! 8785:
! 8786: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8787: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8788: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8789:
! 8790: source[2] = 0;
! 8791: source[1] = dsp_core.registers[DSP_REG_Y0];
! 8792: if (source[1] & (1<<23))
! 8793: source[0] = 0xff;
! 8794: else
! 8795: source[0] = 0x0;
! 8796:
! 8797:
! 8798: newsr = dsp_sub56(source, dest);
! 8799:
! 8800: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8801: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8802: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8803:
! 8804: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8805:
! 8806: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8807: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8808: }
! 8809:
! 8810: static void dsp_sub_x1_a(void)
! 8811: {
! 8812: Uint32 source[3], dest[3];
! 8813: Uint16 newsr;
! 8814:
! 8815: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8816: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8817: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8818:
! 8819: source[2] = 0;
! 8820: source[1] = dsp_core.registers[DSP_REG_X1];
! 8821: if (source[1] & (1<<23))
! 8822: source[0] = 0xff;
! 8823: else
! 8824: source[0] = 0x0;
! 8825:
! 8826:
! 8827: newsr = dsp_sub56(source, dest);
! 8828:
! 8829: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8830: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8831: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8832:
! 8833: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8834:
! 8835: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8836: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8837: }
! 8838:
! 8839: static void dsp_sub_x1_b(void)
! 8840: {
! 8841: Uint32 source[3], dest[3];
! 8842: Uint16 newsr;
! 8843:
! 8844: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8845: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8846: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8847:
! 8848: source[2] = 0;
! 8849: source[1] = dsp_core.registers[DSP_REG_X1];
! 8850: if (source[1] & (1<<23))
! 8851: source[0] = 0xff;
! 8852: else
! 8853: source[0] = 0x0;
! 8854:
! 8855:
! 8856: newsr = dsp_sub56(source, dest);
! 8857:
! 8858: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8859: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8860: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8861:
! 8862: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8863:
! 8864: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8865: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8866: }
! 8867:
! 8868: static void dsp_sub_y1_a(void)
! 8869: {
! 8870: Uint32 source[3], dest[3];
! 8871: Uint16 newsr;
! 8872:
! 8873: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8874: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8875: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8876:
! 8877: source[2] = 0;
! 8878: source[1] = dsp_core.registers[DSP_REG_Y1];
! 8879: if (source[1] & (1<<23))
! 8880: source[0] = 0xff;
! 8881: else
! 8882: source[0] = 0x0;
! 8883:
! 8884:
! 8885: newsr = dsp_sub56(source, dest);
! 8886:
! 8887: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8888: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8889: dsp_core.registers[DSP_REG_A0] = dest[2];
! 8890:
! 8891: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8892:
! 8893: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8894: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8895: }
! 8896:
! 8897: static void dsp_sub_y1_b(void)
! 8898: {
! 8899: Uint32 source[3], dest[3];
! 8900: Uint16 newsr;
! 8901:
! 8902: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8903: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8904: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8905:
! 8906: source[2] = 0;
! 8907: source[1] = dsp_core.registers[DSP_REG_Y1];
! 8908: if (source[1] & (1<<23))
! 8909: source[0] = 0xff;
! 8910: else
! 8911: source[0] = 0x0;
! 8912:
! 8913:
! 8914: newsr = dsp_sub56(source, dest);
! 8915:
! 8916: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8917: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8918: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8919:
! 8920: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8921:
! 8922: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8923: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8924: }
! 8925:
! 8926: static void dsp_subl_a(void)
! 8927: {
! 8928: Uint32 source[3], dest[3];
! 8929: Uint16 newsr;
! 8930:
! 8931: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8932: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8933: dest[2] = dsp_core.registers[DSP_REG_A0];
1.1 root 8934: newsr = dsp_asl56(dest);
8935:
1.1.1.6 ! root 8936: source[0] = dsp_core.registers[DSP_REG_B2];
! 8937: source[1] = dsp_core.registers[DSP_REG_B1];
! 8938: source[2] = dsp_core.registers[DSP_REG_B0];
1.1 root 8939: newsr |= dsp_sub56(source, dest);
8940:
1.1.1.6 ! root 8941: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8942: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8943: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1.1.2 root 8944:
1.1.1.6 ! root 8945: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 8946:
1.1.1.6 ! root 8947: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8948: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 8949: }
8950:
1.1.1.6 ! root 8951: static void dsp_subl_b(void)
1.1 root 8952: {
1.1.1.6 ! root 8953: Uint32 source[3], dest[3];
1.1.1.2 root 8954: Uint16 newsr;
1.1 root 8955:
1.1.1.6 ! root 8956: dest[0] = dsp_core.registers[DSP_REG_B2];
! 8957: dest[1] = dsp_core.registers[DSP_REG_B1];
! 8958: dest[2] = dsp_core.registers[DSP_REG_B0];
! 8959: newsr = dsp_asl56(dest);
1.1 root 8960:
1.1.1.6 ! root 8961: source[0] = dsp_core.registers[DSP_REG_A2];
! 8962: source[1] = dsp_core.registers[DSP_REG_A1];
! 8963: source[2] = dsp_core.registers[DSP_REG_A0];
! 8964: newsr |= dsp_sub56(source, dest);
! 8965:
! 8966: dsp_core.registers[DSP_REG_B2] = dest[0];
! 8967: dsp_core.registers[DSP_REG_B1] = dest[1];
! 8968: dsp_core.registers[DSP_REG_B0] = dest[2];
! 8969:
! 8970: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 8971:
! 8972: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 8973: dsp_core.registers[DSP_REG_SR] |= newsr;
! 8974: }
! 8975:
! 8976: static void dsp_subr_a(void)
! 8977: {
! 8978: Uint32 source[3], dest[3];
! 8979: Uint16 newsr;
! 8980:
! 8981: dest[0] = dsp_core.registers[DSP_REG_A2];
! 8982: dest[1] = dsp_core.registers[DSP_REG_A1];
! 8983: dest[2] = dsp_core.registers[DSP_REG_A0];
! 8984:
1.1 root 8985: newsr = dsp_asr56(dest);
8986:
1.1.1.6 ! root 8987: source[0] = dsp_core.registers[DSP_REG_B2];
! 8988: source[1] = dsp_core.registers[DSP_REG_B1];
! 8989: source[2] = dsp_core.registers[DSP_REG_B0];
! 8990:
1.1 root 8991: newsr |= dsp_sub56(source, dest);
8992:
1.1.1.6 ! root 8993: dsp_core.registers[DSP_REG_A2] = dest[0];
! 8994: dsp_core.registers[DSP_REG_A1] = dest[1];
! 8995: dsp_core.registers[DSP_REG_A0] = dest[2];
1.1.1.2 root 8996:
1.1.1.6 ! root 8997: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
1.1 root 8998:
1.1.1.6 ! root 8999: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 9000: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 9001: }
9002:
1.1.1.6 ! root 9003: static void dsp_subr_b(void)
1.1 root 9004: {
1.1.1.6 ! root 9005: Uint32 source[3], dest[3];
! 9006: Uint16 newsr;
1.1 root 9007:
1.1.1.6 ! root 9008: dest[0] = dsp_core.registers[DSP_REG_B2];
! 9009: dest[1] = dsp_core.registers[DSP_REG_B1];
! 9010: dest[2] = dsp_core.registers[DSP_REG_B0];
! 9011:
! 9012: newsr = dsp_asr56(dest);
1.1 root 9013:
1.1.1.6 ! root 9014: source[0] = dsp_core.registers[DSP_REG_A2];
! 9015: source[1] = dsp_core.registers[DSP_REG_A1];
! 9016: source[2] = dsp_core.registers[DSP_REG_A0];
! 9017:
! 9018: newsr |= dsp_sub56(source, dest);
1.1 root 9019:
1.1.1.6 ! root 9020: dsp_core.registers[DSP_REG_B2] = dest[0];
! 9021: dsp_core.registers[DSP_REG_B1] = dest[1];
! 9022: dsp_core.registers[DSP_REG_B0] = dest[2];
! 9023:
! 9024: dsp_ccr_update_e_u_n_z(dest[0], dest[1], dest[2]);
! 9025:
! 9026: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-((1<<DSP_SR_V)|(1<<DSP_SR_C));
! 9027: dsp_core.registers[DSP_REG_SR] |= newsr;
1.1 root 9028: }
9029:
1.1.1.6 ! root 9030: static void dsp_tfr_b_a(void)
1.1 root 9031: {
1.1.1.6 ! root 9032: dsp_core.registers[DSP_REG_A0] = dsp_core.registers[DSP_REG_B0];
! 9033: dsp_core.registers[DSP_REG_A1] = dsp_core.registers[DSP_REG_B1];
! 9034: dsp_core.registers[DSP_REG_A2] = dsp_core.registers[DSP_REG_B2];
! 9035: }
1.1 root 9036:
1.1.1.6 ! root 9037: static void dsp_tfr_a_b(void)
! 9038: {
! 9039: dsp_core.registers[DSP_REG_B0] = dsp_core.registers[DSP_REG_A0];
! 9040: dsp_core.registers[DSP_REG_B1] = dsp_core.registers[DSP_REG_A1];
! 9041: dsp_core.registers[DSP_REG_B2] = dsp_core.registers[DSP_REG_A2];
! 9042: }
! 9043:
! 9044: static void dsp_tfr_x0_a(void)
! 9045: {
! 9046: dsp_core.registers[DSP_REG_A0] = 0;
! 9047: dsp_core.registers[DSP_REG_A1] = dsp_core.registers[DSP_REG_X0];
! 9048: if (dsp_core.registers[DSP_REG_A1] & (1<<23))
! 9049: dsp_core.registers[DSP_REG_A2] = 0xff;
! 9050: else
! 9051: dsp_core.registers[DSP_REG_A2] = 0x0;
! 9052: }
! 9053:
! 9054: static void dsp_tfr_x0_b(void)
! 9055: {
! 9056: dsp_core.registers[DSP_REG_B0] = 0;
! 9057: dsp_core.registers[DSP_REG_B1] = dsp_core.registers[DSP_REG_X0];
! 9058: if (dsp_core.registers[DSP_REG_B1] & (1<<23))
! 9059: dsp_core.registers[DSP_REG_B2] = 0xff;
! 9060: else
! 9061: dsp_core.registers[DSP_REG_B2] = 0x0;
! 9062: }
! 9063:
! 9064: static void dsp_tfr_y0_a(void)
! 9065: {
! 9066: dsp_core.registers[DSP_REG_A0] = 0;
! 9067: dsp_core.registers[DSP_REG_A1] = dsp_core.registers[DSP_REG_Y0];
! 9068: if (dsp_core.registers[DSP_REG_A1] & (1<<23))
! 9069: dsp_core.registers[DSP_REG_A2] = 0xff;
! 9070: else
! 9071: dsp_core.registers[DSP_REG_A2] = 0x0;
! 9072: }
! 9073:
! 9074: static void dsp_tfr_y0_b(void)
! 9075: {
! 9076: dsp_core.registers[DSP_REG_B0] = 0;
! 9077: dsp_core.registers[DSP_REG_B1] = dsp_core.registers[DSP_REG_Y0];
! 9078: if (dsp_core.registers[DSP_REG_B1] & (1<<23))
! 9079: dsp_core.registers[DSP_REG_B2] = 0xff;
! 9080: else
! 9081: dsp_core.registers[DSP_REG_B2] = 0x0;
! 9082: }
! 9083:
! 9084: static void dsp_tfr_x1_a(void)
! 9085: {
! 9086: dsp_core.registers[DSP_REG_A0] = 0;
! 9087: dsp_core.registers[DSP_REG_A1] = dsp_core.registers[DSP_REG_X1];
! 9088: if (dsp_core.registers[DSP_REG_A1] & (1<<23))
! 9089: dsp_core.registers[DSP_REG_A2] = 0xff;
! 9090: else
! 9091: dsp_core.registers[DSP_REG_A2] = 0x0;
! 9092: }
! 9093:
! 9094: static void dsp_tfr_x1_b(void)
! 9095: {
! 9096: dsp_core.registers[DSP_REG_B0] = 0;
! 9097: dsp_core.registers[DSP_REG_B1] = dsp_core.registers[DSP_REG_X1];
! 9098: if (dsp_core.registers[DSP_REG_B1] & (1<<23))
! 9099: dsp_core.registers[DSP_REG_B2] = 0xff;
! 9100: else
! 9101: dsp_core.registers[DSP_REG_B2] = 0x0;
! 9102: }
! 9103:
! 9104: static void dsp_tfr_y1_a(void)
! 9105: {
! 9106: dsp_core.registers[DSP_REG_A0] = 0;
! 9107: dsp_core.registers[DSP_REG_A1] = dsp_core.registers[DSP_REG_Y1];
! 9108: if (dsp_core.registers[DSP_REG_A1] & (1<<23))
! 9109: dsp_core.registers[DSP_REG_A2] = 0xff;
! 9110: else
! 9111: dsp_core.registers[DSP_REG_A2] = 0x0;
! 9112: }
! 9113:
! 9114: static void dsp_tfr_y1_b(void)
! 9115: {
! 9116: dsp_core.registers[DSP_REG_B0] = 0;
! 9117: dsp_core.registers[DSP_REG_B1] = dsp_core.registers[DSP_REG_Y1];
! 9118: if (dsp_core.registers[DSP_REG_B1] & (1<<23))
! 9119: dsp_core.registers[DSP_REG_B2] = 0xff;
! 9120: else
! 9121: dsp_core.registers[DSP_REG_B2] = 0x0;
! 9122: }
! 9123:
! 9124: static void dsp_tst_a(void)
! 9125: {
! 9126: dsp_ccr_update_e_u_n_z( dsp_core.registers[DSP_REG_A2],
! 9127: dsp_core.registers[DSP_REG_A1],
! 9128: dsp_core.registers[DSP_REG_A0]);
! 9129:
! 9130: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
! 9131: }
! 9132:
! 9133: static void dsp_tst_b(void)
! 9134: {
! 9135: dsp_ccr_update_e_u_n_z( dsp_core.registers[DSP_REG_B2],
! 9136: dsp_core.registers[DSP_REG_B1],
! 9137: dsp_core.registers[DSP_REG_B0]);
1.1 root 9138:
1.1.1.6 ! root 9139: dsp_core.registers[DSP_REG_SR] &= BITMASK(16)-(1<<DSP_SR_V);
1.1 root 9140: }
9141:
1.1.1.2 root 9142: /*
9143: vim:ts=4:sw=4:
9144: */
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.