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1.1 root 1: /* 1.1.1.2 ! root 2: DSP M56001 emulation ! 3: Disassembler ! 4: ! 5: (C) 2003-2008 ARAnyM developer team ! 6: ! 7: This program is free software; you can redistribute it and/or modify ! 8: it under the terms of the GNU General Public License as published by ! 9: the Free Software Foundation; either version 2 of the License, or ! 10: (at your option) any later version. ! 11: ! 12: This program is distributed in the hope that it will be useful, ! 13: but WITHOUT ANY WARRANTY; without even the implied warranty of ! 14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ! 15: GNU General Public License for more details. ! 16: ! 17: You should have received a copy of the GNU General Public License ! 18: along with this program; if not, write to the Free Software ! 19: Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ! 20: */ ! 21: ! 22: #ifdef HAVE_CONFIG_H ! 23: #include "config.h" ! 24: #endif ! 25: ! 26: #include <string.h> ! 27: ! 28: #include "dsp_core.h" 1.1 root 29: #include "dsp_cpu.h" 30: #include "dsp_disasm.h" 31: 1.1.1.2 ! root 32: #define DEBUG 0 1.1 root 33: 34: /* More disasm infos, if wanted */ 35: #define DSP_DISASM_REG_PC 0 36: 37: /********************************** 38: * Defines 39: **********************************/ 40: 41: #define BITMASK(x) ((1<<(x))-1) 42: 43: /********************************** 44: * Variables 45: **********************************/ 46: 47: /* Current instruction */ 1.1.1.2 ! root 48: static Uint32 cur_inst; ! 49: ! 50: static dsp_core_t *dsp_core; ! 51: ! 52: void dsp56k_disasm_init(dsp_core_t *my_dsp_core) ! 53: { ! 54: dsp_core = my_dsp_core; ! 55: } 1.1 root 56: 57: /********************************** 58: * Register change 59: **********************************/ 60: 1.1.1.2 ! root 61: static Uint32 registers_save[64]; ! 62: static Uint32 registers_changed[64]; 1.1 root 63: #if DSP_DISASM_REG_PC 1.1.1.2 ! root 64: static Uint32 pc_save; 1.1 root 65: #endif 66: 67: static const char *registers_name[64]={ 68: "","","","", 69: "x0","x1","y0","y1", 70: "a0","b0","a2","b2", 71: "a1","b1","a","b", 72: 73: "r0","r1","r2","r3", 74: "r4","r5","r6","r7", 75: "n0","n1","n2","n3", 76: "n4","n5","n6","n7", 77: 78: "m0","m1","m2","m3", 79: "m4","m5","m6","m7", 80: "","","","", 81: "","","","", 82: 83: "","","","", 84: "","","","", 85: "","sr","omr","sp", 86: "ssh","ssl","la","lc" 87: }; 88: 89: void dsp56k_disasm_reg_read(void) 90: { 1.1.1.2 ! root 91: memcpy(registers_save, dsp_core->registers , sizeof(registers_save)); 1.1 root 92: memset(registers_changed, 0, sizeof(registers_changed)); 93: #if DSP_DISASM_REG_PC 1.1.1.2 ! root 94: pc_save = dsp_core->pc; 1.1 root 95: #endif 96: } 97: 98: void dsp56k_disasm_reg_compare(void) 99: { 100: int i; 101: 102: for (i=0;i<64;i++) { 103: if (!registers_changed[i]) { 104: continue; 105: } 106: 107: switch(i) { 108: case DSP_REG_X0: 109: case DSP_REG_X1: 110: case DSP_REG_Y0: 111: case DSP_REG_Y1: 112: case DSP_REG_A0: 113: case DSP_REG_A1: 114: case DSP_REG_B0: 115: case DSP_REG_B1: 1.1.1.2 ! root 116: fprintf(stderr,"Dsp: Reg: %s: 0x%06x -> 0x%06x\n", registers_name[i], registers_save[i] & BITMASK(24), dsp_core->registers[i] & BITMASK(24)); 1.1 root 117: break; 118: case DSP_REG_R0: 119: case DSP_REG_R1: 120: case DSP_REG_R2: 121: case DSP_REG_R3: 122: case DSP_REG_R4: 123: case DSP_REG_R5: 124: case DSP_REG_R6: 125: case DSP_REG_R7: 126: case DSP_REG_M0: 127: case DSP_REG_M1: 128: case DSP_REG_M2: 129: case DSP_REG_M3: 130: case DSP_REG_M4: 131: case DSP_REG_M5: 132: case DSP_REG_M6: 133: case DSP_REG_M7: 134: case DSP_REG_N0: 135: case DSP_REG_N1: 136: case DSP_REG_N2: 137: case DSP_REG_N3: 138: case DSP_REG_N4: 139: case DSP_REG_N5: 140: case DSP_REG_N6: 141: case DSP_REG_N7: 142: case DSP_REG_SR: 143: case DSP_REG_LA: 144: case DSP_REG_LC: 1.1.1.2 ! root 145: fprintf(stderr,"Dsp: Reg: %s: 0x%04x -> 0x%04x\n", registers_name[i], registers_save[i] & BITMASK(16), dsp_core->registers[i] & BITMASK(16)); 1.1 root 146: break; 147: case DSP_REG_A2: 148: case DSP_REG_B2: 149: case DSP_REG_OMR: 150: case DSP_REG_SP: 151: case DSP_REG_SSH: 152: case DSP_REG_SSL: 1.1.1.2 ! root 153: fprintf(stderr,"Dsp: Reg: %s: 0x%02x -> 0x%02x\n", registers_name[i], registers_save[i] & BITMASK(8), dsp_core->registers[i] & BITMASK(8)); 1.1 root 154: break; 155: case DSP_REG_A: 156: case DSP_REG_B: 157: { 158: fprintf(stderr,"Dsp: Reg: %s: 0x%02x:%06x:%06x -> 0x%02x:%06x:%06x\n", 159: registers_name[i], 160: registers_save[DSP_REG_A2+(i & 1)] & BITMASK(8), 161: registers_save[DSP_REG_A1+(i & 1)] & BITMASK(24), 162: registers_save[DSP_REG_A0+(i & 1)] & BITMASK(24), 1.1.1.2 ! root 163: dsp_core->registers[DSP_REG_A2+(i & 1)] & BITMASK(8), ! 164: dsp_core->registers[DSP_REG_A1+(i & 1)] & BITMASK(24), ! 165: dsp_core->registers[DSP_REG_A0+(i & 1)] & BITMASK(24) 1.1 root 166: ); 167: } 168: break; 169: } 170: } 171: #if DSP_DISASM_REG_PC 1.1.1.2 ! root 172: if (pc_save != dsp_core->pc) { ! 173: fprintf(stderr,"Dsp: Reg: pc: 0x%04x -> 0x%04x\n", pc_save, dsp_core->pc); 1.1 root 174: } 175: #endif 176: } 177: 178: /********************************** 179: * Opcode disassembler 180: **********************************/ 181: 1.1.1.2 ! root 182: static Uint32 read_memory(Uint32 currPc); ! 183: 1.1 root 184: typedef void (*dsp_emul_t)(void); 185: 186: static void opcode8h_0(void); 187: static void opcode8h_1(void); 188: static void opcode8h_4(void); 189: static void opcode8h_6(void); 190: static void opcode8h_8(void); 191: static void opcode8h_a(void); 192: static void opcode8h_b(void); 193: 1.1.1.2 ! root 194: static int dsp_calc_ea(Uint32 ea_mode, char *dest); ! 195: static void dsp_calc_cc(Uint32 cc_mode, char *dest); 1.1 root 196: static void dsp_undefined(void); 197: 198: /* Instructions without parallel moves */ 199: static void dsp_andi(void); 200: static void dsp_bchg(void); 201: static void dsp_bclr(void); 202: static void dsp_bset(void); 203: static void dsp_btst(void); 204: static void dsp_div(void); 205: static void dsp_do(void); 206: static void dsp_enddo(void); 207: static void dsp_illegal(void); 208: static void dsp_jcc(void); 209: static void dsp_jclr(void); 210: static void dsp_jmp(void); 211: static void dsp_jscc(void); 212: static void dsp_jsclr(void); 213: static void dsp_jset(void); 214: static void dsp_jsr(void); 215: static void dsp_jsset(void); 216: static void dsp_lua(void); 217: static void dsp_movec(void); 218: static void dsp_movem(void); 219: static void dsp_movep(void); 220: static void dsp_nop(void); 221: static void dsp_norm(void); 222: static void dsp_ori(void); 223: static void dsp_rep(void); 224: static void dsp_reset(void); 225: static void dsp_rti(void); 226: static void dsp_rts(void); 227: static void dsp_stop(void); 228: static void dsp_swi(void); 229: static void dsp_tcc(void); 230: static void dsp_wait(void); 231: 232: static void dsp_do_0(void); 233: static void dsp_do_2(void); 234: static void dsp_do_4(void); 235: static void dsp_do_c(void); 236: static void dsp_movec_7(void); 237: static void dsp_movec_9(void); 238: static void dsp_movec_b(void); 239: static void dsp_movec_d(void); 240: static void dsp_movep_0(void); 241: static void dsp_movep_1(void); 242: static void dsp_movep_2(void); 243: static void dsp_rep_1(void); 244: static void dsp_rep_3(void); 245: static void dsp_rep_5(void); 246: static void dsp_rep_d(void); 247: 248: /* Parallel moves */ 249: static void dsp_pm(void); 250: static void dsp_pm_0(void); 251: static void dsp_pm_1(void); 252: static void dsp_pm_2(void); 253: static void dsp_pm_4(void); 254: static void dsp_pm_8(void); 255: 256: /* Instructions with parallel moves */ 257: static void dsp_abs(void); 258: static void dsp_adc(void); 259: static void dsp_add(void); 260: static void dsp_addl(void); 261: static void dsp_addr(void); 262: static void dsp_and(void); 263: static void dsp_asl(void); 264: static void dsp_asr(void); 265: static void dsp_clr(void); 266: static void dsp_cmp(void); 267: static void dsp_cmpm(void); 268: static void dsp_eor(void); 269: static void dsp_lsl(void); 270: static void dsp_lsr(void); 271: static void dsp_mac(void); 272: static void dsp_macr(void); 273: static void dsp_move(void); 274: static void dsp_move_nopm(void); 275: static void dsp_mpy(void); 276: static void dsp_mpyr(void); 277: static void dsp_neg(void); 278: static void dsp_not(void); 279: static void dsp_or(void); 280: static void dsp_rnd(void); 281: static void dsp_rol(void); 282: static void dsp_ror(void); 283: static void dsp_sbc(void); 284: static void dsp_sub(void); 285: static void dsp_subl(void); 286: static void dsp_subr(void); 287: static void dsp_tfr(void); 288: static void dsp_tst(void); 289: 290: static dsp_emul_t opcodes8h[16]={ 291: opcode8h_0, 292: opcode8h_1, 293: dsp_tcc, 294: dsp_tcc, 295: opcode8h_4, 296: dsp_movec, 297: opcode8h_6, 298: dsp_movem, 299: opcode8h_8, 300: opcode8h_8, 301: opcode8h_a, 302: opcode8h_b, 303: dsp_jmp, 304: dsp_jsr, 305: dsp_jcc, 306: dsp_jscc 307: }; 308: 309: static dsp_emul_t opcodes_0809[16]={ 310: dsp_move_nopm, 311: dsp_move_nopm, 312: dsp_move_nopm, 313: dsp_move_nopm, 314: 315: dsp_movep, 316: dsp_movep, 317: dsp_movep, 318: dsp_movep, 319: 320: dsp_move_nopm, 321: dsp_move_nopm, 322: dsp_move_nopm, 323: dsp_move_nopm, 324: 325: dsp_movep, 326: dsp_movep, 327: dsp_movep, 328: dsp_movep 329: }; 330: 331: static dsp_emul_t opcodes_0a[32]={ 332: dsp_bclr, 333: dsp_bset, 334: dsp_bclr, 335: dsp_bset, 336: dsp_jclr, 337: dsp_jset, 338: dsp_jclr, 339: dsp_jset, 340: 341: dsp_bclr, 342: dsp_bset, 343: dsp_bclr, 344: dsp_bset, 345: dsp_jclr, 346: dsp_jset, 347: dsp_jclr, 348: dsp_jset, 349: 350: dsp_bclr, 351: dsp_bset, 352: dsp_bclr, 353: dsp_bset, 354: dsp_jclr, 355: dsp_jset, 356: dsp_jclr, 357: dsp_jset, 358: 359: dsp_jclr, 360: dsp_jset, 361: dsp_bclr, 362: dsp_bset, 363: dsp_jmp, 364: dsp_jcc, 365: dsp_undefined, 366: dsp_undefined 367: }; 368: 369: static dsp_emul_t opcodes_0b[32]={ 370: dsp_bchg, 371: dsp_btst, 372: dsp_bchg, 373: dsp_btst, 374: dsp_jsclr, 375: dsp_jsset, 376: dsp_jsclr, 377: dsp_jsset, 378: 379: dsp_bchg, 380: dsp_btst, 381: dsp_bchg, 382: dsp_btst, 383: dsp_jsclr, 384: dsp_jsset, 385: dsp_jsclr, 386: dsp_jsset, 387: 388: dsp_bchg, 389: dsp_btst, 390: dsp_bchg, 391: dsp_btst, 392: dsp_jsclr, 393: dsp_jsset, 394: dsp_jsclr, 395: dsp_jsset, 396: 397: dsp_jsclr, 398: dsp_jsclr, 399: dsp_bchg, 400: dsp_btst, 401: dsp_jsr, 402: dsp_jscc, 403: dsp_undefined, 404: dsp_undefined 405: }; 406: 407: static dsp_emul_t opcodes_alu003f[64]={ 408: /* 0x00 - 0x0f */ 409: dsp_move, 410: dsp_tfr, 411: dsp_addr, 412: dsp_tst, 413: dsp_undefined, 414: dsp_cmp, 415: dsp_subr, 416: dsp_cmpm, 417: dsp_undefined, 418: dsp_tfr, 419: dsp_addr, 420: dsp_tst, 421: dsp_undefined, 422: dsp_cmp, 423: dsp_subr, 424: dsp_cmpm, 425: 426: /* 0x10 - 0x1f */ 427: dsp_add, 428: dsp_rnd, 429: dsp_addl, 430: dsp_clr, 431: dsp_sub, 432: dsp_undefined, 433: dsp_subl, 434: dsp_not, 435: dsp_add, 436: dsp_rnd, 437: dsp_addl, 438: dsp_clr, 439: dsp_sub, 440: dsp_undefined, 441: dsp_subl, 442: dsp_not, 443: 444: /* 0x20 - 0x2f */ 445: dsp_add, 446: dsp_adc, 447: dsp_asr, 448: dsp_lsr, 449: dsp_sub, 450: dsp_sbc, 451: dsp_abs, 452: dsp_ror, 453: dsp_add, 454: dsp_adc, 455: dsp_asr, 456: dsp_lsr, 457: dsp_sub, 458: dsp_sbc, 459: dsp_abs, 460: dsp_ror, 461: 462: /* 0x30 - 0x3f */ 463: dsp_add, 464: dsp_adc, 465: dsp_asl, 466: dsp_lsl, 467: dsp_sub, 468: dsp_sbc, 469: dsp_neg, 470: dsp_rol, 471: dsp_add, 472: dsp_adc, 473: dsp_asl, 474: dsp_lsl, 475: dsp_sub, 476: dsp_sbc, 477: dsp_neg, 478: dsp_rol 479: }; 480: 481: static dsp_emul_t opcodes_alu407f[16]={ 482: dsp_add, 483: dsp_tfr, 484: dsp_or, 485: dsp_eor, 486: dsp_sub, 487: dsp_cmp, 488: dsp_and, 489: dsp_cmpm, 490: dsp_add, 491: dsp_tfr, 492: dsp_or, 493: dsp_eor, 494: dsp_sub, 495: dsp_cmp, 496: dsp_and, 497: dsp_cmpm 498: }; 499: 500: static dsp_emul_t opcodes_alu80ff[4]={ 501: dsp_mpy, 502: dsp_mpyr, 503: dsp_mac, 504: dsp_macr 505: }; 506: 507: static dsp_emul_t opcodes_do[16]={ 508: dsp_do_0, 509: dsp_undefined, 510: dsp_do_2, 511: dsp_undefined, 512: 513: dsp_do_4, 514: dsp_undefined, 515: dsp_do_2, 516: dsp_undefined, 517: 518: dsp_undefined, 519: dsp_undefined, 520: dsp_do_2, 521: dsp_undefined, 522: 523: dsp_do_c, 524: dsp_undefined, 525: dsp_do_2, 526: dsp_undefined 527: }; 528: 529: static dsp_emul_t opcodes_movec[16]={ 530: dsp_undefined, 531: dsp_undefined, 532: dsp_undefined, 533: dsp_undefined, 534: 535: dsp_undefined, 536: dsp_undefined, 537: dsp_undefined, 538: dsp_movec_7, 539: 540: dsp_undefined, 541: dsp_movec_9, 542: dsp_undefined, 543: dsp_movec_b, 544: 545: dsp_undefined, 546: dsp_movec_d, 547: dsp_undefined, 548: dsp_movec_b 549: }; 550: 551: static dsp_emul_t opcodes_movep[4]={ 552: dsp_movep_0, 553: dsp_movep_1, 554: dsp_movep_2, 555: dsp_movep_2 556: }; 557: 558: static dsp_emul_t opcodes_rep[16]={ 559: dsp_undefined, 560: dsp_rep_1, 561: dsp_undefined, 562: dsp_rep_3, 563: 564: dsp_undefined, 565: dsp_rep_5, 566: dsp_undefined, 567: dsp_rep_3, 568: 569: dsp_undefined, 570: dsp_undefined, 571: dsp_undefined, 572: dsp_rep_3, 573: 574: dsp_undefined, 575: dsp_rep_d, 576: dsp_undefined, 577: dsp_rep_3 578: }; 579: 580: static dsp_emul_t opcodes_parmove[16]={ 581: dsp_pm_0, 582: dsp_pm_1, 583: dsp_pm_2, 584: dsp_pm_2, 585: dsp_pm_4, 586: dsp_pm_4, 587: dsp_pm_4, 588: dsp_pm_4, 589: 590: dsp_pm_8, 591: dsp_pm_8, 592: dsp_pm_8, 593: dsp_pm_8, 594: dsp_pm_8, 595: dsp_pm_8, 596: dsp_pm_8, 597: dsp_pm_8 598: }; 599: 600: static int registers_tcc[16][2]={ 601: {DSP_REG_B,DSP_REG_A}, 602: {DSP_REG_A,DSP_REG_B}, 603: {DSP_REG_NULL,DSP_REG_NULL}, 604: {DSP_REG_NULL,DSP_REG_NULL}, 605: 606: {DSP_REG_NULL,DSP_REG_NULL}, 607: {DSP_REG_NULL,DSP_REG_NULL}, 608: {DSP_REG_NULL,DSP_REG_NULL}, 609: {DSP_REG_NULL,DSP_REG_NULL}, 610: 611: {DSP_REG_X0,DSP_REG_A}, 612: {DSP_REG_X0,DSP_REG_B}, 613: {DSP_REG_Y0,DSP_REG_A}, 614: {DSP_REG_Y0,DSP_REG_B}, 1.1.1.2 ! root 615: ! 616: {DSP_REG_X1,DSP_REG_A}, ! 617: {DSP_REG_X1,DSP_REG_B}, 1.1 root 618: {DSP_REG_Y1,DSP_REG_A}, 619: {DSP_REG_Y1,DSP_REG_B} 620: }; 621: 622: static const char *registers_lmove[8]={ 623: "a10", 624: "b10", 625: "x", 626: "y", 627: "a", 628: "b", 629: "ab", 630: "ba" 631: }; 632: 633: static const char *ea_names[9]={ 634: "(r%d)-n%d", /* 000xxx */ 635: "(r%d)+n%d", /* 001xxx */ 636: "(r%d)-", /* 010xxx */ 637: "(r%d)+", /* 011xxx */ 638: "(r%d)", /* 100xxx */ 639: "(r%d+n%d)", /* 101xxx */ 640: "0x%04x", /* 110000 */ 641: "-(r%d)", /* 111xxx */ 642: "0x%06x" /* 110100 */ 643: }; 644: 645: static const char *cc_name[16]={ 646: "cc", 647: "ge", 648: "ne", 649: "pl", 650: "nn", 651: "ec", 652: "lc", 653: "gt", 654: 655: "cs", 656: "lt", 657: "eq", 658: "mi", 659: "nr", 660: "es", 661: "ls", 662: "le" 663: }; 664: 665: static char parallelmove_name[64]; 666: 667: void dsp56k_disasm(void) 668: { 1.1.1.2 ! root 669: Uint32 value; 1.1 root 670: 1.1.1.2 ! root 671: cur_inst = read_memory(dsp_core->pc); 1.1 root 672: 673: strcpy(parallelmove_name, ""); 674: 675: value = (cur_inst >> 16) & BITMASK(8); 676: if (value< 0x10) { 677: opcodes8h[value](); 678: } else { 679: dsp_pm(); 680: value = cur_inst & BITMASK(8); 681: if (value < 0x40) { 682: opcodes_alu003f[value](); 683: } else if (value < 0x80) { 684: value &= BITMASK(4); 685: opcodes_alu407f[value](); 686: } else { 687: value &= BITMASK(2); 688: opcodes_alu80ff[value](); 689: } 690: } 691: } 692: 1.1.1.2 ! root 693: void dsp56k_disasm_force_reg_changed(int num_dsp_reg) ! 694: { ! 695: registers_changed[num_dsp_reg]=1; ! 696: } ! 697: ! 698: static Uint32 read_memory(Uint32 currPc) ! 699: { ! 700: Uint32 value; ! 701: ! 702: if (currPc<0x200) { ! 703: value = dsp_core->ramint[DSP_SPACE_P][currPc]; ! 704: } else { ! 705: value = dsp_core->ram[DSP_SPACE_P][currPc & (DSP_RAMSIZE-1)]; ! 706: } ! 707: ! 708: return value & BITMASK(24); ! 709: } ! 710: 1.1 root 711: /********************************** 712: * Conditions code calculation 713: **********************************/ 714: 1.1.1.2 ! root 715: static void dsp_calc_cc(Uint32 cc_mode, char *dest) 1.1 root 716: { 717: strcpy(dest, cc_name[cc_mode & BITMASK(4)]); 718: } 719: 720: /********************************** 721: * Effective address calculation 722: **********************************/ 723: 1.1.1.2 ! root 724: static int dsp_calc_ea(Uint32 ea_mode, char *dest) 1.1 root 725: { 726: int value, retour, numreg; 727: 728: value = (ea_mode >> 3) & BITMASK(3); 729: numreg = ea_mode & BITMASK(3); 730: retour = 0; 731: switch (value) { 732: case 0: 733: /* (Rx)-Nx */ 734: sprintf(dest, ea_names[value], numreg, numreg); 735: registers_changed[DSP_REG_R0+numreg]=1; 736: break; 737: case 1: 738: /* (Rx)+Nx */ 739: sprintf(dest, ea_names[value], numreg, numreg); 740: registers_changed[DSP_REG_R0+numreg]=1; 741: break; 742: case 5: 743: /* (Rx+Nx) */ 744: sprintf(dest, ea_names[value], numreg, numreg); 745: break; 746: case 2: 747: /* (Rx)- */ 748: sprintf(dest, ea_names[value], numreg); 749: registers_changed[DSP_REG_R0+numreg]=1; 750: break; 751: case 3: 752: /* (Rx)+ */ 753: sprintf(dest, ea_names[value], numreg); 754: registers_changed[DSP_REG_R0+numreg]=1; 755: break; 756: case 4: 757: /* (Rx) */ 758: sprintf(dest, ea_names[value], numreg); 759: break; 760: case 7: 761: /* -(Rx) */ 762: sprintf(dest, ea_names[value], numreg); 763: registers_changed[DSP_REG_R0+numreg]=1; 764: break; 765: case 6: 766: switch ((ea_mode >> 2) & 1) { 767: case 0: 768: /* Absolute address */ 1.1.1.2 ! root 769: sprintf(dest, ea_names[value], read_memory(dsp_core->pc+1)); 1.1 root 770: break; 771: case 1: 772: /* Immediate value */ 1.1.1.2 ! root 773: sprintf(dest, ea_names[8], read_memory(dsp_core->pc+1)); 1.1 root 774: retour = 1; 775: break; 776: } 777: break; 778: } 779: return retour; 780: } 781: 782: static void opcode8h_0(void) 783: { 1.1.1.2 ! root 784: Uint32 value; 1.1 root 785: 786: if (cur_inst <= 0x00008c) { 787: switch(cur_inst) { 788: case 0x000000: 789: dsp_nop(); 790: break; 791: case 0x000004: 792: dsp_rti(); 793: break; 794: case 0x000005: 795: dsp_illegal(); 796: break; 797: case 0x000006: 798: dsp_swi(); 799: break; 800: case 0x00000c: 801: dsp_rts(); 802: break; 803: case 0x000084: 804: dsp_reset(); 805: break; 806: case 0x000086: 807: dsp_wait(); 808: break; 809: case 0x000087: 810: dsp_stop(); 811: break; 812: case 0x00008c: 813: dsp_enddo(); 814: break; 815: } 816: } else { 817: value = cur_inst & 0xf8; 818: switch (value) { 819: case 0x0000b8: 820: dsp_andi(); 821: break; 822: case 0x0000f8: 823: dsp_ori(); 824: break; 825: } 826: } 827: } 828: 829: static void opcode8h_1(void) 830: { 831: switch(cur_inst & 0xfff8c7) { 832: case 0x018040: 833: dsp_div(); 834: break; 835: case 0x01c805: 836: dsp_norm(); 837: break; 838: } 839: } 840: 841: static void opcode8h_4(void) 842: { 843: switch((cur_inst>>5) & BITMASK(3)) { 844: case 0: 845: dsp_lua(); 846: break; 847: case 5: 848: dsp_movec(); 849: break; 850: } 851: } 852: 853: static void opcode8h_6(void) 854: { 855: if (cur_inst & (1<<5)) { 856: dsp_rep(); 857: } else { 858: dsp_do(); 859: } 860: } 861: 862: static void opcode8h_8(void) 863: { 1.1.1.2 ! root 864: Uint32 value; 1.1 root 865: 866: value = (cur_inst >> 12) & BITMASK(4); 867: opcodes_0809[value](); 868: } 869: 870: static void opcode8h_a(void) 871: { 1.1.1.2 ! root 872: Uint32 value; 1.1 root 873: 874: value = (cur_inst >> 11) & (BITMASK(2)<<3); 875: value |= (cur_inst >> 5) & BITMASK(3); 876: 877: opcodes_0a[value](); 878: } 879: 880: static void opcode8h_b(void) 881: { 1.1.1.2 ! root 882: Uint32 value; 1.1 root 883: 884: value = (cur_inst >> 11) & (BITMASK(2)<<3); 885: value |= (cur_inst >> 5) & BITMASK(3); 886: 887: opcodes_0b[value](); 888: } 889: 890: /********************************** 891: * Non-parallel moves instructions 892: **********************************/ 893: 894: static void dsp_undefined(void) 895: { 1.1.1.2 ! root 896: fprintf(stderr,"Dsp: 0x%04x: 0x%06x unknown instruction\n",dsp_core->pc, cur_inst); 1.1 root 897: } 898: 899: static void dsp_andi(void) 900: { 901: const char *regname; 902: 903: switch(cur_inst & BITMASK(2)) { 904: case 0: 905: regname="mr"; 906: registers_changed[DSP_REG_SR]=1; 907: break; 908: case 1: 909: regname="ccr"; 910: registers_changed[DSP_REG_SR]=1; 911: break; 912: case 2: 913: regname="omr"; 914: registers_changed[DSP_REG_OMR]=1; 915: break; 916: default: 917: regname=""; 918: break; 919: } 920: 1.1.1.2 ! root 921: registers_changed[DSP_REG_SR]=1; ! 922: 1.1 root 923: fprintf(stderr,"Dsp: 0x%04x: andi #0x%02x,%s\n", 1.1.1.2 ! root 924: dsp_core->pc, 1.1 root 925: (cur_inst>>8) & BITMASK(8), 926: regname 927: ); 928: } 929: 930: static void dsp_bchg(void) 931: { 932: char name[16], addr_name[16]; 1.1.1.2 ! root 933: Uint32 memspace, value, numbit; 1.1 root 934: 935: memspace = (cur_inst>>6) & 1; 936: value = (cur_inst>>8) & BITMASK(6); 937: numbit = cur_inst & BITMASK(5); 938: 939: switch((cur_inst>>14) & BITMASK(2)) { 940: case 0: 941: /* bchg #n,x:aa */ 942: /* bchg #n,y:aa */ 943: if (memspace) { 944: sprintf(name,"y:0x%04x",value); 945: } else { 946: sprintf(name,"x:0x%04x",value); 947: } 948: break; 949: case 1: 950: /* bchg #n,x:ea */ 951: /* bchg #n,y:ea */ 952: dsp_calc_ea(value, addr_name); 953: if (memspace) { 954: sprintf(name,"y:%s",addr_name); 955: } else { 956: sprintf(name,"x:%s",addr_name); 957: } 958: break; 959: case 2: 960: /* bchg #n,x:pp */ 961: /* bchg #n,y:pp */ 962: if (memspace) { 963: sprintf(name,"y:0x%04x",value+0xffc0); 964: } else { 965: sprintf(name,"x:0x%04x",value+0xffc0); 966: } 967: break; 968: case 3: 969: /* bchg #n,R */ 970: sprintf(name,"%s",registers_name[value]); 971: registers_changed[value]=1; 972: break; 973: } 974: 1.1.1.2 ! root 975: registers_changed[DSP_REG_SR]=1; ! 976: ! 977: fprintf(stderr,"Dsp: 0x%04x: bchg #%d,%s\n",dsp_core->pc, numbit, name); 1.1 root 978: } 979: 980: static void dsp_bclr(void) 981: { 982: char name[16], addr_name[16]; 1.1.1.2 ! root 983: Uint32 memspace, value, numbit; 1.1 root 984: 985: memspace = (cur_inst>>6) & 1; 986: value = (cur_inst>>8) & BITMASK(6); 987: numbit = cur_inst & BITMASK(5); 988: 989: switch((cur_inst>>14) & BITMASK(2)) { 990: case 0: 991: /* bclr #n,x:aa */ 992: /* bclr #n,y:aa */ 993: if (memspace) { 994: sprintf(name,"y:0x%04x",value); 995: } else { 996: sprintf(name,"x:0x%04x",value); 997: } 998: break; 999: case 1: 1000: /* bclr #n,x:ea */ 1001: /* bclr #n,y:ea */ 1002: dsp_calc_ea(value, addr_name); 1003: if (memspace) { 1004: sprintf(name,"y:%s",addr_name); 1005: } else { 1006: sprintf(name,"x:%s",addr_name); 1007: } 1008: break; 1009: case 2: 1010: /* bclr #n,x:pp */ 1011: /* bclr #n,y:pp */ 1012: if (memspace) { 1013: sprintf(name,"y:0x%04x",value+0xffc0); 1014: } else { 1015: sprintf(name,"x:0x%04x",value+0xffc0); 1016: } 1017: break; 1018: case 3: 1019: /* bclr #n,R */ 1020: sprintf(name,"%s",registers_name[value]); 1021: registers_changed[value]=1; 1022: break; 1023: } 1024: 1.1.1.2 ! root 1025: registers_changed[DSP_REG_SR]=1; ! 1026: ! 1027: fprintf(stderr,"Dsp: 0x%04x: bclr #%d,%s\n",dsp_core->pc, numbit, name); 1.1 root 1028: } 1029: 1030: static void dsp_bset(void) 1031: { 1032: char name[16], addr_name[16]; 1.1.1.2 ! root 1033: Uint32 memspace, value, numbit; 1.1 root 1034: 1035: memspace = (cur_inst>>6) & 1; 1036: value = (cur_inst>>8) & BITMASK(6); 1037: numbit = cur_inst & BITMASK(5); 1038: 1039: switch((cur_inst>>14) & BITMASK(2)) { 1040: case 0: 1041: /* bset #n,x:aa */ 1042: /* bset #n,y:aa */ 1043: if (memspace) { 1044: sprintf(name,"y:0x%04x",value); 1045: } else { 1046: sprintf(name,"x:0x%04x",value); 1047: } 1048: break; 1049: case 1: 1050: /* bset #n,x:ea */ 1051: /* bset #n,y:ea */ 1052: dsp_calc_ea(value, addr_name); 1053: if (memspace) { 1054: sprintf(name,"y:%s",addr_name); 1055: } else { 1056: sprintf(name,"x:%s",addr_name); 1057: } 1058: break; 1059: case 2: 1060: /* bset #n,x:pp */ 1061: /* bset #n,y:pp */ 1062: if (memspace) { 1063: sprintf(name,"y:0x%04x",value+0xffc0); 1064: } else { 1065: sprintf(name,"x:0x%04x",value+0xffc0); 1066: } 1067: break; 1068: case 3: 1069: /* bset #n,R */ 1070: sprintf(name,"%s",registers_name[value]); 1071: registers_changed[value]=1; 1072: break; 1073: } 1074: 1.1.1.2 ! root 1075: registers_changed[DSP_REG_SR]=1; ! 1076: ! 1077: fprintf(stderr,"Dsp: 0x%04x: bset #%d,%s\n",dsp_core->pc, numbit, name); 1.1 root 1078: } 1079: 1080: static void dsp_btst(void) 1081: { 1082: char name[16], addr_name[16]; 1.1.1.2 ! root 1083: Uint32 memspace, value, numbit; 1.1 root 1084: 1085: memspace = (cur_inst>>6) & 1; 1086: value = (cur_inst>>8) & BITMASK(6); 1087: numbit = cur_inst & BITMASK(5); 1088: 1089: switch((cur_inst>>14) & BITMASK(2)) { 1090: case 0: 1091: /* btst #n,x:aa */ 1092: /* btst #n,y:aa */ 1093: if (memspace) { 1094: sprintf(name,"y:0x%04x",value); 1095: } else { 1096: sprintf(name,"x:0x%04x",value); 1097: } 1098: break; 1099: case 1: 1100: /* btst #n,x:ea */ 1101: /* btst #n,y:ea */ 1102: dsp_calc_ea(value, addr_name); 1103: if (memspace) { 1104: sprintf(name,"y:%s",addr_name); 1105: } else { 1106: sprintf(name,"x:%s",addr_name); 1107: } 1108: break; 1109: case 2: 1110: /* btst #n,x:pp */ 1111: /* btst #n,y:pp */ 1112: if (memspace) { 1113: sprintf(name,"y:0x%04x",value+0xffc0); 1114: } else { 1115: sprintf(name,"x:0x%04x",value+0xffc0); 1116: } 1117: break; 1118: case 3: 1119: /* btst #n,R */ 1120: sprintf(name,"%s",registers_name[value]); 1121: registers_changed[value]=1; 1122: break; 1123: } 1124: 1.1.1.2 ! root 1125: registers_changed[DSP_REG_SR]=1; ! 1126: ! 1127: fprintf(stderr,"Dsp: 0x%04x: btst #%d,%s\n",dsp_core->pc, numbit, name); 1.1 root 1128: } 1129: 1130: static void dsp_div(void) 1131: { 1.1.1.2 ! root 1132: Uint32 srcreg=DSP_REG_NULL, destreg; 1.1 root 1133: 1134: switch((cur_inst>>4) & BITMASK(2)) { 1135: case 0: 1136: srcreg = DSP_REG_X0; 1137: break; 1138: case 1: 1139: srcreg = DSP_REG_Y0; 1140: break; 1141: case 2: 1142: srcreg = DSP_REG_X1; 1143: break; 1144: case 3: 1145: srcreg = DSP_REG_Y1; 1146: break; 1147: } 1148: destreg = DSP_REG_A+((cur_inst>>3) & 1); 1149: registers_changed[destreg]=1; 1.1.1.2 ! root 1150: registers_changed[DSP_REG_SR]=1; 1.1 root 1151: 1.1.1.2 ! root 1152: fprintf(stderr,"Dsp: 0x%04x: div %s,%s\n",dsp_core->pc, registers_name[srcreg],registers_name[destreg]); 1.1 root 1153: } 1154: 1155: static void dsp_do(void) 1156: { 1.1.1.2 ! root 1157: Uint32 value; 1.1 root 1158: 1159: value = (cur_inst>>12) & (BITMASK(2)<<2); 1160: value |= (cur_inst>>6) & 1<<1; 1161: value |= (cur_inst>>5) & 1; 1162: 1163: opcodes_do[value](); 1164: 1165: registers_changed[DSP_REG_LA]=1; 1166: registers_changed[DSP_REG_LC]=1; 1.1.1.2 ! root 1167: registers_changed[DSP_REG_SR]=1; 1.1 root 1168: } 1169: 1170: static void dsp_do_0(void) 1171: { 1172: char name[16]; 1173: 1174: if (cur_inst & (1<<6)) { 1175: sprintf(name, "y:0x%04x", (cur_inst>>8) & BITMASK(6)); 1176: } else { 1177: sprintf(name, "x:0x%04x", (cur_inst>>8) & BITMASK(6)); 1178: } 1179: 1180: fprintf(stderr,"Dsp: 0x%04x: do %s,p:0x%04x\n", 1.1.1.2 ! root 1181: dsp_core->pc, 1.1 root 1182: name, 1.1.1.2 ! root 1183: read_memory(dsp_core->pc+1) 1.1 root 1184: ); 1185: } 1186: 1187: static void dsp_do_2(void) 1188: { 1189: fprintf(stderr,"Dsp: 0x%04x: do #0x%04x,p:0x%04x\n", 1.1.1.2 ! root 1190: dsp_core->pc, 1.1 root 1191: ((cur_inst>>8) & BITMASK(8))|((cur_inst & BITMASK(4))<<8), 1.1.1.2 ! root 1192: read_memory(dsp_core->pc+1) 1.1 root 1193: ); 1194: } 1195: 1196: static void dsp_do_4(void) 1197: { 1198: char addr_name[16], name[16]; 1.1.1.2 ! root 1199: Uint32 ea_mode; 1.1 root 1200: 1201: ea_mode = (cur_inst>>8) & BITMASK(6); 1202: dsp_calc_ea(ea_mode, addr_name); 1203: 1204: if (cur_inst & (1<<6)) { 1205: sprintf(name, "y:%s", addr_name); 1206: } else { 1207: sprintf(name, "x:%s", addr_name); 1208: } 1209: 1210: fprintf(stderr,"Dsp: 0x%04x: do %s,p:0x%04x\n", 1.1.1.2 ! root 1211: dsp_core->pc, 1.1 root 1212: name, 1.1.1.2 ! root 1213: read_memory(dsp_core->pc+1) 1.1 root 1214: ); 1215: } 1216: 1217: static void dsp_do_c(void) 1218: { 1219: fprintf(stderr,"Dsp: 0x%04x: do %s,p:0x%04x\n", 1.1.1.2 ! root 1220: dsp_core->pc, 1.1 root 1221: registers_name[(cur_inst>>8) & BITMASK(6)], 1.1.1.2 ! root 1222: read_memory(dsp_core->pc+1) 1.1 root 1223: ); 1224: } 1225: 1226: static void dsp_enddo(void) 1227: { 1.1.1.2 ! root 1228: fprintf(stderr,"Dsp: 0x%04x: enddo\n",dsp_core->pc); 1.1 root 1229: } 1230: 1231: static void dsp_illegal(void) 1232: { 1.1.1.2 ! root 1233: fprintf(stderr,"Dsp: 0x%04x: illegal\n",dsp_core->pc); 1.1 root 1234: } 1235: 1236: static void dsp_jcc(void) 1237: { 1238: char cond_name[16], addr_name[16]; 1.1.1.2 ! root 1239: Uint32 cc_code=0; 1.1 root 1240: 1241: switch((cur_inst >> 16) & BITMASK(8)) { 1242: case 0x0a: 1243: dsp_calc_ea((cur_inst >>8) & BITMASK(6), addr_name); 1244: cc_code=cur_inst & BITMASK(4); 1245: break; 1246: case 0x0e: 1247: sprintf(addr_name, "0x%04x", cur_inst & BITMASK(12)); 1248: cc_code=(cur_inst>>12) & BITMASK(4); 1249: break; 1250: } 1251: dsp_calc_cc(cc_code, cond_name); 1252: 1.1.1.2 ! root 1253: fprintf(stderr,"Dsp: 0x%04x: j%s p:%s\n",dsp_core->pc, cond_name, addr_name); 1.1 root 1254: } 1255: 1256: static void dsp_jclr(void) 1257: { 1258: char srcname[16], addr_name[16]; 1.1.1.2 ! root 1259: Uint32 memspace, value, numbit; 1.1 root 1260: 1261: memspace = (cur_inst>>6) & 1; 1262: value = (cur_inst>>8) & BITMASK(6); 1263: numbit = cur_inst & BITMASK(5); 1264: 1265: switch((cur_inst>>14) & BITMASK(2)) { 1266: case 0: 1267: /* jclr #n,x:aa,p:xx */ 1268: /* jclr #n,y:aa,p:xx */ 1269: if (memspace) { 1270: sprintf(srcname, "y:0x%04x", value); 1271: } else { 1272: sprintf(srcname, "x:0x%04x", value); 1273: } 1274: break; 1275: case 1: 1276: /* jclr #n,x:ea,p:xx */ 1277: /* jclr #n,y:ea,p:xx */ 1278: dsp_calc_ea(value, addr_name); 1279: if (memspace) { 1280: sprintf(srcname, "y:%s", addr_name); 1281: } else { 1282: sprintf(srcname, "x:%s", addr_name); 1283: } 1284: break; 1285: case 2: 1286: /* jclr #n,x:pp,p:xx */ 1287: /* jclr #n,y:pp,p:xx */ 1288: value += 0xffc0; 1289: if (memspace) { 1290: sprintf(srcname, "y:0x%04x", value); 1291: } else { 1292: sprintf(srcname, "x:0x%04x", value); 1293: } 1294: break; 1295: case 3: 1296: /* jclr #n,R,p:xx */ 1297: sprintf(srcname, registers_name[value]); 1298: break; 1299: } 1300: 1301: fprintf(stderr,"Dsp: 0x%04x: jclr #%d,%s,p:0x%04x\n", 1.1.1.2 ! root 1302: dsp_core->pc, 1.1 root 1303: numbit, 1304: srcname, 1.1.1.2 ! root 1305: read_memory(dsp_core->pc+1) 1.1 root 1306: ); 1307: } 1308: 1309: static void dsp_jmp(void) 1310: { 1311: char dstname[16]; 1312: 1313: switch((cur_inst >> 16) & BITMASK(8)) { 1314: case 0x0a: 1315: dsp_calc_ea((cur_inst >>8) & BITMASK(6), dstname); 1316: break; 1317: case 0x0c: 1318: sprintf(dstname, "0x%04x", cur_inst & BITMASK(12)); 1319: break; 1320: } 1321: 1.1.1.2 ! root 1322: fprintf(stderr,"Dsp: 0x%04x: jmp p:%s\n",dsp_core->pc, dstname); 1.1 root 1323: } 1324: 1325: static void dsp_jscc(void) 1326: { 1327: char cond_name[16], addr_name[16]; 1.1.1.2 ! root 1328: Uint32 cc_code=0; 1.1 root 1329: 1330: switch((cur_inst >> 16) & BITMASK(8)) { 1331: case 0x0b: 1332: dsp_calc_ea((cur_inst >>8) & BITMASK(6), addr_name); 1333: cc_code=cur_inst & BITMASK(4); 1334: break; 1335: case 0x0f: 1336: sprintf(addr_name, "0x%04x", cur_inst & BITMASK(12)); 1337: cc_code=(cur_inst>>12) & BITMASK(4); 1338: break; 1339: } 1340: dsp_calc_cc(cc_code, cond_name); 1341: 1.1.1.2 ! root 1342: fprintf(stderr,"Dsp: 0x%04x: js%s p:%s\n",dsp_core->pc, cond_name, addr_name); 1.1 root 1343: } 1344: 1345: static void dsp_jsclr(void) 1346: { 1347: char srcname[16], addr_name[16]; 1.1.1.2 ! root 1348: Uint32 memspace, value, numbit; 1.1 root 1349: 1350: memspace = (cur_inst>>6) & 1; 1351: value = (cur_inst>>8) & BITMASK(6); 1352: numbit = cur_inst & BITMASK(5); 1353: 1354: switch((cur_inst>>14) & BITMASK(2)) { 1355: case 0: 1356: /* jsclr #n,x:aa,p:xx */ 1357: /* jsclr #n,y:aa,p:xx */ 1358: if (memspace) { 1359: sprintf(srcname, "y:0x%04x", value); 1360: } else { 1361: sprintf(srcname, "x:0x%04x", value); 1362: } 1363: break; 1364: case 1: 1365: /* jsclr #n,x:ea,p:xx */ 1366: /* jsclr #n,y:ea,p:xx */ 1367: dsp_calc_ea(value, addr_name); 1368: if (memspace) { 1369: sprintf(srcname, "y:%s", addr_name); 1370: } else { 1371: sprintf(srcname, "x:%s", addr_name); 1372: } 1373: break; 1374: case 2: 1375: /* jsclr #n,x:pp,p:xx */ 1376: /* jsclr #n,y:pp,p:xx */ 1377: value += 0xffc0; 1378: if (memspace) { 1379: sprintf(srcname, "y:0x%04x", value); 1380: } else { 1381: sprintf(srcname, "x:0x%04x", value); 1382: } 1383: break; 1384: case 3: 1385: /* jsclr #n,R,p:xx */ 1386: sprintf(srcname, registers_name[value]); 1387: break; 1388: } 1389: 1390: fprintf(stderr,"Dsp: 0x%04x: jsclr #%d,%s,p:0x%04x\n", 1.1.1.2 ! root 1391: dsp_core->pc, 1.1 root 1392: numbit, 1393: srcname, 1.1.1.2 ! root 1394: read_memory(dsp_core->pc+1) 1.1 root 1395: ); 1396: } 1397: 1398: static void dsp_jset(void) 1399: { 1400: char srcname[16], addr_name[16]; 1.1.1.2 ! root 1401: Uint32 memspace, value, numbit; 1.1 root 1402: 1403: memspace = (cur_inst>>6) & 1; 1404: value = (cur_inst>>8) & BITMASK(6); 1405: numbit = cur_inst & BITMASK(5); 1406: 1407: switch((cur_inst>>14) & BITMASK(2)) { 1408: case 0: 1409: /* jset #n,x:aa,p:xx */ 1410: /* jset #n,y:aa,p:xx */ 1411: if (memspace) { 1412: sprintf(srcname, "y:0x%04x", value); 1413: } else { 1414: sprintf(srcname, "x:0x%04x", value); 1415: } 1416: break; 1417: case 1: 1418: /* jset #n,x:ea,p:xx */ 1419: /* jset #n,y:ea,p:xx */ 1420: dsp_calc_ea(value, addr_name); 1421: if (memspace) { 1422: sprintf(srcname, "y:%s", addr_name); 1423: } else { 1424: sprintf(srcname, "x:%s", addr_name); 1425: } 1426: break; 1427: case 2: 1428: /* jset #n,x:pp,p:xx */ 1429: /* jset #n,y:pp,p:xx */ 1430: value += 0xffc0; 1431: if (memspace) { 1432: sprintf(srcname, "y:0x%04x", value); 1433: } else { 1434: sprintf(srcname, "x:0x%04x", value); 1435: } 1436: break; 1437: case 3: 1438: /* jset #n,R,p:xx */ 1439: sprintf(srcname, registers_name[value]); 1440: break; 1441: } 1442: 1443: fprintf(stderr,"Dsp: 0x%04x: jset #%d,%s,p:0x%04x\n", 1.1.1.2 ! root 1444: dsp_core->pc, 1.1 root 1445: numbit, 1446: srcname, 1.1.1.2 ! root 1447: read_memory(dsp_core->pc+1) 1.1 root 1448: ); 1449: } 1450: 1451: static void dsp_jsr(void) 1452: { 1453: char dstname[16]; 1454: 1455: if (((cur_inst>>12) & BITMASK(4))==0) { 1456: sprintf(dstname, "0x%04x", cur_inst & BITMASK(12)); 1457: } else { 1458: dsp_calc_ea((cur_inst>>8) & BITMASK(6),dstname); 1459: } 1460: 1.1.1.2 ! root 1461: fprintf(stderr,"Dsp: 0x%04x: jsr p:%s\n",dsp_core->pc, dstname); 1.1 root 1462: } 1463: 1464: static void dsp_jsset(void) 1465: { 1466: char srcname[16], addr_name[16]; 1.1.1.2 ! root 1467: Uint32 memspace, value, numbit; 1.1 root 1468: 1469: memspace = (cur_inst>>6) & 1; 1470: value = (cur_inst>>8) & BITMASK(6); 1471: numbit = cur_inst & BITMASK(5); 1472: 1473: switch((cur_inst>>14) & BITMASK(2)) { 1474: case 0: 1475: /* jsset #n,x:aa,p:xx */ 1476: /* jsset #n,y:aa,p:xx */ 1477: if (memspace) { 1478: sprintf(srcname, "y:0x%04x", value); 1479: } else { 1480: sprintf(srcname, "x:0x%04x", value); 1481: } 1482: break; 1483: case 1: 1484: /* jsset #n,x:ea,p:xx */ 1485: /* jsset #n,y:ea,p:xx */ 1486: dsp_calc_ea(value, addr_name); 1487: if (memspace) { 1488: sprintf(srcname, "y:%s", addr_name); 1489: } else { 1490: sprintf(srcname, "x:%s", addr_name); 1491: } 1492: break; 1493: case 2: 1494: /* jsset #n,x:pp,p:xx */ 1495: /* jsset #n,y:pp,p:xx */ 1496: value += 0xffc0; 1497: if (memspace) { 1498: sprintf(srcname, "y:0x%04x", value); 1499: } else { 1500: sprintf(srcname, "x:0x%04x", value); 1501: } 1502: break; 1503: case 3: 1504: /* jsset #n,R,p:xx */ 1505: sprintf(srcname, registers_name[value]); 1506: break; 1507: } 1508: 1509: fprintf(stderr,"Dsp: 0x%04x: jsset #%d,%s,p:0x%04x\n", 1.1.1.2 ! root 1510: dsp_core->pc, 1.1 root 1511: numbit, 1512: srcname, 1.1.1.2 ! root 1513: read_memory(dsp_core->pc+1) 1.1 root 1514: ); 1515: } 1516: 1517: static void dsp_lua(void) 1518: { 1519: char addr_name[16], numreg; 1520: 1521: dsp_calc_ea((cur_inst>>8) & BITMASK(5), addr_name); 1522: numreg = cur_inst & BITMASK(3); 1523: registers_changed[DSP_REG_R0+numreg]=1; 1524: 1.1.1.2 ! root 1525: fprintf(stderr,"Dsp: 0x%04x: lua %s,r%d\n",dsp_core->pc, addr_name, numreg); 1.1 root 1526: } 1527: 1528: static void dsp_movec(void) 1529: { 1.1.1.2 ! root 1530: Uint32 value; 1.1 root 1531: 1532: value = (cur_inst>>13) & (1<<3); 1533: value |= (cur_inst>>12) & (1<<2); 1534: value |= (cur_inst>>6) & (1<<1); 1535: value |= (cur_inst>>5) & 1; 1536: 1537: opcodes_movec[value](); 1.1.1.2 ! root 1538: ! 1539: registers_changed[DSP_REG_SR]=1; 1.1 root 1540: } 1541: 1542: static void dsp_movec_7(void) 1543: { 1.1.1.2 ! root 1544: Uint32 numreg1, numreg2; 1.1 root 1545: 1546: /* S1,D2 */ 1547: /* S2,D1 */ 1548: 1549: numreg2 = (cur_inst>>8) & BITMASK(6); 1550: numreg1 = (cur_inst & BITMASK(5))|0x20; 1551: 1552: if (cur_inst & (1<<15)) { 1553: /* Write D1 */ 1.1.1.2 ! root 1554: fprintf(stderr,"Dsp: 0x%04x: movec %s,%s\n",dsp_core->pc, registers_name[numreg2], registers_name[numreg1]); 1.1 root 1555: registers_changed[numreg1]=1; 1556: } else { 1557: /* Read S1 */ 1.1.1.2 ! root 1558: fprintf(stderr,"Dsp: 0x%04x: movec %s,%s\n",dsp_core->pc, registers_name[numreg1], registers_name[numreg2]); 1.1 root 1559: registers_changed[numreg2]=1; 1560: } 1561: } 1562: 1563: static void dsp_movec_9(void) 1564: { 1565: const char *spacename; 1566: char srcname[16],dstname[16]; 1.1.1.2 ! root 1567: Uint32 numreg, addr; 1.1 root 1568: 1569: /* x:aa,D1 */ 1570: /* S1,x:aa */ 1571: /* y:aa,D1 */ 1572: /* S1,y:aa */ 1573: 1574: numreg = (cur_inst & BITMASK(5))|0x20; 1575: addr = (cur_inst>>8) & BITMASK(6); 1576: 1577: if (cur_inst & (1<<6)) { 1578: spacename="y"; 1579: } else { 1580: spacename="x"; 1581: } 1582: 1583: if (cur_inst & (1<<15)) { 1584: /* Write D1 */ 1585: sprintf(srcname, "%s:0x%04x", spacename, addr); 1586: strcpy(dstname, registers_name[numreg]); 1587: } else { 1588: /* Read S1 */ 1589: strcpy(srcname, registers_name[numreg]); 1590: sprintf(dstname, "%s:0x%04x", spacename, addr); 1591: } 1592: 1.1.1.2 ! root 1593: fprintf(stderr,"Dsp: 0x%04x: movec %s,%s\n",dsp_core->pc, srcname, dstname); 1.1 root 1594: } 1595: 1596: static void dsp_movec_b(void) 1597: { 1.1.1.2 ! root 1598: Uint32 numreg; 1.1 root 1599: 1600: /* #xx,D1 */ 1601: 1602: numreg = (cur_inst & BITMASK(5))|0x20; 1603: 1604: registers_changed[numreg]=1; 1.1.1.2 ! root 1605: fprintf(stderr,"Dsp: 0x%04x: movec #0x%02x,%s\n",dsp_core->pc, (cur_inst>>8) & BITMASK(8), registers_name[numreg]); 1.1 root 1606: } 1607: 1608: static void dsp_movec_d(void) 1609: { 1610: const char *spacename; 1611: char srcname[16], dstname[16], addr_name[16]; 1.1.1.2 ! root 1612: Uint32 numreg, ea_mode; 1.1 root 1613: int retour; 1614: 1615: /* x:ea,D1 */ 1616: /* S1,x:ea */ 1617: /* y:ea,D1 */ 1618: /* S1,y:ea */ 1619: /* #xxxx,D1 */ 1620: 1621: numreg = (cur_inst & BITMASK(5))|0x20; 1622: ea_mode = (cur_inst>>8) & BITMASK(6); 1623: retour = dsp_calc_ea(ea_mode, addr_name); 1624: 1625: if (cur_inst & (1<<6)) { 1626: spacename="y"; 1627: } else { 1628: spacename="x"; 1629: } 1630: 1631: if (cur_inst & (1<<15)) { 1632: /* Write D1 */ 1633: if (retour) { 1634: sprintf(srcname, "#%s", addr_name); 1635: } else { 1636: sprintf(srcname, "%s:%s", spacename, addr_name); 1637: } 1638: registers_changed[numreg]=1; 1639: strcpy(dstname, registers_name[numreg]); 1640: } else { 1641: /* Read S1 */ 1642: strcpy(srcname, registers_name[numreg]); 1643: sprintf(dstname, "%s:%s", spacename, addr_name); 1644: } 1645: 1.1.1.2 ! root 1646: fprintf(stderr,"Dsp: 0x%04x: movec %s,%s\n",dsp_core->pc, srcname, dstname); 1.1 root 1647: } 1648: 1649: static void dsp_movem(void) 1650: { 1651: char addr_name[16], srcname[16], dstname[16]; 1.1.1.2 ! root 1652: Uint32 ea_mode, numreg; 1.1 root 1653: 1654: if (cur_inst & (1<<14)) { 1655: /* S,p:ea */ 1656: /* p:ea,D */ 1657: 1658: ea_mode = (cur_inst>>8) & BITMASK(6); 1659: dsp_calc_ea(ea_mode, addr_name); 1660: } else { 1661: /* S,p:aa */ 1662: /* p:aa,D */ 1663: 1664: sprintf(addr_name, "0x%04x",(cur_inst>>8) & BITMASK(6)); 1665: } 1666: 1667: numreg = cur_inst & BITMASK(6); 1668: if (cur_inst & (1<<15)) { 1669: /* Write D */ 1670: registers_changed[numreg]=1; 1671: sprintf(srcname, "p:%s", addr_name); 1672: strcpy(dstname, registers_name[numreg]); 1673: } else { 1674: /* Read S */ 1675: strcpy(srcname, registers_name[numreg]); 1676: sprintf(dstname, "p:%s", addr_name); 1677: } 1678: 1.1.1.2 ! root 1679: registers_changed[DSP_REG_SR]=1; ! 1680: ! 1681: fprintf(stderr,"Dsp: 0x%04x: movem %s,%s\n",dsp_core->pc, srcname, dstname); 1.1 root 1682: } 1683: 1684: static void dsp_movep(void) 1685: { 1.1.1.2 ! root 1686: Uint32 value; 1.1 root 1687: 1688: value = (cur_inst>>6) & BITMASK(2); 1689: 1690: opcodes_movep[value](); 1.1.1.2 ! root 1691: registers_changed[DSP_REG_SR]=1; 1.1 root 1692: } 1693: 1694: static void dsp_movep_0(void) 1695: { 1696: char srcname[16]="",dstname[16]=""; 1.1.1.2 ! root 1697: Uint32 addr, memspace, numreg; 1.1 root 1698: 1699: /* S,x:pp */ 1700: /* x:pp,D */ 1701: /* S,y:pp */ 1702: /* y:pp,D */ 1703: 1704: addr = 0xffc0 + (cur_inst & BITMASK(6)); 1705: memspace = (cur_inst>>16) & 1; 1706: numreg = (cur_inst>>8) & BITMASK(6); 1707: 1708: if (cur_inst & (1<<15)) { 1709: /* Write pp */ 1710: 1711: strcpy(srcname, registers_name[numreg]); 1712: 1713: if (memspace) { 1714: sprintf(dstname, "y:0x%04x", addr); 1715: } else { 1716: sprintf(dstname, "x:0x%04x", addr); 1717: } 1718: } else { 1719: /* Read pp */ 1720: 1721: if (memspace) { 1722: sprintf(srcname, "y:0x%04x", addr); 1723: } else { 1724: sprintf(srcname, "x:0x%04x", addr); 1725: } 1726: 1727: registers_changed[numreg]=1; 1728: strcpy(dstname, registers_name[numreg]); 1729: } 1730: 1.1.1.2 ! root 1731: fprintf(stderr,"Dsp: 0x%04x: movep %s,%s\n",dsp_core->pc, srcname, dstname); 1.1 root 1732: } 1733: 1734: static void dsp_movep_1(void) 1735: { 1736: char srcname[16]="",dstname[16]="",name[16]=""; 1.1.1.2 ! root 1737: Uint32 addr, memspace; 1.1 root 1738: 1739: /* p:ea,x:pp */ 1740: /* x:pp,p:ea */ 1741: /* p:ea,y:pp */ 1742: /* y:pp,p:ea */ 1743: 1744: addr = 0xffc0 + (cur_inst & BITMASK(6)); 1745: dsp_calc_ea((cur_inst>>8) & BITMASK(6), name); 1746: memspace = (cur_inst>>16) & 1; 1747: 1748: if (cur_inst & (1<<15)) { 1749: /* Write pp */ 1750: 1751: sprintf(srcname, "p:%s", name); 1752: 1753: if (memspace) { 1754: sprintf(dstname, "y:0x%04x", addr); 1755: } else { 1756: sprintf(dstname, "x:0x%04x", addr); 1757: } 1758: } else { 1759: /* Read pp */ 1760: 1761: if (memspace) { 1762: sprintf(srcname, "y:0x%04x", addr); 1763: } else { 1764: sprintf(srcname, "x:0x%04x", addr); 1765: } 1766: 1767: sprintf(dstname, "p:%s", name); 1768: } 1769: 1.1.1.2 ! root 1770: fprintf(stderr,"Dsp: 0x%04x: movep %s,%s\n",dsp_core->pc, srcname, dstname); 1.1 root 1771: } 1772: 1773: static void dsp_movep_2(void) 1774: { 1775: char srcname[16]="",dstname[16]="",name[16]=""; 1.1.1.2 ! root 1776: Uint32 addr, memspace, easpace, retour; 1.1 root 1777: 1778: /* x:ea,x:pp */ 1779: /* y:ea,x:pp */ 1780: /* #xxxxxx,x:pp */ 1781: /* x:pp,x:ea */ 1782: /* x:pp,y:ea */ 1783: 1784: /* x:ea,y:pp */ 1785: /* y:ea,y:pp */ 1786: /* #xxxxxx,y:pp */ 1787: /* y:pp,y:ea */ 1788: /* y:pp,x:ea */ 1789: 1790: addr = 0xffc0 + (cur_inst & BITMASK(6)); 1791: retour = dsp_calc_ea((cur_inst>>8) & BITMASK(6), name); 1792: memspace = (cur_inst>>16) & 1; 1793: easpace = (cur_inst>>6) & 1; 1794: 1795: if (cur_inst & (1<<15)) { 1796: /* Write pp */ 1797: 1798: if (retour) { 1799: sprintf(srcname, "#%s", name); 1800: } else { 1801: if (easpace) { 1802: sprintf(srcname, "y:%s", name); 1803: } else { 1804: sprintf(srcname, "x:%s", name); 1805: } 1806: } 1807: 1808: if (memspace) { 1809: sprintf(dstname, "y:0x%04x", addr); 1810: } else { 1811: sprintf(dstname, "x:0x%04x", addr); 1812: } 1813: } else { 1814: /* Read pp */ 1815: 1816: if (memspace) { 1817: sprintf(srcname, "y:0x%04x", addr); 1818: } else { 1819: sprintf(srcname, "x:0x%04x", addr); 1820: } 1821: 1822: if (easpace) { 1823: sprintf(dstname, "y:%s", name); 1824: } else { 1825: sprintf(dstname, "x:%s", name); 1826: } 1827: } 1828: 1.1.1.2 ! root 1829: fprintf(stderr,"Dsp: 0x%04x: movep %s,%s\n",dsp_core->pc, srcname, dstname); 1.1 root 1830: } 1831: 1832: static void dsp_nop(void) 1833: { 1.1.1.2 ! root 1834: fprintf(stderr,"Dsp: 0x%04x: nop\n",dsp_core->pc); 1.1 root 1835: } 1836: 1837: static void dsp_norm(void) 1838: { 1.1.1.2 ! root 1839: Uint32 srcreg, destreg; 1.1 root 1840: 1841: srcreg = DSP_REG_R0+((cur_inst>>8) & BITMASK(3)); 1842: destreg = DSP_REG_A+((cur_inst>>3) & 1); 1843: 1844: registers_changed[srcreg]=1; 1845: registers_changed[destreg]=1; 1.1.1.2 ! root 1846: registers_changed[DSP_REG_SR]=1; 1.1 root 1847: 1.1.1.2 ! root 1848: fprintf(stderr,"Dsp: 0x%04x: norm %s,%s\n",dsp_core->pc, registers_name[srcreg], registers_name[destreg]); 1.1 root 1849: } 1850: 1851: static void dsp_ori(void) 1852: { 1853: const char *regname; 1854: 1855: switch(cur_inst & BITMASK(2)) { 1856: case 0: 1857: regname="mr"; 1858: registers_changed[DSP_REG_SR]=1; 1859: break; 1860: case 1: 1861: regname="ccr"; 1862: registers_changed[DSP_REG_SR]=1; 1863: break; 1864: case 2: 1865: regname="omr"; 1866: registers_changed[DSP_REG_OMR]=1; 1867: break; 1868: default: 1869: regname=""; 1870: break; 1871: } 1872: 1.1.1.2 ! root 1873: registers_changed[DSP_REG_SR]=1; ! 1874: 1.1 root 1875: fprintf(stderr,"Dsp: 0x%04x: ori #0x%02x,%s\n", 1.1.1.2 ! root 1876: dsp_core->pc, 1.1 root 1877: (cur_inst>>8) & BITMASK(8), 1878: regname 1879: ); 1880: } 1881: 1882: static void dsp_rep(void) 1883: { 1.1.1.2 ! root 1884: Uint32 value; 1.1 root 1885: 1886: value = (cur_inst>>12) & (BITMASK(2)<<2); 1887: value |= (cur_inst>>6) & (1<<1); 1888: value |= (cur_inst>>5) & 1; 1889: 1890: opcodes_rep[value](); 1891: 1892: registers_changed[DSP_REG_LC]=1; 1.1.1.2 ! root 1893: registers_changed[DSP_REG_SR]=1; 1.1 root 1894: } 1895: 1896: static void dsp_rep_1(void) 1897: { 1898: char name[16]; 1899: 1900: /* x:aa */ 1901: /* y:aa */ 1902: 1903: if (cur_inst & (1<<6)) { 1904: sprintf(name, "y:0x%04x",(cur_inst>>8) & BITMASK(6)); 1905: } else { 1906: sprintf(name, "x:0x%04x",(cur_inst>>8) & BITMASK(6)); 1907: } 1908: 1.1.1.2 ! root 1909: fprintf(stderr,"Dsp: 0x%04x: rep %s\n",dsp_core->pc, name); 1.1 root 1910: } 1911: 1912: static void dsp_rep_3(void) 1913: { 1914: /* #xxx */ 1.1.1.2 ! root 1915: fprintf(stderr,"Dsp: 0x%04x: rep #0x%02x\n",dsp_core->pc, (cur_inst>>8) & BITMASK(8)); 1.1 root 1916: } 1917: 1918: static void dsp_rep_5(void) 1919: { 1920: char name[16],addr_name[16]; 1921: 1922: /* x:ea */ 1923: /* y:ea */ 1924: 1925: dsp_calc_ea((cur_inst>>8) & BITMASK(6), addr_name); 1926: if (cur_inst & (1<<6)) { 1927: sprintf(name, "y:%s",addr_name); 1928: } else { 1929: sprintf(name, "x:%s",addr_name); 1930: } 1931: 1.1.1.2 ! root 1932: fprintf(stderr,"Dsp: 0x%04x: rep %s\n",dsp_core->pc, name); 1.1 root 1933: } 1934: 1935: static void dsp_rep_d(void) 1936: { 1937: /* R */ 1938: 1.1.1.2 ! root 1939: fprintf(stderr,"Dsp: 0x%04x: rep %s\n",dsp_core->pc, registers_name[(cur_inst>>8) & BITMASK(6)]); 1.1 root 1940: } 1941: 1942: static void dsp_reset(void) 1943: { 1.1.1.2 ! root 1944: fprintf(stderr,"Dsp: 0x%04x: reset\n",dsp_core->pc); 1.1 root 1945: } 1946: 1947: static void dsp_rti(void) 1948: { 1.1.1.2 ! root 1949: registers_changed[DSP_REG_SR]=1; ! 1950: fprintf(stderr,"Dsp: 0x%04x: rti\n",dsp_core->pc); 1.1 root 1951: } 1952: 1953: static void dsp_rts(void) 1954: { 1.1.1.2 ! root 1955: registers_changed[DSP_REG_SR]=1; ! 1956: fprintf(stderr,"Dsp: 0x%04x: rts\n",dsp_core->pc); 1.1 root 1957: } 1958: 1959: static void dsp_stop(void) 1960: { 1.1.1.2 ! root 1961: fprintf(stderr,"Dsp: 0x%04x: stop\n",dsp_core->pc); 1.1 root 1962: } 1963: 1964: static void dsp_swi(void) 1965: { 1.1.1.2 ! root 1966: fprintf(stderr,"Dsp: 0x%04x: swi\n",dsp_core->pc); 1.1 root 1967: } 1968: 1969: static void dsp_tcc(void) 1970: { 1971: char ccname[16]; 1.1.1.2 ! root 1972: Uint32 src1reg, dst1reg, src2reg, dst2reg; 1.1 root 1973: 1974: dsp_calc_cc((cur_inst>>12) & BITMASK(4), ccname); 1975: src1reg = registers_tcc[(cur_inst>>3) & BITMASK(4)][0]; 1.1.1.2 ! root 1976: dst1reg = registers_tcc[(cur_inst>>3) & BITMASK(4)][1]; 1.1 root 1977: 1978: registers_changed[dst1reg]=1; 1979: if (cur_inst & (1<<16)) { 1980: src2reg = DSP_REG_R0+(cur_inst & BITMASK(3)); 1981: dst2reg = DSP_REG_R0+((cur_inst>>8) & BITMASK(3)); 1982: 1983: registers_changed[dst2reg]=1; 1984: fprintf(stderr,"Dsp: 0x%04x: t%s %s,%s %s,%s\n", 1.1.1.2 ! root 1985: dsp_core->pc, 1.1 root 1986: ccname, 1987: registers_name[src1reg], 1988: registers_name[dst1reg], 1989: registers_name[src2reg], 1990: registers_name[dst2reg] 1991: ); 1992: } else { 1993: fprintf(stderr,"Dsp: 0x%04x: t%s %s,%s\n", 1.1.1.2 ! root 1994: dsp_core->pc, 1.1 root 1995: ccname, 1996: registers_name[src1reg], 1997: registers_name[dst1reg] 1998: ); 1999: } 2000: } 2001: 2002: static void dsp_wait(void) 2003: { 1.1.1.2 ! root 2004: fprintf(stderr,"Dsp: 0x%04x: wait\n",dsp_core->pc); 1.1 root 2005: } 2006: 2007: /********************************** 2008: * Parallel moves 2009: **********************************/ 2010: 2011: static void dsp_pm(void) 2012: { 1.1.1.2 ! root 2013: Uint32 value; 1.1 root 2014: 2015: value = (cur_inst >> 20) & BITMASK(4); 2016: 2017: opcodes_parmove[value](); 2018: } 2019: 2020: static void dsp_pm_0(void) 2021: { 2022: char space_name[16], addr_name[16]; 1.1.1.2 ! root 2023: Uint32 memspace, numreg1, numreg2; 1.1 root 2024: /* 2025: 0000 100d 00mm mrrr S,x:ea x0,D 2026: 0000 100d 10mm mrrr S,y:ea y0,D 2027: */ 2028: memspace = (cur_inst>>15) & 1; 2029: numreg1 = DSP_REG_A+((cur_inst>>16) & 1); 2030: dsp_calc_ea((cur_inst>>8) & BITMASK(6), addr_name); 2031: 2032: if (memspace) { 2033: strcpy(space_name,"y"); 2034: numreg2 = DSP_REG_Y0; 2035: } else { 2036: strcpy(space_name,"x"); 2037: numreg2 = DSP_REG_X0; 2038: } 2039: 2040: registers_changed[numreg1]=1; 2041: 2042: sprintf(parallelmove_name, 2043: "%s,%s:%s %s,%s", 2044: registers_name[numreg1], 2045: space_name, 2046: addr_name, 2047: registers_name[numreg2], 2048: registers_name[numreg1] 2049: ); 2050: } 2051: 2052: static void dsp_pm_1(void) 2053: { 2054: /* 2055: 0001 ffdf w0mm mrrr x:ea,D1 S2,D2 2056: S1,x:ea S2,D2 2057: #xxxxxx,D1 S2,D2 2058: 0001 deff w1mm mrrr S1,D1 y:ea,D2 2059: S1,D1 S2,y:ea 2060: S1,D1 #xxxxxx,D2 2061: */ 2062: 2063: char addr_name[16]; 1.1.1.2 ! root 2064: Uint32 memspace, write_flag, retour, s1reg, s2reg, d1reg, d2reg; 1.1 root 2065: 2066: memspace = (cur_inst>>14) & 1; 2067: write_flag = (cur_inst>>15) & 1; 2068: retour = dsp_calc_ea((cur_inst>>8) & BITMASK(6), addr_name); 2069: 2070: if (memspace==DSP_SPACE_Y) { 2071: s2reg = d2reg = DSP_REG_Y0; 2072: switch((cur_inst>>16) & BITMASK(2)) { 2073: case 0: s2reg = d2reg = DSP_REG_Y0; break; 2074: case 1: s2reg = d2reg = DSP_REG_Y1; break; 2075: case 2: s2reg = d2reg = DSP_REG_A; break; 2076: case 3: s2reg = d2reg = DSP_REG_B; break; 2077: } 2078: 2079: s1reg = DSP_REG_A+((cur_inst>>19) & 1); 2080: d1reg = DSP_REG_X0+((cur_inst>>18) & 1); 2081: 2082: registers_changed[d1reg]=1; 2083: 2084: if (write_flag) { 2085: /* Write D2 */ 2086: 2087: registers_changed[d2reg]=1; 2088: 2089: if (retour) { 2090: sprintf(parallelmove_name,"%s,%s #%s,%s", 2091: registers_name[s1reg], 2092: registers_name[d1reg], 2093: addr_name, 2094: registers_name[d2reg] 2095: ); 2096: } else { 2097: sprintf(parallelmove_name,"%s,%s y:%s,%s", 2098: registers_name[s1reg], 2099: registers_name[d1reg], 2100: addr_name, 2101: registers_name[d2reg] 2102: ); 2103: } 2104: } else { 2105: /* Read S2 */ 2106: sprintf(parallelmove_name,"%s,%s %s,y:%s", 2107: registers_name[s1reg], 2108: registers_name[d1reg], 2109: registers_name[s2reg], 2110: addr_name 2111: ); 2112: } 2113: 2114: } else { 2115: s1reg = d1reg = DSP_REG_X0; 2116: switch((cur_inst>>18) & BITMASK(2)) { 2117: case 0: s1reg = d1reg = DSP_REG_X0; break; 2118: case 1: s1reg = d1reg = DSP_REG_X1; break; 2119: case 2: s1reg = d1reg = DSP_REG_A; break; 2120: case 3: s1reg = d1reg = DSP_REG_B; break; 2121: } 2122: 2123: s2reg = DSP_REG_A+((cur_inst>>17) & 1); 2124: d2reg = DSP_REG_Y0+((cur_inst>>16) & 1); 2125: 2126: registers_changed[d2reg]=1; 2127: 2128: if (write_flag) { 2129: /* Write D1 */ 2130: 2131: registers_changed[d1reg]=1; 2132: 2133: if (retour) { 2134: sprintf(parallelmove_name,"#%s,%s %s,%s", 2135: addr_name, 2136: registers_name[d1reg], 2137: registers_name[s2reg], 2138: registers_name[d2reg] 2139: ); 2140: } else { 2141: sprintf(parallelmove_name,"x:%s,%s %s,%s", 2142: addr_name, 2143: registers_name[d1reg], 2144: registers_name[s2reg], 2145: registers_name[d2reg] 2146: ); 2147: } 2148: } else { 2149: /* Read S1 */ 2150: sprintf(parallelmove_name,"%s,x:%s %s,%s", 2151: registers_name[s1reg], 2152: addr_name, 2153: registers_name[s2reg], 2154: registers_name[d2reg] 2155: ); 2156: } 2157: 2158: } 2159: } 2160: 2161: static void dsp_pm_2(void) 2162: { 2163: char addr_name[16]; 1.1.1.2 ! root 2164: Uint32 numreg1, numreg2; 1.1 root 2165: /* 2166: 0010 0000 0000 0000 nop 2167: 0010 0000 010m mrrr R update 2168: 0010 00ee eeed dddd S,D 2169: 001d dddd iiii iiii #xx,D 2170: */ 2171: if (((cur_inst >> 8) & 0xffff) == 0x2000) { 2172: return; 2173: } 2174: 2175: if (((cur_inst >> 8) & 0xffe0) == 0x2040) { 2176: dsp_calc_ea((cur_inst>>8) & BITMASK(5), addr_name); 2177: registers_changed[DSP_REG_R0+((cur_inst>>8) & BITMASK(3))]=1; 2178: sprintf(parallelmove_name, "%s,r%d",addr_name, (cur_inst>>8) & BITMASK(3)); 2179: return; 2180: } 2181: 2182: if (((cur_inst >> 8) & 0xfc00) == 0x2000) { 2183: numreg1 = (cur_inst>>13) & BITMASK(5); 2184: numreg2 = (cur_inst>>8) & BITMASK(5); 2185: registers_changed[numreg2]=1; 2186: sprintf(parallelmove_name, "%s,%s", registers_name[numreg1], registers_name[numreg2]); 2187: return; 2188: } 2189: 2190: numreg1 = (cur_inst>>16) & BITMASK(5); 2191: registers_changed[numreg1]=1; 2192: sprintf(parallelmove_name, "#0x%02x,%s", (cur_inst >> 8) & BITMASK(8), registers_name[numreg1]); 2193: } 2194: 2195: static void dsp_pm_4(void) 2196: { 2197: char addr_name[16]; 1.1.1.2 ! root 2198: Uint32 value, retour, ea_mode, memspace; 1.1 root 2199: /* 2200: 0100 l0ll w0aa aaaa l:aa,D 2201: S,l:aa 2202: 0100 l0ll w1mm mrrr l:ea,D 2203: S,l:ea 2204: 01dd 0ddd w0aa aaaa x:aa,D 2205: S,x:aa 2206: 01dd 0ddd w1mm mrrr x:ea,D 2207: S,x:ea 2208: #xxxxxx,D 2209: 01dd 1ddd w0aa aaaa y:aa,D 2210: S,y:aa 2211: 01dd 1ddd w1mm mrrr y:ea,D 2212: S,y:ea 2213: #xxxxxx,D 2214: */ 2215: value = (cur_inst>>16) & BITMASK(3); 2216: value |= (cur_inst>>17) & (BITMASK(2)<<3); 2217: 2218: ea_mode = (cur_inst>>8) & BITMASK(6); 2219: 2220: if ((value>>2)==0) { 2221: /* L: memory move */ 2222: if (cur_inst & (1<<14)) { 2223: retour = dsp_calc_ea(ea_mode, addr_name); 2224: } else { 1.1.1.2 ! root 2225: sprintf(addr_name,"0x%04x", ea_mode); 1.1 root 2226: retour = 0; 2227: } 2228: 2229: value = (cur_inst>>16) & BITMASK(2); 2230: value |= (cur_inst>>17) & (1<<2); 2231: 2232: if (cur_inst & (1<<15)) { 2233: /* Write D */ 2234: 2235: registers_changed[value]=1; 2236: if (retour) { 2237: sprintf(parallelmove_name, "#%s,%s", addr_name, registers_lmove[value]); 2238: } else { 2239: sprintf(parallelmove_name, "l:%s,%s", addr_name, registers_lmove[value]); 2240: } 2241: } else { 2242: /* Read S */ 2243: sprintf(parallelmove_name, "%s,l:%s", registers_lmove[value], addr_name); 2244: } 2245: 2246: return; 2247: } 2248: 2249: memspace = (cur_inst>>19) & 1; 2250: if (cur_inst & (1<<14)) { 2251: retour = dsp_calc_ea(ea_mode, addr_name); 2252: } else { 2253: sprintf(addr_name,"0x%04x", ea_mode); 2254: retour = 0; 2255: } 2256: 2257: if (memspace) { 2258: /* Y: */ 2259: 2260: if (cur_inst & (1<<15)) { 2261: /* Write D */ 2262: 2263: registers_changed[value]=1; 2264: if (retour) { 2265: sprintf(parallelmove_name, "#%s,%s", addr_name, registers_name[value]); 2266: } else { 2267: sprintf(parallelmove_name, "y:%s,%s", addr_name, registers_name[value]); 2268: } 2269: 2270: } else { 2271: /* Read S */ 2272: sprintf(parallelmove_name, "%s,y:%s", registers_name[value], addr_name); 2273: } 2274: } else { 2275: /* X: */ 2276: 2277: if (cur_inst & (1<<15)) { 2278: /* Write D */ 2279: 2280: registers_changed[value]=1; 2281: 2282: if (retour) { 2283: sprintf(parallelmove_name, "#%s,%s", addr_name, registers_name[value]); 2284: } else { 2285: sprintf(parallelmove_name, "x:%s,%s", addr_name, registers_name[value]); 2286: } 2287: } else { 2288: /* Read S */ 2289: sprintf(parallelmove_name, "%s,x:%s", registers_name[value], addr_name); 2290: } 2291: } 2292: } 2293: 2294: static void dsp_pm_8(void) 2295: { 2296: char addr1_name[16], addr2_name[16]; 1.1.1.2 ! root 2297: Uint32 ea_mode1, ea_mode2, numreg1, numreg2; 1.1 root 2298: /* 2299: 1wmm eeff WrrM MRRR x:ea,D1 y:ea,D2 2300: x:ea,D1 S2,y:ea 2301: S1,x:ea y:ea,D2 2302: S1,x:ea S2,y:ea 2303: */ 2304: numreg1 = DSP_REG_X0; 2305: switch((cur_inst>>18) & BITMASK(2)) { 2306: case 0: numreg1 = DSP_REG_X0; break; 2307: case 1: numreg1 = DSP_REG_X1; break; 2308: case 2: numreg1 = DSP_REG_A; break; 2309: case 3: numreg1 = DSP_REG_B; break; 2310: } 2311: 2312: numreg2 = DSP_REG_Y0; 2313: switch((cur_inst>>16) & BITMASK(2)) { 2314: case 0: numreg2 = DSP_REG_Y0; break; 2315: case 1: numreg2 = DSP_REG_Y1; break; 2316: case 2: numreg2 = DSP_REG_A; break; 2317: case 3: numreg2 = DSP_REG_B; break; 2318: } 2319: 2320: ea_mode1 = (cur_inst>>8) & BITMASK(5); 2321: if ((ea_mode1>>3) == 0) { 2322: ea_mode1 |= (1<<5); 2323: } 2324: ea_mode2 = (cur_inst>>13) & BITMASK(2); 2325: ea_mode2 |= ((cur_inst>>20) & BITMASK(2))<<3; 2326: if ((ea_mode1 & (1<<2))==0) { 2327: ea_mode2 |= 1<<2; 2328: } 2329: if ((ea_mode2>>3) == 0) { 2330: ea_mode2 |= (1<<5); 2331: } 2332: 2333: dsp_calc_ea(ea_mode1, addr1_name); 2334: dsp_calc_ea(ea_mode2, addr2_name); 2335: 2336: if (cur_inst & (1<<15)) { 2337: registers_changed[numreg1]=1; 2338: if (cur_inst & (1<<22)) { 2339: registers_changed[numreg2]=1; 2340: sprintf(parallelmove_name, "x:%s,%s y:%s,%s", 2341: addr1_name, 2342: registers_name[numreg1], 2343: addr2_name, 2344: registers_name[numreg2] 2345: ); 2346: } else { 2347: sprintf(parallelmove_name, "x:%s,%s %s,y:%s", 2348: addr1_name, 2349: registers_name[numreg1], 2350: registers_name[numreg2], 2351: addr2_name 2352: ); 2353: } 2354: } else { 2355: if (cur_inst & (1<<22)) { 2356: registers_changed[numreg2]=1; 2357: sprintf(parallelmove_name, "%s,x:%s y:%s,%s", 2358: registers_name[numreg1], 2359: addr1_name, 2360: addr2_name, 2361: registers_name[numreg2] 2362: ); 2363: } else { 2364: sprintf(parallelmove_name, "%s,x:%s %s,y:%s", 2365: registers_name[numreg1], 2366: addr1_name, 2367: registers_name[numreg2], 2368: addr2_name 2369: ); 2370: } 2371: } 2372: } 2373: 2374: 2375: /********************************** 2376: * Parallel moves ALU instructions 2377: **********************************/ 2378: 2379: static void dsp_abs(void) 2380: { 1.1.1.2 ! root 2381: Uint32 numreg; 1.1 root 2382: 2383: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2384: 2385: registers_changed[numreg]=1; 1.1.1.2 ! root 2386: registers_changed[DSP_REG_SR]=1; ! 2387: 1.1 root 2388: fprintf(stderr,"Dsp: 0x%04x: abs %s %s\n", 1.1.1.2 ! root 2389: dsp_core->pc, 1.1 root 2390: registers_name[numreg], 2391: parallelmove_name 2392: ); 2393: } 2394: 2395: static void dsp_adc(void) 2396: { 2397: const char *srcname; 1.1.1.2 ! root 2398: Uint32 numreg; 1.1 root 2399: 2400: if (cur_inst & (1<<4)) { 2401: srcname="y"; 2402: } else { 2403: srcname="x"; 2404: } 2405: 2406: numreg=DSP_REG_A+((cur_inst>>3) & 1); 2407: registers_changed[numreg]=1; 1.1.1.2 ! root 2408: registers_changed[DSP_REG_SR]=1; 1.1 root 2409: 2410: fprintf(stderr,"Dsp: 0x%04x: adc %s,%s %s\n", 1.1.1.2 ! root 2411: dsp_core->pc, 1.1 root 2412: srcname, 2413: registers_name[numreg], 2414: parallelmove_name 2415: ); 2416: } 2417: 2418: static void dsp_add(void) 2419: { 2420: const char *srcname; 1.1.1.2 ! root 2421: Uint32 srcreg, dstreg; 1.1 root 2422: 2423: srcreg = (cur_inst>>4) & BITMASK(3); 2424: dstreg = (cur_inst>>3) & 1; 2425: 2426: switch(srcreg) { 2427: case 1: 2428: srcreg = dstreg ^ 1; 2429: srcname = registers_name[DSP_REG_A+srcreg]; 2430: break; 2431: case 2: 2432: srcname="x"; 2433: break; 2434: case 3: 2435: srcname="y"; 2436: break; 1.1.1.2 ! root 2437: case 4: ! 2438: srcname=registers_name[DSP_REG_X0]; ! 2439: break; ! 2440: case 5: ! 2441: srcname=registers_name[DSP_REG_Y0]; ! 2442: break; ! 2443: case 6: ! 2444: srcname=registers_name[DSP_REG_X1]; ! 2445: break; ! 2446: case 7: ! 2447: srcname=registers_name[DSP_REG_Y1]; 1.1 root 2448: break; 2449: default: 2450: srcname=""; 2451: break; 2452: } 2453: 2454: registers_changed[DSP_REG_A+dstreg]=1; 1.1.1.2 ! root 2455: registers_changed[DSP_REG_SR]=1; ! 2456: 1.1 root 2457: fprintf(stderr,"Dsp: 0x%04x: add %s,%s %s\n", 1.1.1.2 ! root 2458: dsp_core->pc, 1.1 root 2459: srcname, 2460: registers_name[DSP_REG_A+dstreg], 2461: parallelmove_name 2462: ); 2463: } 2464: 2465: static void dsp_addl(void) 2466: { 1.1.1.2 ! root 2467: Uint32 numreg; 1.1 root 2468: 2469: numreg = (cur_inst>>3) & 1; 2470: 2471: registers_changed[DSP_REG_A+numreg]=1; 1.1.1.2 ! root 2472: registers_changed[DSP_REG_SR]=1; ! 2473: 1.1 root 2474: fprintf(stderr,"Dsp: 0x%04x: addl %s,%s %s\n", 1.1.1.2 ! root 2475: dsp_core->pc, 1.1 root 2476: registers_name[DSP_REG_A+(numreg ^ 1)], 2477: registers_name[DSP_REG_A+numreg], 2478: parallelmove_name 2479: ); 2480: } 2481: 2482: static void dsp_addr(void) 2483: { 1.1.1.2 ! root 2484: Uint32 numreg; 1.1 root 2485: 2486: numreg = (cur_inst>>3) & 1; 2487: 2488: registers_changed[DSP_REG_A+numreg]=1; 1.1.1.2 ! root 2489: registers_changed[DSP_REG_SR]=1; ! 2490: 1.1 root 2491: fprintf(stderr,"Dsp: 0x%04x: addr %s,%s %s\n", 1.1.1.2 ! root 2492: dsp_core->pc, 1.1 root 2493: registers_name[DSP_REG_A+(numreg ^ 1)], 2494: registers_name[DSP_REG_A+numreg], 2495: parallelmove_name 2496: ); 2497: } 2498: 2499: static void dsp_and(void) 2500: { 1.1.1.2 ! root 2501: Uint32 srcreg,dstreg; 1.1 root 2502: 1.1.1.2 ! root 2503: switch((cur_inst>>4) & BITMASK(2)) { ! 2504: case 1: ! 2505: srcreg=DSP_REG_Y0; ! 2506: break; ! 2507: case 2: ! 2508: srcreg=DSP_REG_X1; ! 2509: break; ! 2510: case 3: ! 2511: srcreg=DSP_REG_Y1; ! 2512: break; ! 2513: case 0: ! 2514: default: ! 2515: srcreg=DSP_REG_X0; ! 2516: } ! 2517: dstreg = DSP_REG_A+((cur_inst>>3) & 1); 1.1 root 2518: 1.1.1.2 ! root 2519: registers_changed[dstreg]=1; ! 2520: registers_changed[DSP_REG_SR]=1; 1.1 root 2521: 2522: fprintf(stderr,"Dsp: 0x%04x: and %s,%s %s\n", 1.1.1.2 ! root 2523: dsp_core->pc, ! 2524: registers_name[srcreg], ! 2525: registers_name[dstreg], 1.1 root 2526: parallelmove_name 2527: ); 2528: } 2529: 2530: static void dsp_asl(void) 2531: { 1.1.1.2 ! root 2532: Uint32 numreg; 1.1 root 2533: 2534: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2535: 2536: registers_changed[numreg]=1; 1.1.1.2 ! root 2537: registers_changed[DSP_REG_SR]=1; 1.1 root 2538: 2539: fprintf(stderr,"Dsp: 0x%04x: asl %s %s\n", 1.1.1.2 ! root 2540: dsp_core->pc, 1.1 root 2541: registers_name[numreg], 2542: parallelmove_name 2543: ); 2544: } 2545: 2546: static void dsp_asr(void) 2547: { 1.1.1.2 ! root 2548: Uint32 numreg; 1.1 root 2549: 2550: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2551: 2552: registers_changed[numreg]=1; 1.1.1.2 ! root 2553: registers_changed[DSP_REG_SR]=1; 1.1 root 2554: 2555: fprintf(stderr,"Dsp: 0x%04x: asr %s %s\n", 1.1.1.2 ! root 2556: dsp_core->pc, 1.1 root 2557: registers_name[numreg], 2558: parallelmove_name 2559: ); 2560: } 2561: 2562: static void dsp_clr(void) 2563: { 1.1.1.2 ! root 2564: Uint32 numreg; 1.1 root 2565: 2566: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2567: 2568: registers_changed[numreg]=1; 1.1.1.2 ! root 2569: registers_changed[DSP_REG_SR]=1; 1.1 root 2570: 2571: fprintf(stderr,"Dsp: 0x%04x: clr %s %s\n", 1.1.1.2 ! root 2572: dsp_core->pc, 1.1 root 2573: registers_name[numreg], 2574: parallelmove_name 2575: ); 2576: } 2577: 2578: static void dsp_cmp(void) 2579: { 1.1.1.2 ! root 2580: Uint32 srcreg, dstreg; 1.1 root 2581: 2582: srcreg = (cur_inst>>4) & BITMASK(3); 2583: dstreg = (cur_inst>>3) & 1; 2584: 2585: switch(srcreg) { 2586: case 0: 2587: srcreg = DSP_REG_A+(dstreg ^ 1); 2588: break; 2589: case 4: 2590: srcreg = DSP_REG_X0; 2591: break; 2592: case 5: 2593: srcreg = DSP_REG_Y0; 2594: break; 2595: case 6: 2596: srcreg = DSP_REG_X1; 2597: break; 2598: case 7: 2599: srcreg = DSP_REG_Y1; 2600: break; 2601: } 2602: 1.1.1.2 ! root 2603: registers_changed[DSP_REG_SR]=1; ! 2604: 1.1 root 2605: fprintf(stderr,"Dsp: 0x%04x: cmp %s,%s %s\n", 1.1.1.2 ! root 2606: dsp_core->pc, 1.1 root 2607: registers_name[srcreg], 2608: registers_name[DSP_REG_A+dstreg], 2609: parallelmove_name 2610: ); 2611: } 2612: 2613: static void dsp_cmpm(void) 2614: { 1.1.1.2 ! root 2615: Uint32 srcreg, dstreg; 1.1 root 2616: 2617: srcreg = (cur_inst>>4) & BITMASK(3); 2618: dstreg = (cur_inst>>3) & 1; 2619: 2620: switch(srcreg) { 2621: case 0: 2622: srcreg = DSP_REG_A+(dstreg ^ 1); 2623: break; 2624: case 4: 2625: srcreg = DSP_REG_X0; 2626: break; 2627: case 5: 2628: srcreg = DSP_REG_Y0; 2629: break; 2630: case 6: 2631: srcreg = DSP_REG_X1; 2632: break; 2633: case 7: 2634: srcreg = DSP_REG_Y1; 2635: break; 2636: } 2637: 1.1.1.2 ! root 2638: registers_changed[DSP_REG_SR]=1; ! 2639: 1.1 root 2640: fprintf(stderr,"Dsp: 0x%04x: cmpm %s,%s %s\n", 1.1.1.2 ! root 2641: dsp_core->pc, 1.1 root 2642: registers_name[srcreg], 2643: registers_name[DSP_REG_A+dstreg], 2644: parallelmove_name 2645: ); 2646: } 2647: 2648: static void dsp_eor(void) 2649: { 1.1.1.2 ! root 2650: Uint32 srcreg, dstreg; 1.1 root 2651: 1.1.1.2 ! root 2652: switch((cur_inst>>4) & BITMASK(2)) { ! 2653: case 1: ! 2654: srcreg=DSP_REG_Y0; ! 2655: break; ! 2656: case 2: ! 2657: srcreg=DSP_REG_X1; ! 2658: break; ! 2659: case 3: ! 2660: srcreg=DSP_REG_Y1; ! 2661: break; ! 2662: case 0: ! 2663: default: ! 2664: srcreg=DSP_REG_X0; ! 2665: } ! 2666: dstreg = DSP_REG_A+((cur_inst>>3) & 1); 1.1 root 2667: 1.1.1.2 ! root 2668: registers_changed[dstreg]=1; ! 2669: registers_changed[DSP_REG_SR]=1; 1.1 root 2670: 2671: fprintf(stderr,"Dsp: 0x%04x: eor %s,%s %s\n", 1.1.1.2 ! root 2672: dsp_core->pc, ! 2673: registers_name[srcreg], ! 2674: registers_name[dstreg], 1.1 root 2675: parallelmove_name 2676: ); 2677: } 2678: 2679: static void dsp_lsl(void) 2680: { 1.1.1.2 ! root 2681: Uint32 numreg; 1.1 root 2682: 2683: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2684: 2685: registers_changed[numreg]=1; 1.1.1.2 ! root 2686: registers_changed[DSP_REG_SR]=1; 1.1 root 2687: 2688: fprintf(stderr,"Dsp: 0x%04x: lsl %s %s\n", 1.1.1.2 ! root 2689: dsp_core->pc, 1.1 root 2690: registers_name[numreg], 2691: parallelmove_name 2692: ); 2693: } 2694: 2695: static void dsp_lsr(void) 2696: { 1.1.1.2 ! root 2697: Uint32 numreg; 1.1 root 2698: 2699: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2700: 2701: registers_changed[numreg]=1; 1.1.1.2 ! root 2702: registers_changed[DSP_REG_SR]=1; 1.1 root 2703: 2704: fprintf(stderr,"Dsp: 0x%04x: lsr %s %s\n", 1.1.1.2 ! root 2705: dsp_core->pc, 1.1 root 2706: registers_name[numreg], 2707: parallelmove_name 2708: ); 2709: } 2710: 2711: static void dsp_mac(void) 2712: { 2713: const char *sign_name; 1.1.1.2 ! root 2714: Uint32 src1reg=DSP_REG_NULL, src2reg=DSP_REG_NULL, dstreg; 1.1 root 2715: 2716: if (cur_inst & (1<<2)) { 2717: sign_name="-"; 2718: } else { 2719: sign_name=""; 2720: } 2721: 2722: switch((cur_inst>>4) & BITMASK(3)) { 2723: case 0: 2724: src1reg = DSP_REG_X0; 2725: src2reg = DSP_REG_X0; 2726: break; 2727: case 1: 2728: src1reg = DSP_REG_Y0; 2729: src2reg = DSP_REG_Y0; 2730: break; 2731: case 2: 2732: src1reg = DSP_REG_X1; 2733: src2reg = DSP_REG_X0; 2734: break; 2735: case 3: 2736: src1reg = DSP_REG_Y1; 2737: src2reg = DSP_REG_Y0; 2738: break; 2739: case 4: 2740: src1reg = DSP_REG_X0; 2741: src2reg = DSP_REG_Y1; 2742: break; 2743: case 5: 2744: src1reg = DSP_REG_Y0; 2745: src2reg = DSP_REG_X0; 2746: break; 2747: case 6: 2748: src1reg = DSP_REG_X1; 2749: src2reg = DSP_REG_Y0; 2750: break; 2751: case 7: 2752: src1reg = DSP_REG_Y1; 2753: src2reg = DSP_REG_X1; 2754: break; 2755: } 2756: dstreg = (cur_inst>>3) & 1; 2757: 2758: registers_changed[DSP_REG_A+dstreg]=1; 1.1.1.2 ! root 2759: registers_changed[DSP_REG_SR]=1; ! 2760: 1.1 root 2761: fprintf(stderr,"Dsp: 0x%04x: mac %s%s,%s,%s %s\n", 1.1.1.2 ! root 2762: dsp_core->pc, 1.1 root 2763: sign_name, 2764: registers_name[src1reg], 2765: registers_name[src2reg], 2766: registers_name[DSP_REG_A+dstreg], 2767: parallelmove_name 2768: ); 2769: } 2770: 2771: static void dsp_macr(void) 2772: { 2773: const char *sign_name; 1.1.1.2 ! root 2774: Uint32 src1reg=DSP_REG_NULL, src2reg=DSP_REG_NULL, dstreg; 1.1 root 2775: 2776: if (cur_inst & (1<<2)) { 2777: sign_name="-"; 2778: } else { 2779: sign_name=""; 2780: } 2781: 2782: switch((cur_inst>>4) & BITMASK(3)) { 2783: case 0: 2784: src1reg = DSP_REG_X0; 2785: src2reg = DSP_REG_X0; 2786: break; 2787: case 1: 2788: src1reg = DSP_REG_Y0; 2789: src2reg = DSP_REG_Y0; 2790: break; 2791: case 2: 2792: src1reg = DSP_REG_X1; 2793: src2reg = DSP_REG_X0; 2794: break; 2795: case 3: 2796: src1reg = DSP_REG_Y1; 2797: src2reg = DSP_REG_Y0; 2798: break; 2799: case 4: 2800: src1reg = DSP_REG_X0; 2801: src2reg = DSP_REG_Y1; 2802: break; 2803: case 5: 2804: src1reg = DSP_REG_Y0; 2805: src2reg = DSP_REG_X0; 2806: break; 2807: case 6: 2808: src1reg = DSP_REG_X1; 2809: src2reg = DSP_REG_Y0; 2810: break; 2811: case 7: 2812: src1reg = DSP_REG_Y1; 2813: src2reg = DSP_REG_X1; 2814: break; 2815: } 2816: dstreg = (cur_inst>>3) & 1; 2817: 2818: registers_changed[DSP_REG_A+dstreg]=1; 1.1.1.2 ! root 2819: registers_changed[DSP_REG_SR]=1; ! 2820: 1.1 root 2821: fprintf(stderr,"Dsp: 0x%04x: macr %s%s,%s,%s %s\n", 1.1.1.2 ! root 2822: dsp_core->pc, 1.1 root 2823: sign_name, 2824: registers_name[src1reg], 2825: registers_name[src2reg], 2826: registers_name[DSP_REG_A+dstreg], 2827: parallelmove_name 2828: ); 2829: } 2830: 2831: static void dsp_move(void) 2832: { 1.1.1.2 ! root 2833: fprintf(stderr,"Dsp: 0x%04x: move %s\n",dsp_core->pc, parallelmove_name); 1.1 root 2834: } 2835: 2836: static void dsp_move_nopm(void) 2837: { 2838: dsp_pm(); 1.1.1.2 ! root 2839: fprintf(stderr,"Dsp: 0x%04x: move %s\n",dsp_core->pc, parallelmove_name); 1.1 root 2840: } 2841: 2842: static void dsp_mpy(void) 2843: { 2844: const char *sign_name; 1.1.1.2 ! root 2845: Uint32 src1reg=DSP_REG_NULL, src2reg=DSP_REG_NULL, dstreg; 1.1 root 2846: 2847: if (cur_inst & (1<<2)) { 2848: sign_name="-"; 2849: } else { 2850: sign_name=""; 2851: } 2852: 2853: switch((cur_inst>>4) & BITMASK(3)) { 2854: case 0: 2855: src1reg = DSP_REG_X0; 2856: src2reg = DSP_REG_X0; 2857: break; 2858: case 1: 2859: src1reg = DSP_REG_Y0; 2860: src2reg = DSP_REG_Y0; 2861: break; 2862: case 2: 2863: src1reg = DSP_REG_X1; 2864: src2reg = DSP_REG_X0; 2865: break; 2866: case 3: 2867: src1reg = DSP_REG_Y1; 2868: src2reg = DSP_REG_Y0; 2869: break; 2870: case 4: 2871: src1reg = DSP_REG_X0; 2872: src2reg = DSP_REG_Y1; 2873: break; 2874: case 5: 2875: src1reg = DSP_REG_Y0; 2876: src2reg = DSP_REG_X0; 2877: break; 2878: case 6: 2879: src1reg = DSP_REG_X1; 2880: src2reg = DSP_REG_Y0; 2881: break; 2882: case 7: 2883: src1reg = DSP_REG_Y1; 2884: src2reg = DSP_REG_X1; 2885: break; 2886: } 2887: dstreg = (cur_inst>>3) & 1; 2888: 2889: registers_changed[DSP_REG_A+dstreg]=1; 1.1.1.2 ! root 2890: registers_changed[DSP_REG_SR]=1; ! 2891: 1.1 root 2892: fprintf(stderr,"Dsp: 0x%04x: mpy %s%s,%s,%s %s\n", 1.1.1.2 ! root 2893: dsp_core->pc, 1.1 root 2894: sign_name, 2895: registers_name[src1reg], 2896: registers_name[src2reg], 2897: registers_name[DSP_REG_A+dstreg], 2898: parallelmove_name 2899: ); 2900: } 2901: 2902: static void dsp_mpyr(void) 2903: { 2904: const char *sign_name; 1.1.1.2 ! root 2905: Uint32 src1reg=DSP_REG_NULL, src2reg=DSP_REG_NULL, dstreg; 1.1 root 2906: 2907: if (cur_inst & (1<<2)) { 2908: sign_name="-"; 2909: } else { 2910: sign_name=""; 2911: } 2912: 2913: switch((cur_inst>>4) & BITMASK(3)) { 2914: case 0: 2915: src1reg = DSP_REG_X0; 2916: src2reg = DSP_REG_X0; 2917: break; 2918: case 1: 2919: src1reg = DSP_REG_Y0; 2920: src2reg = DSP_REG_Y0; 2921: break; 2922: case 2: 2923: src1reg = DSP_REG_X1; 2924: src2reg = DSP_REG_X0; 2925: break; 2926: case 3: 2927: src1reg = DSP_REG_Y1; 2928: src2reg = DSP_REG_Y0; 2929: break; 2930: case 4: 2931: src1reg = DSP_REG_X0; 2932: src2reg = DSP_REG_Y1; 2933: break; 2934: case 5: 2935: src1reg = DSP_REG_Y0; 2936: src2reg = DSP_REG_X0; 2937: break; 2938: case 6: 2939: src1reg = DSP_REG_X1; 2940: src2reg = DSP_REG_Y0; 2941: break; 2942: case 7: 2943: src1reg = DSP_REG_Y1; 2944: src2reg = DSP_REG_X1; 2945: break; 2946: } 2947: dstreg = (cur_inst>>3) & 1; 2948: 2949: registers_changed[DSP_REG_A+dstreg]=1; 1.1.1.2 ! root 2950: registers_changed[DSP_REG_SR]=1; ! 2951: 1.1 root 2952: fprintf(stderr,"Dsp: 0x%04x: mpyr %s%s,%s,%s %s\n", 1.1.1.2 ! root 2953: dsp_core->pc, 1.1 root 2954: sign_name, 2955: registers_name[src1reg], 2956: registers_name[src2reg], 2957: registers_name[DSP_REG_A+dstreg], 2958: parallelmove_name 2959: ); 2960: } 2961: 2962: static void dsp_neg(void) 2963: { 1.1.1.2 ! root 2964: Uint32 numreg; 1.1 root 2965: 2966: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2967: 2968: registers_changed[numreg]=1; 1.1.1.2 ! root 2969: registers_changed[DSP_REG_SR]=1; 1.1 root 2970: 2971: fprintf(stderr,"Dsp: 0x%04x: neg %s %s\n", 1.1.1.2 ! root 2972: dsp_core->pc, 1.1 root 2973: registers_name[numreg], 2974: parallelmove_name 2975: ); 2976: } 2977: 2978: static void dsp_not(void) 2979: { 1.1.1.2 ! root 2980: Uint32 numreg; 1.1 root 2981: 2982: numreg = DSP_REG_A+((cur_inst>>3) & 1); 2983: 2984: registers_changed[numreg]=1; 1.1.1.2 ! root 2985: registers_changed[DSP_REG_SR]=1; 1.1 root 2986: 2987: fprintf(stderr,"Dsp: 0x%04x: not %s %s\n", 1.1.1.2 ! root 2988: dsp_core->pc, 1.1 root 2989: registers_name[numreg], 2990: parallelmove_name 2991: ); 2992: } 2993: 2994: static void dsp_or(void) 2995: { 1.1.1.2 ! root 2996: Uint32 srcreg, dstreg; 1.1 root 2997: 1.1.1.2 ! root 2998: switch((cur_inst>>4) & BITMASK(2)) { ! 2999: case 1: ! 3000: srcreg=DSP_REG_Y0; ! 3001: break; ! 3002: case 2: ! 3003: srcreg=DSP_REG_X1; ! 3004: break; ! 3005: case 3: ! 3006: srcreg=DSP_REG_Y1; ! 3007: break; ! 3008: case 0: ! 3009: default: ! 3010: srcreg=DSP_REG_X0; ! 3011: } ! 3012: dstreg = DSP_REG_A+((cur_inst>>3) & 1); 1.1 root 3013: 1.1.1.2 ! root 3014: registers_changed[dstreg]=1; ! 3015: registers_changed[DSP_REG_SR]=1; 1.1 root 3016: 3017: fprintf(stderr,"Dsp: 0x%04x: or %s,%s %s\n", 1.1.1.2 ! root 3018: dsp_core->pc, ! 3019: registers_name[srcreg], ! 3020: registers_name[dstreg], 1.1 root 3021: parallelmove_name 3022: ); 3023: } 3024: 3025: static void dsp_rnd(void) 3026: { 1.1.1.2 ! root 3027: Uint32 numreg; 1.1 root 3028: 3029: numreg = DSP_REG_A+((cur_inst>>3) & 1); 3030: 3031: registers_changed[numreg]=1; 1.1.1.2 ! root 3032: registers_changed[DSP_REG_SR]=1; 1.1 root 3033: 3034: fprintf(stderr,"Dsp: 0x%04x: rnd %s %s\n", 1.1.1.2 ! root 3035: dsp_core->pc, 1.1 root 3036: registers_name[numreg], 3037: parallelmove_name 3038: ); 3039: } 3040: 3041: static void dsp_rol(void) 3042: { 1.1.1.2 ! root 3043: Uint32 numreg; 1.1 root 3044: 3045: numreg = DSP_REG_A+((cur_inst>>3) & 1); 3046: 3047: registers_changed[numreg]=1; 1.1.1.2 ! root 3048: registers_changed[DSP_REG_SR]=1; 1.1 root 3049: 3050: fprintf(stderr,"Dsp: 0x%04x: rol %s %s\n", 1.1.1.2 ! root 3051: dsp_core->pc, 1.1 root 3052: registers_name[numreg], 3053: parallelmove_name 3054: ); 3055: } 3056: 3057: static void dsp_ror(void) 3058: { 1.1.1.2 ! root 3059: Uint32 numreg; 1.1 root 3060: 3061: numreg = DSP_REG_A+((cur_inst>>3) & 1); 3062: 3063: registers_changed[numreg]=1; 1.1.1.2 ! root 3064: registers_changed[DSP_REG_SR]=1; 1.1 root 3065: 3066: fprintf(stderr,"Dsp: 0x%04x: ror %s %s\n", 1.1.1.2 ! root 3067: dsp_core->pc, 1.1 root 3068: registers_name[numreg], 3069: parallelmove_name 3070: ); 3071: } 3072: 3073: static void dsp_sbc(void) 3074: { 3075: const char *srcname; 1.1.1.2 ! root 3076: Uint32 numreg; 1.1 root 3077: 3078: if (cur_inst & (1<<4)) { 3079: srcname="y"; 3080: } else { 3081: srcname="x"; 3082: } 3083: 3084: numreg = DSP_REG_A+((cur_inst>>3) & 1); 3085: 3086: registers_changed[numreg]=1; 1.1.1.2 ! root 3087: registers_changed[DSP_REG_SR]=1; 1.1 root 3088: 3089: fprintf(stderr,"Dsp: 0x%04x: sbc %s,%s %s\n", 1.1.1.2 ! root 3090: dsp_core->pc, 1.1 root 3091: srcname, 3092: registers_name[numreg], 3093: parallelmove_name 3094: ); 3095: } 3096: 3097: static void dsp_sub(void) 3098: { 3099: const char *srcname; 1.1.1.2 ! root 3100: Uint32 srcreg, dstreg; 1.1 root 3101: 3102: srcreg = (cur_inst>>4) & BITMASK(3); 3103: dstreg = (cur_inst>>3) & 1; 3104: 3105: switch(srcreg) { 3106: case 1: 3107: srcreg = dstreg ^ 1; 3108: srcname = registers_name[DSP_REG_A+srcreg]; 3109: break; 3110: case 2: 3111: srcname="x"; 3112: break; 3113: case 3: 3114: srcname="y"; 3115: break; 1.1.1.2 ! root 3116: case 4: ! 3117: srcname=registers_name[DSP_REG_X0]; ! 3118: break; ! 3119: case 5: ! 3120: srcname=registers_name[DSP_REG_Y0]; ! 3121: break; ! 3122: case 6: ! 3123: srcname=registers_name[DSP_REG_X1]; ! 3124: break; ! 3125: case 7: ! 3126: srcname=registers_name[DSP_REG_Y1]; 1.1 root 3127: break; 3128: default: 3129: srcname=""; 3130: break; 3131: } 3132: 3133: registers_changed[DSP_REG_A+dstreg]=1; 1.1.1.2 ! root 3134: registers_changed[DSP_REG_SR]=1; ! 3135: 1.1 root 3136: fprintf(stderr,"Dsp: 0x%04x: sub %s,%s %s\n", 1.1.1.2 ! root 3137: dsp_core->pc, 1.1 root 3138: srcname, 3139: registers_name[DSP_REG_A+dstreg], 3140: parallelmove_name 3141: ); 3142: } 3143: 3144: static void dsp_subl(void) 3145: { 1.1.1.2 ! root 3146: Uint32 numreg; 1.1 root 3147: 3148: numreg = (cur_inst>>3) & 1; 3149: 3150: registers_changed[DSP_REG_A+numreg]=1; 1.1.1.2 ! root 3151: registers_changed[DSP_REG_SR]=1; ! 3152: 1.1 root 3153: fprintf(stderr,"Dsp: 0x%04x: subl %s,%s %s\n", 1.1.1.2 ! root 3154: dsp_core->pc, 1.1 root 3155: registers_name[DSP_REG_A+(numreg ^ 1)], 3156: registers_name[DSP_REG_A+numreg], 3157: parallelmove_name 3158: ); 3159: } 3160: 3161: static void dsp_subr(void) 3162: { 1.1.1.2 ! root 3163: Uint32 numreg; 1.1 root 3164: 3165: numreg = (cur_inst>>3) & 1; 3166: 3167: registers_changed[DSP_REG_A+numreg]=1; 1.1.1.2 ! root 3168: registers_changed[DSP_REG_SR]=1; ! 3169: 1.1 root 3170: fprintf(stderr,"Dsp: 0x%04x: subr %s,%s %s\n", 1.1.1.2 ! root 3171: dsp_core->pc, 1.1 root 3172: registers_name[DSP_REG_A+(numreg ^ 1)], 3173: registers_name[DSP_REG_A+numreg], 3174: parallelmove_name 3175: ); 3176: } 3177: 3178: static void dsp_tfr(void) 3179: { 1.1.1.2 ! root 3180: Uint32 srcreg, dstreg; 1.1 root 3181: 3182: srcreg = (cur_inst>>4) & BITMASK(3); 3183: dstreg = (cur_inst>>3) & 1; 3184: 1.1.1.2 ! root 3185: switch(srcreg) { ! 3186: case 4: ! 3187: srcreg = DSP_REG_X0; ! 3188: break; ! 3189: case 5: ! 3190: srcreg = DSP_REG_Y0; ! 3191: break; ! 3192: case 6: ! 3193: srcreg = DSP_REG_X1; ! 3194: break; ! 3195: case 7: ! 3196: srcreg = DSP_REG_Y1; ! 3197: break; ! 3198: case 0: ! 3199: default: ! 3200: srcreg = DSP_REG_A+(dstreg ^ 1); ! 3201: break; 1.1 root 3202: } 3203: 3204: registers_changed[DSP_REG_A+dstreg]=1; 1.1.1.2 ! root 3205: registers_changed[DSP_REG_SR]=1; ! 3206: 1.1 root 3207: fprintf(stderr,"Dsp: 0x%04x: tfr %s,%s %s\n", 1.1.1.2 ! root 3208: dsp_core->pc, 1.1 root 3209: registers_name[srcreg], 3210: registers_name[DSP_REG_A+dstreg], 3211: parallelmove_name 3212: ); 3213: } 3214: 3215: static void dsp_tst(void) 3216: { 1.1.1.2 ! root 3217: registers_changed[DSP_REG_SR]=1; ! 3218: 1.1 root 3219: fprintf(stderr,"Dsp: 0x%04x: tst %s %s\n", 1.1.1.2 ! root 3220: dsp_core->pc, 1.1 root 3221: registers_name[DSP_REG_A+((cur_inst>>3) & 1)], 3222: parallelmove_name 3223: ); 3224: }
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