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1.1 root 1: /*
2: Hatari - hd6301_cpu.c
3: Copyright Laurent Sallafranque 2009
4:
1.1.1.2 ! root 5: This file is distributed under the GNU General Public License, version 2
! 6: or at your option any later version. Read the file gpl.txt for details.
1.1 root 7:
8: hd6301_cpu.c - this is the cpu core emulation for hd 6301 processor
9: */
10:
11: #ifdef HAVE_CONFIG_H
12: #include "config.h"
13: #endif
14:
15: #include <string.h>
16: #include <SDL.h>
17:
18: #include "hd6301_cpu.h"
19:
20:
21: /**********************************
22: * Defines
23: **********************************/
24: #define HD6301_DISASM 1
25: #define HD6301_DISPLAY_REGS 1
26:
27: /* HD6301 Disasm and debug code */
28: #define HD6301_DISASM_UNDEFINED 0
29: #define HD6301_DISASM_NONE 1
30: #define HD6301_DISASM_MEMORY8 2
31: #define HD6301_DISASM_MEMORY16 3
32: #define HD6301_DISASM_XIM 4
33:
34: /* CCR bits for clearing */
35:
36: #define HD6301_CLR_HNZVC hd6301_reg_CCR &= 0xd0
37: #define HD6301_CLR_HNZC hd6301_reg_CCR &= 0xd2
38: #define HD6301_CLR_NZVC hd6301_reg_CCR &= 0xf0
39: #define HD6301_CLR_NZV hd6301_reg_CCR &= 0xf1
40: #define HD6301_CLR_NZC hd6301_reg_CCR &= 0xf2
41: #define HD6301_CLR_ZC hd6301_reg_CCR &= 0xfa
42: #define HD6301_CLR_I hd6301_reg_CCR &= 0xef
43: #define HD6301_CLR_Z hd6301_reg_CCR &= 0xfb
44: #define HD6301_CLR_V hd6301_reg_CCR &= 0xfd
45: #define HD6301_CLR_C hd6301_reg_CCR &= 0xfe
46:
47:
48: /**********************************
49: * macros for CCR processing
50: * adapted from mame project
51: **********************************/
52: #define HD6301_SET_Z8(a) hd6301_reg_CCR |= (((Uint8)(a) == 0) << 1)
53: #define HD6301_SET_Z16(a) hd6301_reg_CCR |= (((Uint16)(a) == 0) << 1)
54: #define HD6301_SET_N8(a) hd6301_reg_CCR |= (((a) & 0x80) >> 4)
55: #define HD6301_SET_N16(a) hd6301_reg_CCR |= (((a) & 0x8000) >> 12)
56: #define HD6301_SET_C8(a) hd6301_reg_CCR |= (((a) & 0x100) >> 8)
57: #define HD6301_SET_C16(a) hd6301_reg_CCR |= (((a) & 0x10000) >> 16)
58: #define HD6301_SET_V8(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)^((r)>>1)) & 0x80) >> 6)
59: #define HD6301_SET_V16(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)^((r)>>1)) & 0x8000) >> 14)
60: #define HD6301_SET_H(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)) & 0x10) << 1)
61:
62:
63: #define HD6301_SET_NZ8(a) {HD6301_SET_N8(a);HD6301_SET_Z8(a);}
64: #define HD6301_SET_NZ16(a) {HD6301_SET_N16(a);HD6301_SET_Z16(a);}
65: #define HD6301_SET_FLAGS8(a,b,r) {HD6301_SET_N8(r);HD6301_SET_Z8(r);HD6301_SET_V8(a,b,r);HD6301_SET_C8(r);}
66: #define HD6301_SET_FLAGS16(a,b,r) {HD6301_SET_N16(r);HD6301_SET_Z16(r);HD6301_SET_V16(a,b,r);HD6301_SET_C16(r);}
67:
68:
69: /**********************************
70: * Functions
71: **********************************/
72:
73: /* HD6301 internal functions */
74: static Uint8 hd6301_read_memory(Uint16 addr);
75: static void hd6301_write_memory (Uint16 addr, Uint8 value);
76: static Uint16 hd6301_get_memory_ext(void);
77:
78: /* HD6301 opcodes functions */
79: static void hd6301_undefined(void);
80: static void hd6301_nop(void);
81: static void hd6301_lsrd(void);
82: static void hd6301_asld(void);
83: static void hd6301_tap(void);
84: static void hd6301_tpa(void);
85: static void hd6301_inx(void);
86: static void hd6301_dex(void);
87: static void hd6301_clv(void);
88: static void hd6301_sev(void);
89: static void hd6301_clc(void);
90: static void hd6301_sec(void);
91: static void hd6301_cli(void);
92: static void hd6301_sei(void);
93: static void hd6301_sba(void);
94: static void hd6301_cba(void);
95: static void hd6301_tab(void);
96: static void hd6301_tba(void);
97: static void hd6301_xgdx(void);
98: static void hd6301_daa(void);
99: static void hd6301_slp(void);
100: static void hd6301_aba(void);
101: static void hd6301_bra(void);
102: static void hd6301_brn(void);
103: static void hd6301_bhi(void);
104: static void hd6301_bls(void);
105: static void hd6301_bcc(void);
106: static void hd6301_bcs(void);
107: static void hd6301_bne(void);
108: static void hd6301_beq(void);
109: static void hd6301_bvc(void);
110: static void hd6301_bvs(void);
111: static void hd6301_bpl(void);
112: static void hd6301_bmi(void);
113: static void hd6301_bge(void);
114: static void hd6301_blt(void);
115: static void hd6301_bgt(void);
116: static void hd6301_ble(void);
117: static void hd6301_tsx(void);
118: static void hd6301_ins(void);
119: static void hd6301_pula(void);
120: static void hd6301_pulb(void);
121: static void hd6301_des(void);
122: static void hd6301_txs(void);
123: static void hd6301_psha(void);
124: static void hd6301_pshb(void);
125: static void hd6301_pulx(void);
126: static void hd6301_rts(void);
127: static void hd6301_abx(void);
128: static void hd6301_rti(void);
129: static void hd6301_pshx(void);
130: static void hd6301_mul(void);
131: static void hd6301_wai(void);
132: static void hd6301_swi(void);
133: static void hd6301_nega(void);
134: static void hd6301_coma(void);
135: static void hd6301_lsra(void);
136: static void hd6301_rora(void);
137: static void hd6301_asra(void);
138: static void hd6301_asla(void);
139: static void hd6301_rola(void);
140: static void hd6301_deca(void);
141: static void hd6301_inca(void);
142: static void hd6301_tsta(void);
143: static void hd6301_clra(void);
144: static void hd6301_negb(void);
145: static void hd6301_comb(void);
146: static void hd6301_lsrb(void);
147: static void hd6301_rorb(void);
148: static void hd6301_asrb(void);
149: static void hd6301_aslb(void);
150: static void hd6301_rolb(void);
151: static void hd6301_decb(void);
152: static void hd6301_incb(void);
153: static void hd6301_tstb(void);
154: static void hd6301_clrb(void);
155: static void hd6301_neg_ind(void);
156: static void hd6301_aim_ind(void);
157: static void hd6301_oim_ind(void);
158: static void hd6301_com_ind(void);
159: static void hd6301_lsr_ind(void);
160: static void hd6301_eim_ind(void);
161: static void hd6301_ror_ind(void);
162: static void hd6301_asr_ind(void);
163: static void hd6301_asl_ind(void);
164: static void hd6301_rol_ind(void);
165: static void hd6301_dec_ind(void);
166: static void hd6301_tim_ind(void);
167: static void hd6301_inc_ind(void);
168: static void hd6301_tst_ind(void);
169: static void hd6301_jmp_ind(void);
170: static void hd6301_clr_ind(void);
171: static void hd6301_neg_ext(void);
172: static void hd6301_aim_dir(void);
173: static void hd6301_oim_dir(void);
174: static void hd6301_com_ext(void);
175: static void hd6301_lsr_ext(void);
176: static void hd6301_eim_dir(void);
177: static void hd6301_ror_ext(void);
178: static void hd6301_asr_ext(void);
179: static void hd6301_asl_ext(void);
180: static void hd6301_rol_ext(void);
181: static void hd6301_dec_ext(void);
182: static void hd6301_tim_dir(void);
183: static void hd6301_inc_ext(void);
184: static void hd6301_tst_ext(void);
185: static void hd6301_jmp_ext(void);
186: static void hd6301_clr_ext(void);
187: static void hd6301_suba_imm(void);
188: static void hd6301_cmpa_imm(void);
189: static void hd6301_sbca_imm(void);
190: static void hd6301_subd_imm(void);
191: static void hd6301_anda_imm(void);
192: static void hd6301_bita_imm(void);
193: static void hd6301_ldaa_imm(void);
194: static void hd6301_eora_imm(void);
195: static void hd6301_adca_imm(void);
196: static void hd6301_oraa_imm(void);
197: static void hd6301_adda_imm(void);
198: static void hd6301_cpx_imm(void);
199: static void hd6301_bsr(void);
200: static void hd6301_lds_imm(void);
201: static void hd6301_suba_dir(void);
202: static void hd6301_cmpa_dir(void);
203: static void hd6301_sbca_dir(void);
204: static void hd6301_subd_dir(void);
205: static void hd6301_anda_dir(void);
206: static void hd6301_bita_dir(void);
207: static void hd6301_ldaa_dir(void);
208: static void hd6301_staa_dir(void);
209: static void hd6301_eora_dir(void);
210: static void hd6301_adca_dir(void);
211: static void hd6301_oraa_dir(void);
212: static void hd6301_adda_dir(void);
213: static void hd6301_cpx_dir(void);
214: static void hd6301_jsr_dir(void);
215: static void hd6301_lds_dir(void);
216: static void hd6301_sts_dir(void);
217: static void hd6301_suba_ind(void);
218: static void hd6301_cmpa_ind(void);
219: static void hd6301_sbca_ind(void);
220: static void hd6301_subd_ind(void);
221: static void hd6301_anda_ind(void);
222: static void hd6301_bita_ind(void);
223: static void hd6301_ldaa_ind(void);
224: static void hd6301_staa_ind(void);
225: static void hd6301_eora_ind(void);
226: static void hd6301_adca_ind(void);
227: static void hd6301_oraa_ind(void);
228: static void hd6301_adda_ind(void);
229: static void hd6301_cpx_ind(void);
230: static void hd6301_jsr_ind(void);
231: static void hd6301_lds_ind(void);
232: static void hd6301_sts_ind(void);
233: static void hd6301_suba_ext(void);
234: static void hd6301_cmpa_ext(void);
235: static void hd6301_sbca_ext(void);
236: static void hd6301_subd_ext(void);
237: static void hd6301_anda_ext(void);
238: static void hd6301_bita_ext(void);
239: static void hd6301_ldaa_ext(void);
240: static void hd6301_staa_ext(void);
241: static void hd6301_eora_ext(void);
242: static void hd6301_adca_ext(void);
243: static void hd6301_oraa_ext(void);
244: static void hd6301_adda_ext(void);
245: static void hd6301_cpx_ext(void);
246: static void hd6301_jsr_ext(void);
247: static void hd6301_lds_ext(void);
248: static void hd6301_sts_ext(void);
249: static void hd6301_subb_imm(void);
250: static void hd6301_cmpb_imm(void);
251: static void hd6301_sbcb_imm(void);
252: static void hd6301_addd_imm(void);
253: static void hd6301_andb_imm(void);
254: static void hd6301_bitb_imm(void);
255: static void hd6301_ldab_imm(void);
256: static void hd6301_eorb_imm(void);
257: static void hd6301_adcb_imm(void);
258: static void hd6301_orab_imm(void);
259: static void hd6301_addb_imm(void);
260: static void hd6301_ldd_imm(void);
261: static void hd6301_ldx_imm(void);
262: static void hd6301_subb_dir(void);
263: static void hd6301_cmpb_dir(void);
264: static void hd6301_sbcb_dir(void);
265: static void hd6301_addd_dir(void);
266: static void hd6301_andb_dir(void);
267: static void hd6301_bitb_dir(void);
268: static void hd6301_ldab_dir(void);
269: static void hd6301_stab_dir(void);
270: static void hd6301_eorb_dir(void);
271: static void hd6301_adcb_dir(void);
272: static void hd6301_orab_dir(void);
273: static void hd6301_addb_dir(void);
274: static void hd6301_ldd_dir(void);
275: static void hd6301_std_dir(void);
276: static void hd6301_ldx_dir(void);
277: static void hd6301_stx_dir(void);
278: static void hd6301_subb_ind(void);
279: static void hd6301_cmpb_ind(void);
280: static void hd6301_sbcb_ind(void);
281: static void hd6301_addd_ind(void);
282: static void hd6301_andb_ind(void);
283: static void hd6301_bitb_ind(void);
284: static void hd6301_ldab_ind(void);
285: static void hd6301_stab_ind(void);
286: static void hd6301_eorb_ind(void);
287: static void hd6301_adcb_ind(void);
288: static void hd6301_orab_ind(void);
289: static void hd6301_addb_ind(void);
290: static void hd6301_ldd_ind(void);
291: static void hd6301_std_ind(void);
292: static void hd6301_ldx_ind(void);
293: static void hd6301_stx_ind(void);
294: static void hd6301_subb_ext(void);
295: static void hd6301_cmpb_ext(void);
296: static void hd6301_sbcb_ext(void);
297: static void hd6301_addd_ext(void);
298: static void hd6301_andb_ext(void);
299: static void hd6301_bitb_ext(void);
300: static void hd6301_ldab_ext(void);
301: static void hd6301_stab_ext(void);
302: static void hd6301_eorb_ext(void);
303: static void hd6301_adcb_ext(void);
304: static void hd6301_orab_ext(void);
305: static void hd6301_addb_ext(void);
306: static void hd6301_ldd_ext(void);
307: static void hd6301_std_ext(void);
308: static void hd6301_ldx_ext(void);
309: static void hd6301_stx_ext(void);
310:
311:
312: /**********************************
313: * Variables
314: **********************************/
315: static char hd6301_str_instr[50];
316:
317: static struct hd6301_opcode_t hd6301_opcode;
318:
319: static struct hd6301_opcode_t hd6301_opcode_table[256] = {
320:
321: {0x00, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
322: {0x01, 1, hd6301_nop, 1, "nop", HD6301_DISASM_NONE},
323: {0x02, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
324: {0x03, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
325: {0x04, 1, hd6301_lsrd, 1, "lsrd", HD6301_DISASM_NONE},
326: {0x05, 1, hd6301_asld, 1, "asld", HD6301_DISASM_NONE},
327: {0x06, 1, hd6301_tap, 1, "tap", HD6301_DISASM_NONE},
328: {0x07, 1, hd6301_tpa, 1, "tpa", HD6301_DISASM_NONE},
329: {0x08, 1, hd6301_inx, 1, "inx", HD6301_DISASM_NONE},
330: {0x09, 1, hd6301_dex, 1, "dex", HD6301_DISASM_NONE},
331: {0x0a, 1, hd6301_clv, 1, "clv", HD6301_DISASM_NONE},
332: {0x0b, 1, hd6301_sev, 1, "sev", HD6301_DISASM_NONE},
333: {0x0c, 1, hd6301_clc, 1, "clc", HD6301_DISASM_NONE},
334: {0x0d, 1, hd6301_sec, 1, "sec", HD6301_DISASM_NONE},
335: {0x0e, 1, hd6301_cli, 1, "cli", HD6301_DISASM_NONE},
336: {0x0f, 1, hd6301_sei, 1, "sei", HD6301_DISASM_NONE},
337:
338: {0x10, 1, hd6301_sba, 1, "sba", HD6301_DISASM_NONE},
339: {0x11, 1, hd6301_cba, 1, "cba", HD6301_DISASM_NONE},
340: {0x12, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
341: {0x13, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
342: {0x14, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
343: {0x15, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
344: {0x16, 1, hd6301_tab, 1, "tab", HD6301_DISASM_NONE},
345: {0x17, 1, hd6301_tba, 1, "tba", HD6301_DISASM_NONE},
346: {0x18, 1, hd6301_xgdx, 2, "xgdx", HD6301_DISASM_NONE},
347: {0x19, 1, hd6301_daa, 2, "daa", HD6301_DISASM_NONE},
348: {0x1a, 1, hd6301_slp, 4, "slp", HD6301_DISASM_NONE},
349: {0x1b, 1, hd6301_aba, 1, "aba", HD6301_DISASM_NONE},
350: {0x1c, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
351: {0x1d, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
352: {0x1e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
353: {0x1f, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
354:
355: {0x20, 0, hd6301_bra, 3, "bra $%02x", HD6301_DISASM_MEMORY8},
356: {0x21, 0, hd6301_brn, 3, "brn $%02x", HD6301_DISASM_MEMORY8},
357: {0x22, 0, hd6301_bhi, 3, "bhi $%02x", HD6301_DISASM_MEMORY8},
358: {0x23, 0, hd6301_bls, 3, "bls $%02x", HD6301_DISASM_MEMORY8},
359: {0x24, 0, hd6301_bcc, 3, "bcc $%02x", HD6301_DISASM_MEMORY8},
360: {0x25, 0, hd6301_bcs, 3, "bcs $%02x", HD6301_DISASM_MEMORY8},
361: {0x26, 0, hd6301_bne, 3, "bne $%02x", HD6301_DISASM_MEMORY8},
362: {0x27, 0, hd6301_beq, 3, "beq $%02x", HD6301_DISASM_MEMORY8},
363: {0x28, 0, hd6301_bvc, 3, "bvc $%02x", HD6301_DISASM_MEMORY8},
364: {0x29, 0, hd6301_bvs, 3, "bvs $%02x", HD6301_DISASM_MEMORY8},
365: {0x2a, 0, hd6301_bpl, 3, "bpl $%02x", HD6301_DISASM_MEMORY8},
366: {0x2b, 0, hd6301_bmi, 3, "bmi $%02x", HD6301_DISASM_MEMORY8},
367: {0x2c, 0, hd6301_bge, 3, "bge $%02x", HD6301_DISASM_MEMORY8},
368: {0x2d, 0, hd6301_blt, 3, "blt $%02x", HD6301_DISASM_MEMORY8},
369: {0x2e, 0, hd6301_bgt, 3, "bgt $%02x", HD6301_DISASM_MEMORY8},
370: {0x2f, 0, hd6301_ble, 3, "ble $%02x", HD6301_DISASM_MEMORY8},
371:
372: {0x30, 1, hd6301_tsx, 1, "tsx", HD6301_DISASM_NONE},
373: {0x31, 1, hd6301_ins, 1, "ins", HD6301_DISASM_NONE},
374: {0x32, 1, hd6301_pula, 3, "pula", HD6301_DISASM_NONE},
375: {0x33, 1, hd6301_pulb, 3, "pulb", HD6301_DISASM_NONE},
376: {0x34, 1, hd6301_des, 1, "des", HD6301_DISASM_NONE},
377: {0x35, 1, hd6301_txs, 1, "txs", HD6301_DISASM_NONE},
378: {0x36, 1, hd6301_psha, 4, "psha", HD6301_DISASM_NONE},
379: {0x37, 1, hd6301_pshb, 4, "pshb", HD6301_DISASM_NONE},
380: {0x38, 1, hd6301_pulx, 4, "pulx", HD6301_DISASM_NONE},
381: {0x39, 0, hd6301_rts, 5, "rts", HD6301_DISASM_NONE},
382: {0x3a, 1, hd6301_abx, 1, "abx", HD6301_DISASM_NONE},
383: {0x3b, 0, hd6301_rti, 10, "rti", HD6301_DISASM_NONE},
384: {0x3c, 1, hd6301_pshx, 5 , "pshx", HD6301_DISASM_NONE},
385: {0x3d, 1, hd6301_mul, 7, "mul", HD6301_DISASM_NONE},
386: {0x3e, 0, hd6301_wai, 9, "wai", HD6301_DISASM_NONE},
387: {0x3f, 0, hd6301_swi, 12, "swi", HD6301_DISASM_NONE},
388:
389: {0x40, 1, hd6301_nega, 1, "nega", HD6301_DISASM_NONE},
390: {0x41, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
391: {0x42, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
392: {0x43, 1, hd6301_coma, 1, "coma", HD6301_DISASM_NONE},
393: {0x44, 1, hd6301_lsra, 1, "lsra", HD6301_DISASM_NONE},
394: {0x45, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
395: {0x46, 1, hd6301_rora, 1, "rora", HD6301_DISASM_NONE},
396: {0x47, 1, hd6301_asra, 1, "asra", HD6301_DISASM_NONE},
397: {0x48, 1, hd6301_asla, 1, "lsla", HD6301_DISASM_NONE},
398: {0x49, 1, hd6301_rola, 1, "rola", HD6301_DISASM_NONE},
399: {0x4a, 1, hd6301_deca, 1, "deca", HD6301_DISASM_NONE},
400: {0x4b, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
401: {0x4c, 1, hd6301_inca, 1, "inca", HD6301_DISASM_NONE},
402: {0x4d, 1, hd6301_tsta, 1, "tsta", HD6301_DISASM_NONE},
403: {0x4e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
404: {0x4f, 1, hd6301_clra, 1, "clra", HD6301_DISASM_NONE},
405:
406: {0x50, 1, hd6301_negb, 1, "negb", HD6301_DISASM_NONE},
407: {0x51, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
408: {0x52, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
409: {0x53, 1, hd6301_comb, 1, "comb", HD6301_DISASM_NONE},
410: {0x54, 1, hd6301_lsrb, 1, "lsrb", HD6301_DISASM_NONE},
411: {0x55, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
412: {0x56, 1, hd6301_rorb, 1, "rorb", HD6301_DISASM_NONE},
413: {0x57, 1, hd6301_asrb, 1, "asrb", HD6301_DISASM_NONE},
414: {0x58, 1, hd6301_aslb, 1, "lslb", HD6301_DISASM_NONE},
415: {0x59, 1, hd6301_rolb, 1, "rolb", HD6301_DISASM_NONE},
416: {0x5a, 1, hd6301_decb, 1, "decb", HD6301_DISASM_NONE},
417: {0x5b, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
418: {0x5c, 1, hd6301_incb, 1, "incb", HD6301_DISASM_NONE},
419: {0x5d, 1, hd6301_tstb, 1, "tstb", HD6301_DISASM_NONE},
420: {0x5e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
421: {0x5f, 1, hd6301_clrb, 1, "clrb", HD6301_DISASM_NONE},
422:
423: {0x60, 2, hd6301_neg_ind, 6, "neg $%02x,x", HD6301_DISASM_MEMORY8},
424: {0x61, 3, hd6301_aim_ind, 7, "aim #$%02x,$%02x x", HD6301_DISASM_XIM},
425: {0x62, 3, hd6301_oim_ind, 7, "oim #$%02x,$%02x x", HD6301_DISASM_XIM},
426: {0x63, 2, hd6301_com_ind, 6, "com $%02x,x", HD6301_DISASM_MEMORY8},
427: {0x64, 2, hd6301_lsr_ind, 6, "lsr $%02x,x", HD6301_DISASM_MEMORY8},
428: {0x65, 3, hd6301_eim_ind, 7, "eim #$%02x,$%02x x", HD6301_DISASM_XIM},
429: {0x66, 2, hd6301_ror_ind, 6, "ror $%02x,x", HD6301_DISASM_MEMORY8},
430: {0x67, 2, hd6301_asr_ind, 6, "asr $%02x,x", HD6301_DISASM_MEMORY8},
431: {0x68, 2, hd6301_asl_ind, 6, "lsl $%02x,x", HD6301_DISASM_MEMORY8},
432: {0x69, 2, hd6301_rol_ind, 6, "rol $%02x,x", HD6301_DISASM_MEMORY8},
433: {0x6a, 2, hd6301_dec_ind, 6, "dec $%02x,x", HD6301_DISASM_MEMORY8},
434: {0x6b, 3, hd6301_tim_ind, 5, "tim #$%02x,$%02x x", HD6301_DISASM_XIM},
435: {0x6c, 2, hd6301_inc_ind, 6, "inc $%02x,x", HD6301_DISASM_MEMORY8},
436: {0x6d, 2, hd6301_tst_ind, 4, "tst $%02x,x", HD6301_DISASM_MEMORY8},
437: {0x6e, 0, hd6301_jmp_ind, 3, "jmp $%02x,x", HD6301_DISASM_MEMORY8},
438: {0x6f, 2, hd6301_clr_ind, 5, "clr $%02x,x", HD6301_DISASM_MEMORY8},
439:
440: {0x70, 3, hd6301_neg_ext, 6, "neg $%04x", HD6301_DISASM_MEMORY16},
441: {0x71, 3, hd6301_aim_dir, 6, "aim #$%02x,$%02x", HD6301_DISASM_XIM},
442: {0x72, 3, hd6301_oim_dir, 6, "oim #$%02x,$%02x", HD6301_DISASM_XIM},
443: {0x73, 3, hd6301_com_ext, 6, "com $%04x", HD6301_DISASM_MEMORY16},
444: {0x74, 3, hd6301_lsr_ext, 6, "lsr $%04x", HD6301_DISASM_MEMORY16},
445: {0x75, 3, hd6301_eim_dir, 6, "eim #$%02x,$%02x", HD6301_DISASM_XIM},
446: {0x76, 3, hd6301_ror_ext, 6, "ror $%04x", HD6301_DISASM_MEMORY16},
447: {0x77, 3, hd6301_asr_ext, 6, "asr $%04x", HD6301_DISASM_MEMORY16},
448: {0x78, 3, hd6301_asl_ext, 6, "lsl $%04x", HD6301_DISASM_MEMORY16},
449: {0x79, 3, hd6301_rol_ext, 6, "rol $%04x", HD6301_DISASM_MEMORY16},
450: {0x7a, 3, hd6301_dec_ext, 6, "dec $%04x", HD6301_DISASM_MEMORY16},
451: {0x7b, 3, hd6301_tim_dir, 4, "tim #$%02x,$%02x", HD6301_DISASM_XIM},
452: {0x7c, 3, hd6301_inc_ext, 6, "inc $%04x", HD6301_DISASM_MEMORY16},
453: {0x7d, 3, hd6301_tst_ext, 4, "tst $%04x", HD6301_DISASM_MEMORY16},
454: {0x7e, 0, hd6301_jmp_ext, 3, "jmp $%04x", HD6301_DISASM_MEMORY16},
455: {0x7f, 3, hd6301_clr_ext, 5, "clr $%04x", HD6301_DISASM_MEMORY16},
456:
457: {0x80, 2, hd6301_suba_imm, 2, "suba #$%02x", HD6301_DISASM_MEMORY8},
458: {0x81, 2, hd6301_cmpa_imm, 2, "cmpa #$%02x", HD6301_DISASM_MEMORY8},
459: {0x82, 2, hd6301_sbca_imm, 2, "sbca #$%02x", HD6301_DISASM_MEMORY8},
460: {0x83, 3, hd6301_subd_imm, 3, "subd #$%04x", HD6301_DISASM_MEMORY16},
461: {0x84, 2, hd6301_anda_imm, 2, "anda #$%02x", HD6301_DISASM_MEMORY8},
462: {0x85, 2, hd6301_bita_imm, 2, "bita #$%02x", HD6301_DISASM_MEMORY8},
463: {0x86, 2, hd6301_ldaa_imm, 2, "ldaa #$%02x", HD6301_DISASM_MEMORY8},
464: {0x87, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
465: {0x88, 2, hd6301_eora_imm, 2, "eora #$%02x", HD6301_DISASM_MEMORY8},
466: {0x89, 2, hd6301_adca_imm, 2, "adca #$%02x", HD6301_DISASM_MEMORY8},
467: {0x8a, 2, hd6301_oraa_imm, 2, "oraa #$%02x", HD6301_DISASM_MEMORY8},
468: {0x8b, 2, hd6301_adda_imm, 2, "adda #$%02x", HD6301_DISASM_MEMORY8},
469: {0x8c, 3, hd6301_cpx_imm, 3, "cpx #$%04x", HD6301_DISASM_MEMORY16},
470: {0x8d, 0, hd6301_bsr, 5, "bsr $%02x", HD6301_DISASM_MEMORY8},
471: {0x8e, 3, hd6301_lds_imm, 3, "lds #$%04x", HD6301_DISASM_MEMORY16},
472: {0x8f, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
473:
474: {0x90, 2, hd6301_suba_dir, 3, "suba $%02x", HD6301_DISASM_MEMORY8},
475: {0x91, 2, hd6301_cmpa_dir, 3, "cmpa $%02x", HD6301_DISASM_MEMORY8},
476: {0x92, 2, hd6301_sbca_dir, 3, "sbca $%02x", HD6301_DISASM_MEMORY8},
477: {0x93, 2, hd6301_subd_dir, 4, "subd $%02x", HD6301_DISASM_MEMORY8},
478: {0x94, 2, hd6301_anda_dir, 3, "anda $%02x", HD6301_DISASM_MEMORY8},
479: {0x95, 2, hd6301_bita_dir, 3, "bita $%02x", HD6301_DISASM_MEMORY8},
480: {0x96, 2, hd6301_ldaa_dir, 3, "ldaa $%02x", HD6301_DISASM_MEMORY8},
481: {0x97, 2, hd6301_staa_dir, 3, "staa $%02x", HD6301_DISASM_MEMORY8},
482: {0x98, 2, hd6301_eora_dir, 3, "eora $%02x", HD6301_DISASM_MEMORY8},
483: {0x99, 2, hd6301_adca_dir, 3, "adca $%02x", HD6301_DISASM_MEMORY8},
484: {0x9a, 2, hd6301_oraa_dir, 3, "oraa $%02x", HD6301_DISASM_MEMORY8},
485: {0x9b, 2, hd6301_adda_dir, 3, "adda $%02x", HD6301_DISASM_MEMORY8},
486: {0x9c, 2, hd6301_cpx_dir, 4, "cpx $%02x", HD6301_DISASM_MEMORY8},
487: {0x9d, 0, hd6301_jsr_dir, 5, "jsr $%02x", HD6301_DISASM_MEMORY8},
488: {0x9e, 2, hd6301_lds_dir, 4, "lds $%02x", HD6301_DISASM_MEMORY8},
489: {0x9f, 2, hd6301_sts_dir, 4, "sts $%02x", HD6301_DISASM_MEMORY8},
490:
491: {0xa0, 2, hd6301_suba_ind, 4, "suba $%02x,x", HD6301_DISASM_MEMORY8},
492: {0xa1, 2, hd6301_cmpa_ind, 4, "cmpa $%02x,x", HD6301_DISASM_MEMORY8},
493: {0xa2, 2, hd6301_sbca_ind, 4, "sbca $%02x,x", HD6301_DISASM_MEMORY8},
494: {0xa3, 2, hd6301_subd_ind, 5, "subd $%02x,x", HD6301_DISASM_MEMORY8},
495: {0xa4, 2, hd6301_anda_ind, 4, "anda $%02x,x", HD6301_DISASM_MEMORY8},
496: {0xa5, 2, hd6301_bita_ind, 4, "bita $%02x,x", HD6301_DISASM_MEMORY8},
497: {0xa6, 2, hd6301_ldaa_ind, 4, "ldaa $%02x,x", HD6301_DISASM_MEMORY8},
498: {0xa7, 2, hd6301_staa_ind, 4, "staa $%02x,x", HD6301_DISASM_MEMORY8},
499: {0xa8, 2, hd6301_eora_ind, 4, "eora $%02x,x", HD6301_DISASM_MEMORY8},
500: {0xa9, 2, hd6301_adca_ind, 4, "adca $%02x,x", HD6301_DISASM_MEMORY8},
501: {0xaa, 2, hd6301_oraa_ind, 4, "oraa $%02x,x", HD6301_DISASM_MEMORY8},
502: {0xab, 2, hd6301_adda_ind, 4, "adda $%02x,x", HD6301_DISASM_MEMORY8},
503: {0xac, 2, hd6301_cpx_ind, 5, "cpx $%02x,x", HD6301_DISASM_MEMORY8},
504: {0xad, 0, hd6301_jsr_ind, 5, "jsr $%02x,x", HD6301_DISASM_MEMORY8},
505: {0xae, 2, hd6301_lds_ind, 5, "lds $%02x,x", HD6301_DISASM_MEMORY8},
506: {0xaf, 2, hd6301_sts_ind, 5, "sts $%02x,x", HD6301_DISASM_MEMORY8},
507:
508: {0xb0, 3, hd6301_suba_ext, 4, "suba $%04x", HD6301_DISASM_MEMORY16},
509: {0xb1, 3, hd6301_cmpa_ext, 4, "cmpa $%04x", HD6301_DISASM_MEMORY16},
510: {0xb2, 3, hd6301_sbca_ext, 4, "sbca $%04x", HD6301_DISASM_MEMORY16},
511: {0xb3, 3, hd6301_subd_ext, 5, "subd $%04x", HD6301_DISASM_MEMORY16},
512: {0xb4, 3, hd6301_anda_ext, 4, "anda $%04x", HD6301_DISASM_MEMORY16},
513: {0xb5, 3, hd6301_bita_ext, 4, "bita $%04x", HD6301_DISASM_MEMORY16},
514: {0xb6, 3, hd6301_ldaa_ext, 4, "ldaa $%04x", HD6301_DISASM_MEMORY16},
515: {0xb7, 3, hd6301_staa_ext, 4, "staa $%04x", HD6301_DISASM_MEMORY16},
516: {0xb8, 3, hd6301_eora_ext, 4, "eora $%04x", HD6301_DISASM_MEMORY16},
517: {0xb9, 3, hd6301_adca_ext, 4, "adca $%04x", HD6301_DISASM_MEMORY16},
518: {0xba, 3, hd6301_oraa_ext, 4, "oraa $%04x", HD6301_DISASM_MEMORY16},
519: {0xbb, 3, hd6301_adda_ext, 4, "adda $%04x", HD6301_DISASM_MEMORY16},
520: {0xbc, 3, hd6301_cpx_ext, 5, "cpx $%04x", HD6301_DISASM_MEMORY16},
521: {0xbd, 0, hd6301_jsr_ext, 6, "jsr $%04x", HD6301_DISASM_MEMORY16},
522: {0xbe, 3, hd6301_lds_ext, 5, "lds $%04x", HD6301_DISASM_MEMORY16},
523: {0xbf, 3, hd6301_sts_ext, 5, "sts $%04x", HD6301_DISASM_MEMORY16},
524:
525: {0xc0, 2, hd6301_subb_imm, 2, "subb #$%02x", HD6301_DISASM_MEMORY8},
526: {0xc1, 2, hd6301_cmpb_imm, 2, "cmpb #$%02x", HD6301_DISASM_MEMORY8},
527: {0xc2, 2, hd6301_sbcb_imm, 2, "sbcb #$%02x", HD6301_DISASM_MEMORY8},
528: {0xc3, 3, hd6301_addd_imm, 3, "addd #$%04x", HD6301_DISASM_MEMORY16},
529: {0xc4, 2, hd6301_andb_imm, 2, "andb #$%02x", HD6301_DISASM_MEMORY8},
530: {0xc5, 2, hd6301_bitb_imm, 2, "bitb #$%02x", HD6301_DISASM_MEMORY8},
531: {0xc6, 2, hd6301_ldab_imm, 2, "ldab #$%02x", HD6301_DISASM_MEMORY8},
532: {0xc7, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
533: {0xc8, 2, hd6301_eorb_imm, 2, "eorb #$%02x", HD6301_DISASM_MEMORY8},
534: {0xc9, 2, hd6301_adcb_imm, 2, "adcb #$%02x", HD6301_DISASM_MEMORY8},
535: {0xca, 2, hd6301_orab_imm, 2, "orab #$%02x", HD6301_DISASM_MEMORY8},
536: {0xcb, 2, hd6301_addb_imm, 2, "addb #$%02x", HD6301_DISASM_MEMORY8},
537: {0xcc, 3, hd6301_ldd_imm, 3, "ldd #$%04x", HD6301_DISASM_MEMORY16},
538: {0xcd, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
539: {0xce, 3, hd6301_ldx_imm, 3, "ldx #$%04x", HD6301_DISASM_MEMORY16},
540: {0xcf, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
541:
542: {0xd0, 2, hd6301_subb_dir, 3, "subb $%02x", HD6301_DISASM_MEMORY8},
543: {0xd1, 2, hd6301_cmpb_dir, 3, "cmpb $%02x", HD6301_DISASM_MEMORY8},
544: {0xd2, 2, hd6301_sbcb_dir, 3, "sbcb $%02x", HD6301_DISASM_MEMORY8},
545: {0xd3, 2, hd6301_addd_dir, 4, "addd $%02x", HD6301_DISASM_MEMORY8},
546: {0xd4, 2, hd6301_andb_dir, 3, "andb $%02x", HD6301_DISASM_MEMORY8},
547: {0xd5, 2, hd6301_bitb_dir, 3, "bitb $%02x", HD6301_DISASM_MEMORY8},
548: {0xd6, 2, hd6301_ldab_dir, 3, "ldab $%02x", HD6301_DISASM_MEMORY8},
549: {0xd7, 2, hd6301_stab_dir, 3, "stab $%02x", HD6301_DISASM_MEMORY8},
550: {0xd8, 2, hd6301_eorb_dir, 3, "eorb $%02x", HD6301_DISASM_MEMORY8},
551: {0xd9, 2, hd6301_adcb_dir, 3, "adcb $%02x", HD6301_DISASM_MEMORY8},
552: {0xda, 2, hd6301_orab_dir, 3, "orab $%02x", HD6301_DISASM_MEMORY8},
553: {0xdb, 2, hd6301_addb_dir, 3, "addb $%02x", HD6301_DISASM_MEMORY8},
554: {0xdc, 2, hd6301_ldd_dir, 4, "ldd $%02x", HD6301_DISASM_MEMORY8},
555: {0xdd, 2, hd6301_std_dir, 4, "std $%02x", HD6301_DISASM_MEMORY8},
556: {0xde, 2, hd6301_ldx_dir, 4, "ldx $%02x", HD6301_DISASM_MEMORY8},
557: {0xdf, 2, hd6301_stx_dir, 4, "stx $%02x", HD6301_DISASM_MEMORY8},
558:
559: {0xe0, 2, hd6301_subb_ind, 4, "subb $%02x,x", HD6301_DISASM_MEMORY8},
560: {0xe1, 2, hd6301_cmpb_ind, 4, "cmpb $%02x,x", HD6301_DISASM_MEMORY8},
561: {0xe2, 2, hd6301_sbcb_ind, 4, "sbcb $%02x,x", HD6301_DISASM_MEMORY8},
562: {0xe3, 2, hd6301_addd_ind, 5, "addd $%02x,x", HD6301_DISASM_MEMORY8},
563: {0xe4, 2, hd6301_andb_ind, 4, "andb $%02x,x", HD6301_DISASM_MEMORY8},
564: {0xe5, 2, hd6301_bitb_ind, 4, "bitb $%02x,x", HD6301_DISASM_MEMORY8},
565: {0xe6, 2, hd6301_ldab_ind, 4, "ldab $%02x,x", HD6301_DISASM_MEMORY8},
566: {0xe7, 2, hd6301_stab_ind, 4, "stab $%02x,x", HD6301_DISASM_MEMORY8},
567: {0xe8, 2, hd6301_eorb_ind, 4, "eorb $%02x,x", HD6301_DISASM_MEMORY8},
568: {0xe9, 2, hd6301_adcb_ind, 4, "adcb $%02x,x", HD6301_DISASM_MEMORY8},
569: {0xea, 2, hd6301_orab_ind, 4, "orab $%02x,x", HD6301_DISASM_MEMORY8},
570: {0xeb, 2, hd6301_addb_ind, 4, "addb $%02x,x", HD6301_DISASM_MEMORY8},
571: {0xec, 2, hd6301_ldd_ind, 5, "ldd $%02x,x", HD6301_DISASM_MEMORY8},
572: {0xed, 2, hd6301_std_ind, 5, "std $%02x,x", HD6301_DISASM_MEMORY8},
573: {0xee, 2, hd6301_ldx_ind, 5, "ldx $%02x,x", HD6301_DISASM_MEMORY8},
574: {0xef, 2, hd6301_stx_ind, 5, "stx $%02x,x", HD6301_DISASM_MEMORY8},
575:
576: {0xf0, 3, hd6301_subb_ext, 4, "subb $%04x", HD6301_DISASM_MEMORY16},
577: {0xf1, 3, hd6301_cmpb_ext, 4, "cmpb $%04x", HD6301_DISASM_MEMORY16},
578: {0xf2, 3, hd6301_sbcb_ext, 4, "sbcb $%04x", HD6301_DISASM_MEMORY16},
579: {0xf3, 3, hd6301_addd_ext, 5, "addd $%04x", HD6301_DISASM_MEMORY16},
580: {0xf4, 3, hd6301_andb_ext, 4, "andb $%04x", HD6301_DISASM_MEMORY16},
581: {0xf5, 3, hd6301_bitb_ext, 4, "bitb $%04x", HD6301_DISASM_MEMORY16},
582: {0xf6, 3, hd6301_ldab_ext, 4, "ldab $%04x", HD6301_DISASM_MEMORY16},
583: {0xf7, 3, hd6301_stab_ext, 4, "stab $%04x", HD6301_DISASM_MEMORY16},
584: {0xf8, 3, hd6301_eorb_ext, 4, "eorb $%04x", HD6301_DISASM_MEMORY16},
585: {0xf9, 3, hd6301_adcb_ext, 4, "adcb $%04x", HD6301_DISASM_MEMORY16},
586: {0xfa, 3, hd6301_orab_ext, 4, "orab $%04x", HD6301_DISASM_MEMORY16},
587: {0xfb, 3, hd6301_addb_ext, 4, "addb $%04x", HD6301_DISASM_MEMORY16},
588: {0xfc, 3, hd6301_ldd_ext, 5, "ldd $%04x", HD6301_DISASM_MEMORY16},
589: {0xfd, 3, hd6301_std_ext, 5, "std $%04x", HD6301_DISASM_MEMORY16},
590: {0xfe, 3, hd6301_ldx_ext, 5, "ldx $%04x", HD6301_DISASM_MEMORY16},
591: {0xff, 3, hd6301_stx_ext, 5, "stx $%04x", HD6301_DISASM_MEMORY16}
592: };
593:
594:
595: /* Variables */
596: static Uint8 hd6301_cycles;
597: static Uint8 hd6301_cur_inst;
598:
599: static Sint8 hd6301_reg_A;
600: static Sint8 hd6301_reg_B;
601: static Sint16 hd6301_reg_X;
602: static Uint16 hd6301_reg_SP;
603: static Uint16 hd6301_reg_PC;
604: static Uint8 hd6301_reg_CCR;
605:
606: //Uint8 hd6301_reg_RMCR;
607:
608: static Uint8 hd6301_intREG[32];
609: static Uint8 hd6301_intRAM[128];
610: static Uint8 hd6301_intROM[4096];
611:
612:
613: /**********************************
614: * Emulator kernel
615: **********************************/
616:
617: /**
618: * Initialise hd6301 cpu
619: */
620: void hd6301_init_cpu(void)
621: {
622: hd6301_reg_CCR = 0xc0;
623: }
624:
625: /**
626: * Execute 1 hd6301 instruction
627: */
628: void hd6301_execute_one_instruction(void)
629: {
630: hd6301_cur_inst = hd6301_read_memory(hd6301_reg_PC);
631:
632: /* Get opcode to execute */
633: hd6301_opcode = hd6301_opcode_table[hd6301_cur_inst];
634:
635: /* disasm opcode ? */
636: #ifdef HD6301_DISASM
637: hd6301_disasm();
638: #endif
639: /* execute opcode */
640: hd6301_opcode.op_func();
641:
642: #ifdef HD6301_DISPLAY_REGS
643: hd6301_display_registers();
644: #endif
645:
646: /* Increment instruction cycles */
647: hd6301_cycles += hd6301_opcode.op_n_cycles;
648:
649: /* Increment PC register */
650: hd6301_reg_PC += hd6301_opcode.op_bytes;
651:
652: /* post process interrupts */
653:
654: /* post process timers */
655:
656: /* post process SCI */
657: }
658:
659: /**
660: * Read hd6301 memory (Ram, Rom, Internal registers)
661: */
662: static Uint8 hd6301_read_memory(Uint16 addr)
663: {
664: /* Internal registers */
665: if (addr <= 0x1f) {
666: return hd6301_intREG[addr];
667: }
668:
669: /* Internal RAM */
670: if ((addr >= 0x80) && (addr <= 0xff)) {
671: return hd6301_intRAM[addr-0x80];
672: }
673:
674: /* Internal ROM */
675: if (addr >= 0xf000) {
676: return hd6301_intROM[addr-0xf000];
677: }
678:
679: fprintf(stderr, "hd6301: 0x%04x: 0x%04x illegal memory address\n", hd6301_reg_PC, addr);
680: exit(-1);
681: }
682:
683: /**
684: * Write hd6301 memory (Ram, Internal registers)
685: */
686: static void hd6301_write_memory (Uint16 addr, Uint8 value)
687: {
688: /* Internal registers */
689: if (addr <= 0x1f) {
690: hd6301_intREG[addr] = value;
691: }
692:
693: /* Internal RAM */
694: else if ((addr >= 0x80) && (addr <= 0xff)) {
695: hd6301_intRAM[addr-0x80] = value;
696: }
697:
698: /* Internal ROM */
699: else if (addr >= 0xf000) {
700: fprintf(stderr, "hd6301: 0x%04x: attempt to write to rom\n", addr);
701: }
702:
703: /* Illegal address */
704: else {
705: fprintf(stderr, "hd6301: 0x%04x: write to illegal address\n", addr);
706: exit(-1);
707: }
708: }
709:
710: /**
711: * Get extended memory (16 bits)
712: */
713: static Uint16 hd6301_get_memory_ext(void)
714: {
715: Uint16 addr;
716:
717: addr = hd6301_read_memory(hd6301_reg_PC+1)<<8;
718: addr += hd6301_read_memory(hd6301_reg_PC+2);
719: return addr;
720: }
721:
722: /**
723: * Undefined opcode
724: */
725: static void hd6301_undefined(void)
726: {
727: fprintf(stderr, "hd6301: 0x%04x: 0x%02x unknown instruction\n", hd6301_reg_PC, hd6301_cur_inst);
728: exit(-1); /* TODO: Trap the error correctly */
729: }
730:
731: /**
732: * NOP : no operation
733: *
734: * HINZVC
735: * ......
736: */
737: static void hd6301_nop(void)
738: {
739: }
740:
741: /**
742: * LSRD : logical Shift Right, accumulator D : D=D>>1
743: *
744: * HINZVC
745: * ..0***
746: */
747: static void hd6301_lsrd(void)
748: {
749: Uint16 regD;
750: Uint8 carry;
751:
752: regD = (hd6301_reg_A<<8) + hd6301_reg_B;
753: carry = regD & 1;
754: regD >>= 1;
755:
756: hd6301_reg_A = regD >> 8;
757: hd6301_reg_B = regD;
758:
759: HD6301_CLR_NZVC;
760: hd6301_reg_CCR |= carry;
761: HD6301_SET_Z16(regD);
762: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
763: }
764:
765: /**
766: * ASLD : arythmetic Shift left, accumulator D : D=D<<1
767: *
768: * HINZVC
769: * ..****
770: */
771: static void hd6301_asld(void)
772: {
773: Uint16 regD;
774: Uint8 carry, bitN;
775:
776: regD = (hd6301_reg_A<<8) + hd6301_reg_B;
777: carry = (regD >> 15) & 1;
778: regD <<= 1;
779:
780: hd6301_reg_A = regD >> 8;
781: hd6301_reg_B = regD;
782:
783: HD6301_CLR_NZVC;
784: hd6301_reg_CCR |= carry;
785: HD6301_SET_NZ16(regD);
786: bitN = (hd6301_reg_CCR & 0x8) >> 3;
787: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
788: }
789:
790:
791: /**
792: * TAP : transfer accumulator A into register CCR : CCR=A
793: *
794: * HINZVC
795: * ******
796: */
797: static void hd6301_tap(void)
798: {
799: hd6301_reg_CCR = hd6301_reg_A;
800: hd6301_reg_CCR |= 0xc0;
801: }
802:
803: /**
804: * TPA : transfer register CCR into accumulator A : A=CCR
805: *
806: * HINZVC
807: * ......
808: */
809: static void hd6301_tpa(void)
810: {
811: hd6301_reg_A = hd6301_reg_CCR;
812: }
813:
814: /**
815: * INX : increment register X : X=X+1
816: *
817: * HINZVC
818: * ...*..
819: */
820: static void hd6301_inx(void)
821: {
822: ++ hd6301_reg_X;
823:
824: HD6301_CLR_Z;
825: HD6301_SET_Z16(hd6301_reg_X);
826: }
827:
828: /**
829: * DEX : decrement register X : X=X-1
830: *
831: * HINZVC
832: * ...*..
833: */
834: static void hd6301_dex(void)
835: {
836: -- hd6301_reg_X;
837:
838: HD6301_CLR_Z;
839: HD6301_SET_Z16(hd6301_reg_X);
840: }
841:
842: /**
843: * CLV : clear register CCR bit V : V=0
844: *
845: * HINZVC
846: * ....0.
847: */
848: static void hd6301_clv(void)
849: {
850: HD6301_CLR_V;
851: }
852:
853: /**
854: * SEV : set register CCR bit V : V=1
855: *
856: * HINZVC
857: * ....1.
858: */
859: static void hd6301_sev(void)
860: {
861: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_V;
862: }
863:
864: /**
865: * CLC : clear register CCR bit C : C=0
866: *
867: * HINZVC
868: * .....0
869: */
870: static void hd6301_clc(void)
871: {
872: HD6301_CLR_C;
873: }
874:
875: /**
876: * SEC : set register CCR bit C : C=1
877: *
878: * HINZVC
879: * .....1
880: */
881: static void hd6301_sec(void)
882: {
883: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_C;
884: }
885:
886: /**
887: * CLI : clear register CCR bit I : I=0
888: *
889: * HINZVC
890: * .0....
891: */
892: static void hd6301_cli(void)
893: {
894: HD6301_CLR_I;
895: }
896:
897: /**
898: * SEI : set register CCR bit I : I=1
899: *
900: * HINZVC
901: * .1....
902: */
903: static void hd6301_sei(void)
904: {
905: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_I;
906: }
907:
908: /**
1.1.1.2 ! root 909: * SBA : subtract accumulator B from accumulator A : A=A-B
1.1 root 910: *
911: * HINZVC
912: * ..****
913: */
914: static void hd6301_sba(void)
915: {
916: Uint16 result;
917:
918: result = hd6301_reg_A - hd6301_reg_B;
919:
920: HD6301_CLR_NZVC;
921: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
922:
923: hd6301_reg_A = result;
924: }
925:
926: /**
927: * CBA : compare accumulator A and accumulator B : A-B
928: *
929: * HINZVC
930: * ..****
931: */
932: static void hd6301_cba(void)
933: {
934: Uint16 result;
935:
936: result = hd6301_reg_A - hd6301_reg_B;
937:
938: HD6301_CLR_NZVC;
939: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
940: }
941:
942: /**
943: * TAB : transfer accumulator A into accumulator B : B=A
944: *
945: * HINZVC
946: * ..**0.
947: */
948: static void hd6301_tab(void)
949: {
950: hd6301_reg_B = hd6301_reg_A;
951:
952: HD6301_CLR_NZV;
953: HD6301_SET_NZ8(hd6301_reg_B);
954: }
955:
956: /**
957: * TBA : transfer accumulator B into accumulator A : A=B
958: *
959: * HINZVC
960: * ..**0.
961: */
962: static void hd6301_tba(void)
963: {
964: hd6301_reg_A = hd6301_reg_B;
965:
966: HD6301_CLR_NZV;
967: HD6301_SET_NZ8(hd6301_reg_A);
968: }
969:
970: /**
971: * XGDX : exchange register X and accumulator D : X<->D
972: *
973: * HINZVC
974: * ......
975: */
976: static void hd6301_xgdx(void)
977: {
978: Uint16 temp;
979:
980: temp = hd6301_reg_X;
981: hd6301_reg_X = (hd6301_reg_A << 8) + hd6301_reg_B;
982: hd6301_reg_A = temp >> 8;
983: hd6301_reg_B = temp;
984: }
985:
986: /**
987: * DAA : converts binary add of BCD characters into BCD format : A=BCD(A)
988: *
989: * HINZVC
990: * ..****
991: */
992: static void hd6301_daa(void)
993: {
994: /* Todo */
995: }
996:
997: /**
998: * SLP : sleep
999: *
1000: * HINZVC
1001: * ......
1002: */
1003: static void hd6301_slp(void)
1004: {
1005: /* Todo */
1006: }
1007:
1008: /**
1009: * ABA : add accumulator A and accumulator B into accumulator A : A=A+B
1010: *
1011: * HINZVC
1012: * *.****
1013: */
1014: static void hd6301_aba(void)
1015: {
1016: Uint16 result;
1017:
1018: result = hd6301_reg_A + hd6301_reg_B;
1019:
1020: HD6301_CLR_HNZVC;
1021: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
1022: HD6301_SET_H(hd6301_reg_A, hd6301_reg_B, result);
1023:
1024: hd6301_reg_A = result;
1025: }
1026:
1027: /**
1028: * BRA : branch always
1029: *
1030: * HINZVC
1031: * ......
1032: */
1033: static void hd6301_bra(void)
1034: {
1035: Sint8 addr;
1036:
1037: addr = hd6301_read_memory(hd6301_reg_PC + 1);
1038: hd6301_reg_PC += addr + 2;
1039: }
1040:
1041: /**
1042: * BRN : branch never
1043: *
1044: * HINZVC
1045: * ......
1046: */
1047: static void hd6301_brn(void)
1048: {
1049: hd6301_reg_PC += 2;
1050: }
1051:
1052: /**
1053: * BHI : branch if higher : C|Z=0
1054: *
1055: * HINZVC
1056: * ......
1057: */
1058: static void hd6301_bhi(void)
1059: {
1060: Sint8 addr;
1061: Uint8 bitC, bitZ;
1062:
1063: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1064: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1065: addr = 2;
1066: if ((bitC | bitZ) == 0) {
1067: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1068: }
1069: hd6301_reg_PC += addr;
1070: }
1071:
1072: /**
1073: * BLS : branch if lower or same : C|Z=1
1074: *
1075: * HINZVC
1076: * ......
1077: */
1078: static void hd6301_bls(void)
1079: {
1080: Sint8 addr;
1081: Uint8 bitC, bitZ;
1082:
1083: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1084: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1085: addr = 2;
1086: if ((bitC | bitZ) == 1) {
1087: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1088: }
1089: hd6301_reg_PC += addr;
1090: }
1091:
1092: /**
1093: * BCC : branch if carry clear : C=0
1094: *
1095: * HINZVC
1096: * ......
1097: */
1098: static void hd6301_bcc(void)
1099: {
1100: Sint8 addr;
1101: Uint8 bitC;
1102:
1103: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1104: addr = 2;
1105: if (bitC == 0) {
1106: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1107: }
1108: hd6301_reg_PC += addr;
1109: }
1110:
1111: /**
1112: * BCS : branch if carry set : C=1
1113: *
1114: * HINZVC
1115: * ......
1116: */
1117: static void hd6301_bcs(void)
1118: {
1119: Sint8 addr;
1120: Uint8 bitC;
1121:
1122: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1123: addr = 2;
1124: if (bitC == 1) {
1125: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1126: }
1127: hd6301_reg_PC += addr;
1128: }
1129:
1130: /**
1131: * BNE : branch if not equal 0 : Z=0
1132: *
1133: * HINZVC
1134: * ......
1135: */
1136: static void hd6301_bne(void)
1137: {
1138: Sint8 addr;
1139: Uint8 bitZ;
1140:
1141: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1142: addr = 2;
1143: if (bitZ == 0) {
1144: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1145: }
1146: hd6301_reg_PC += addr;
1147: }
1148:
1149: /**
1150: * BEQ : branch if equal 0 : Z=1
1151: *
1152: * HINZVC
1153: * ......
1154: */
1155: static void hd6301_beq(void)
1156: {
1157: Sint8 addr;
1158: Uint8 bitZ;
1159:
1160: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1161: addr = 2;
1162: if (bitZ == 1) {
1163: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1164: }
1165: hd6301_reg_PC += addr;
1166: }
1167:
1168: /**
1169: * BVC : branch if overflow clear : V=0
1170: *
1171: * HINZVC
1172: * ......
1173: */
1174: static void hd6301_bvc(void)
1175: {
1176: Sint8 addr;
1177: Uint8 bitV;
1178:
1179: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1180: addr = 2;
1181: if (bitV == 0) {
1182: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1183: }
1184: hd6301_reg_PC += addr;
1185: }
1186:
1187: /**
1188: * BVS : branch if overflow set : V=1
1189: *
1190: * HINZVC
1191: * ......
1192: */
1193: static void hd6301_bvs(void)
1194: {
1195: Sint8 addr;
1196: Uint8 bitV;
1197:
1198: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1199: addr = 2;
1200: if (bitV == 1) {
1201: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1202: }
1203: hd6301_reg_PC += addr;
1204: }
1205:
1206: /**
1207: * BPL : branch if plus : N=0
1208: *
1209: * HINZVC
1210: * ......
1211: */
1212: static void hd6301_bpl(void)
1213: {
1214: Sint8 addr;
1215: Uint8 bitN;
1216:
1217: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1218: addr = 2;
1219: if (bitN == 0) {
1220: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1221: }
1222: hd6301_reg_PC += addr;
1223: }
1224:
1225: /**
1226: * BMI : branch if minus : N=1
1227: *
1228: * HINZVC
1229: * ......
1230: */
1231: static void hd6301_bmi(void)
1232: {
1233: Sint8 addr;
1234: Uint8 bitN;
1235:
1236: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1237: addr = 2;
1238: if (bitN == 1) {
1239: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1240: }
1241: hd6301_reg_PC += addr;
1242: }
1243:
1244: /**
1245: * BGE : branch if greater or equal to zero : N^V=0
1246: *
1247: * HINZVC
1248: * ......
1249: */
1250: static void hd6301_bge(void)
1251: {
1252: Sint8 addr;
1253: Uint8 bitN, bitV;
1254:
1255: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1256: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1257: addr = 2;
1258: if ((bitN ^ bitV) == 0) {
1259: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1260: }
1261: hd6301_reg_PC += addr;
1262: }
1263:
1264: /**
1265: * BLT : branch if lower to zero : N^V=1
1266: *
1267: * HINZVC
1268: * ......
1269: */
1270: static void hd6301_blt(void)
1271: {
1272: Sint8 addr;
1273: Uint8 bitN, bitV;
1274:
1275: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1276: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1277: addr = 2;
1278: if ((bitN ^ bitV) == 1) {
1279: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1280: }
1281: hd6301_reg_PC += addr;
1282: }
1283:
1284: /**
1285: * BGT : branch if greater to zero : Z|(N^V)=0
1286: *
1287: * HINZVC
1288: * ......
1289: */
1290: static void hd6301_bgt(void)
1291: {
1292: Sint8 addr;
1293: Uint8 bitN, bitV, bitZ;
1294:
1295: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1296: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1297: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1298: addr = 2;
1299: if ((bitZ | (bitN ^ bitV)) == 0) {
1300: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1301: }
1302: hd6301_reg_PC += addr;
1303: }
1304:
1305: /**
1306: * BLE : branch if lower or equal to zero : Z|(N^V)=1
1307: *
1308: * HINZVC
1309: * ......
1310: */
1311: static void hd6301_ble(void)
1312: {
1313: Sint8 addr;
1314: Uint8 bitN, bitV, bitZ;
1315:
1316: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1317: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1318: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1319: addr = 2;
1320: if ((bitZ | (bitN ^ bitV)) == 1) {
1321: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1322: }
1323: hd6301_reg_PC += addr;
1324: }
1325:
1326: /**
1327: * TSX : transfer stack pointer to register X : X=SP+1
1328: *
1329: * HINZVC
1330: * ......
1331: */
1332: static void hd6301_tsx(void)
1333: {
1334: hd6301_reg_X = hd6301_reg_SP + 1;
1335: }
1336:
1337: /**
1338: * INS : increment stack pointer : SP=SP+1
1339: *
1340: * HINZVC
1341: * ......
1342: */
1343: static void hd6301_ins(void)
1344: {
1345: ++ hd6301_reg_SP;
1346: }
1347:
1348: /**
1349: * PULA : pull accumulator A from stack : SP=SP+1 ; A=(SP)
1350: *
1351: * HINZVC
1352: * ......
1353: */
1354: static void hd6301_pula(void)
1355: {
1356: ++ hd6301_reg_SP;
1357: hd6301_reg_A = hd6301_read_memory(hd6301_reg_SP);
1358: }
1359:
1360: /**
1361: * PULB : pull accumulator B from stack : SP=SP+1 ; B=(SP)
1362: *
1363: * HINZVC
1364: * ......
1365: */
1366: static void hd6301_pulb(void)
1367: {
1368: ++ hd6301_reg_SP;
1369: hd6301_reg_B = hd6301_read_memory(hd6301_reg_SP);
1370: }
1371:
1372: /**
1373: * DES : decrement stack pointer : SP=SP-1
1374: *
1375: * HINZVC
1376: * ......
1377: */
1378: static void hd6301_des(void)
1379: {
1380: -- hd6301_reg_SP;
1381: }
1382:
1383: /**
1384: * TXS : transfer register X to stack pointer : SP=X-1
1385: *
1386: * HINZVC
1387: * ......
1388: */
1389: static void hd6301_txs(void)
1390: {
1391: hd6301_reg_SP = hd6301_reg_X - 1;
1392: }
1393:
1394: /**
1395: * PSHA : push accumulator A to stack : (SP)=A ; SP=SP-1
1396: *
1397: * HINZVC
1398: * ......
1399: */
1400: static void hd6301_psha(void)
1401: {
1402: hd6301_write_memory(hd6301_reg_SP, hd6301_reg_A);
1403: -- hd6301_reg_SP;
1404: }
1405:
1406: /**
1407: * PSHB : push accumulator B to stack : (SP)=B ; SP=SP-1
1408: *
1409: * HINZVC
1410: * ......
1411: */
1412: static void hd6301_pshb(void)
1413: {
1414: hd6301_write_memory(hd6301_reg_SP, hd6301_reg_B);
1415: -- hd6301_reg_SP;
1416: }
1417:
1418: /**
1419: * PULX : pull register X from stack : SP=SP+1 ; X=(SP)
1420: *
1421: * HINZVC
1422: * ......
1423: */
1424: static void hd6301_pulx(void)
1425: {
1426: hd6301_reg_X = hd6301_read_memory(++hd6301_reg_SP)<<8;
1427: hd6301_reg_X += hd6301_read_memory(++hd6301_reg_SP);
1428: }
1429:
1430: /**
1431: * RTS : return from subroutine
1432: *
1433: * HINZVC
1434: * ......
1435: */
1436: static void hd6301_rts(void)
1437: {
1438: hd6301_reg_PC = hd6301_read_memory(++hd6301_reg_SP)<<8;
1439: hd6301_reg_PC += hd6301_read_memory(++hd6301_reg_SP);
1440: }
1441:
1442: /**
1443: * ABX : add accumulator B to register X : X=X+B
1444: *
1445: * HINZVC
1446: * ......
1447: */
1448: static void hd6301_abx(void)
1449: {
1450: hd6301_reg_X += hd6301_reg_B;
1451: }
1452:
1453: /**
1454: * RTI : return from interrupt
1455: *
1456: * HINZVC
1457: * ******
1458: */
1459: static void hd6301_rti(void)
1460: {
1461: hd6301_reg_CCR = hd6301_read_memory(++hd6301_reg_SP);
1462: hd6301_reg_B = hd6301_read_memory(++hd6301_reg_SP);
1463: hd6301_reg_A = hd6301_read_memory(++hd6301_reg_SP);
1464: hd6301_reg_X = hd6301_read_memory(++hd6301_reg_SP)<<8;
1465: hd6301_reg_X += hd6301_read_memory(++hd6301_reg_SP);
1466: hd6301_reg_PC = hd6301_read_memory(++hd6301_reg_SP)<<8;
1467: hd6301_reg_PC += hd6301_read_memory(++hd6301_reg_SP);
1468: }
1469:
1470: /**
1471: * PSHX : push register X to stack : (SP)=X ; SP=SP-1
1472: *
1473: * HINZVC
1474: * ......
1475: */
1476: static void hd6301_pshx(void)
1477: {
1478: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X & 0xff);
1479: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X >> 8);
1480: }
1481:
1482: /**
1483: * MUL : multiply unsigned : D=A*B
1484: *
1485: * HINZVC
1486: * .....*
1487: */
1488: static void hd6301_mul(void)
1489: {
1490: Uint16 regD;
1491:
1492: regD = hd6301_reg_B * hd6301_reg_A;
1493: hd6301_reg_A = regD >> 8;
1494: hd6301_reg_B = regD;
1495:
1496: HD6301_CLR_C;
1497: hd6301_reg_CCR |= hd6301_reg_B >> 7;
1498: }
1499:
1500: /**
1501: * WAI : wait for interrupt
1502: *
1503: * HINZVC
1504: * .*....
1505: */
1506: static void hd6301_wai(void)
1507: {
1508: /* Todo */
1509: }
1510:
1511: /**
1512: * SWI : software interrupt
1513: *
1514: * HINZVC
1515: * .1....
1516: */
1517: static void hd6301_swi(void)
1518: {
1519: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC+1) & 0xff);
1520: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC+1) >> 8);
1521: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X & 0xff);
1522: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X >> 8);
1523: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_A);
1524: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_B);
1525: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_CCR);
1526:
1527: hd6301_reg_PC = hd6301_read_memory(0xfffa) << 8;
1528: hd6301_reg_PC += hd6301_read_memory(0xfffb);
1529:
1530: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_I;
1531: }
1532:
1533: /**
1534: * NEGA : negate accumulator A : A=0-A
1535: *
1536: * HINZVC
1537: * ..****
1538: */
1539: static void hd6301_nega(void)
1540: {
1541: Uint8 value;
1542:
1543: value = 0 - hd6301_reg_A;
1544: hd6301_reg_A = value;
1545:
1546: HD6301_CLR_NZVC;
1547: HD6301_SET_NZ8(value);
1548: hd6301_reg_CCR |= (value != 0x0);
1549: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1550: }
1551:
1552: /**
1553: * COMA : complement 1 accumulator A : A=~A
1554: *
1555: * HINZVC
1556: * ..**01
1557: */
1558: static void hd6301_coma(void)
1559: {
1560: hd6301_reg_A = ~hd6301_reg_A;
1561:
1562: HD6301_CLR_NZV;
1563: hd6301_reg_CCR |= 1;
1564: HD6301_SET_NZ8(hd6301_reg_A);
1565: }
1566:
1567: /**
1568: * LSRA : logical shift right, accumulator A : A=A>>1
1569: *
1570: * HINZVC
1571: * ..0***
1572: */
1573: static void hd6301_lsra(void)
1574: {
1575: Uint8 carry;
1576:
1577: carry = hd6301_reg_A & 1;
1578: hd6301_reg_A >>= 1;
1579:
1580: HD6301_CLR_NZVC;
1581: hd6301_reg_CCR |= carry;
1582: HD6301_SET_Z8(hd6301_reg_A);
1583: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
1584: }
1585:
1586: /**
1587: * RORA : rotate right, accumulator A : A=A>>1 + carry<<8
1588: *
1589: * HINZVC
1590: * ..****
1591: */
1592: static void hd6301_rora(void)
1593: {
1594: Uint8 carry, result, bitN;
1595:
1596: carry = hd6301_reg_A & 1;
1597: result = (hd6301_reg_CCR & 1) << 7;
1598: result += hd6301_reg_A >> 1;
1599: hd6301_reg_A = result;
1600:
1601: HD6301_CLR_NZVC;
1602: hd6301_reg_CCR |= carry;
1603: HD6301_SET_NZ8(hd6301_reg_A);
1604: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1605: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1606: }
1607:
1608: /**
1609: * ASRA : arithmetic shift right, accumulator A : A=A>>1
1610: *
1611: * HINZVC
1612: * ..****
1613: */
1614: static void hd6301_asra(void)
1615: {
1616: Uint8 carry, bitN;
1617:
1618: carry = hd6301_reg_A & 1;
1619: hd6301_reg_A >>= 1;
1620: hd6301_reg_A |= (hd6301_reg_A & 0x40) << 1;
1621:
1622: HD6301_CLR_NZVC;
1623: hd6301_reg_CCR |= carry;
1624: HD6301_SET_NZ8(hd6301_reg_A);
1625: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1626: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1627: }
1628:
1629: /**
1630: * ASLA : arithmetic shift left, accumulator A : A=A<<1
1631: *
1632: * HINZVC
1633: * ..****
1634: */
1635: static void hd6301_asla(void)
1636: {
1637: Uint8 carry, bitN;
1638:
1639: carry = (hd6301_reg_A & 0X80) >> 7;
1640: hd6301_reg_A <<= 1;
1641:
1642: HD6301_CLR_NZVC;
1643: hd6301_reg_CCR |= carry;
1644: HD6301_SET_NZ8(hd6301_reg_A);
1645: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1646: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1647: }
1648:
1649: /**
1650: * ROLA : rotate left, accumulator A : A=A<<1 +C
1651: *
1652: * HINZVC
1653: * ..****
1654: */
1655: static void hd6301_rola(void)
1656: {
1657: Uint8 carry, result, bitN;
1658:
1659: carry = (hd6301_reg_A & 0x80) >> 7;
1660: result = hd6301_reg_CCR & 1;
1661: result += hd6301_reg_A << 1;
1662: hd6301_reg_A = result;
1663:
1664: HD6301_CLR_NZVC;
1665: hd6301_reg_CCR |= carry;
1666: HD6301_SET_NZ8(hd6301_reg_A);
1667: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1668: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1669: }
1670:
1671: /**
1672: * DECA : decrement accumulator A : A=A-1
1673: *
1674: * HINZVC
1675: * ..***.
1676: */
1677: static void hd6301_deca(void)
1678: {
1679: Uint8 overflow;
1680:
1681: overflow = (hd6301_reg_A == (Sint8)0x80) << hd6301_REG_CCR_V;
1682: -- hd6301_reg_A;
1683:
1684: HD6301_CLR_NZV;
1685: hd6301_reg_CCR |= overflow;
1686: HD6301_SET_NZ8(hd6301_reg_A);
1687: }
1688:
1689: /**
1690: * INCA : increment accumulator A : A=A+1
1691: *
1692: * HINZVC
1693: * ..***.
1694: */
1695: static void hd6301_inca(void)
1696: {
1697: Uint8 overflow;
1698:
1699: overflow = (hd6301_reg_A == 0x7f) << hd6301_REG_CCR_V;
1700: hd6301_reg_A ++;
1701:
1702: HD6301_CLR_NZV;
1703: hd6301_reg_CCR |= overflow;
1704: HD6301_SET_NZ8(hd6301_reg_A);
1705: }
1706:
1707: /**
1708: * TSTA : test zero or minus, accumulator A : A-0
1709: *
1710: * HINZVC
1711: * ..**00
1712: */
1713: static void hd6301_tsta(void)
1714: {
1715: HD6301_CLR_NZVC;
1716: HD6301_SET_NZ8(hd6301_reg_A);
1717: }
1718:
1719: /**
1720: * CLRA : clear accumulator A : A=0
1721: *
1722: * HINZVC
1723: * ..0100
1724: */
1725: static void hd6301_clra(void)
1726: {
1727: hd6301_reg_A = 0;
1728: HD6301_CLR_NZVC;
1729: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
1730: }
1731:
1732: /**
1733: * NEGB : negate accumulator B : B=0-B
1734: *
1735: * HINZVC
1736: * ..****
1737: */
1738: static void hd6301_negb(void)
1739: {
1740: Uint8 value;
1741:
1742: value = 0 - hd6301_reg_B;
1743: hd6301_reg_B = value;
1744:
1745: HD6301_CLR_NZVC;
1746: HD6301_SET_NZ8(value);
1747: hd6301_reg_CCR |= (value != 0x0);
1748: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1749: }
1750:
1751: /**
1752: * COMB : complement 1 accumulator B : B=~B
1753: *
1754: * HINZVC
1755: * ..**01
1756: */
1757: static void hd6301_comb(void)
1758: {
1759: hd6301_reg_B = ~hd6301_reg_B;
1760: HD6301_CLR_NZVC;
1761: hd6301_reg_CCR |= 1;
1762: HD6301_SET_NZ8(hd6301_reg_B);
1763: }
1764:
1765: /**
1766: * LSRB : logical shift right, accumulator B : B=B>>1
1767: *
1768: * HINZVC
1769: * ..0***
1770: */
1771: static void hd6301_lsrb(void)
1772: {
1773: Uint8 carry;
1774:
1775: carry = hd6301_reg_B & 1;
1776: hd6301_reg_B >>= 1;
1777:
1778: HD6301_CLR_NZVC;
1779: hd6301_reg_CCR |= carry;
1780: HD6301_SET_Z8(hd6301_reg_B);
1781: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
1782: }
1783:
1784: /**
1785: * RORB : rotate right, accumulator B : B=B>>1 + carry<<8
1786: *
1787: * HINZVC
1788: * ..****
1789: */
1790: static void hd6301_rorb(void)
1791: {
1792: Uint8 carry, result, bitN;
1793:
1794: carry = hd6301_reg_B & 1;
1795: result = (hd6301_reg_CCR & 1) << 7;
1796: result += hd6301_reg_B >> 1;
1797: hd6301_reg_B = result;
1798:
1799: HD6301_CLR_NZVC;
1800: hd6301_reg_CCR |= carry;
1801: HD6301_SET_NZ8(hd6301_reg_B);
1802: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1803: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1804: }
1805:
1806: /**
1807: * ASRB : arithmetic shift right, accumulator B : B=B>>1
1808: *
1809: * HINZVC
1810: * ..****
1811: */
1812: static void hd6301_asrb(void)
1813: {
1814: Uint8 carry, bitN;
1815:
1816: carry = hd6301_reg_B & 1;
1817: hd6301_reg_B >>= 1;
1818: hd6301_reg_B |= (hd6301_reg_B & 0x40) << 1;
1819:
1820: HD6301_CLR_NZVC;
1821: hd6301_reg_CCR |= carry;
1822: HD6301_SET_NZ8(hd6301_reg_B);
1823: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1824: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1825: }
1826:
1827: /**
1828: * ASLB : arithmetic shift left, accumulator B : B=B<<1
1829: *
1830: * HINZVC
1831: * ..****
1832: */
1833: static void hd6301_aslb(void)
1834: {
1835: Uint8 carry, bitN;
1836:
1837: carry = (hd6301_reg_B & 0x80) >> 7;
1838: hd6301_reg_B <<= 1;
1839:
1840: HD6301_CLR_NZVC;
1841: hd6301_reg_CCR |= carry;
1842: HD6301_SET_NZ8(hd6301_reg_B);
1843: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1844: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1845: }
1846:
1847: /**
1848: * ROLB : rotate left, accumulator B : B=B<<1 +C
1849: *
1850: * HINZVC
1851: * ..****
1852: */
1853: static void hd6301_rolb(void)
1854: {
1855: Uint8 carry, result, bitN;
1856:
1857: carry = (hd6301_reg_B & 0x80) >> 7;
1858: result = hd6301_reg_CCR & 1;
1859: result += hd6301_reg_B << 1;
1860: hd6301_reg_B = result;
1861:
1862: HD6301_CLR_NZVC;
1863: hd6301_reg_CCR |= carry;
1864: HD6301_SET_NZ8(hd6301_reg_B);
1865: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1866: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1867: }
1868:
1869: /**
1870: * DECB : decrement accumulator B : B=B-1
1871: *
1872: * HINZVC
1873: * ..***.
1874: */
1875: static void hd6301_decb(void)
1876: {
1877: Uint8 overflow;
1878:
1879: overflow = (hd6301_reg_B == (Sint8)0x80) << hd6301_REG_CCR_V;
1880: -- hd6301_reg_B;
1881:
1882: HD6301_CLR_NZV;
1883: hd6301_reg_CCR |= overflow;
1884: HD6301_SET_NZ8(hd6301_reg_B);
1885: }
1886:
1887: /**
1888: * INCB : increment accumulator B : B=B+1
1889: *
1890: * HINZVC
1891: * ..***.
1892: */
1893: static void hd6301_incb(void)
1894: {
1895: Uint8 overflow;
1896:
1897: overflow = (hd6301_reg_B == 0x7f) << hd6301_REG_CCR_V;
1898: hd6301_reg_B ++;
1899:
1900: HD6301_CLR_NZV;
1901: hd6301_reg_CCR |= overflow;
1902: HD6301_SET_NZ8(hd6301_reg_B);
1903: }
1904:
1905: /**
1906: * TSTB : test zero or minus, accumulator B : B-0
1907: *
1908: * HINZVC
1909: * ..**00
1910: */
1911: static void hd6301_tstb(void)
1912: {
1913: HD6301_CLR_NZVC;
1914: HD6301_SET_NZ8(hd6301_reg_B);
1915: }
1916:
1917: /**
1918: * CLRB : clear accumulator B : B=0
1919: *
1920: * HINZVC
1921: * ..0100
1922: */
1923: static void hd6301_clrb(void)
1924: {
1925: hd6301_reg_B = 0;
1926: HD6301_CLR_NZVC;
1927: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
1928: }
1929:
1930: /**
1931: * NEG_IND : negate indexed memory : M=0-M
1932: *
1933: * HINZVC
1934: * ..****
1935: */
1936: static void hd6301_neg_ind(void)
1937: {
1938: Uint8 value;
1939: Uint16 addr;
1940:
1941: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
1942: value = -hd6301_read_memory(addr);
1943: hd6301_write_memory(addr, value);
1944:
1945: HD6301_CLR_NZVC;
1946: hd6301_reg_CCR |= (value != 0x0);
1947: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1948: HD6301_SET_NZ8(value);
1949: }
1950:
1951: /**
1952: * AIM_IND : and immediate indexed memory : M=M&IMM
1953: *
1954: * HINZVC
1955: * ..**0.
1956: */
1957: static void hd6301_aim_ind(void)
1958: {
1959: Uint8 value;
1960: Uint16 addr;
1961:
1962: value = hd6301_read_memory(hd6301_reg_PC+1);
1963: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
1964: value &= hd6301_read_memory(addr);
1965: hd6301_write_memory(addr, value);
1966:
1967: HD6301_CLR_NZV;
1968: HD6301_SET_NZ8(value);
1969: }
1970:
1971: /**
1972: * OIM_IND : or immediate indexed memory : M=M|IMM
1973: *
1974: * HINZVC
1975: * ..**0.
1976: */
1977: static void hd6301_oim_ind(void)
1978: {
1979: Uint8 value;
1980: Uint16 addr;
1981:
1982: value = hd6301_read_memory(hd6301_reg_PC+1);
1983: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
1984: value |= hd6301_read_memory(addr);
1985: hd6301_write_memory(addr, value);
1986:
1987: HD6301_CLR_NZV;
1988: HD6301_SET_NZ8(value);
1989: }
1990:
1991: /**
1992: * COM_IND : complement 1 indexed memory : M=~M
1993: *
1994: * HINZVC
1995: * ..**01
1996: */
1997: static void hd6301_com_ind(void)
1998: {
1999: Uint8 value;
2000: Uint16 addr;
2001:
2002: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2003: value = ~hd6301_read_memory(addr);
2004: hd6301_write_memory(addr, value);
2005:
2006: HD6301_CLR_NZV;
2007: hd6301_reg_CCR |= 1;
2008: HD6301_SET_NZ8(value);
2009: }
2010:
2011: /**
2012: * LSR_IND : logical shift right indexed memory : M=M>>1
2013: *
2014: * HINZVC
2015: * ..0***
2016: */
2017: static void hd6301_lsr_ind(void)
2018: {
2019: Uint8 value, carry;
2020: Uint16 addr;
2021:
2022: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2023: value = hd6301_read_memory(addr);
2024:
2025: carry = value & 1;
2026: value >>= 1;
2027: hd6301_write_memory(addr, value);
2028:
2029: HD6301_CLR_NZVC;
2030: hd6301_reg_CCR |= carry;
2031: HD6301_SET_Z8(value);
2032: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
2033: }
2034:
2035: /**
2036: * EIM_IND : eor immediate indexed memory : M=M^IMM
2037: *
2038: * HINZVC
2039: * ..**0.
2040: */
2041: static void hd6301_eim_ind(void)
2042: {
2043: Uint8 value;
2044: Uint16 addr;
2045:
2046: value = hd6301_read_memory(hd6301_reg_PC+1);
2047: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
2048: value ^= hd6301_read_memory(addr);
2049: hd6301_write_memory(addr, value);
2050:
2051: HD6301_CLR_NZV;
2052: HD6301_SET_NZ8(value);
2053: }
2054:
2055: /**
2056: * ROR_IND : rotate right indexed memory : M=M>>1 + carry<<8
2057: *
2058: * HINZVC
2059: * ..****
2060: */
2061: static void hd6301_ror_ind(void)
2062: {
2063: Uint8 value, carry, result, bitN;
2064: Uint16 addr;
2065:
2066: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2067: value = hd6301_read_memory(addr);
2068:
2069: carry = value & 1;
2070: result = (hd6301_reg_CCR & 1) << 7;
2071: result += value >> 1;
2072: hd6301_write_memory(addr, result);
2073:
2074: HD6301_CLR_NZVC;
2075: hd6301_reg_CCR |= carry;
2076: HD6301_SET_NZ8(result);
2077: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2078: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2079: }
2080:
2081: /**
2082: * ASR_IND : arithmetic shift right indexed memory : M=M>>1
2083: *
2084: * HINZVC
2085: * ..****
2086: */
2087: static void hd6301_asr_ind(void)
2088: {
2089: Uint8 value, carry, bitN;
2090: Uint16 addr;
2091:
2092: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2093: value = hd6301_read_memory(addr);
2094:
2095: carry = value & 1;
2096: value >>= 1;
2097: value |= (value & 0x40) << 1;
2098: hd6301_write_memory(addr, value);
2099:
2100: HD6301_CLR_NZVC;
2101: hd6301_reg_CCR |= carry;
2102: HD6301_SET_NZ8(value);
2103: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2104: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2105: }
2106:
2107: /**
2108: * ASL_IND : arithmetic shift left indexed memory : M=M<<1
2109: *
2110: * HINZVC
2111: * ..****
2112: */
2113: static void hd6301_asl_ind(void)
2114: {
2115: Uint8 value, carry, bitN;
2116: Uint16 addr;
2117:
2118: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2119: value = hd6301_read_memory(addr);
2120:
2121: carry = (value & 0X80) >> 7;
2122: value <<= 1;
2123: hd6301_write_memory(addr, value);
2124:
2125: HD6301_CLR_NZVC;
2126: hd6301_reg_CCR |= carry;
2127: HD6301_SET_NZ8(value);
2128: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2129: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2130: }
2131:
2132: /**
2133: * ROL_IND : rotate left indexed memory : M=M<<1 + carry
2134: *
2135: * HINZVC
2136: * ..****
2137: */
2138: static void hd6301_rol_ind(void)
2139: {
2140: Uint8 value, carry, result, bitN;
2141: Uint16 addr;
2142:
2143: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2144: value = hd6301_read_memory(addr);
2145:
2146: result = hd6301_reg_CCR & 1;
2147: carry = (value & 0x80) >> 7;
2148: result += value << 1;
2149: hd6301_write_memory(addr, result);
2150:
2151: HD6301_CLR_NZVC;
2152: hd6301_reg_CCR |= carry;
2153: HD6301_SET_NZ8(result);
2154: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2155: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2156: }
2157:
2158: /**
2159: * DEC_IND : decrement indexed memory : M=M-1
2160: *
2161: * HINZVC
2162: * ..***.
2163: */
2164: static void hd6301_dec_ind(void)
2165: {
2166: Uint8 value, overflow;
2167: Uint16 addr;
2168:
2169: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2170: value = hd6301_read_memory(addr);
2171:
2172: overflow = (value == 0x80) << hd6301_REG_CCR_V;
2173: --value;
2174: hd6301_write_memory(addr, value);
2175:
2176: HD6301_CLR_NZV;
2177: hd6301_reg_CCR |= overflow;
2178: HD6301_SET_NZ8(value);
2179: }
2180:
2181: /**
2182: * TIM_IND : test immediate indexed memory : M&IMM
2183: *
2184: * HINZVC
2185: * ..**0.
2186: */
2187: static void hd6301_tim_ind(void)
2188: {
2189: Uint8 value;
2190: Uint16 addr;
2191:
2192: value = hd6301_read_memory(hd6301_reg_PC+1);
2193: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
2194: value &= hd6301_read_memory(addr);
2195: hd6301_write_memory(addr, value);
2196:
2197: HD6301_CLR_NZV;
2198: HD6301_SET_NZ8(value);
2199: }
2200:
2201: /**
2202: * INC_IND : increment indexed memory : M=M+1
2203: *
2204: * HINZVC
2205: * ..***.
2206: */
2207: static void hd6301_inc_ind(void)
2208: {
2209: Uint8 value, overflow;
2210: Uint16 addr;
2211:
2212: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2213: value = hd6301_read_memory(addr);
2214:
2215: overflow = (value == 0x7f) << hd6301_REG_CCR_V;
2216: value ++;
2217: hd6301_write_memory(addr, value);
2218:
2219: HD6301_CLR_NZV;
2220: hd6301_reg_CCR |= overflow;
2221: HD6301_SET_NZ8(value);
2222: }
2223:
2224: /**
2225: * TST_IND : test indexed memory : M-0
2226: *
2227: * HINZVC
2228: * ..**00
2229: */
2230: static void hd6301_tst_ind(void)
2231: {
2232: Uint8 value;
2233: Uint16 addr;
2234:
2235: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2236: value = hd6301_read_memory(addr);
2237:
2238: HD6301_CLR_NZVC;
2239: HD6301_SET_NZ8(value);
2240: }
2241:
2242: /**
2243: * JMP_IND : jump to indexed memory address : PC=M
2244: *
2245: * HINZVC
2246: * ......
2247: */
2248: static void hd6301_jmp_ind(void)
2249: {
2250: Uint8 value;
2251: Uint16 addr;
2252:
2253: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2254: value = hd6301_read_memory(addr);
2255: hd6301_reg_PC = value;
2256: }
2257:
2258: /**
2259: * CLR_IND : clear indexed memory : M=0
2260: *
2261: * HINZVC
2262: * ..0100
2263: */
2264: static void hd6301_clr_ind(void)
2265: {
2266: Uint16 addr;
2267:
2268: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2269: hd6301_write_memory(addr, 0);
2270:
2271: HD6301_CLR_NZVC;
2272: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
2273: }
2274:
2275: /**
2276: * NEG_EXT : negate extended memory : M=0-M
2277: *
2278: * HINZVC
2279: * ..****
2280: */
2281: static void hd6301_neg_ext(void)
2282: {
2283: Uint8 value;
2284: Uint16 addr;
2285:
2286: addr = hd6301_get_memory_ext();
2287: value = -hd6301_read_memory(addr);
2288: hd6301_write_memory(addr, value);
2289:
2290: HD6301_CLR_NZVC;
2291: hd6301_reg_CCR |= (value != 0x0);
2292: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
2293: HD6301_SET_NZ8(value);
2294: }
2295:
2296: /**
2297: * AIM_DIR : and immediate direct memory address : M=M&IMM
2298: *
2299: * HINZVC
2300: * ..**0.
2301: */
2302: static void hd6301_aim_dir(void)
2303: {
2304: Uint8 value;
2305: Uint16 addr;
2306:
2307: value = hd6301_read_memory(hd6301_reg_PC+1);
2308: addr = hd6301_read_memory(hd6301_reg_PC+2);
2309: value &= hd6301_read_memory(addr);
2310: hd6301_write_memory(addr, value);
2311:
2312: HD6301_CLR_NZV;
2313: HD6301_SET_NZ8(value);
2314: }
2315:
2316: /**
2317: * OIM_DIR : or immediate direct memory address : M=M|IMM
2318: *
2319: * HINZVC
2320: * ..**0.
2321: */
2322: static void hd6301_oim_dir(void)
2323: {
2324: Uint8 value;
2325: Uint16 addr;
2326:
2327: value = hd6301_read_memory(hd6301_reg_PC+1);
2328: addr = hd6301_read_memory(hd6301_reg_PC+2);
2329: value |= hd6301_read_memory(addr);
2330: hd6301_write_memory(addr, value);
2331:
2332: HD6301_CLR_NZV;
2333: HD6301_SET_NZ8(value);
2334: }
2335:
2336: /**
2337: * COM_EXT : complement 1 extended memory : M=~M
2338: *
2339: * HINZVC
2340: * ..**01
2341: */
2342: static void hd6301_com_ext(void)
2343: {
2344: Uint8 value;
2345: Uint16 addr;
2346:
2347: addr = hd6301_get_memory_ext();
2348: value = ~hd6301_read_memory(addr);
2349: hd6301_write_memory(addr, value);
2350:
2351: HD6301_CLR_NZV;
2352: hd6301_reg_CCR |= 1;
2353: HD6301_SET_NZ8(value);
2354: }
2355:
2356: /**
2357: * LSR_EXT : logical shift right extended memory : M=M>>1
2358: *
2359: * HINZVC
2360: * ..0***
2361: */
2362: static void hd6301_lsr_ext(void)
2363: {
2364: Uint8 value, carry;
2365: Uint16 addr;
2366:
2367: addr = hd6301_get_memory_ext();
2368: value = hd6301_read_memory(addr);
2369:
2370: carry = value & 1;
2371: value >>= 1;
2372: hd6301_write_memory(addr, value);
2373:
2374: HD6301_CLR_NZVC;
2375: hd6301_reg_CCR |= carry;
2376: HD6301_SET_Z8(value);
2377: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
2378: }
2379:
2380: /**
2381: * EIM_DIR : eor immediate direct memory address : M=M^IMM
2382: *
2383: * HINZVC
2384: * ..**0.
2385: */
2386: static void hd6301_eim_dir(void)
2387: {
2388: Uint8 value;
2389: Uint16 addr;
2390:
2391: value = hd6301_read_memory(hd6301_reg_PC+1);
2392: addr = hd6301_read_memory(hd6301_reg_PC+2);
2393: value ^= hd6301_read_memory(addr);
2394: hd6301_write_memory(addr, value);
2395:
2396: HD6301_CLR_NZV;
2397: HD6301_SET_NZ8(value);
2398: }
2399:
2400: /**
2401: * ROR_EXT : rotate right extended memory : M=M>>1 + carry<<8
2402: *
2403: * HINZVC
2404: * ..****
2405: */
2406: static void hd6301_ror_ext(void)
2407: {
2408: Uint8 value, carry, result, bitN;
2409: Uint16 addr;
2410:
2411: addr = hd6301_get_memory_ext();
2412: value = hd6301_read_memory(addr);
2413:
2414: result = (hd6301_reg_CCR & 1) << 7;
2415: carry = value & 1;
2416: result += value >> 1;
2417: hd6301_write_memory(addr, result);
2418:
2419: HD6301_CLR_NZVC;
2420: hd6301_reg_CCR |= carry;
2421: HD6301_SET_NZ8(value);
2422: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2423: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2424: }
2425:
2426: /**
2427: * ASR_EXT : arithmetic shift right extended memory : M=M>>1
2428: *
2429: * HINZVC
2430: * ..****
2431: */
2432: static void hd6301_asr_ext(void)
2433: {
2434: Uint8 value, carry, bitN;
2435: Uint16 addr;
2436:
2437: addr = hd6301_get_memory_ext();
2438: value = hd6301_read_memory(addr);
2439:
2440: carry = value & 1;
2441: value >>= 1;
2442: value |= (value & 0x40) << 1;
2443: hd6301_write_memory(addr, value);
2444:
2445: HD6301_CLR_NZVC;
2446: hd6301_reg_CCR |= carry;
2447: HD6301_SET_NZ8(value);
2448: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2449: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2450: }
2451:
2452: /**
2453: * ASL_EXT : arithmetic shift left extended memory : M=M<<1
2454: *
2455: * HINZVC
2456: * ..****
2457: */
2458: static void hd6301_asl_ext(void)
2459: {
2460: Uint8 value, carry, bitN;
2461: Uint16 addr;
2462:
2463: addr = hd6301_get_memory_ext();
2464: value = hd6301_read_memory(addr);
2465:
2466: carry = (value & 0X80) >> 7;
2467: value <<= 1;
2468: hd6301_write_memory(addr, value);
2469:
2470: HD6301_CLR_NZVC;
2471: hd6301_reg_CCR |= carry;
2472: HD6301_SET_NZ8(value);
2473: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2474: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2475: }
2476:
2477: /**
2478: * ROL_EXT : rotate left extended memory : M=M<<1 + carry
2479: *
2480: * HINZVC
2481: * ..****
2482: */
2483: static void hd6301_rol_ext(void)
2484: {
2485: Uint8 value, carry, result, bitN;
2486: Uint16 addr;
2487:
2488: addr = hd6301_get_memory_ext();
2489: value = hd6301_read_memory(addr);
2490:
2491: result = hd6301_reg_CCR & 1;
2492: carry = (value & 0x80) >> 7;
2493: result += value << 1;
2494: hd6301_write_memory(addr, result);
2495:
2496: HD6301_CLR_NZVC;
2497: hd6301_reg_CCR |= carry;
2498: HD6301_SET_NZ8(value);
2499: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2500: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2501: }
2502:
2503: /**
2504: * DEC_EXT : decrement extended memory : M=M-1
2505: *
2506: * HINZVC
2507: * ..***.
2508: */
2509: static void hd6301_dec_ext(void)
2510: {
2511: Uint8 value, overflow;
2512: Uint16 addr;
2513:
2514: addr = hd6301_get_memory_ext();
2515: value = hd6301_read_memory(addr);
2516:
2517: overflow = (value == 0x80) << hd6301_REG_CCR_V;
2518: --value;
2519: hd6301_write_memory(addr, value);
2520:
2521: HD6301_CLR_NZV;
2522: hd6301_reg_CCR |= overflow;
2523: HD6301_SET_NZ8(value);
2524: }
2525:
2526: /**
2527: * TIM_DIR : test direct memory address value : M&IMM
2528: *
2529: * HINZVC
2530: * ..**0.
2531: */
2532: static void hd6301_tim_dir(void)
2533: {
2534: Uint8 value;
2535: Uint16 addr;
2536:
2537: value = hd6301_read_memory(hd6301_reg_PC+1);
2538: addr = hd6301_read_memory(hd6301_reg_PC+2);
2539: value &= hd6301_read_memory(addr);
2540: hd6301_write_memory(addr, value);
2541:
2542: HD6301_CLR_NZV;
2543: HD6301_SET_NZ8(value);
2544: }
2545:
2546: /**
2547: * INC_EXT : increment extended memory : M=M+1
2548: *
2549: * HINZVC
2550: * ..***.
2551: */
2552: static void hd6301_inc_ext(void)
2553: {
2554: Uint8 value, overflow;
2555: Uint16 addr;
2556:
2557: addr = hd6301_get_memory_ext();
2558: value = hd6301_read_memory(addr);
2559:
2560: overflow = (value == 0x7f) << hd6301_REG_CCR_V;
2561: value ++;
2562: hd6301_write_memory(addr, value);
2563:
2564: HD6301_CLR_NZV;
2565: hd6301_reg_CCR |= overflow;
2566: HD6301_SET_NZ8(value);
2567: }
2568:
2569: /**
2570: * TST_EXT : test extended memory : M-0
2571: *
2572: * HINZVC
2573: * ..**00
2574: */
2575: static void hd6301_tst_ext(void)
2576: {
2577: Uint8 value;
2578: Uint16 addr;
2579:
2580: addr = hd6301_get_memory_ext();
2581: value = hd6301_read_memory(addr);
2582:
2583: HD6301_CLR_NZVC;
2584: HD6301_SET_NZ8(value);
2585: }
2586:
2587: /**
2588: * JMP_EXT : jump to extended memory address : PC=M
2589: *
2590: * HINZVC
2591: * ......
2592: */
2593: static void hd6301_jmp_ext(void)
2594: {
2595: Uint8 value;
2596: Uint16 addr;
2597:
2598: addr = hd6301_get_memory_ext();
2599: value = hd6301_read_memory(addr);
2600:
2601: hd6301_reg_PC = value;
2602: }
2603:
2604: /**
2605: * CLR_EXT : clear extended memory : M=0
2606: *
2607: * HINZVC
2608: * ..0100
2609: */
2610: static void hd6301_clr_ext(void)
2611: {
2612: Uint16 addr;
2613:
2614: addr = hd6301_get_memory_ext();
2615: hd6301_write_memory(addr, 0);
2616:
2617: HD6301_CLR_NZVC;
2618: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
2619: }
2620:
2621: /**
1.1.1.2 ! root 2622: * SUBA_IMM : subtract immediate value from accumulator A : A=A-M
1.1 root 2623: *
2624: * HINZVC
2625: * ..****
2626: */
2627: static void hd6301_suba_imm(void)
2628: {
2629: Uint8 value;
2630: Uint16 result;
2631:
2632: value = hd6301_read_memory(hd6301_reg_PC+1);
2633: result = hd6301_reg_A - value;
2634:
2635: HD6301_CLR_NZVC;
2636: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2637:
2638: hd6301_reg_A = result;
2639: }
2640:
2641: /**
2642: * CMPA_IMM : compare immediate value to accumulator A : A-M
2643: *
2644: * HINZVC
2645: * ..****
2646: */
2647: static void hd6301_cmpa_imm(void)
2648: {
2649: Uint8 value;
2650: Uint16 result;
2651:
2652: value = hd6301_read_memory(hd6301_reg_PC+1);
2653: result = hd6301_reg_A - value;
2654:
2655: HD6301_CLR_NZVC;
2656: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2657: }
2658:
2659: /**
1.1.1.2 ! root 2660: * SBCA_IMM : subtract with carry immediate value from accumulator A : A=A-M-C
1.1 root 2661: *
2662: * HINZVC
2663: * ..****
2664: */
2665: static void hd6301_sbca_imm(void)
2666: {
2667: Uint8 value, carry;
2668: Uint16 result;
2669:
2670: carry = hd6301_REG_CCR_C & 1;
2671: value = hd6301_read_memory(hd6301_reg_PC+1);
2672: result = hd6301_reg_A - value - carry;
2673:
2674: HD6301_CLR_NZVC;
2675: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2676:
2677: hd6301_reg_A = result;
2678: }
2679:
2680: /**
1.1.1.2 ! root 2681: * SUBD_IMM : subtract immediate value from accumulator D : D=D-MM
1.1 root 2682: *
2683: * HINZVC
2684: * ..****
2685: */
2686: static void hd6301_subd_imm(void)
2687: {
2688: Uint16 value, regD;
2689: Uint32 result;
2690:
2691: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2692: value += hd6301_read_memory(hd6301_reg_PC+2);
2693: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
2694: result = regD - value;
2695:
2696: hd6301_reg_A = (result >> 8) & 0xff;
2697: hd6301_reg_B = result & 0xff;
2698:
2699: HD6301_CLR_NZVC;
2700: HD6301_SET_FLAGS16(regD, value, result);
2701: }
2702:
2703: /**
2704: * ANDA_IMM : and immediate value with accumulator A : A=A&M
2705: *
2706: * HINZVC
2707: * ..**0.
2708: */
2709: static void hd6301_anda_imm(void)
2710: {
2711: hd6301_reg_A &= hd6301_read_memory(hd6301_reg_PC+1);
2712:
2713: HD6301_CLR_NZV;
2714: HD6301_SET_NZ8(hd6301_reg_A);
2715: }
2716:
2717: /**
2718: * BITA_IMM : bit test immediate value with accumulator A : A&M
2719: *
2720: * HINZVC
2721: * ..**0.
2722: */
2723: static void hd6301_bita_imm(void)
2724: {
2725: Uint8 value;
2726:
2727: value = hd6301_reg_A & hd6301_read_memory(hd6301_reg_PC+1);
2728:
2729: HD6301_CLR_NZV;
2730: HD6301_SET_NZ8(value);
2731: }
2732:
2733: /**
2734: * LDAA_IMM : load accumulator A with immediate value : A=M
2735: *
2736: * HINZVC
2737: * ..**0.
2738: */
2739: static void hd6301_ldaa_imm(void)
2740: {
2741: hd6301_reg_A = hd6301_read_memory(hd6301_reg_PC+1);
2742:
2743: HD6301_CLR_NZV;
2744: HD6301_SET_NZ8(hd6301_reg_A);
2745: }
2746:
2747: /**
2748: * EORA_IMM : exclusive or immediate value with accumulator A : A=A^M
2749: *
2750: * HINZVC
2751: * ..**0.
2752: */
2753: static void hd6301_eora_imm(void)
2754: {
2755: hd6301_reg_A ^= hd6301_read_memory(hd6301_reg_PC+1);
2756:
2757: HD6301_CLR_NZV;
2758: HD6301_SET_NZ8(hd6301_reg_A);
2759: }
2760:
2761: /**
2762: * ADCA_IMM : add with carry immediate value to accumulator A : A=A+M+C
2763: *
2764: * HINZVC
2765: * *.****
2766: */
2767: static void hd6301_adca_imm(void)
2768: {
2769: Uint8 value, carry;
2770: Uint16 result;
2771:
2772: carry = hd6301_REG_CCR_C & 1;
2773: value = hd6301_read_memory(hd6301_reg_PC+1);
2774: result = hd6301_reg_A + value + carry;
2775:
2776: HD6301_CLR_HNZVC;
2777: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2778: HD6301_SET_H(hd6301_reg_A, value, result);
2779:
2780: hd6301_reg_A = result;
2781: }
2782:
2783: /**
2784: * ORAA_IMM : inclusive or accumulator A with immediate value : A=A|M
2785: *
2786: * HINZVC
2787: * ..**0.
2788: */
2789: static void hd6301_oraa_imm(void)
2790: {
2791: hd6301_reg_A |= hd6301_read_memory(hd6301_reg_PC+1);
2792:
2793: HD6301_CLR_NZV;
2794: HD6301_SET_NZ8(hd6301_reg_A);
2795: }
2796:
2797: /**
2798: * ADDA_IMM : add immediate value with accumulator A : A=A+M
2799: *
2800: * HINZVC
2801: * *.****
2802: */
2803: static void hd6301_adda_imm(void)
2804: {
2805: Uint8 value;
2806: Uint16 result;
2807:
2808: value = hd6301_read_memory(hd6301_reg_PC+1);
2809: result = hd6301_reg_A + value;
2810:
2811: HD6301_CLR_HNZVC;
2812: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2813: HD6301_SET_H(hd6301_reg_A, value, result);
2814:
2815: hd6301_reg_A = result;
2816: }
2817:
2818: /**
2819: * CPX_IMM : compare index register with immediate value : X-MM
2820: *
2821: * HINZVC
2822: * ..****
2823: */
2824: static void hd6301_cpx_imm(void)
2825: {
2826: Uint16 value;
2827: Uint32 result;
2828:
2829: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2830: value += hd6301_read_memory(hd6301_reg_PC+2);
2831: result = hd6301_reg_X - value;
2832:
2833: HD6301_CLR_NZVC;
2834: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
2835: }
2836:
2837: /**
2838: * BSR : branch to subroutine
2839: *
2840: * HINZVC
2841: * ......
2842: */
2843: static void hd6301_bsr(void)
2844: {
2845: Sint8 addr;
2846:
2847: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
2848: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
2849:
2850: addr = hd6301_read_memory(hd6301_reg_PC + 1);
2851: hd6301_reg_PC += addr + 2;
2852: }
2853:
2854: /**
2855: * LDS_IMM : load stack pointer with immediate value : SP=MM
2856: *
2857: * HINZVC
2858: * ..**0.
2859: */
2860: static void hd6301_lds_imm(void)
2861: {
2862: Uint16 value;
2863:
2864: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2865: value += hd6301_read_memory(hd6301_reg_PC+2);
2866: hd6301_reg_SP = value;
2867:
2868: HD6301_CLR_NZV;
2869: HD6301_SET_NZ16(value);
2870: }
2871:
2872: /**
1.1.1.2 ! root 2873: * SUBA_DIR : subtract direct memory address value from accumulator A : A=A-M
1.1 root 2874: *
2875: * HINZVC
2876: * ..****
2877: */
2878: static void hd6301_suba_dir(void)
2879: {
2880: Uint8 value;
2881: Uint16 result, addr;
2882:
2883: addr = hd6301_read_memory(hd6301_reg_PC+1);
2884: value = hd6301_read_memory(addr);
2885: result = hd6301_reg_A - value;
2886:
2887: HD6301_CLR_NZVC;
2888: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2889:
2890: hd6301_reg_A = result;
2891: }
2892:
2893: /**
2894: * CMPA_DIR : compare direct memory address value to accumulator A : A-M
2895: *
2896: * HINZVC
2897: * ..****
2898: */
2899: static void hd6301_cmpa_dir(void)
2900: {
2901: Uint8 value;
2902: Uint16 addr, result;
2903:
2904: addr = hd6301_read_memory(hd6301_reg_PC+1);
2905: value = hd6301_read_memory(addr);
2906: result = hd6301_reg_A - value;
2907:
2908: HD6301_CLR_NZVC;
2909: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2910: }
2911:
2912: /**
1.1.1.2 ! root 2913: * SBCA_DIR : subtract with carry direct memory address value from accumulator A : A=A-M-C
1.1 root 2914: *
2915: * HINZVC
2916: * ..****
2917: */
2918: static void hd6301_sbca_dir(void)
2919: {
2920: Uint8 value, carry;
2921: Uint16 addr, result;
2922:
2923: carry = hd6301_REG_CCR_C & 1;
2924: addr = hd6301_read_memory(hd6301_reg_PC+1);
2925: value = hd6301_read_memory(addr);
2926: result = hd6301_reg_A - value - carry;
2927:
2928: HD6301_CLR_NZVC;
2929: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2930:
2931: hd6301_reg_A = result;
2932: }
2933:
2934: /**
1.1.1.2 ! root 2935: * SUBD_DIR : subtract direct memory address value from accumulator D : D=D-MM
1.1 root 2936: *
2937: * HINZVC
2938: * ..****
2939: */
2940: static void hd6301_subd_dir(void)
2941: {
2942: Uint16 addr, value, regD;
2943: Uint32 result;
2944:
2945: addr = hd6301_read_memory(hd6301_reg_PC+1);
2946: value = hd6301_read_memory(addr) << 8;
2947: value += hd6301_read_memory(addr+1);
2948: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
2949: result = regD - value;
2950:
2951: hd6301_reg_A = (result >> 8) & 0xff;
2952: hd6301_reg_B = result & 0xff;
2953:
2954: HD6301_CLR_NZVC;
2955: HD6301_SET_FLAGS16(regD, value, result);
2956: }
2957:
2958: /**
2959: * ANDA_DIR : and direct memory address value with accumulator A : A=A&M
2960: *
2961: * HINZVC
2962: * ..**0.
2963: */
2964: static void hd6301_anda_dir(void)
2965: {
2966: Uint16 addr;
2967:
2968: addr = hd6301_read_memory(hd6301_reg_PC+1);
2969: hd6301_reg_A &= hd6301_read_memory(addr);
2970:
2971: HD6301_CLR_NZV;
2972: HD6301_SET_NZ8(hd6301_reg_A);
2973: }
2974:
2975: /**
2976: * BITA_DIR : bit test direct memory address value with accumulator A : A&M
2977: *
2978: * HINZVC
2979: * ..**0.
2980: */
2981: static void hd6301_bita_dir(void)
2982: {
2983: Uint8 value;
2984: Uint16 addr;
2985:
2986: addr = hd6301_read_memory(hd6301_reg_PC+1);
2987: value = hd6301_reg_A & hd6301_read_memory(addr);
2988:
2989: HD6301_CLR_NZV;
2990: HD6301_SET_NZ8(value);
2991: }
2992:
2993: /**
2994: * LDAA_DIR : load accumulator A with direct memory address value : A=M
2995: *
2996: * HINZVC
2997: * ..**0.
2998: */
2999: static void hd6301_ldaa_dir(void)
3000: {
3001: Uint16 addr;
3002:
3003: addr = hd6301_read_memory(hd6301_reg_PC+1);
3004: hd6301_reg_A = hd6301_read_memory(addr);
3005:
3006: HD6301_CLR_NZV;
3007: HD6301_SET_NZ8(hd6301_reg_A);
3008: }
3009:
3010: /**
3011: * STAA_DIR : store accumulator A into direct memory address value : M=A
3012: *
3013: * HINZVC
3014: * ..**0.
3015: */
3016: static void hd6301_staa_dir(void)
3017: {
3018: Uint16 addr;
3019:
3020: addr = hd6301_read_memory(hd6301_reg_PC+1);
3021: hd6301_write_memory(addr, hd6301_reg_A);
3022:
3023: HD6301_CLR_NZV;
3024: HD6301_SET_NZ8(hd6301_reg_A);
3025: }
3026:
3027: /**
3028: * EORA_DIR : exclusive or direct memory address value with accumulator A : A=A^M
3029: *
3030: * HINZVC
3031: * ..**0.
3032: */
3033: static void hd6301_eora_dir(void)
3034: {
3035: Uint16 addr;
3036:
3037: addr = hd6301_read_memory(hd6301_reg_PC+1);
3038: hd6301_reg_A ^= hd6301_read_memory(addr);
3039:
3040: HD6301_CLR_NZV;
3041: HD6301_SET_NZ8(hd6301_reg_A);
3042: }
3043:
3044: /**
3045: * ADCA_DIR : add with carry direct memory address value to accumulator A : A=A+M+C
3046: *
3047: * HINZVC
3048: * *.****
3049: */
3050: static void hd6301_adca_dir(void)
3051: {
3052: Uint8 value, carry;
3053: Uint16 addr, result;
3054:
3055: carry = hd6301_REG_CCR_C & 1;
3056: addr = hd6301_read_memory(hd6301_reg_PC+1);
3057: value = hd6301_read_memory(addr);
3058: result = hd6301_reg_A + value + carry;
3059:
3060: HD6301_CLR_HNZVC;
3061: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3062: HD6301_SET_H(hd6301_reg_A, value, result);
3063:
3064: hd6301_reg_A = result;
3065: }
3066:
3067: /**
3068: * ORAA_DIR : inclusive or accumulator A with direct memory address value : A=A|M
3069: *
3070: * HINZVC
3071: * ..**0.
3072: */
3073: static void hd6301_oraa_dir(void)
3074: {
3075: Uint16 addr;
3076:
3077: addr = hd6301_read_memory(hd6301_reg_PC+1);
3078: hd6301_reg_A |= hd6301_read_memory(addr);
3079:
3080: HD6301_CLR_NZV;
3081: HD6301_SET_NZ8(hd6301_reg_A);
3082: }
3083:
3084: /**
3085: * ADDA_DIR : add direct memory address value with accumulator A : A=A+M
3086: *
3087: * HINZVC
3088: * *.****
3089: */
3090: static void hd6301_adda_dir(void)
3091: {
3092: Uint8 value;
3093: Uint16 addr, result;
3094:
3095: addr = hd6301_read_memory(hd6301_reg_PC+1);
3096: value = hd6301_read_memory(addr);
3097: result = hd6301_reg_A + value;
3098:
3099: HD6301_CLR_NZVC;
3100: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3101: HD6301_SET_H(hd6301_reg_A, value, result);
3102:
3103: hd6301_reg_A = result;
3104: }
3105:
3106: /**
3107: * CPX_DIR : compare index register with direct memory address value : X-MM
3108: *
3109: * HINZVC
3110: * ..****
3111: */
3112: static void hd6301_cpx_dir(void)
3113: {
3114: Uint16 addr, value;
3115: Uint32 result;
3116:
3117: addr = hd6301_read_memory(hd6301_reg_PC+1);
3118: value = hd6301_read_memory(addr) << 8;
3119: value += hd6301_read_memory(addr+1);
3120: result = hd6301_reg_X - value;
3121:
3122: HD6301_CLR_NZVC;
3123: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3124: }
3125:
3126: /**
3127: * JSR_DIR : jump to subroutine at direct memory address
3128: *
3129: * HINZVC
3130: * ......
3131: */
3132: static void hd6301_jsr_dir(void)
3133: {
3134: Uint16 addr;
3135:
3136: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3137: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3138:
3139: addr = hd6301_read_memory(hd6301_reg_PC + 1);
3140: hd6301_reg_PC += addr + 2;
3141: }
3142:
3143: /**
3144: * LDS_DIR : load stack pointer with direct memory address value : SP=MM
3145: *
3146: * HINZVC
3147: * ..**0.
3148: */
3149: static void hd6301_lds_dir(void)
3150: {
3151: Uint16 addr;
3152:
3153: addr = hd6301_read_memory(hd6301_reg_PC+1);
3154: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3155: hd6301_reg_SP += hd6301_read_memory(addr+1);
3156:
3157: HD6301_CLR_NZV;
3158: HD6301_SET_NZ16(hd6301_reg_SP);
3159: }
3160:
3161: /**
3162: * STS_DIR : store stack pointer into direct memory address value : MM=SP
3163: *
3164: * HINZVC
3165: * ..**0.
3166: */
3167: static void hd6301_sts_dir(void)
3168: {
3169: Uint16 addr;
3170:
3171: addr = hd6301_read_memory(hd6301_reg_PC+1);
3172: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3173: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3174:
3175: HD6301_CLR_NZV;
3176: HD6301_SET_NZ16(hd6301_reg_SP);
3177: }
3178:
3179: /**
1.1.1.2 ! root 3180: * SUBA_IND : subtract indexed memory address value from accumulator A : A=A-M
1.1 root 3181: *
3182: * HINZVC
3183: * ..****
3184: */
3185: static void hd6301_suba_ind(void)
3186: {
3187: Uint8 value;
3188: Uint16 result, addr;
3189:
3190: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3191: value = hd6301_read_memory(addr);
3192: result = hd6301_reg_A - value;
3193:
3194: HD6301_CLR_NZVC;
3195: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3196:
3197: hd6301_reg_A = result;
3198: }
3199:
3200: /**
3201: * CMPA_IND : compare indexed memory address value to accumulator A : A-M
3202: *
3203: * HINZVC
3204: * ..****
3205: */
3206: static void hd6301_cmpa_ind(void)
3207: {
3208: Uint8 value;
3209: Uint16 addr, result;
3210:
3211: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3212: value = hd6301_read_memory(addr);
3213: result = hd6301_reg_A - value;
3214:
3215: HD6301_CLR_NZVC;
3216: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3217: }
3218:
3219: /**
1.1.1.2 ! root 3220: * SBCA_IND : subtract with carry indexed memory address value from accumulator A : A=A-M-C
1.1 root 3221: *
3222: * HINZVC
3223: * ..****
3224: */
3225: static void hd6301_sbca_ind(void)
3226: {
3227: Uint8 value, carry;
3228: Uint16 addr, result;
3229:
3230: carry = hd6301_REG_CCR_C & 1;
3231: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3232: value = hd6301_read_memory(addr);
3233: result = hd6301_reg_A - value - carry;
3234:
3235: HD6301_CLR_NZVC;
3236: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3237:
3238: hd6301_reg_A = result;
3239: }
3240:
3241: /**
1.1.1.2 ! root 3242: * SUBD_IND : subtract indexed memory address value from accumulator D : D=D-MM
1.1 root 3243: *
3244: * HINZVC
3245: * ..****
3246: */
3247: static void hd6301_subd_ind(void)
3248: {
3249: Uint16 addr, value, regD;
3250: Uint32 result;
3251:
3252: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3253: value = hd6301_read_memory(addr) << 8;
3254: value += hd6301_read_memory(addr+1);
3255: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3256: result = regD - value;
3257:
3258: hd6301_reg_A = (result >> 8) & 0xff;
3259: hd6301_reg_B = result & 0xff;
3260:
3261: HD6301_CLR_NZVC;
3262: HD6301_SET_FLAGS16(regD, value, result);
3263: }
3264:
3265: /**
3266: * ANDA_IND : and indexed memory address value with accumulator A : A=A&M
3267: *
3268: * HINZVC
3269: * ..**0.
3270: */
3271: static void hd6301_anda_ind(void)
3272: {
3273: Uint16 addr;
3274:
3275: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3276: hd6301_reg_A &= hd6301_read_memory(addr);
3277:
3278: HD6301_CLR_NZV;
3279: HD6301_SET_NZ8(hd6301_reg_A);
3280: }
3281:
3282: /**
3283: * BITA_IND : bit test indexed memory address value with accumulator A : A&M
3284: *
3285: * HINZVC
3286: * ..**0.
3287: */
3288: static void hd6301_bita_ind(void)
3289: {
3290: Uint8 value;
3291: Uint16 addr;
3292:
3293: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3294: value = hd6301_reg_A & hd6301_read_memory(addr);
3295:
3296: HD6301_CLR_NZV;
3297: HD6301_SET_NZ8(value);
3298: }
3299:
3300: /**
3301: * LDAA_IND : load accumulator A with indexed memory address value : A=M
3302: *
3303: * HINZVC
3304: * ..**0.
3305: */
3306: static void hd6301_ldaa_ind(void)
3307: {
3308: Uint16 addr;
3309:
3310: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3311: hd6301_reg_A = hd6301_read_memory(addr);
3312:
3313: HD6301_CLR_NZV;
3314: HD6301_SET_NZ8(hd6301_reg_A);
3315: }
3316:
3317: /**
3318: * STAA_IND : store accumulator A into indexed memory address value : M=A
3319: *
3320: * HINZVC
3321: * ..**0.
3322: */
3323: static void hd6301_staa_ind(void)
3324: {
3325: Uint16 addr;
3326:
3327: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3328: hd6301_write_memory(addr, hd6301_reg_A);
3329:
3330: HD6301_CLR_NZV;
3331: HD6301_SET_NZ8(hd6301_reg_A);
3332: }
3333:
3334: /**
3335: * EORA_IND : exclusive or indexed memory address value with accumulator A : A=A^M
3336: *
3337: * HINZVC
3338: * ..**0.
3339: */
3340: static void hd6301_eora_ind(void)
3341: {
3342: Uint16 addr;
3343:
3344: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3345: hd6301_reg_A ^= hd6301_read_memory(addr);
3346:
3347: HD6301_CLR_NZV;
3348: HD6301_SET_NZ8(hd6301_reg_A);
3349: }
3350:
3351: /**
3352: * ADCA_IND : add with carry indexed memory address value to accumulator A : A=A+M+C
3353: *
3354: * HINZVC
3355: * *.****
3356: */
3357: static void hd6301_adca_ind(void)
3358: {
3359: Uint8 value, carry;
3360: Uint16 addr, result;
3361:
3362: carry = hd6301_REG_CCR_C & 1;
3363: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3364: value = hd6301_read_memory(addr);
3365: result = hd6301_reg_A + value + carry;
3366:
3367: HD6301_CLR_HNZVC;
3368: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3369: HD6301_SET_H(hd6301_reg_A, value, result);
3370:
3371: hd6301_reg_A = result;
3372: }
3373:
3374: /**
3375: * ORAA_IND : inclusive or accumulator A with indexed memory address value : A=A|M
3376: *
3377: * HINZVC
3378: * ..**0.
3379: */
3380: static void hd6301_oraa_ind(void)
3381: {
3382: Uint16 addr;
3383:
3384: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3385: hd6301_reg_A |= hd6301_read_memory(addr);
3386:
3387: HD6301_CLR_NZV;
3388: HD6301_SET_NZ8(hd6301_reg_A);
3389: }
3390:
3391: /**
3392: * ADDA_IND : add indexed memory address value with accumulator A : A=A+M
3393: *
3394: * HINZVC
3395: * *.****
3396: */
3397: static void hd6301_adda_ind(void)
3398: {
3399: Uint8 value;
3400: Uint16 addr, result;
3401:
3402: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3403: value = hd6301_read_memory(addr);
3404: result = hd6301_reg_A + value;
3405:
3406: HD6301_CLR_HNZVC;
3407: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3408: HD6301_SET_H(hd6301_reg_A, value, result);
3409:
3410: hd6301_reg_A = result;
3411: }
3412:
3413: /**
3414: * CPX_IND : compare index register with indexed memory address value : X-MM
3415: *
3416: * HINZVC
3417: * ..****
3418: */
3419: static void hd6301_cpx_ind(void)
3420: {
3421: Uint16 addr, value;
3422: Uint32 result;
3423:
3424: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3425: value = hd6301_read_memory(addr) << 8;
3426: value += hd6301_read_memory(addr+1);
3427: result = hd6301_reg_X - value;
3428:
3429: HD6301_CLR_NZVC;
3430: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3431: }
3432:
3433: /**
3434: * JSR_IND : jump to subroutine at indexed address
3435: *
3436: * HINZVC
3437: * ......
3438: */
3439: static void hd6301_jsr_ind(void)
3440: {
3441: Uint16 addr;
3442:
3443: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3444: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3445:
3446: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3447: hd6301_reg_PC += addr + 2;
3448: }
3449:
3450: /**
3451: * LDS_IND : load stack pointer with indexed memory address value : SP=MM
3452: *
3453: * HINZVC
3454: * ..**0.
3455: */
3456: static void hd6301_lds_ind(void)
3457: {
3458: Uint16 addr;
3459:
3460: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3461: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3462: hd6301_reg_SP += hd6301_read_memory(addr+1);
3463:
3464: HD6301_CLR_NZV;
3465: HD6301_SET_NZ16(hd6301_reg_SP);
3466: }
3467:
3468: /**
3469: * STS_IND : store stack pointer into indexed memory address value : MM=SP
3470: *
3471: * HINZVC
3472: * ..**0.
3473: */
3474: static void hd6301_sts_ind(void)
3475: {
3476: Uint16 addr;
3477:
3478: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3479: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3480: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3481:
3482: HD6301_CLR_NZV;
3483: HD6301_SET_NZ16(hd6301_reg_SP);
3484: }
3485:
3486: /**
1.1.1.2 ! root 3487: * SUBA_EXT : subtract extented memory address value from accumulator A : A=A-M
1.1 root 3488: *
3489: * HINZVC
3490: * ..****
3491: */
3492: static void hd6301_suba_ext(void)
3493: {
3494: Uint8 value;
3495: Uint16 result, addr;
3496:
3497: addr = hd6301_get_memory_ext();
3498: value = hd6301_read_memory(addr);
3499: result = hd6301_reg_A - value;
3500:
3501: HD6301_CLR_NZVC;
3502: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3503:
3504: hd6301_reg_A = result;
3505: }
3506:
3507: /**
3508: * CMPA_EXT : compare extented memory address value to accumulator A : A-M
3509: *
3510: * HINZVC
3511: * ..****
3512: */
3513: static void hd6301_cmpa_ext(void)
3514: {
3515: Uint8 value;
3516: Uint16 addr, result;
3517:
3518: addr = hd6301_get_memory_ext();
3519: value = hd6301_read_memory(addr);
3520: result = hd6301_reg_A - value;
3521:
3522: HD6301_CLR_NZVC;
3523: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3524: }
3525:
3526: /**
1.1.1.2 ! root 3527: * SBCA_EXT : subtract with carry extented memory address value from accumulator A : A=A-M-C
1.1 root 3528: *
3529: * HINZVC
3530: * ..****
3531: */
3532: static void hd6301_sbca_ext(void)
3533: {
3534: Uint8 value, carry;
3535: Uint16 addr, result;
3536:
3537: carry = hd6301_REG_CCR_C & 1;
3538: addr = hd6301_get_memory_ext();
3539: value = hd6301_read_memory(addr);
3540: result = hd6301_reg_A - value - carry;
3541:
3542: HD6301_CLR_NZVC;
3543: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3544:
3545: hd6301_reg_A = result;
3546: }
3547:
3548: /**
1.1.1.2 ! root 3549: * SUBD_EXT : subtract extented memory address value from accumulator D : D=D-MM
1.1 root 3550: *
3551: * HINZVC
3552: * ..****
3553: */
3554: static void hd6301_subd_ext(void)
3555: {
3556: Uint16 addr, value, regD;
3557: Uint32 result;
3558:
3559: addr = hd6301_get_memory_ext();
3560: value = hd6301_read_memory(addr) << 8;
3561: value += hd6301_read_memory(addr+1);
3562: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3563: result = regD - value;
3564:
3565: hd6301_reg_A = (result >> 8) & 0xff;
3566: hd6301_reg_B = result & 0xff;
3567:
3568: HD6301_CLR_NZVC;
3569: HD6301_SET_FLAGS16(regD, value, result);
3570: }
3571:
3572: /**
3573: * ANDA_EXT : and extented memory address value with accumulator A : A=A&M
3574: *
3575: * HINZVC
3576: * ..**0.
3577: */
3578: static void hd6301_anda_ext(void)
3579: {
3580: Uint16 addr;
3581:
3582: addr = hd6301_get_memory_ext();
3583: hd6301_reg_A &= hd6301_read_memory(addr);
3584:
3585: HD6301_CLR_NZV;
3586: HD6301_SET_NZ8(hd6301_reg_A);
3587: }
3588:
3589: /**
3590: * BITA_EXT : bit test extented memory address value with accumulator A : A&M
3591: *
3592: * HINZVC
3593: * ..**0.
3594: */
3595: static void hd6301_bita_ext(void)
3596: {
3597: Uint8 value;
3598: Uint16 addr;
3599:
3600: addr = hd6301_get_memory_ext();
3601: value = hd6301_reg_A & hd6301_read_memory(addr);
3602:
3603: HD6301_CLR_NZV;
3604: HD6301_SET_NZ8(value);
3605: }
3606:
3607: /**
3608: * LDAA_EXT : load accumulator A with extented memory address value : A=M
3609: *
3610: * HINZVC
3611: * ..**0.
3612: */
3613: static void hd6301_ldaa_ext(void)
3614: {
3615: Uint16 addr;
3616:
3617: addr = hd6301_get_memory_ext();
3618: hd6301_reg_A = hd6301_read_memory(addr);
3619:
3620: HD6301_CLR_NZV;
3621: HD6301_SET_NZ8(hd6301_reg_A);
3622: }
3623:
3624: /**
3625: * STAA_EXT : store accumulator A into extented memory address value : M=A
3626: *
3627: * HINZVC
3628: * ..**0.
3629: */
3630: static void hd6301_staa_ext(void)
3631: {
3632: Uint16 addr;
3633:
3634: addr = hd6301_get_memory_ext();
3635: hd6301_write_memory(addr, hd6301_reg_A);
3636:
3637: HD6301_CLR_NZV;
3638: HD6301_SET_NZ8(hd6301_reg_A);
3639: }
3640:
3641: /**
3642: * EORA_EXT : exclusive or extented memory address value with accumulator A : A=A^M
3643: *
3644: * HINZVC
3645: * ..**0.
3646: */
3647: static void hd6301_eora_ext(void)
3648: {
3649: Uint16 addr;
3650:
3651: addr = hd6301_get_memory_ext();
3652: hd6301_reg_A ^= hd6301_read_memory(addr);
3653:
3654: HD6301_CLR_NZV;
3655: HD6301_SET_NZ8(hd6301_reg_A);
3656: }
3657:
3658: /**
3659: * ADCA_EXT : add with carry extented memory address value to accumulator A : A=A+M+C
3660: *
3661: * HINZVC
3662: * *.****
3663: */
3664: static void hd6301_adca_ext(void)
3665: {
3666: Uint8 value, carry;
3667: Uint16 addr, result;
3668:
3669: carry = hd6301_REG_CCR_C & 1;
3670: addr = hd6301_get_memory_ext();
3671: value = hd6301_read_memory(addr);
3672: result = hd6301_reg_A + value + carry;
3673:
3674: HD6301_CLR_HNZVC;
3675: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3676: HD6301_SET_H(hd6301_reg_A, value, result);
3677:
3678: hd6301_reg_A = result;
3679: }
3680:
3681: /**
3682: * ORAA_EXT : inclusive or accumulator A with extented memory address value : A=A|M
3683: *
3684: * HINZVC
3685: * ..**0.
3686: */
3687: static void hd6301_oraa_ext(void)
3688: {
3689: Uint16 addr;
3690:
3691: addr = hd6301_get_memory_ext();
3692: hd6301_reg_A |= hd6301_read_memory(addr);
3693:
3694: HD6301_CLR_NZV;
3695: HD6301_SET_NZ8(hd6301_reg_A);
3696: }
3697:
3698: /**
3699: * ADDA_EXT : add extented memory address value with accumulator A : A=A+M
3700: *
3701: * HINZVC
3702: * *.****
3703: */
3704: static void hd6301_adda_ext(void)
3705: {
3706: Uint8 value;
3707: Uint16 addr, result;
3708:
3709: addr = hd6301_get_memory_ext();
3710: value = hd6301_read_memory(addr);
3711: result = hd6301_reg_A + value;
3712:
3713: HD6301_CLR_HNZVC;
3714: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3715: HD6301_SET_H(hd6301_reg_A, value, result);
3716:
3717: hd6301_reg_A = result;
3718: }
3719:
3720: /**
3721: * CPX_EXT : compare index register with extented memory address value : X-MM
3722: *
3723: * HINZVC
3724: * ..****
3725: */
3726: static void hd6301_cpx_ext(void)
3727: {
3728: Uint16 addr, value;
3729: Uint32 result;
3730:
3731: addr = hd6301_get_memory_ext();
3732: value = hd6301_read_memory(addr) << 8;
3733: value += hd6301_read_memory(addr+1);
3734: result = hd6301_reg_X - value;
3735:
3736: HD6301_CLR_NZVC;
3737: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3738: }
3739:
3740: /**
3741: * JSR_EXT : jump to subroutine at extented address
3742: *
3743: * HINZVC
3744: * ......
3745: */
3746: static void hd6301_jsr_ext(void)
3747: {
3748: Uint16 addr;
3749:
3750: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3751: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3752:
3753: addr = hd6301_get_memory_ext();
3754: hd6301_reg_PC += addr + 2;
3755: }
3756:
3757: /**
3758: * LDS_EXT : load stack pointer with extented memory address value : SP=MM
3759: *
3760: * HINZVC
3761: * ..**0.
3762: */
3763: static void hd6301_lds_ext(void)
3764: {
3765: Uint16 addr;
3766:
3767: addr = hd6301_get_memory_ext();
3768: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3769: hd6301_reg_SP += hd6301_read_memory(addr+1);
3770:
3771: HD6301_CLR_NZV;
3772: HD6301_SET_NZ16(hd6301_reg_SP);
3773: }
3774:
3775: /**
3776: * STS_EXT : store stack pointer into extented memory address value : MM=SP
3777: *
3778: * HINZVC
3779: * ..**0.
3780: */
3781: static void hd6301_sts_ext(void)
3782: {
3783: Uint16 addr;
3784:
3785: addr = hd6301_get_memory_ext();
3786: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3787: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3788:
3789: HD6301_CLR_NZV;
3790: HD6301_SET_NZ16(hd6301_reg_SP);
3791: }
3792:
3793: /**
1.1.1.2 ! root 3794: * SUBB_IMM : subtract immediate value from accumulator B : B=B-M
1.1 root 3795: *
3796: * HINZVC
3797: * ..****
3798: */
3799: static void hd6301_subb_imm(void)
3800: {
3801: Uint8 value;
3802: Uint16 result;
3803:
3804: value = hd6301_read_memory(hd6301_reg_PC+1);
3805: result = hd6301_reg_B - value;
3806:
3807: HD6301_CLR_NZVC;
3808: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3809:
3810: hd6301_reg_B = result;
3811: }
3812:
3813: /**
3814: * CMPB_IMM : compare immediate value to accumulator B : B-M
3815: *
3816: * HINZVC
3817: * ..****
3818: */
3819: static void hd6301_cmpb_imm(void)
3820: {
3821: Uint8 value;
3822: Uint16 result;
3823:
3824: value = hd6301_read_memory(hd6301_reg_PC+1);
3825: result = hd6301_reg_B - value;
3826:
3827: HD6301_CLR_NZVC;
3828: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3829: }
3830:
3831: /**
1.1.1.2 ! root 3832: * SBCB_IMM : subtract with carry immediate value from accumulator B : B=B-M-C
1.1 root 3833: *
3834: * HINZVC
3835: * ..****
3836: */
3837: static void hd6301_sbcb_imm(void)
3838: {
3839: Uint8 value, carry;
3840: Uint16 result;
3841:
3842: carry = hd6301_REG_CCR_C & 1;
3843: value = hd6301_read_memory(hd6301_reg_PC+1);
3844: result = hd6301_reg_B - value - carry;
3845:
3846: HD6301_CLR_NZVC;
3847: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3848:
3849: hd6301_reg_B = result;
3850: }
3851:
3852: /**
3853: * ADDD_IMM : add immediate value from accumulator D : D=D+MM
3854: *
3855: * HINZVC
3856: * ..****
3857: */
3858: static void hd6301_addd_imm(void)
3859: {
3860: Uint16 value, regD;
3861: Uint32 result;
3862:
3863: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
3864: value += hd6301_read_memory(hd6301_reg_PC+2);
3865: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3866: result = regD + value;
3867:
3868: hd6301_reg_A = (result >> 8) & 0xff;
3869: hd6301_reg_B = result & 0xff;
3870:
3871: HD6301_CLR_NZVC;
3872: HD6301_SET_FLAGS16(regD, value, result);
3873: }
3874:
3875: /**
3876: * ANDB_IMM : and immediate value with accumulator B : B=B&M
3877: *
3878: * HINZVC
3879: * ..**0.
3880: */
3881: static void hd6301_andb_imm(void)
3882: {
3883: hd6301_reg_B &= hd6301_read_memory(hd6301_reg_PC+1);
3884:
3885: HD6301_CLR_NZV;
3886: HD6301_SET_NZ8(hd6301_reg_B);
3887: }
3888:
3889: /**
3890: * BITB_IMM : bit test immediate value with accumulator B : B&M
3891: *
3892: * HINZVC
3893: * ..**0.
3894: */
3895: static void hd6301_bitb_imm(void)
3896: {
3897: Uint8 value;
3898:
3899: value = hd6301_reg_B & hd6301_read_memory(hd6301_reg_PC+1);
3900:
3901: HD6301_CLR_NZV;
3902: HD6301_SET_NZ8(value);
3903: }
3904:
3905: /**
3906: * LDAB_IMM : load accumulator B with immediate value : B=M
3907: *
3908: * HINZVC
3909: * ..**0.
3910: */
3911: static void hd6301_ldab_imm(void)
3912: {
3913: hd6301_reg_B = hd6301_read_memory(hd6301_reg_PC+1);
3914:
3915: HD6301_CLR_NZV;
3916: HD6301_SET_NZ8(hd6301_reg_B);
3917: }
3918:
3919: /**
3920: * EORB_IMM : exclusive or immediate value with accumulator B : B=B^M
3921: *
3922: * HINZVC
3923: * ..**0.
3924: */
3925: static void hd6301_eorb_imm(void)
3926: {
3927: hd6301_reg_B ^= hd6301_read_memory(hd6301_reg_PC+1);
3928:
3929: HD6301_CLR_NZV;
3930: HD6301_SET_NZ8(hd6301_reg_B);
3931: }
3932:
3933: /**
3934: * ADCB_IMM : add with carry immediate value to accumulator B : B=B+M+C
3935: *
3936: * HINZVC
3937: * *.****
3938: */
3939: static void hd6301_adcb_imm(void)
3940: {
3941: Uint8 value, carry;
3942: Uint16 result;
3943:
3944: carry = hd6301_REG_CCR_C & 1;
3945: value = hd6301_read_memory(hd6301_reg_PC+1);
3946: result = hd6301_reg_B + value + carry;
3947:
3948: HD6301_CLR_HNZVC;
3949: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3950: HD6301_SET_H(hd6301_reg_B, value, result);
3951:
3952: hd6301_reg_B = result;
3953: }
3954:
3955: /**
3956: * ORAB_IMM : inclusive or accumulator B with immediate value : B=B|M
3957: *
3958: * HINZVC
3959: * ..**0.
3960: */
3961: static void hd6301_orab_imm(void)
3962: {
3963: hd6301_reg_B |= hd6301_read_memory(hd6301_reg_PC+1);
3964:
3965: HD6301_CLR_NZV;
3966: HD6301_SET_NZ8(hd6301_reg_B);
3967: }
3968:
3969: /**
3970: * ADDB_IMM : add immediate value with accumulator B : B=B+M
3971: *
3972: * HINZVC
3973: * ..****
3974: */
3975: static void hd6301_addb_imm(void)
3976: {
3977: Uint8 value;
3978: Uint16 result;
3979:
3980: value = hd6301_read_memory(hd6301_reg_PC+1);
3981: result = hd6301_reg_B + value;
3982:
3983: HD6301_CLR_HNZVC;
3984: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3985: HD6301_SET_H(hd6301_reg_B, value, result);
3986:
3987: hd6301_reg_B = result;
3988: }
3989:
3990: /**
3991: * LDD_IMM : load accumulator D with immediate value : D=MM
3992: *
3993: * HINZVC
3994: * ..**0.
3995: */
3996: static void hd6301_ldd_imm(void)
3997: {
3998: hd6301_reg_A = hd6301_read_memory(hd6301_reg_PC+1);
3999: hd6301_reg_B = hd6301_read_memory(hd6301_reg_PC+2);
4000:
4001: HD6301_CLR_NZV;
4002: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4003: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4004: }
4005:
4006: /**
4007: * LDX_IMM : load register X with immediate value : X=MM
4008: *
4009: * HINZVC
4010: * ..**0.
4011: */
4012: static void hd6301_ldx_imm(void)
4013: {
4014: Uint16 value;
4015:
4016: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
4017: value += hd6301_read_memory(hd6301_reg_PC+2);
4018: hd6301_reg_X = value;
4019:
4020: HD6301_CLR_NZV;
4021: HD6301_SET_NZ16(hd6301_reg_X);
4022: }
4023:
4024: /**
1.1.1.2 ! root 4025: * SUBB_DIR : subtract direct memory address value from accumulator B : B=B-M
1.1 root 4026: *
4027: * HINZVC
4028: * ..****
4029: */
4030: static void hd6301_subb_dir(void)
4031: {
4032: Uint8 value;
4033: Uint16 result, addr;
4034:
4035: addr = hd6301_read_memory(hd6301_reg_PC+1);
4036: value = hd6301_read_memory(addr);
4037: result = hd6301_reg_B - value;
4038:
4039: HD6301_CLR_NZVC;
4040: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4041:
4042: hd6301_reg_B = result;
4043: }
4044:
4045: /**
4046: * CMPB_DIR : compare direct memory address value to accumulator B : B-M
4047: *
4048: * HINZVC
4049: * ..****
4050: */
4051: static void hd6301_cmpb_dir(void)
4052: {
4053: Uint8 value;
4054: Uint16 addr, result;
4055:
4056: addr = hd6301_read_memory(hd6301_reg_PC+1);
4057: value = hd6301_read_memory(addr);
4058: result = hd6301_reg_B - value;
4059:
4060: HD6301_CLR_NZVC;
4061: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4062: }
4063:
4064: /**
1.1.1.2 ! root 4065: * SBCB_DIR : subtract with carry direct memory address value from accumulator B : B=B-M-C
1.1 root 4066: *
4067: * HINZVC
4068: * ..****
4069: */
4070: static void hd6301_sbcb_dir(void)
4071: {
4072: Uint8 value, carry;
4073: Uint16 addr, result;
4074:
4075: carry = hd6301_REG_CCR_C & 1;
4076: addr = hd6301_read_memory(hd6301_reg_PC+1);
4077: value = hd6301_read_memory(addr);
4078: result = hd6301_reg_B - value - carry;
4079:
4080: HD6301_CLR_NZVC;
4081: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4082:
4083: hd6301_reg_B = result;
4084: }
4085:
4086: /**
4087: * ADDD_DIR : add direct memory address value from accumulator D : D=D+MM
4088: *
4089: * HINZVC
4090: * ..****
4091: */
4092: static void hd6301_addd_dir(void)
4093: {
4094: Uint16 addr, value, regD;
4095: Uint32 result;
4096:
4097: addr = hd6301_read_memory(hd6301_reg_PC+1);
4098: value = hd6301_read_memory(addr) << 8;
4099: value += hd6301_read_memory(addr+1);
4100: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4101: result = regD + value;
4102:
4103: hd6301_reg_A = (result >> 8) & 0xff;
4104: hd6301_reg_B = result & 0xff;
4105:
4106: HD6301_CLR_NZVC;
4107: HD6301_SET_FLAGS16(regD, value, result);
4108: }
4109:
4110: /**
4111: * ANDB_DIR : and direct memory address value with accumulator B : B=B&M
4112: *
4113: * HINZVC
4114: * ..**0.
4115: */
4116: static void hd6301_andb_dir(void)
4117: {
4118: Uint16 addr;
4119:
4120: addr = hd6301_read_memory(hd6301_reg_PC+1);
4121: hd6301_reg_B &= hd6301_read_memory(addr);
4122:
4123: HD6301_CLR_NZV;
4124: HD6301_SET_NZ8(hd6301_reg_B);
4125: }
4126:
4127: /**
4128: * BITB_DIR : bit test direct memory address value with accumulator B : B&M
4129: *
4130: * HINZVC
4131: * ..**0.
4132: */
4133: static void hd6301_bitb_dir(void)
4134: {
4135: Uint8 value;
4136: Uint16 addr;
4137:
4138: addr = hd6301_read_memory(hd6301_reg_PC+1);
4139: value = hd6301_reg_B & hd6301_read_memory(addr);
4140:
4141: HD6301_CLR_NZV;
4142: HD6301_SET_NZ8(value);
4143: }
4144:
4145: /**
4146: * LDAB_DIR : load accumulator B with direct memory address value : B=M
4147: *
4148: * HINZVC
4149: * ..**0.
4150: */
4151: static void hd6301_ldab_dir(void)
4152: {
4153: Uint16 addr;
4154:
4155: addr = hd6301_read_memory(hd6301_reg_PC+1);
4156: hd6301_reg_B = hd6301_read_memory(addr);
4157:
4158: HD6301_CLR_NZV;
4159: HD6301_SET_NZ8(hd6301_reg_B);
4160: }
4161:
4162: /**
4163: * STAB_DIR : store accumulator B into direct memory address value : M=B
4164: *
4165: * HINZVC
4166: * ..**0.
4167: */
4168: static void hd6301_stab_dir(void)
4169: {
4170: Uint16 addr;
4171:
4172: addr = hd6301_read_memory(hd6301_reg_PC+1);
4173: hd6301_write_memory(addr, hd6301_reg_B);
4174:
4175: HD6301_CLR_NZV;
4176: HD6301_SET_NZ8(hd6301_reg_B);
4177: }
4178:
4179: /**
4180: * EORB_DIR : exclusive or direct memory address value with accumulator B : B=B^M
4181: *
4182: * HINZVC
4183: * ..**0.
4184: */
4185: static void hd6301_eorb_dir(void)
4186: {
4187: Uint16 addr;
4188:
4189: addr = hd6301_read_memory(hd6301_reg_PC+1);
4190: hd6301_reg_B ^= hd6301_read_memory(addr);
4191:
4192: HD6301_CLR_NZV;
4193: HD6301_SET_NZ8(hd6301_reg_B);
4194: }
4195:
4196: /**
4197: * ADCB_DIR : add with carry direct memory address value to accumulator B : B=B+M+C
4198: *
4199: * HINZVC
4200: * *.****
4201: */
4202: static void hd6301_adcb_dir(void)
4203: {
4204: Uint8 value, carry;
4205: Uint16 addr, result;
4206:
4207: carry = hd6301_REG_CCR_C & 1;
4208: addr = hd6301_read_memory(hd6301_reg_PC+1);
4209: value = hd6301_read_memory(addr);
4210: result = hd6301_reg_B + value + carry;
4211:
4212: HD6301_CLR_HNZVC;
4213: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4214: HD6301_SET_H(hd6301_reg_B, value, result);
4215:
4216: hd6301_reg_B = result;
4217: }
4218:
4219: /**
4220: * ORAB_DIR : inclusive or accumulator B with direct memory address value : B=B|M
4221: *
4222: * HINZVC
4223: * ..**0.
4224: */
4225: static void hd6301_orab_dir(void)
4226: {
4227: Uint16 addr;
4228:
4229: addr = hd6301_read_memory(hd6301_reg_PC+1);
4230: hd6301_reg_B |= hd6301_read_memory(addr);
4231:
4232: HD6301_CLR_NZV;
4233: HD6301_SET_NZ8(hd6301_reg_B);
4234: }
4235:
4236: /**
4237: * ADDB_DIR : add direct memory address value with accumulator B : B=B+M
4238: *
4239: * HINZVC
4240: * *.****
4241: */
4242: static void hd6301_addb_dir(void)
4243: {
4244: Uint8 value;
4245: Uint16 addr, result;
4246:
4247: addr = hd6301_read_memory(hd6301_reg_PC+1);
4248: value = hd6301_read_memory(addr);
4249: result = hd6301_reg_B + value;
4250:
4251: HD6301_CLR_HNZVC;
4252: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4253: HD6301_SET_H(hd6301_reg_B, value, result);
4254:
4255: hd6301_reg_B = result;
4256: }
4257:
4258: /**
4259: * LDD_DIR : load accumulator D with direct memory address value : D=MM
4260: *
4261: * HINZVC
4262: * ..**0.
4263: */
4264: static void hd6301_ldd_dir(void)
4265: {
4266: Uint16 addr;
4267:
4268: addr = hd6301_read_memory(hd6301_reg_PC+1);
4269:
4270: hd6301_reg_A = hd6301_read_memory(addr);
4271: hd6301_reg_B = hd6301_read_memory(addr+1);
4272:
4273: HD6301_CLR_NZV;
4274: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4275: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4276: }
4277:
4278: /**
4279: * STD_DIR : store accumulator D into direct memory address value : MM=D
4280: *
4281: * HINZVC
4282: * ..**0.
4283: */
4284: static void hd6301_std_dir(void)
4285: {
4286: Uint16 addr;
4287:
4288: addr = hd6301_read_memory(hd6301_reg_PC+1);
4289:
4290: hd6301_write_memory(addr, hd6301_reg_A);
4291: hd6301_write_memory(addr+1, hd6301_reg_B);
4292:
4293: HD6301_CLR_NZV;
4294: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4295: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4296: }
4297:
4298: /**
4299: * LDX_DIR : load register X with direct memory address value : X=MM
4300: *
4301: * HINZVC
4302: * ..**0.
4303: */
4304: static void hd6301_ldx_dir(void)
4305: {
4306: Uint16 addr;
4307:
4308: addr = hd6301_read_memory(hd6301_reg_PC+1);
4309:
4310: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4311: hd6301_reg_X += hd6301_read_memory(addr+1);
4312:
4313: HD6301_CLR_NZV;
4314: HD6301_SET_NZ16(hd6301_reg_X);
4315: }
4316:
4317: /**
4318: * STX_DIR : store register X into direct memory address value : MM=X
4319: *
4320: * HINZVC
4321: * ..**0.
4322: */
4323: static void hd6301_stx_dir(void)
4324: {
4325: Uint16 addr;
4326:
4327: addr = hd6301_read_memory(hd6301_reg_PC+1);
4328:
4329: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4330: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4331:
4332: HD6301_CLR_NZV;
4333: HD6301_SET_NZ16(hd6301_reg_X);
4334: }
4335:
4336: /**
1.1.1.2 ! root 4337: * SUBB_IND : subtract indexed memory address value from accumulator B : B=B-M
1.1 root 4338: *
4339: * HINZVC
4340: * ..****
4341: */
4342: static void hd6301_subb_ind(void)
4343: {
4344: Uint8 value;
4345: Uint16 result, addr;
4346:
4347: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4348: value = hd6301_read_memory(addr);
4349: result = hd6301_reg_B - value;
4350:
4351: HD6301_CLR_NZVC;
4352: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4353:
4354: hd6301_reg_B = result;
4355: }
4356:
4357: /**
4358: * CMPB_IND : compare indexed memory address value to accumulator B : B-M
4359: *
4360: * HINZVC
4361: * ..****
4362: */
4363: static void hd6301_cmpb_ind(void)
4364: {
4365: Uint8 value;
4366: Uint16 addr, result;
4367:
4368: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4369: value = hd6301_read_memory(addr);
4370: result = hd6301_reg_B - value;
4371:
4372: HD6301_CLR_NZVC;
4373: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4374: }
4375:
4376: /**
1.1.1.2 ! root 4377: * SBCB_IND : subtract with carry indexed memory address value from accumulator B : B=B-M-C
1.1 root 4378: *
4379: * HINZVC
4380: * ..****
4381: */
4382: static void hd6301_sbcb_ind(void)
4383: {
4384: Uint8 value, carry;
4385: Uint16 addr, result;
4386:
4387: carry = hd6301_REG_CCR_C & 1;
4388: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4389: value = hd6301_read_memory(addr);
4390: result = hd6301_reg_B - value - carry;
4391:
4392: HD6301_CLR_NZVC;
4393: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4394:
4395: hd6301_reg_B = result;
4396: }
4397:
4398: /**
4399: * ADDD_IND : add indexed memory address value from accumulator D : D=D+MM
4400: *
4401: * HINZVC
4402: * ..****
4403: */
4404: static void hd6301_addd_ind(void)
4405: {
4406: Uint16 addr, value, regD;
4407: Uint32 result;
4408:
4409: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4410: value = hd6301_read_memory(addr) << 8;
4411: value += hd6301_read_memory(addr+1);
4412: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4413: result = regD + value;
4414:
4415: hd6301_reg_A = (result >> 8) & 0xff;
4416: hd6301_reg_B = result & 0xff;
4417:
4418: HD6301_CLR_NZVC;
4419: HD6301_SET_FLAGS16(regD, value, result);
4420: }
4421:
4422: /**
4423: * ANDB_IND : and indexed memory address value with accumulator B : B=B&M
4424: *
4425: * HINZVC
4426: * ..**0.
4427: */
4428: static void hd6301_andb_ind(void)
4429: {
4430: Uint16 addr;
4431:
4432: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4433: hd6301_reg_B &= hd6301_read_memory(addr);
4434:
4435: HD6301_CLR_NZV;
4436: HD6301_SET_NZ8(hd6301_reg_B);
4437: }
4438:
4439: /**
4440: * BITB_IND : bit test indexed memory address value with accumulator B : B&M
4441: *
4442: * HINZVC
4443: * ..**0.
4444: */
4445: static void hd6301_bitb_ind(void)
4446: {
4447: Uint8 value;
4448: Uint16 addr;
4449:
4450: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4451: value = hd6301_reg_B & hd6301_read_memory(addr);
4452:
4453: HD6301_CLR_NZV;
4454: HD6301_SET_NZ8(value);
4455: }
4456:
4457: /**
4458: * LDAB_IND : load accumulator B with indexed memory address value : B=M
4459: *
4460: * HINZVC
4461: * ..**0.
4462: */
4463: static void hd6301_ldab_ind(void)
4464: {
4465: Uint16 addr;
4466:
4467: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4468: hd6301_reg_B = hd6301_read_memory(addr);
4469:
4470: HD6301_CLR_NZV;
4471: HD6301_SET_NZ8(hd6301_reg_B);
4472: }
4473:
4474: /**
4475: * STAB_IND : store accumulator B into indexed memory address value : M=B
4476: *
4477: * HINZVC
4478: * ..**0.
4479: */
4480: static void hd6301_stab_ind(void)
4481: {
4482: Uint16 addr;
4483:
4484: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4485: hd6301_write_memory(addr, hd6301_reg_B);
4486:
4487: HD6301_CLR_NZV;
4488: HD6301_SET_NZ8(hd6301_reg_B);
4489: }
4490:
4491: /**
4492: * EORB_IND : exclusive or indexed memory address value with accumulator B : B=B^M
4493: *
4494: * HINZVC
4495: * ..**0.
4496: */
4497: static void hd6301_eorb_ind(void)
4498: {
4499: Uint16 addr;
4500:
4501: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4502: hd6301_reg_B ^= hd6301_read_memory(addr);
4503:
4504: HD6301_CLR_NZV;
4505: HD6301_SET_NZ8(hd6301_reg_B);
4506: }
4507:
4508: /**
4509: * ADCB_IND : add with carry indexed memory address value to accumulator B : B=B+M+C
4510: *
4511: * HINZVC
4512: * *.****
4513: */
4514: static void hd6301_adcb_ind(void)
4515: {
4516: Uint8 value, carry;
4517: Uint16 addr, result;
4518:
4519: carry = hd6301_REG_CCR_C & 1;
4520: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4521: value = hd6301_read_memory(addr);
4522: result = hd6301_reg_B + value + carry;
4523:
4524: HD6301_CLR_HNZVC;
4525: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4526: HD6301_SET_H(hd6301_reg_B, value, result);
4527:
4528: hd6301_reg_B = result;
4529: }
4530:
4531: /**
4532: * ORAB_IND : inclusive or accumulator B with indexed memory address value : B=B|M
4533: *
4534: * HINZVC
4535: * ..**0.
4536: */
4537: static void hd6301_orab_ind(void)
4538: {
4539: Uint16 addr;
4540:
4541: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4542: hd6301_reg_B |= hd6301_read_memory(addr);
4543:
4544: HD6301_CLR_NZV;
4545: HD6301_SET_NZ8(hd6301_reg_B);
4546: }
4547:
4548: /**
4549: * ADDB_IND : add indexed memory address value with accumulator B : B=B+M
4550: *
4551: * HINZVC
4552: * *.****
4553: */
4554: static void hd6301_addb_ind(void)
4555: {
4556: Uint8 value;
4557: Uint16 addr, result;
4558:
4559: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4560: value = hd6301_read_memory(addr);
4561: result = hd6301_reg_B + value;
4562:
4563: HD6301_CLR_HNZVC;
4564: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4565: HD6301_SET_H(hd6301_reg_B, value, result);
4566:
4567: hd6301_reg_B = result;
4568: }
4569:
4570: /**
4571: * LDD_IND : load accumulator D with indexed memory address value : D=MM
4572: *
4573: * HINZVC
4574: * ..**0.
4575: */
4576: static void hd6301_ldd_ind(void)
4577: {
4578: Uint16 addr;
4579:
4580: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4581:
4582: hd6301_reg_A = hd6301_read_memory(addr);
4583: hd6301_reg_B = hd6301_read_memory(addr+1);
4584:
4585: HD6301_CLR_NZV;
4586: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4587: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4588: }
4589:
4590: /**
4591: * STD_IND : store accumulator D into indexed memory address value : MM=D
4592: *
4593: * HINZVC
4594: * ..**0.
4595: */
4596: static void hd6301_std_ind(void)
4597: {
4598: Uint16 addr;
4599:
4600: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4601:
4602: hd6301_write_memory(addr, hd6301_reg_A);
4603: hd6301_write_memory(addr+1, hd6301_reg_B);
4604:
4605: HD6301_CLR_NZV;
4606: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4607: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4608: }
4609:
4610: /**
4611: * LDX_IND : load register X with indexed memory address value : X=MM
4612: *
4613: * HINZVC
4614: * ..**0.
4615: */
4616: static void hd6301_ldx_ind(void)
4617: {
4618: Uint16 addr;
4619:
4620: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4621:
4622: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4623: hd6301_reg_X += hd6301_read_memory(addr+1);
4624:
4625: HD6301_CLR_NZV;
4626: HD6301_SET_NZ16(hd6301_reg_X);
4627: }
4628:
4629: /**
4630: * STX_IND : store register X into indexed memory address value : MM=X
4631: *
4632: * HINZVC
4633: * ..**0.
4634: */
4635: static void hd6301_stx_ind(void)
4636: {
4637: Uint16 addr;
4638:
4639: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4640:
4641: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4642: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4643:
4644: HD6301_CLR_NZV;
4645: HD6301_SET_NZ16(hd6301_reg_X);
4646: }
4647:
4648: /**
1.1.1.2 ! root 4649: * SUBB_EXT : subtract extended memory address value from accumulator B : B=B-M
1.1 root 4650: *
4651: * HINZVC
4652: * ..****
4653: */
4654: static void hd6301_subb_ext(void)
4655: {
4656: Uint8 value;
4657: Uint16 result, addr;
4658:
4659: addr = hd6301_get_memory_ext();
4660: value = hd6301_read_memory(addr);
4661: result = hd6301_reg_B - value;
4662:
4663: HD6301_CLR_NZVC;
4664: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4665:
4666: hd6301_reg_B = result;
4667: }
4668:
4669: /**
4670: * CMPB_EXT : compare extended memory address value to accumulator B : B-M
4671: *
4672: * HINZVC
4673: * ..****
4674: */
4675: static void hd6301_cmpb_ext(void)
4676: {
4677: Uint8 value;
4678: Uint16 addr, result;
4679:
4680: addr = hd6301_get_memory_ext();
4681: value = hd6301_read_memory(addr);
4682: result = hd6301_reg_B - value;
4683:
4684: HD6301_CLR_NZVC;
4685: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4686: }
4687:
4688: /**
1.1.1.2 ! root 4689: * SBCB_EXT : subtract with carry extended memory address value from accumulator B : B=B-M-C
1.1 root 4690: *
4691: * HINZVC
4692: * ..****
4693: */
4694: static void hd6301_sbcb_ext(void)
4695: {
4696: Uint8 value, carry;
4697: Uint16 addr, result;
4698:
4699: carry = hd6301_REG_CCR_C & 1;
4700: addr = hd6301_get_memory_ext();
4701: value = hd6301_read_memory(addr);
4702: result = hd6301_reg_B - value - carry;
4703:
4704: HD6301_CLR_NZVC;
4705: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4706:
4707: hd6301_reg_B = result;
4708: }
4709:
4710: /**
4711: * ADDD_EXT : add extended memory address value from accumulator D : D=D+MM
4712: *
4713: * HINZVC
4714: * ..****
4715: */
4716: static void hd6301_addd_ext(void)
4717: {
4718: Uint16 addr, value, regD;
4719: Uint32 result;
4720:
4721: addr = hd6301_get_memory_ext();
4722: value = hd6301_read_memory(addr) << 8;
4723: value += hd6301_read_memory(addr+1);
4724: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4725: result = regD + value;
4726:
4727: hd6301_reg_A = (result >> 8) & 0xff;
4728: hd6301_reg_B = result & 0xff;
4729:
4730: HD6301_CLR_NZVC;
4731: HD6301_SET_FLAGS16(regD, value, result);
4732: }
4733:
4734: /**
4735: * ANDB_EXT : and extended memory address value with accumulator B : B=B&M
4736: *
4737: * HINZVC
4738: * ..**0.
4739: */
4740: static void hd6301_andb_ext(void)
4741: {
4742: Uint16 addr;
4743:
4744: addr = hd6301_get_memory_ext();
4745: hd6301_reg_B &= hd6301_read_memory(addr);
4746:
4747: HD6301_CLR_NZV;
4748: HD6301_SET_NZ8(hd6301_reg_B);
4749: }
4750:
4751: /**
4752: * BITB_EXT : bit test extended memory address value with accumulator B : B&M
4753: *
4754: * HINZVC
4755: * ..**0.
4756: */
4757: static void hd6301_bitb_ext(void)
4758: {
4759: Uint8 value;
4760: Uint16 addr;
4761:
4762: addr = hd6301_get_memory_ext();
4763: value = hd6301_reg_B & hd6301_read_memory(addr);
4764:
4765: HD6301_CLR_NZV;
4766: HD6301_SET_NZ8(value);
4767: }
4768:
4769: /**
4770: * LDAB_EXT : load accumulator B with extended memory address value : B=M
4771: *
4772: * HINZVC
4773: * ..**0.
4774: */
4775: static void hd6301_ldab_ext(void)
4776: {
4777: Uint16 addr;
4778:
4779: addr = hd6301_get_memory_ext();
4780: hd6301_reg_B = hd6301_read_memory(addr);
4781:
4782: HD6301_CLR_NZV;
4783: HD6301_SET_NZ8(hd6301_reg_B);
4784: }
4785:
4786: /**
4787: * STAB_EXT : store accumulator B into extended memory address value : M=B
4788: *
4789: * HINZVC
4790: * ..**0.
4791: */
4792: static void hd6301_stab_ext(void)
4793: {
4794: Uint16 addr;
4795:
4796: addr = hd6301_get_memory_ext();
4797: hd6301_write_memory(addr, hd6301_reg_B);
4798:
4799: HD6301_CLR_NZV;
4800: HD6301_SET_NZ8(hd6301_reg_B);
4801: }
4802:
4803: /**
4804: * EORB_EXT : exclusive or extended memory address value with accumulator B : B=B^M
4805: *
4806: * HINZVC
4807: * ..**0.
4808: */
4809: static void hd6301_eorb_ext(void)
4810: {
4811: Uint16 addr;
4812:
4813: addr = hd6301_get_memory_ext();
4814: hd6301_reg_B ^= hd6301_read_memory(addr);
4815:
4816: HD6301_CLR_NZV;
4817: HD6301_SET_NZ8(hd6301_reg_B);
4818: }
4819:
4820: /**
4821: * ADCB_EXT : add with carry extended memory address value to accumulator B : B=B+M+C
4822: *
4823: * HINZVC
4824: * *.****
4825: */
4826: static void hd6301_adcb_ext(void)
4827: {
4828: Uint8 value, carry;
4829: Uint16 addr, result;
4830:
4831: carry = hd6301_REG_CCR_C & 1;
4832: addr = hd6301_get_memory_ext();
4833: value = hd6301_read_memory(addr);
4834: result = hd6301_reg_B + value + carry;
4835:
4836: HD6301_CLR_HNZVC;
4837: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4838: HD6301_SET_H(hd6301_reg_B, value, result);
4839:
4840: hd6301_reg_B = result;
4841: }
4842:
4843: /**
4844: * ORAB_EXT : inclusive or accumulator B with extended memory address value : B=B|M
4845: *
4846: * HINZVC
4847: * ..**0.
4848: */
4849: static void hd6301_orab_ext(void)
4850: {
4851: Uint16 addr;
4852:
4853: addr = hd6301_get_memory_ext();
4854: hd6301_reg_B |= hd6301_read_memory(addr);
4855:
4856: HD6301_CLR_NZV;
4857: HD6301_SET_NZ8(hd6301_reg_B);
4858: }
4859:
4860: /**
4861: * ADDB_EXT : add extended memory address value with accumulator B : B=B+M
4862: *
4863: * HINZVC
4864: * *.****
4865: */
4866: static void hd6301_addb_ext(void)
4867: {
4868: Uint8 value;
4869: Uint16 addr, result;
4870:
4871: addr = hd6301_get_memory_ext();
4872: value = hd6301_read_memory(addr);
4873: result = hd6301_reg_B + value;
4874:
4875: HD6301_CLR_HNZVC;
4876: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4877: HD6301_SET_H(hd6301_reg_B, value, result);
4878:
4879: hd6301_reg_B = result;
4880: }
4881:
4882: /**
4883: * LDD_EXT : load accumulator D with extended memory address value : D=MM
4884: *
4885: * HINZVC
4886: * ..**0.
4887: */
4888: static void hd6301_ldd_ext(void)
4889: {
4890: Uint16 addr;
4891:
4892: addr = hd6301_get_memory_ext();
4893:
4894: hd6301_reg_A = hd6301_read_memory(addr);
4895: hd6301_reg_B = hd6301_read_memory(addr+1);
4896:
4897: HD6301_CLR_NZV;
4898: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4899: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4900: }
4901:
4902: /**
4903: * STD_EXT : store accumulator D into extended memory address value : MM=D
4904: *
4905: * HINZVC
4906: * ..**0.
4907: */
4908: static void hd6301_std_ext(void)
4909: {
4910: Uint16 addr;
4911:
4912: addr = hd6301_get_memory_ext();
4913:
4914: hd6301_write_memory(addr, hd6301_reg_A);
4915: hd6301_write_memory(addr+1, hd6301_reg_B);
4916:
4917: HD6301_CLR_NZV;
4918: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4919: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4920: }
4921:
4922: /**
4923: * LDX_EXT : load register X with extended memory address value : X=MM
4924: *
4925: * HINZVC
4926: * ..**0.
4927: */
4928: static void hd6301_ldx_ext(void)
4929: {
4930: Uint16 addr;
4931:
4932: addr = hd6301_get_memory_ext();
4933:
4934: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4935: hd6301_reg_X += hd6301_read_memory(addr+1);
4936:
4937: HD6301_CLR_NZV;
4938: HD6301_SET_NZ16(hd6301_reg_X);
4939: }
4940:
4941: /**
4942: * STX_EXT : store register X into extended memory address value : MM=X
4943: *
4944: * HINZVC
4945: * ..**0.
4946: */
4947: static void hd6301_stx_ext(void)
4948: {
4949: Uint16 addr;
4950:
4951: addr = hd6301_get_memory_ext();
4952:
4953: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4954: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4955:
4956: HD6301_CLR_NZV;
4957: HD6301_SET_NZ16(hd6301_reg_X);
4958: }
4959:
4960:
4961:
4962: /**
4963: * hd6301_disasm : disasm hd6301 memory
4964: */
4965: void hd6301_disasm(void)
4966: {
4967: switch(hd6301_opcode.op_disasm) {
4968: case HD6301_DISASM_UNDEFINED:
4969: sprintf(hd6301_str_instr, "0x%02x : unknown instruction", hd6301_cur_inst);
4970: break;
4971: case HD6301_DISASM_NONE:
4972: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, 0);
4973: break;
4974: case HD6301_DISASM_MEMORY8:
4975: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, hd6301_read_memory(hd6301_reg_PC+1));
4976: break;
4977: case HD6301_DISASM_MEMORY16:
4978: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, hd6301_get_memory_ext());
4979: break;
4980: case HD6301_DISASM_XIM:
4981: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic,
4982: hd6301_read_memory(hd6301_reg_PC+1),
4983: hd6301_read_memory(hd6301_reg_PC+2));
4984: break;
4985: }
4986:
4987: fprintf(stderr, "%02x: %s\n", hd6301_reg_PC, hd6301_str_instr);
4988:
4989: }
4990:
4991: /**
4992: * hd6301_display_registers : display hd6301 registers state
4993: */
4994: void hd6301_display_registers(void)
4995: {
4996: fprintf(stderr, "A: %02x B: %02x\n", hd6301_reg_A, hd6301_reg_B);
4997: fprintf(stderr, "X: %04x CCR: %02x\n", hd6301_reg_X, hd6301_reg_CCR);
4998: fprintf(stderr, "SP: %04x PC: %04x\n", hd6301_reg_SP, hd6301_reg_PC);
4999: }
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