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1.1 root 1: /*
2: Hatari - hd6301_cpu.c
3: Copyright Laurent Sallafranque 2009
4:
1.1.1.2 root 5: This file is distributed under the GNU General Public License, version 2
6: or at your option any later version. Read the file gpl.txt for details.
1.1 root 7:
8: hd6301_cpu.c - this is the cpu core emulation for hd 6301 processor
9: */
10:
11: #ifdef HAVE_CONFIG_H
12: #include "config.h"
13: #endif
14:
15: #include <string.h>
1.1.1.3 ! root 16: #include <stdio.h>
! 17: #include <stdlib.h>
1.1 root 18: #include <SDL.h>
19:
20: #include "hd6301_cpu.h"
21:
22:
23: /**********************************
24: * Defines
25: **********************************/
26: #define HD6301_DISASM 1
27: #define HD6301_DISPLAY_REGS 1
28:
29: /* HD6301 Disasm and debug code */
30: #define HD6301_DISASM_UNDEFINED 0
31: #define HD6301_DISASM_NONE 1
32: #define HD6301_DISASM_MEMORY8 2
33: #define HD6301_DISASM_MEMORY16 3
34: #define HD6301_DISASM_XIM 4
35:
36: /* CCR bits for clearing */
37:
38: #define HD6301_CLR_HNZVC hd6301_reg_CCR &= 0xd0
39: #define HD6301_CLR_HNZC hd6301_reg_CCR &= 0xd2
40: #define HD6301_CLR_NZVC hd6301_reg_CCR &= 0xf0
41: #define HD6301_CLR_NZV hd6301_reg_CCR &= 0xf1
42: #define HD6301_CLR_NZC hd6301_reg_CCR &= 0xf2
43: #define HD6301_CLR_ZC hd6301_reg_CCR &= 0xfa
44: #define HD6301_CLR_I hd6301_reg_CCR &= 0xef
45: #define HD6301_CLR_Z hd6301_reg_CCR &= 0xfb
46: #define HD6301_CLR_V hd6301_reg_CCR &= 0xfd
47: #define HD6301_CLR_C hd6301_reg_CCR &= 0xfe
48:
49:
50: /**********************************
51: * macros for CCR processing
52: * adapted from mame project
53: **********************************/
54: #define HD6301_SET_Z8(a) hd6301_reg_CCR |= (((Uint8)(a) == 0) << 1)
55: #define HD6301_SET_Z16(a) hd6301_reg_CCR |= (((Uint16)(a) == 0) << 1)
56: #define HD6301_SET_N8(a) hd6301_reg_CCR |= (((a) & 0x80) >> 4)
57: #define HD6301_SET_N16(a) hd6301_reg_CCR |= (((a) & 0x8000) >> 12)
58: #define HD6301_SET_C8(a) hd6301_reg_CCR |= (((a) & 0x100) >> 8)
59: #define HD6301_SET_C16(a) hd6301_reg_CCR |= (((a) & 0x10000) >> 16)
60: #define HD6301_SET_V8(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)^((r)>>1)) & 0x80) >> 6)
61: #define HD6301_SET_V16(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)^((r)>>1)) & 0x8000) >> 14)
62: #define HD6301_SET_H(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)) & 0x10) << 1)
63:
64:
65: #define HD6301_SET_NZ8(a) {HD6301_SET_N8(a);HD6301_SET_Z8(a);}
66: #define HD6301_SET_NZ16(a) {HD6301_SET_N16(a);HD6301_SET_Z16(a);}
67: #define HD6301_SET_FLAGS8(a,b,r) {HD6301_SET_N8(r);HD6301_SET_Z8(r);HD6301_SET_V8(a,b,r);HD6301_SET_C8(r);}
68: #define HD6301_SET_FLAGS16(a,b,r) {HD6301_SET_N16(r);HD6301_SET_Z16(r);HD6301_SET_V16(a,b,r);HD6301_SET_C16(r);}
69:
70:
71: /**********************************
72: * Functions
73: **********************************/
74:
75: /* HD6301 internal functions */
76: static Uint8 hd6301_read_memory(Uint16 addr);
77: static void hd6301_write_memory (Uint16 addr, Uint8 value);
78: static Uint16 hd6301_get_memory_ext(void);
79:
80: /* HD6301 opcodes functions */
81: static void hd6301_undefined(void);
82: static void hd6301_nop(void);
83: static void hd6301_lsrd(void);
84: static void hd6301_asld(void);
85: static void hd6301_tap(void);
86: static void hd6301_tpa(void);
87: static void hd6301_inx(void);
88: static void hd6301_dex(void);
89: static void hd6301_clv(void);
90: static void hd6301_sev(void);
91: static void hd6301_clc(void);
92: static void hd6301_sec(void);
93: static void hd6301_cli(void);
94: static void hd6301_sei(void);
95: static void hd6301_sba(void);
96: static void hd6301_cba(void);
97: static void hd6301_tab(void);
98: static void hd6301_tba(void);
99: static void hd6301_xgdx(void);
100: static void hd6301_daa(void);
101: static void hd6301_slp(void);
102: static void hd6301_aba(void);
103: static void hd6301_bra(void);
104: static void hd6301_brn(void);
105: static void hd6301_bhi(void);
106: static void hd6301_bls(void);
107: static void hd6301_bcc(void);
108: static void hd6301_bcs(void);
109: static void hd6301_bne(void);
110: static void hd6301_beq(void);
111: static void hd6301_bvc(void);
112: static void hd6301_bvs(void);
113: static void hd6301_bpl(void);
114: static void hd6301_bmi(void);
115: static void hd6301_bge(void);
116: static void hd6301_blt(void);
117: static void hd6301_bgt(void);
118: static void hd6301_ble(void);
119: static void hd6301_tsx(void);
120: static void hd6301_ins(void);
121: static void hd6301_pula(void);
122: static void hd6301_pulb(void);
123: static void hd6301_des(void);
124: static void hd6301_txs(void);
125: static void hd6301_psha(void);
126: static void hd6301_pshb(void);
127: static void hd6301_pulx(void);
128: static void hd6301_rts(void);
129: static void hd6301_abx(void);
130: static void hd6301_rti(void);
131: static void hd6301_pshx(void);
132: static void hd6301_mul(void);
133: static void hd6301_wai(void);
134: static void hd6301_swi(void);
135: static void hd6301_nega(void);
136: static void hd6301_coma(void);
137: static void hd6301_lsra(void);
138: static void hd6301_rora(void);
139: static void hd6301_asra(void);
140: static void hd6301_asla(void);
141: static void hd6301_rola(void);
142: static void hd6301_deca(void);
143: static void hd6301_inca(void);
144: static void hd6301_tsta(void);
145: static void hd6301_clra(void);
146: static void hd6301_negb(void);
147: static void hd6301_comb(void);
148: static void hd6301_lsrb(void);
149: static void hd6301_rorb(void);
150: static void hd6301_asrb(void);
151: static void hd6301_aslb(void);
152: static void hd6301_rolb(void);
153: static void hd6301_decb(void);
154: static void hd6301_incb(void);
155: static void hd6301_tstb(void);
156: static void hd6301_clrb(void);
157: static void hd6301_neg_ind(void);
158: static void hd6301_aim_ind(void);
159: static void hd6301_oim_ind(void);
160: static void hd6301_com_ind(void);
161: static void hd6301_lsr_ind(void);
162: static void hd6301_eim_ind(void);
163: static void hd6301_ror_ind(void);
164: static void hd6301_asr_ind(void);
165: static void hd6301_asl_ind(void);
166: static void hd6301_rol_ind(void);
167: static void hd6301_dec_ind(void);
168: static void hd6301_tim_ind(void);
169: static void hd6301_inc_ind(void);
170: static void hd6301_tst_ind(void);
171: static void hd6301_jmp_ind(void);
172: static void hd6301_clr_ind(void);
173: static void hd6301_neg_ext(void);
174: static void hd6301_aim_dir(void);
175: static void hd6301_oim_dir(void);
176: static void hd6301_com_ext(void);
177: static void hd6301_lsr_ext(void);
178: static void hd6301_eim_dir(void);
179: static void hd6301_ror_ext(void);
180: static void hd6301_asr_ext(void);
181: static void hd6301_asl_ext(void);
182: static void hd6301_rol_ext(void);
183: static void hd6301_dec_ext(void);
184: static void hd6301_tim_dir(void);
185: static void hd6301_inc_ext(void);
186: static void hd6301_tst_ext(void);
187: static void hd6301_jmp_ext(void);
188: static void hd6301_clr_ext(void);
189: static void hd6301_suba_imm(void);
190: static void hd6301_cmpa_imm(void);
191: static void hd6301_sbca_imm(void);
192: static void hd6301_subd_imm(void);
193: static void hd6301_anda_imm(void);
194: static void hd6301_bita_imm(void);
195: static void hd6301_ldaa_imm(void);
196: static void hd6301_eora_imm(void);
197: static void hd6301_adca_imm(void);
198: static void hd6301_oraa_imm(void);
199: static void hd6301_adda_imm(void);
200: static void hd6301_cpx_imm(void);
201: static void hd6301_bsr(void);
202: static void hd6301_lds_imm(void);
203: static void hd6301_suba_dir(void);
204: static void hd6301_cmpa_dir(void);
205: static void hd6301_sbca_dir(void);
206: static void hd6301_subd_dir(void);
207: static void hd6301_anda_dir(void);
208: static void hd6301_bita_dir(void);
209: static void hd6301_ldaa_dir(void);
210: static void hd6301_staa_dir(void);
211: static void hd6301_eora_dir(void);
212: static void hd6301_adca_dir(void);
213: static void hd6301_oraa_dir(void);
214: static void hd6301_adda_dir(void);
215: static void hd6301_cpx_dir(void);
216: static void hd6301_jsr_dir(void);
217: static void hd6301_lds_dir(void);
218: static void hd6301_sts_dir(void);
219: static void hd6301_suba_ind(void);
220: static void hd6301_cmpa_ind(void);
221: static void hd6301_sbca_ind(void);
222: static void hd6301_subd_ind(void);
223: static void hd6301_anda_ind(void);
224: static void hd6301_bita_ind(void);
225: static void hd6301_ldaa_ind(void);
226: static void hd6301_staa_ind(void);
227: static void hd6301_eora_ind(void);
228: static void hd6301_adca_ind(void);
229: static void hd6301_oraa_ind(void);
230: static void hd6301_adda_ind(void);
231: static void hd6301_cpx_ind(void);
232: static void hd6301_jsr_ind(void);
233: static void hd6301_lds_ind(void);
234: static void hd6301_sts_ind(void);
235: static void hd6301_suba_ext(void);
236: static void hd6301_cmpa_ext(void);
237: static void hd6301_sbca_ext(void);
238: static void hd6301_subd_ext(void);
239: static void hd6301_anda_ext(void);
240: static void hd6301_bita_ext(void);
241: static void hd6301_ldaa_ext(void);
242: static void hd6301_staa_ext(void);
243: static void hd6301_eora_ext(void);
244: static void hd6301_adca_ext(void);
245: static void hd6301_oraa_ext(void);
246: static void hd6301_adda_ext(void);
247: static void hd6301_cpx_ext(void);
248: static void hd6301_jsr_ext(void);
249: static void hd6301_lds_ext(void);
250: static void hd6301_sts_ext(void);
251: static void hd6301_subb_imm(void);
252: static void hd6301_cmpb_imm(void);
253: static void hd6301_sbcb_imm(void);
254: static void hd6301_addd_imm(void);
255: static void hd6301_andb_imm(void);
256: static void hd6301_bitb_imm(void);
257: static void hd6301_ldab_imm(void);
258: static void hd6301_eorb_imm(void);
259: static void hd6301_adcb_imm(void);
260: static void hd6301_orab_imm(void);
261: static void hd6301_addb_imm(void);
262: static void hd6301_ldd_imm(void);
263: static void hd6301_ldx_imm(void);
264: static void hd6301_subb_dir(void);
265: static void hd6301_cmpb_dir(void);
266: static void hd6301_sbcb_dir(void);
267: static void hd6301_addd_dir(void);
268: static void hd6301_andb_dir(void);
269: static void hd6301_bitb_dir(void);
270: static void hd6301_ldab_dir(void);
271: static void hd6301_stab_dir(void);
272: static void hd6301_eorb_dir(void);
273: static void hd6301_adcb_dir(void);
274: static void hd6301_orab_dir(void);
275: static void hd6301_addb_dir(void);
276: static void hd6301_ldd_dir(void);
277: static void hd6301_std_dir(void);
278: static void hd6301_ldx_dir(void);
279: static void hd6301_stx_dir(void);
280: static void hd6301_subb_ind(void);
281: static void hd6301_cmpb_ind(void);
282: static void hd6301_sbcb_ind(void);
283: static void hd6301_addd_ind(void);
284: static void hd6301_andb_ind(void);
285: static void hd6301_bitb_ind(void);
286: static void hd6301_ldab_ind(void);
287: static void hd6301_stab_ind(void);
288: static void hd6301_eorb_ind(void);
289: static void hd6301_adcb_ind(void);
290: static void hd6301_orab_ind(void);
291: static void hd6301_addb_ind(void);
292: static void hd6301_ldd_ind(void);
293: static void hd6301_std_ind(void);
294: static void hd6301_ldx_ind(void);
295: static void hd6301_stx_ind(void);
296: static void hd6301_subb_ext(void);
297: static void hd6301_cmpb_ext(void);
298: static void hd6301_sbcb_ext(void);
299: static void hd6301_addd_ext(void);
300: static void hd6301_andb_ext(void);
301: static void hd6301_bitb_ext(void);
302: static void hd6301_ldab_ext(void);
303: static void hd6301_stab_ext(void);
304: static void hd6301_eorb_ext(void);
305: static void hd6301_adcb_ext(void);
306: static void hd6301_orab_ext(void);
307: static void hd6301_addb_ext(void);
308: static void hd6301_ldd_ext(void);
309: static void hd6301_std_ext(void);
310: static void hd6301_ldx_ext(void);
311: static void hd6301_stx_ext(void);
312:
313:
314: /**********************************
315: * Variables
316: **********************************/
317: static char hd6301_str_instr[50];
318:
319: static struct hd6301_opcode_t hd6301_opcode;
320:
321: static struct hd6301_opcode_t hd6301_opcode_table[256] = {
322:
323: {0x00, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
324: {0x01, 1, hd6301_nop, 1, "nop", HD6301_DISASM_NONE},
325: {0x02, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
326: {0x03, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
327: {0x04, 1, hd6301_lsrd, 1, "lsrd", HD6301_DISASM_NONE},
328: {0x05, 1, hd6301_asld, 1, "asld", HD6301_DISASM_NONE},
329: {0x06, 1, hd6301_tap, 1, "tap", HD6301_DISASM_NONE},
330: {0x07, 1, hd6301_tpa, 1, "tpa", HD6301_DISASM_NONE},
331: {0x08, 1, hd6301_inx, 1, "inx", HD6301_DISASM_NONE},
332: {0x09, 1, hd6301_dex, 1, "dex", HD6301_DISASM_NONE},
333: {0x0a, 1, hd6301_clv, 1, "clv", HD6301_DISASM_NONE},
334: {0x0b, 1, hd6301_sev, 1, "sev", HD6301_DISASM_NONE},
335: {0x0c, 1, hd6301_clc, 1, "clc", HD6301_DISASM_NONE},
336: {0x0d, 1, hd6301_sec, 1, "sec", HD6301_DISASM_NONE},
337: {0x0e, 1, hd6301_cli, 1, "cli", HD6301_DISASM_NONE},
338: {0x0f, 1, hd6301_sei, 1, "sei", HD6301_DISASM_NONE},
339:
340: {0x10, 1, hd6301_sba, 1, "sba", HD6301_DISASM_NONE},
341: {0x11, 1, hd6301_cba, 1, "cba", HD6301_DISASM_NONE},
342: {0x12, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
343: {0x13, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
344: {0x14, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
345: {0x15, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
346: {0x16, 1, hd6301_tab, 1, "tab", HD6301_DISASM_NONE},
347: {0x17, 1, hd6301_tba, 1, "tba", HD6301_DISASM_NONE},
348: {0x18, 1, hd6301_xgdx, 2, "xgdx", HD6301_DISASM_NONE},
349: {0x19, 1, hd6301_daa, 2, "daa", HD6301_DISASM_NONE},
350: {0x1a, 1, hd6301_slp, 4, "slp", HD6301_DISASM_NONE},
351: {0x1b, 1, hd6301_aba, 1, "aba", HD6301_DISASM_NONE},
352: {0x1c, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
353: {0x1d, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
354: {0x1e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
355: {0x1f, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
356:
357: {0x20, 0, hd6301_bra, 3, "bra $%02x", HD6301_DISASM_MEMORY8},
358: {0x21, 0, hd6301_brn, 3, "brn $%02x", HD6301_DISASM_MEMORY8},
359: {0x22, 0, hd6301_bhi, 3, "bhi $%02x", HD6301_DISASM_MEMORY8},
360: {0x23, 0, hd6301_bls, 3, "bls $%02x", HD6301_DISASM_MEMORY8},
361: {0x24, 0, hd6301_bcc, 3, "bcc $%02x", HD6301_DISASM_MEMORY8},
362: {0x25, 0, hd6301_bcs, 3, "bcs $%02x", HD6301_DISASM_MEMORY8},
363: {0x26, 0, hd6301_bne, 3, "bne $%02x", HD6301_DISASM_MEMORY8},
364: {0x27, 0, hd6301_beq, 3, "beq $%02x", HD6301_DISASM_MEMORY8},
365: {0x28, 0, hd6301_bvc, 3, "bvc $%02x", HD6301_DISASM_MEMORY8},
366: {0x29, 0, hd6301_bvs, 3, "bvs $%02x", HD6301_DISASM_MEMORY8},
367: {0x2a, 0, hd6301_bpl, 3, "bpl $%02x", HD6301_DISASM_MEMORY8},
368: {0x2b, 0, hd6301_bmi, 3, "bmi $%02x", HD6301_DISASM_MEMORY8},
369: {0x2c, 0, hd6301_bge, 3, "bge $%02x", HD6301_DISASM_MEMORY8},
370: {0x2d, 0, hd6301_blt, 3, "blt $%02x", HD6301_DISASM_MEMORY8},
371: {0x2e, 0, hd6301_bgt, 3, "bgt $%02x", HD6301_DISASM_MEMORY8},
372: {0x2f, 0, hd6301_ble, 3, "ble $%02x", HD6301_DISASM_MEMORY8},
373:
374: {0x30, 1, hd6301_tsx, 1, "tsx", HD6301_DISASM_NONE},
375: {0x31, 1, hd6301_ins, 1, "ins", HD6301_DISASM_NONE},
376: {0x32, 1, hd6301_pula, 3, "pula", HD6301_DISASM_NONE},
377: {0x33, 1, hd6301_pulb, 3, "pulb", HD6301_DISASM_NONE},
378: {0x34, 1, hd6301_des, 1, "des", HD6301_DISASM_NONE},
379: {0x35, 1, hd6301_txs, 1, "txs", HD6301_DISASM_NONE},
380: {0x36, 1, hd6301_psha, 4, "psha", HD6301_DISASM_NONE},
381: {0x37, 1, hd6301_pshb, 4, "pshb", HD6301_DISASM_NONE},
382: {0x38, 1, hd6301_pulx, 4, "pulx", HD6301_DISASM_NONE},
383: {0x39, 0, hd6301_rts, 5, "rts", HD6301_DISASM_NONE},
384: {0x3a, 1, hd6301_abx, 1, "abx", HD6301_DISASM_NONE},
385: {0x3b, 0, hd6301_rti, 10, "rti", HD6301_DISASM_NONE},
386: {0x3c, 1, hd6301_pshx, 5 , "pshx", HD6301_DISASM_NONE},
387: {0x3d, 1, hd6301_mul, 7, "mul", HD6301_DISASM_NONE},
388: {0x3e, 0, hd6301_wai, 9, "wai", HD6301_DISASM_NONE},
389: {0x3f, 0, hd6301_swi, 12, "swi", HD6301_DISASM_NONE},
390:
391: {0x40, 1, hd6301_nega, 1, "nega", HD6301_DISASM_NONE},
392: {0x41, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
393: {0x42, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
394: {0x43, 1, hd6301_coma, 1, "coma", HD6301_DISASM_NONE},
395: {0x44, 1, hd6301_lsra, 1, "lsra", HD6301_DISASM_NONE},
396: {0x45, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
397: {0x46, 1, hd6301_rora, 1, "rora", HD6301_DISASM_NONE},
398: {0x47, 1, hd6301_asra, 1, "asra", HD6301_DISASM_NONE},
399: {0x48, 1, hd6301_asla, 1, "lsla", HD6301_DISASM_NONE},
400: {0x49, 1, hd6301_rola, 1, "rola", HD6301_DISASM_NONE},
401: {0x4a, 1, hd6301_deca, 1, "deca", HD6301_DISASM_NONE},
402: {0x4b, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
403: {0x4c, 1, hd6301_inca, 1, "inca", HD6301_DISASM_NONE},
404: {0x4d, 1, hd6301_tsta, 1, "tsta", HD6301_DISASM_NONE},
405: {0x4e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
406: {0x4f, 1, hd6301_clra, 1, "clra", HD6301_DISASM_NONE},
407:
408: {0x50, 1, hd6301_negb, 1, "negb", HD6301_DISASM_NONE},
409: {0x51, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
410: {0x52, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
411: {0x53, 1, hd6301_comb, 1, "comb", HD6301_DISASM_NONE},
412: {0x54, 1, hd6301_lsrb, 1, "lsrb", HD6301_DISASM_NONE},
413: {0x55, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
414: {0x56, 1, hd6301_rorb, 1, "rorb", HD6301_DISASM_NONE},
415: {0x57, 1, hd6301_asrb, 1, "asrb", HD6301_DISASM_NONE},
416: {0x58, 1, hd6301_aslb, 1, "lslb", HD6301_DISASM_NONE},
417: {0x59, 1, hd6301_rolb, 1, "rolb", HD6301_DISASM_NONE},
418: {0x5a, 1, hd6301_decb, 1, "decb", HD6301_DISASM_NONE},
419: {0x5b, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
420: {0x5c, 1, hd6301_incb, 1, "incb", HD6301_DISASM_NONE},
421: {0x5d, 1, hd6301_tstb, 1, "tstb", HD6301_DISASM_NONE},
422: {0x5e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
423: {0x5f, 1, hd6301_clrb, 1, "clrb", HD6301_DISASM_NONE},
424:
425: {0x60, 2, hd6301_neg_ind, 6, "neg $%02x,x", HD6301_DISASM_MEMORY8},
426: {0x61, 3, hd6301_aim_ind, 7, "aim #$%02x,$%02x x", HD6301_DISASM_XIM},
427: {0x62, 3, hd6301_oim_ind, 7, "oim #$%02x,$%02x x", HD6301_DISASM_XIM},
428: {0x63, 2, hd6301_com_ind, 6, "com $%02x,x", HD6301_DISASM_MEMORY8},
429: {0x64, 2, hd6301_lsr_ind, 6, "lsr $%02x,x", HD6301_DISASM_MEMORY8},
430: {0x65, 3, hd6301_eim_ind, 7, "eim #$%02x,$%02x x", HD6301_DISASM_XIM},
431: {0x66, 2, hd6301_ror_ind, 6, "ror $%02x,x", HD6301_DISASM_MEMORY8},
432: {0x67, 2, hd6301_asr_ind, 6, "asr $%02x,x", HD6301_DISASM_MEMORY8},
433: {0x68, 2, hd6301_asl_ind, 6, "lsl $%02x,x", HD6301_DISASM_MEMORY8},
434: {0x69, 2, hd6301_rol_ind, 6, "rol $%02x,x", HD6301_DISASM_MEMORY8},
435: {0x6a, 2, hd6301_dec_ind, 6, "dec $%02x,x", HD6301_DISASM_MEMORY8},
436: {0x6b, 3, hd6301_tim_ind, 5, "tim #$%02x,$%02x x", HD6301_DISASM_XIM},
437: {0x6c, 2, hd6301_inc_ind, 6, "inc $%02x,x", HD6301_DISASM_MEMORY8},
438: {0x6d, 2, hd6301_tst_ind, 4, "tst $%02x,x", HD6301_DISASM_MEMORY8},
439: {0x6e, 0, hd6301_jmp_ind, 3, "jmp $%02x,x", HD6301_DISASM_MEMORY8},
440: {0x6f, 2, hd6301_clr_ind, 5, "clr $%02x,x", HD6301_DISASM_MEMORY8},
441:
442: {0x70, 3, hd6301_neg_ext, 6, "neg $%04x", HD6301_DISASM_MEMORY16},
443: {0x71, 3, hd6301_aim_dir, 6, "aim #$%02x,$%02x", HD6301_DISASM_XIM},
444: {0x72, 3, hd6301_oim_dir, 6, "oim #$%02x,$%02x", HD6301_DISASM_XIM},
445: {0x73, 3, hd6301_com_ext, 6, "com $%04x", HD6301_DISASM_MEMORY16},
446: {0x74, 3, hd6301_lsr_ext, 6, "lsr $%04x", HD6301_DISASM_MEMORY16},
447: {0x75, 3, hd6301_eim_dir, 6, "eim #$%02x,$%02x", HD6301_DISASM_XIM},
448: {0x76, 3, hd6301_ror_ext, 6, "ror $%04x", HD6301_DISASM_MEMORY16},
449: {0x77, 3, hd6301_asr_ext, 6, "asr $%04x", HD6301_DISASM_MEMORY16},
450: {0x78, 3, hd6301_asl_ext, 6, "lsl $%04x", HD6301_DISASM_MEMORY16},
451: {0x79, 3, hd6301_rol_ext, 6, "rol $%04x", HD6301_DISASM_MEMORY16},
452: {0x7a, 3, hd6301_dec_ext, 6, "dec $%04x", HD6301_DISASM_MEMORY16},
453: {0x7b, 3, hd6301_tim_dir, 4, "tim #$%02x,$%02x", HD6301_DISASM_XIM},
454: {0x7c, 3, hd6301_inc_ext, 6, "inc $%04x", HD6301_DISASM_MEMORY16},
455: {0x7d, 3, hd6301_tst_ext, 4, "tst $%04x", HD6301_DISASM_MEMORY16},
456: {0x7e, 0, hd6301_jmp_ext, 3, "jmp $%04x", HD6301_DISASM_MEMORY16},
457: {0x7f, 3, hd6301_clr_ext, 5, "clr $%04x", HD6301_DISASM_MEMORY16},
458:
459: {0x80, 2, hd6301_suba_imm, 2, "suba #$%02x", HD6301_DISASM_MEMORY8},
460: {0x81, 2, hd6301_cmpa_imm, 2, "cmpa #$%02x", HD6301_DISASM_MEMORY8},
461: {0x82, 2, hd6301_sbca_imm, 2, "sbca #$%02x", HD6301_DISASM_MEMORY8},
462: {0x83, 3, hd6301_subd_imm, 3, "subd #$%04x", HD6301_DISASM_MEMORY16},
463: {0x84, 2, hd6301_anda_imm, 2, "anda #$%02x", HD6301_DISASM_MEMORY8},
464: {0x85, 2, hd6301_bita_imm, 2, "bita #$%02x", HD6301_DISASM_MEMORY8},
465: {0x86, 2, hd6301_ldaa_imm, 2, "ldaa #$%02x", HD6301_DISASM_MEMORY8},
466: {0x87, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
467: {0x88, 2, hd6301_eora_imm, 2, "eora #$%02x", HD6301_DISASM_MEMORY8},
468: {0x89, 2, hd6301_adca_imm, 2, "adca #$%02x", HD6301_DISASM_MEMORY8},
469: {0x8a, 2, hd6301_oraa_imm, 2, "oraa #$%02x", HD6301_DISASM_MEMORY8},
470: {0x8b, 2, hd6301_adda_imm, 2, "adda #$%02x", HD6301_DISASM_MEMORY8},
471: {0x8c, 3, hd6301_cpx_imm, 3, "cpx #$%04x", HD6301_DISASM_MEMORY16},
472: {0x8d, 0, hd6301_bsr, 5, "bsr $%02x", HD6301_DISASM_MEMORY8},
473: {0x8e, 3, hd6301_lds_imm, 3, "lds #$%04x", HD6301_DISASM_MEMORY16},
474: {0x8f, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
475:
476: {0x90, 2, hd6301_suba_dir, 3, "suba $%02x", HD6301_DISASM_MEMORY8},
477: {0x91, 2, hd6301_cmpa_dir, 3, "cmpa $%02x", HD6301_DISASM_MEMORY8},
478: {0x92, 2, hd6301_sbca_dir, 3, "sbca $%02x", HD6301_DISASM_MEMORY8},
479: {0x93, 2, hd6301_subd_dir, 4, "subd $%02x", HD6301_DISASM_MEMORY8},
480: {0x94, 2, hd6301_anda_dir, 3, "anda $%02x", HD6301_DISASM_MEMORY8},
481: {0x95, 2, hd6301_bita_dir, 3, "bita $%02x", HD6301_DISASM_MEMORY8},
482: {0x96, 2, hd6301_ldaa_dir, 3, "ldaa $%02x", HD6301_DISASM_MEMORY8},
483: {0x97, 2, hd6301_staa_dir, 3, "staa $%02x", HD6301_DISASM_MEMORY8},
484: {0x98, 2, hd6301_eora_dir, 3, "eora $%02x", HD6301_DISASM_MEMORY8},
485: {0x99, 2, hd6301_adca_dir, 3, "adca $%02x", HD6301_DISASM_MEMORY8},
486: {0x9a, 2, hd6301_oraa_dir, 3, "oraa $%02x", HD6301_DISASM_MEMORY8},
487: {0x9b, 2, hd6301_adda_dir, 3, "adda $%02x", HD6301_DISASM_MEMORY8},
488: {0x9c, 2, hd6301_cpx_dir, 4, "cpx $%02x", HD6301_DISASM_MEMORY8},
489: {0x9d, 0, hd6301_jsr_dir, 5, "jsr $%02x", HD6301_DISASM_MEMORY8},
490: {0x9e, 2, hd6301_lds_dir, 4, "lds $%02x", HD6301_DISASM_MEMORY8},
491: {0x9f, 2, hd6301_sts_dir, 4, "sts $%02x", HD6301_DISASM_MEMORY8},
492:
493: {0xa0, 2, hd6301_suba_ind, 4, "suba $%02x,x", HD6301_DISASM_MEMORY8},
494: {0xa1, 2, hd6301_cmpa_ind, 4, "cmpa $%02x,x", HD6301_DISASM_MEMORY8},
495: {0xa2, 2, hd6301_sbca_ind, 4, "sbca $%02x,x", HD6301_DISASM_MEMORY8},
496: {0xa3, 2, hd6301_subd_ind, 5, "subd $%02x,x", HD6301_DISASM_MEMORY8},
497: {0xa4, 2, hd6301_anda_ind, 4, "anda $%02x,x", HD6301_DISASM_MEMORY8},
498: {0xa5, 2, hd6301_bita_ind, 4, "bita $%02x,x", HD6301_DISASM_MEMORY8},
499: {0xa6, 2, hd6301_ldaa_ind, 4, "ldaa $%02x,x", HD6301_DISASM_MEMORY8},
500: {0xa7, 2, hd6301_staa_ind, 4, "staa $%02x,x", HD6301_DISASM_MEMORY8},
501: {0xa8, 2, hd6301_eora_ind, 4, "eora $%02x,x", HD6301_DISASM_MEMORY8},
502: {0xa9, 2, hd6301_adca_ind, 4, "adca $%02x,x", HD6301_DISASM_MEMORY8},
503: {0xaa, 2, hd6301_oraa_ind, 4, "oraa $%02x,x", HD6301_DISASM_MEMORY8},
504: {0xab, 2, hd6301_adda_ind, 4, "adda $%02x,x", HD6301_DISASM_MEMORY8},
505: {0xac, 2, hd6301_cpx_ind, 5, "cpx $%02x,x", HD6301_DISASM_MEMORY8},
506: {0xad, 0, hd6301_jsr_ind, 5, "jsr $%02x,x", HD6301_DISASM_MEMORY8},
507: {0xae, 2, hd6301_lds_ind, 5, "lds $%02x,x", HD6301_DISASM_MEMORY8},
508: {0xaf, 2, hd6301_sts_ind, 5, "sts $%02x,x", HD6301_DISASM_MEMORY8},
509:
510: {0xb0, 3, hd6301_suba_ext, 4, "suba $%04x", HD6301_DISASM_MEMORY16},
511: {0xb1, 3, hd6301_cmpa_ext, 4, "cmpa $%04x", HD6301_DISASM_MEMORY16},
512: {0xb2, 3, hd6301_sbca_ext, 4, "sbca $%04x", HD6301_DISASM_MEMORY16},
513: {0xb3, 3, hd6301_subd_ext, 5, "subd $%04x", HD6301_DISASM_MEMORY16},
514: {0xb4, 3, hd6301_anda_ext, 4, "anda $%04x", HD6301_DISASM_MEMORY16},
515: {0xb5, 3, hd6301_bita_ext, 4, "bita $%04x", HD6301_DISASM_MEMORY16},
516: {0xb6, 3, hd6301_ldaa_ext, 4, "ldaa $%04x", HD6301_DISASM_MEMORY16},
517: {0xb7, 3, hd6301_staa_ext, 4, "staa $%04x", HD6301_DISASM_MEMORY16},
518: {0xb8, 3, hd6301_eora_ext, 4, "eora $%04x", HD6301_DISASM_MEMORY16},
519: {0xb9, 3, hd6301_adca_ext, 4, "adca $%04x", HD6301_DISASM_MEMORY16},
520: {0xba, 3, hd6301_oraa_ext, 4, "oraa $%04x", HD6301_DISASM_MEMORY16},
521: {0xbb, 3, hd6301_adda_ext, 4, "adda $%04x", HD6301_DISASM_MEMORY16},
522: {0xbc, 3, hd6301_cpx_ext, 5, "cpx $%04x", HD6301_DISASM_MEMORY16},
523: {0xbd, 0, hd6301_jsr_ext, 6, "jsr $%04x", HD6301_DISASM_MEMORY16},
524: {0xbe, 3, hd6301_lds_ext, 5, "lds $%04x", HD6301_DISASM_MEMORY16},
525: {0xbf, 3, hd6301_sts_ext, 5, "sts $%04x", HD6301_DISASM_MEMORY16},
526:
527: {0xc0, 2, hd6301_subb_imm, 2, "subb #$%02x", HD6301_DISASM_MEMORY8},
528: {0xc1, 2, hd6301_cmpb_imm, 2, "cmpb #$%02x", HD6301_DISASM_MEMORY8},
529: {0xc2, 2, hd6301_sbcb_imm, 2, "sbcb #$%02x", HD6301_DISASM_MEMORY8},
530: {0xc3, 3, hd6301_addd_imm, 3, "addd #$%04x", HD6301_DISASM_MEMORY16},
531: {0xc4, 2, hd6301_andb_imm, 2, "andb #$%02x", HD6301_DISASM_MEMORY8},
532: {0xc5, 2, hd6301_bitb_imm, 2, "bitb #$%02x", HD6301_DISASM_MEMORY8},
533: {0xc6, 2, hd6301_ldab_imm, 2, "ldab #$%02x", HD6301_DISASM_MEMORY8},
534: {0xc7, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
535: {0xc8, 2, hd6301_eorb_imm, 2, "eorb #$%02x", HD6301_DISASM_MEMORY8},
536: {0xc9, 2, hd6301_adcb_imm, 2, "adcb #$%02x", HD6301_DISASM_MEMORY8},
537: {0xca, 2, hd6301_orab_imm, 2, "orab #$%02x", HD6301_DISASM_MEMORY8},
538: {0xcb, 2, hd6301_addb_imm, 2, "addb #$%02x", HD6301_DISASM_MEMORY8},
539: {0xcc, 3, hd6301_ldd_imm, 3, "ldd #$%04x", HD6301_DISASM_MEMORY16},
540: {0xcd, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
541: {0xce, 3, hd6301_ldx_imm, 3, "ldx #$%04x", HD6301_DISASM_MEMORY16},
542: {0xcf, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
543:
544: {0xd0, 2, hd6301_subb_dir, 3, "subb $%02x", HD6301_DISASM_MEMORY8},
545: {0xd1, 2, hd6301_cmpb_dir, 3, "cmpb $%02x", HD6301_DISASM_MEMORY8},
546: {0xd2, 2, hd6301_sbcb_dir, 3, "sbcb $%02x", HD6301_DISASM_MEMORY8},
547: {0xd3, 2, hd6301_addd_dir, 4, "addd $%02x", HD6301_DISASM_MEMORY8},
548: {0xd4, 2, hd6301_andb_dir, 3, "andb $%02x", HD6301_DISASM_MEMORY8},
549: {0xd5, 2, hd6301_bitb_dir, 3, "bitb $%02x", HD6301_DISASM_MEMORY8},
550: {0xd6, 2, hd6301_ldab_dir, 3, "ldab $%02x", HD6301_DISASM_MEMORY8},
551: {0xd7, 2, hd6301_stab_dir, 3, "stab $%02x", HD6301_DISASM_MEMORY8},
552: {0xd8, 2, hd6301_eorb_dir, 3, "eorb $%02x", HD6301_DISASM_MEMORY8},
553: {0xd9, 2, hd6301_adcb_dir, 3, "adcb $%02x", HD6301_DISASM_MEMORY8},
554: {0xda, 2, hd6301_orab_dir, 3, "orab $%02x", HD6301_DISASM_MEMORY8},
555: {0xdb, 2, hd6301_addb_dir, 3, "addb $%02x", HD6301_DISASM_MEMORY8},
556: {0xdc, 2, hd6301_ldd_dir, 4, "ldd $%02x", HD6301_DISASM_MEMORY8},
557: {0xdd, 2, hd6301_std_dir, 4, "std $%02x", HD6301_DISASM_MEMORY8},
558: {0xde, 2, hd6301_ldx_dir, 4, "ldx $%02x", HD6301_DISASM_MEMORY8},
559: {0xdf, 2, hd6301_stx_dir, 4, "stx $%02x", HD6301_DISASM_MEMORY8},
560:
561: {0xe0, 2, hd6301_subb_ind, 4, "subb $%02x,x", HD6301_DISASM_MEMORY8},
562: {0xe1, 2, hd6301_cmpb_ind, 4, "cmpb $%02x,x", HD6301_DISASM_MEMORY8},
563: {0xe2, 2, hd6301_sbcb_ind, 4, "sbcb $%02x,x", HD6301_DISASM_MEMORY8},
564: {0xe3, 2, hd6301_addd_ind, 5, "addd $%02x,x", HD6301_DISASM_MEMORY8},
565: {0xe4, 2, hd6301_andb_ind, 4, "andb $%02x,x", HD6301_DISASM_MEMORY8},
566: {0xe5, 2, hd6301_bitb_ind, 4, "bitb $%02x,x", HD6301_DISASM_MEMORY8},
567: {0xe6, 2, hd6301_ldab_ind, 4, "ldab $%02x,x", HD6301_DISASM_MEMORY8},
568: {0xe7, 2, hd6301_stab_ind, 4, "stab $%02x,x", HD6301_DISASM_MEMORY8},
569: {0xe8, 2, hd6301_eorb_ind, 4, "eorb $%02x,x", HD6301_DISASM_MEMORY8},
570: {0xe9, 2, hd6301_adcb_ind, 4, "adcb $%02x,x", HD6301_DISASM_MEMORY8},
571: {0xea, 2, hd6301_orab_ind, 4, "orab $%02x,x", HD6301_DISASM_MEMORY8},
572: {0xeb, 2, hd6301_addb_ind, 4, "addb $%02x,x", HD6301_DISASM_MEMORY8},
573: {0xec, 2, hd6301_ldd_ind, 5, "ldd $%02x,x", HD6301_DISASM_MEMORY8},
574: {0xed, 2, hd6301_std_ind, 5, "std $%02x,x", HD6301_DISASM_MEMORY8},
575: {0xee, 2, hd6301_ldx_ind, 5, "ldx $%02x,x", HD6301_DISASM_MEMORY8},
576: {0xef, 2, hd6301_stx_ind, 5, "stx $%02x,x", HD6301_DISASM_MEMORY8},
577:
578: {0xf0, 3, hd6301_subb_ext, 4, "subb $%04x", HD6301_DISASM_MEMORY16},
579: {0xf1, 3, hd6301_cmpb_ext, 4, "cmpb $%04x", HD6301_DISASM_MEMORY16},
580: {0xf2, 3, hd6301_sbcb_ext, 4, "sbcb $%04x", HD6301_DISASM_MEMORY16},
581: {0xf3, 3, hd6301_addd_ext, 5, "addd $%04x", HD6301_DISASM_MEMORY16},
582: {0xf4, 3, hd6301_andb_ext, 4, "andb $%04x", HD6301_DISASM_MEMORY16},
583: {0xf5, 3, hd6301_bitb_ext, 4, "bitb $%04x", HD6301_DISASM_MEMORY16},
584: {0xf6, 3, hd6301_ldab_ext, 4, "ldab $%04x", HD6301_DISASM_MEMORY16},
585: {0xf7, 3, hd6301_stab_ext, 4, "stab $%04x", HD6301_DISASM_MEMORY16},
586: {0xf8, 3, hd6301_eorb_ext, 4, "eorb $%04x", HD6301_DISASM_MEMORY16},
587: {0xf9, 3, hd6301_adcb_ext, 4, "adcb $%04x", HD6301_DISASM_MEMORY16},
588: {0xfa, 3, hd6301_orab_ext, 4, "orab $%04x", HD6301_DISASM_MEMORY16},
589: {0xfb, 3, hd6301_addb_ext, 4, "addb $%04x", HD6301_DISASM_MEMORY16},
590: {0xfc, 3, hd6301_ldd_ext, 5, "ldd $%04x", HD6301_DISASM_MEMORY16},
591: {0xfd, 3, hd6301_std_ext, 5, "std $%04x", HD6301_DISASM_MEMORY16},
592: {0xfe, 3, hd6301_ldx_ext, 5, "ldx $%04x", HD6301_DISASM_MEMORY16},
593: {0xff, 3, hd6301_stx_ext, 5, "stx $%04x", HD6301_DISASM_MEMORY16}
594: };
595:
596:
597: /* Variables */
598: static Uint8 hd6301_cycles;
599: static Uint8 hd6301_cur_inst;
600:
601: static Sint8 hd6301_reg_A;
602: static Sint8 hd6301_reg_B;
603: static Sint16 hd6301_reg_X;
604: static Uint16 hd6301_reg_SP;
605: static Uint16 hd6301_reg_PC;
606: static Uint8 hd6301_reg_CCR;
607:
608: //Uint8 hd6301_reg_RMCR;
609:
610: static Uint8 hd6301_intREG[32];
611: static Uint8 hd6301_intRAM[128];
612: static Uint8 hd6301_intROM[4096];
613:
614:
615: /**********************************
616: * Emulator kernel
617: **********************************/
618:
619: /**
620: * Initialise hd6301 cpu
621: */
622: void hd6301_init_cpu(void)
623: {
624: hd6301_reg_CCR = 0xc0;
625: }
626:
627: /**
628: * Execute 1 hd6301 instruction
629: */
630: void hd6301_execute_one_instruction(void)
631: {
632: hd6301_cur_inst = hd6301_read_memory(hd6301_reg_PC);
633:
634: /* Get opcode to execute */
635: hd6301_opcode = hd6301_opcode_table[hd6301_cur_inst];
636:
637: /* disasm opcode ? */
638: #ifdef HD6301_DISASM
639: hd6301_disasm();
640: #endif
641: /* execute opcode */
642: hd6301_opcode.op_func();
643:
644: #ifdef HD6301_DISPLAY_REGS
645: hd6301_display_registers();
646: #endif
647:
648: /* Increment instruction cycles */
649: hd6301_cycles += hd6301_opcode.op_n_cycles;
650:
651: /* Increment PC register */
652: hd6301_reg_PC += hd6301_opcode.op_bytes;
653:
654: /* post process interrupts */
655:
656: /* post process timers */
657:
658: /* post process SCI */
659: }
660:
661: /**
662: * Read hd6301 memory (Ram, Rom, Internal registers)
663: */
664: static Uint8 hd6301_read_memory(Uint16 addr)
665: {
666: /* Internal registers */
667: if (addr <= 0x1f) {
668: return hd6301_intREG[addr];
669: }
670:
671: /* Internal RAM */
672: if ((addr >= 0x80) && (addr <= 0xff)) {
673: return hd6301_intRAM[addr-0x80];
674: }
675:
676: /* Internal ROM */
677: if (addr >= 0xf000) {
678: return hd6301_intROM[addr-0xf000];
679: }
680:
681: fprintf(stderr, "hd6301: 0x%04x: 0x%04x illegal memory address\n", hd6301_reg_PC, addr);
682: exit(-1);
683: }
684:
685: /**
686: * Write hd6301 memory (Ram, Internal registers)
687: */
688: static void hd6301_write_memory (Uint16 addr, Uint8 value)
689: {
690: /* Internal registers */
691: if (addr <= 0x1f) {
692: hd6301_intREG[addr] = value;
693: }
694:
695: /* Internal RAM */
696: else if ((addr >= 0x80) && (addr <= 0xff)) {
697: hd6301_intRAM[addr-0x80] = value;
698: }
699:
700: /* Internal ROM */
701: else if (addr >= 0xf000) {
702: fprintf(stderr, "hd6301: 0x%04x: attempt to write to rom\n", addr);
703: }
704:
705: /* Illegal address */
706: else {
707: fprintf(stderr, "hd6301: 0x%04x: write to illegal address\n", addr);
708: exit(-1);
709: }
710: }
711:
712: /**
713: * Get extended memory (16 bits)
714: */
715: static Uint16 hd6301_get_memory_ext(void)
716: {
717: Uint16 addr;
718:
719: addr = hd6301_read_memory(hd6301_reg_PC+1)<<8;
720: addr += hd6301_read_memory(hd6301_reg_PC+2);
721: return addr;
722: }
723:
724: /**
725: * Undefined opcode
726: */
727: static void hd6301_undefined(void)
728: {
729: fprintf(stderr, "hd6301: 0x%04x: 0x%02x unknown instruction\n", hd6301_reg_PC, hd6301_cur_inst);
730: exit(-1); /* TODO: Trap the error correctly */
731: }
732:
733: /**
734: * NOP : no operation
735: *
736: * HINZVC
737: * ......
738: */
739: static void hd6301_nop(void)
740: {
741: }
742:
743: /**
744: * LSRD : logical Shift Right, accumulator D : D=D>>1
745: *
746: * HINZVC
747: * ..0***
748: */
749: static void hd6301_lsrd(void)
750: {
751: Uint16 regD;
752: Uint8 carry;
753:
754: regD = (hd6301_reg_A<<8) + hd6301_reg_B;
755: carry = regD & 1;
756: regD >>= 1;
757:
758: hd6301_reg_A = regD >> 8;
759: hd6301_reg_B = regD;
760:
761: HD6301_CLR_NZVC;
762: hd6301_reg_CCR |= carry;
763: HD6301_SET_Z16(regD);
764: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
765: }
766:
767: /**
768: * ASLD : arythmetic Shift left, accumulator D : D=D<<1
769: *
770: * HINZVC
771: * ..****
772: */
773: static void hd6301_asld(void)
774: {
775: Uint16 regD;
776: Uint8 carry, bitN;
777:
778: regD = (hd6301_reg_A<<8) + hd6301_reg_B;
779: carry = (regD >> 15) & 1;
780: regD <<= 1;
781:
782: hd6301_reg_A = regD >> 8;
783: hd6301_reg_B = regD;
784:
785: HD6301_CLR_NZVC;
786: hd6301_reg_CCR |= carry;
787: HD6301_SET_NZ16(regD);
788: bitN = (hd6301_reg_CCR & 0x8) >> 3;
789: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
790: }
791:
792:
793: /**
794: * TAP : transfer accumulator A into register CCR : CCR=A
795: *
796: * HINZVC
797: * ******
798: */
799: static void hd6301_tap(void)
800: {
801: hd6301_reg_CCR = hd6301_reg_A;
802: hd6301_reg_CCR |= 0xc0;
803: }
804:
805: /**
806: * TPA : transfer register CCR into accumulator A : A=CCR
807: *
808: * HINZVC
809: * ......
810: */
811: static void hd6301_tpa(void)
812: {
813: hd6301_reg_A = hd6301_reg_CCR;
814: }
815:
816: /**
817: * INX : increment register X : X=X+1
818: *
819: * HINZVC
820: * ...*..
821: */
822: static void hd6301_inx(void)
823: {
824: ++ hd6301_reg_X;
825:
826: HD6301_CLR_Z;
827: HD6301_SET_Z16(hd6301_reg_X);
828: }
829:
830: /**
831: * DEX : decrement register X : X=X-1
832: *
833: * HINZVC
834: * ...*..
835: */
836: static void hd6301_dex(void)
837: {
838: -- hd6301_reg_X;
839:
840: HD6301_CLR_Z;
841: HD6301_SET_Z16(hd6301_reg_X);
842: }
843:
844: /**
845: * CLV : clear register CCR bit V : V=0
846: *
847: * HINZVC
848: * ....0.
849: */
850: static void hd6301_clv(void)
851: {
852: HD6301_CLR_V;
853: }
854:
855: /**
856: * SEV : set register CCR bit V : V=1
857: *
858: * HINZVC
859: * ....1.
860: */
861: static void hd6301_sev(void)
862: {
863: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_V;
864: }
865:
866: /**
867: * CLC : clear register CCR bit C : C=0
868: *
869: * HINZVC
870: * .....0
871: */
872: static void hd6301_clc(void)
873: {
874: HD6301_CLR_C;
875: }
876:
877: /**
878: * SEC : set register CCR bit C : C=1
879: *
880: * HINZVC
881: * .....1
882: */
883: static void hd6301_sec(void)
884: {
885: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_C;
886: }
887:
888: /**
889: * CLI : clear register CCR bit I : I=0
890: *
891: * HINZVC
892: * .0....
893: */
894: static void hd6301_cli(void)
895: {
896: HD6301_CLR_I;
897: }
898:
899: /**
900: * SEI : set register CCR bit I : I=1
901: *
902: * HINZVC
903: * .1....
904: */
905: static void hd6301_sei(void)
906: {
907: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_I;
908: }
909:
910: /**
1.1.1.2 root 911: * SBA : subtract accumulator B from accumulator A : A=A-B
1.1 root 912: *
913: * HINZVC
914: * ..****
915: */
916: static void hd6301_sba(void)
917: {
918: Uint16 result;
919:
920: result = hd6301_reg_A - hd6301_reg_B;
921:
922: HD6301_CLR_NZVC;
923: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
924:
925: hd6301_reg_A = result;
926: }
927:
928: /**
929: * CBA : compare accumulator A and accumulator B : A-B
930: *
931: * HINZVC
932: * ..****
933: */
934: static void hd6301_cba(void)
935: {
936: Uint16 result;
937:
938: result = hd6301_reg_A - hd6301_reg_B;
939:
940: HD6301_CLR_NZVC;
941: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
942: }
943:
944: /**
945: * TAB : transfer accumulator A into accumulator B : B=A
946: *
947: * HINZVC
948: * ..**0.
949: */
950: static void hd6301_tab(void)
951: {
952: hd6301_reg_B = hd6301_reg_A;
953:
954: HD6301_CLR_NZV;
955: HD6301_SET_NZ8(hd6301_reg_B);
956: }
957:
958: /**
959: * TBA : transfer accumulator B into accumulator A : A=B
960: *
961: * HINZVC
962: * ..**0.
963: */
964: static void hd6301_tba(void)
965: {
966: hd6301_reg_A = hd6301_reg_B;
967:
968: HD6301_CLR_NZV;
969: HD6301_SET_NZ8(hd6301_reg_A);
970: }
971:
972: /**
973: * XGDX : exchange register X and accumulator D : X<->D
974: *
975: * HINZVC
976: * ......
977: */
978: static void hd6301_xgdx(void)
979: {
980: Uint16 temp;
981:
982: temp = hd6301_reg_X;
983: hd6301_reg_X = (hd6301_reg_A << 8) + hd6301_reg_B;
984: hd6301_reg_A = temp >> 8;
985: hd6301_reg_B = temp;
986: }
987:
988: /**
989: * DAA : converts binary add of BCD characters into BCD format : A=BCD(A)
990: *
991: * HINZVC
992: * ..****
993: */
994: static void hd6301_daa(void)
995: {
996: /* Todo */
997: }
998:
999: /**
1000: * SLP : sleep
1001: *
1002: * HINZVC
1003: * ......
1004: */
1005: static void hd6301_slp(void)
1006: {
1007: /* Todo */
1008: }
1009:
1010: /**
1011: * ABA : add accumulator A and accumulator B into accumulator A : A=A+B
1012: *
1013: * HINZVC
1014: * *.****
1015: */
1016: static void hd6301_aba(void)
1017: {
1018: Uint16 result;
1019:
1020: result = hd6301_reg_A + hd6301_reg_B;
1021:
1022: HD6301_CLR_HNZVC;
1023: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
1024: HD6301_SET_H(hd6301_reg_A, hd6301_reg_B, result);
1025:
1026: hd6301_reg_A = result;
1027: }
1028:
1029: /**
1030: * BRA : branch always
1031: *
1032: * HINZVC
1033: * ......
1034: */
1035: static void hd6301_bra(void)
1036: {
1037: Sint8 addr;
1038:
1039: addr = hd6301_read_memory(hd6301_reg_PC + 1);
1040: hd6301_reg_PC += addr + 2;
1041: }
1042:
1043: /**
1044: * BRN : branch never
1045: *
1046: * HINZVC
1047: * ......
1048: */
1049: static void hd6301_brn(void)
1050: {
1051: hd6301_reg_PC += 2;
1052: }
1053:
1054: /**
1055: * BHI : branch if higher : C|Z=0
1056: *
1057: * HINZVC
1058: * ......
1059: */
1060: static void hd6301_bhi(void)
1061: {
1062: Sint8 addr;
1063: Uint8 bitC, bitZ;
1064:
1065: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1066: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1067: addr = 2;
1068: if ((bitC | bitZ) == 0) {
1069: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1070: }
1071: hd6301_reg_PC += addr;
1072: }
1073:
1074: /**
1075: * BLS : branch if lower or same : C|Z=1
1076: *
1077: * HINZVC
1078: * ......
1079: */
1080: static void hd6301_bls(void)
1081: {
1082: Sint8 addr;
1083: Uint8 bitC, bitZ;
1084:
1085: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1086: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1087: addr = 2;
1088: if ((bitC | bitZ) == 1) {
1089: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1090: }
1091: hd6301_reg_PC += addr;
1092: }
1093:
1094: /**
1095: * BCC : branch if carry clear : C=0
1096: *
1097: * HINZVC
1098: * ......
1099: */
1100: static void hd6301_bcc(void)
1101: {
1102: Sint8 addr;
1103: Uint8 bitC;
1104:
1105: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1106: addr = 2;
1107: if (bitC == 0) {
1108: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1109: }
1110: hd6301_reg_PC += addr;
1111: }
1112:
1113: /**
1114: * BCS : branch if carry set : C=1
1115: *
1116: * HINZVC
1117: * ......
1118: */
1119: static void hd6301_bcs(void)
1120: {
1121: Sint8 addr;
1122: Uint8 bitC;
1123:
1124: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1125: addr = 2;
1126: if (bitC == 1) {
1127: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1128: }
1129: hd6301_reg_PC += addr;
1130: }
1131:
1132: /**
1133: * BNE : branch if not equal 0 : Z=0
1134: *
1135: * HINZVC
1136: * ......
1137: */
1138: static void hd6301_bne(void)
1139: {
1140: Sint8 addr;
1141: Uint8 bitZ;
1142:
1143: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1144: addr = 2;
1145: if (bitZ == 0) {
1146: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1147: }
1148: hd6301_reg_PC += addr;
1149: }
1150:
1151: /**
1152: * BEQ : branch if equal 0 : Z=1
1153: *
1154: * HINZVC
1155: * ......
1156: */
1157: static void hd6301_beq(void)
1158: {
1159: Sint8 addr;
1160: Uint8 bitZ;
1161:
1162: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1163: addr = 2;
1164: if (bitZ == 1) {
1165: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1166: }
1167: hd6301_reg_PC += addr;
1168: }
1169:
1170: /**
1171: * BVC : branch if overflow clear : V=0
1172: *
1173: * HINZVC
1174: * ......
1175: */
1176: static void hd6301_bvc(void)
1177: {
1178: Sint8 addr;
1179: Uint8 bitV;
1180:
1181: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1182: addr = 2;
1183: if (bitV == 0) {
1184: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1185: }
1186: hd6301_reg_PC += addr;
1187: }
1188:
1189: /**
1190: * BVS : branch if overflow set : V=1
1191: *
1192: * HINZVC
1193: * ......
1194: */
1195: static void hd6301_bvs(void)
1196: {
1197: Sint8 addr;
1198: Uint8 bitV;
1199:
1200: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1201: addr = 2;
1202: if (bitV == 1) {
1203: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1204: }
1205: hd6301_reg_PC += addr;
1206: }
1207:
1208: /**
1209: * BPL : branch if plus : N=0
1210: *
1211: * HINZVC
1212: * ......
1213: */
1214: static void hd6301_bpl(void)
1215: {
1216: Sint8 addr;
1217: Uint8 bitN;
1218:
1219: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1220: addr = 2;
1221: if (bitN == 0) {
1222: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1223: }
1224: hd6301_reg_PC += addr;
1225: }
1226:
1227: /**
1228: * BMI : branch if minus : N=1
1229: *
1230: * HINZVC
1231: * ......
1232: */
1233: static void hd6301_bmi(void)
1234: {
1235: Sint8 addr;
1236: Uint8 bitN;
1237:
1238: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1239: addr = 2;
1240: if (bitN == 1) {
1241: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1242: }
1243: hd6301_reg_PC += addr;
1244: }
1245:
1246: /**
1247: * BGE : branch if greater or equal to zero : N^V=0
1248: *
1249: * HINZVC
1250: * ......
1251: */
1252: static void hd6301_bge(void)
1253: {
1254: Sint8 addr;
1255: Uint8 bitN, bitV;
1256:
1257: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1258: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1259: addr = 2;
1260: if ((bitN ^ bitV) == 0) {
1261: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1262: }
1263: hd6301_reg_PC += addr;
1264: }
1265:
1266: /**
1267: * BLT : branch if lower to zero : N^V=1
1268: *
1269: * HINZVC
1270: * ......
1271: */
1272: static void hd6301_blt(void)
1273: {
1274: Sint8 addr;
1275: Uint8 bitN, bitV;
1276:
1277: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1278: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1279: addr = 2;
1280: if ((bitN ^ bitV) == 1) {
1281: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1282: }
1283: hd6301_reg_PC += addr;
1284: }
1285:
1286: /**
1287: * BGT : branch if greater to zero : Z|(N^V)=0
1288: *
1289: * HINZVC
1290: * ......
1291: */
1292: static void hd6301_bgt(void)
1293: {
1294: Sint8 addr;
1295: Uint8 bitN, bitV, bitZ;
1296:
1297: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1298: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1299: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1300: addr = 2;
1301: if ((bitZ | (bitN ^ bitV)) == 0) {
1302: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1303: }
1304: hd6301_reg_PC += addr;
1305: }
1306:
1307: /**
1308: * BLE : branch if lower or equal to zero : Z|(N^V)=1
1309: *
1310: * HINZVC
1311: * ......
1312: */
1313: static void hd6301_ble(void)
1314: {
1315: Sint8 addr;
1316: Uint8 bitN, bitV, bitZ;
1317:
1318: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1319: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1320: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1321: addr = 2;
1322: if ((bitZ | (bitN ^ bitV)) == 1) {
1323: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1324: }
1325: hd6301_reg_PC += addr;
1326: }
1327:
1328: /**
1329: * TSX : transfer stack pointer to register X : X=SP+1
1330: *
1331: * HINZVC
1332: * ......
1333: */
1334: static void hd6301_tsx(void)
1335: {
1336: hd6301_reg_X = hd6301_reg_SP + 1;
1337: }
1338:
1339: /**
1340: * INS : increment stack pointer : SP=SP+1
1341: *
1342: * HINZVC
1343: * ......
1344: */
1345: static void hd6301_ins(void)
1346: {
1347: ++ hd6301_reg_SP;
1348: }
1349:
1350: /**
1351: * PULA : pull accumulator A from stack : SP=SP+1 ; A=(SP)
1352: *
1353: * HINZVC
1354: * ......
1355: */
1356: static void hd6301_pula(void)
1357: {
1358: ++ hd6301_reg_SP;
1359: hd6301_reg_A = hd6301_read_memory(hd6301_reg_SP);
1360: }
1361:
1362: /**
1363: * PULB : pull accumulator B from stack : SP=SP+1 ; B=(SP)
1364: *
1365: * HINZVC
1366: * ......
1367: */
1368: static void hd6301_pulb(void)
1369: {
1370: ++ hd6301_reg_SP;
1371: hd6301_reg_B = hd6301_read_memory(hd6301_reg_SP);
1372: }
1373:
1374: /**
1375: * DES : decrement stack pointer : SP=SP-1
1376: *
1377: * HINZVC
1378: * ......
1379: */
1380: static void hd6301_des(void)
1381: {
1382: -- hd6301_reg_SP;
1383: }
1384:
1385: /**
1386: * TXS : transfer register X to stack pointer : SP=X-1
1387: *
1388: * HINZVC
1389: * ......
1390: */
1391: static void hd6301_txs(void)
1392: {
1393: hd6301_reg_SP = hd6301_reg_X - 1;
1394: }
1395:
1396: /**
1397: * PSHA : push accumulator A to stack : (SP)=A ; SP=SP-1
1398: *
1399: * HINZVC
1400: * ......
1401: */
1402: static void hd6301_psha(void)
1403: {
1404: hd6301_write_memory(hd6301_reg_SP, hd6301_reg_A);
1405: -- hd6301_reg_SP;
1406: }
1407:
1408: /**
1409: * PSHB : push accumulator B to stack : (SP)=B ; SP=SP-1
1410: *
1411: * HINZVC
1412: * ......
1413: */
1414: static void hd6301_pshb(void)
1415: {
1416: hd6301_write_memory(hd6301_reg_SP, hd6301_reg_B);
1417: -- hd6301_reg_SP;
1418: }
1419:
1420: /**
1421: * PULX : pull register X from stack : SP=SP+1 ; X=(SP)
1422: *
1423: * HINZVC
1424: * ......
1425: */
1426: static void hd6301_pulx(void)
1427: {
1428: hd6301_reg_X = hd6301_read_memory(++hd6301_reg_SP)<<8;
1429: hd6301_reg_X += hd6301_read_memory(++hd6301_reg_SP);
1430: }
1431:
1432: /**
1433: * RTS : return from subroutine
1434: *
1435: * HINZVC
1436: * ......
1437: */
1438: static void hd6301_rts(void)
1439: {
1440: hd6301_reg_PC = hd6301_read_memory(++hd6301_reg_SP)<<8;
1441: hd6301_reg_PC += hd6301_read_memory(++hd6301_reg_SP);
1442: }
1443:
1444: /**
1445: * ABX : add accumulator B to register X : X=X+B
1446: *
1447: * HINZVC
1448: * ......
1449: */
1450: static void hd6301_abx(void)
1451: {
1452: hd6301_reg_X += hd6301_reg_B;
1453: }
1454:
1455: /**
1456: * RTI : return from interrupt
1457: *
1458: * HINZVC
1459: * ******
1460: */
1461: static void hd6301_rti(void)
1462: {
1463: hd6301_reg_CCR = hd6301_read_memory(++hd6301_reg_SP);
1464: hd6301_reg_B = hd6301_read_memory(++hd6301_reg_SP);
1465: hd6301_reg_A = hd6301_read_memory(++hd6301_reg_SP);
1466: hd6301_reg_X = hd6301_read_memory(++hd6301_reg_SP)<<8;
1467: hd6301_reg_X += hd6301_read_memory(++hd6301_reg_SP);
1468: hd6301_reg_PC = hd6301_read_memory(++hd6301_reg_SP)<<8;
1469: hd6301_reg_PC += hd6301_read_memory(++hd6301_reg_SP);
1470: }
1471:
1472: /**
1473: * PSHX : push register X to stack : (SP)=X ; SP=SP-1
1474: *
1475: * HINZVC
1476: * ......
1477: */
1478: static void hd6301_pshx(void)
1479: {
1480: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X & 0xff);
1481: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X >> 8);
1482: }
1483:
1484: /**
1485: * MUL : multiply unsigned : D=A*B
1486: *
1487: * HINZVC
1488: * .....*
1489: */
1490: static void hd6301_mul(void)
1491: {
1492: Uint16 regD;
1493:
1494: regD = hd6301_reg_B * hd6301_reg_A;
1495: hd6301_reg_A = regD >> 8;
1496: hd6301_reg_B = regD;
1497:
1498: HD6301_CLR_C;
1499: hd6301_reg_CCR |= hd6301_reg_B >> 7;
1500: }
1501:
1502: /**
1503: * WAI : wait for interrupt
1504: *
1505: * HINZVC
1506: * .*....
1507: */
1508: static void hd6301_wai(void)
1509: {
1510: /* Todo */
1511: }
1512:
1513: /**
1514: * SWI : software interrupt
1515: *
1516: * HINZVC
1517: * .1....
1518: */
1519: static void hd6301_swi(void)
1520: {
1521: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC+1) & 0xff);
1522: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC+1) >> 8);
1523: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X & 0xff);
1524: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X >> 8);
1525: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_A);
1526: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_B);
1527: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_CCR);
1528:
1529: hd6301_reg_PC = hd6301_read_memory(0xfffa) << 8;
1530: hd6301_reg_PC += hd6301_read_memory(0xfffb);
1531:
1532: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_I;
1533: }
1534:
1535: /**
1536: * NEGA : negate accumulator A : A=0-A
1537: *
1538: * HINZVC
1539: * ..****
1540: */
1541: static void hd6301_nega(void)
1542: {
1543: Uint8 value;
1544:
1545: value = 0 - hd6301_reg_A;
1546: hd6301_reg_A = value;
1547:
1548: HD6301_CLR_NZVC;
1549: HD6301_SET_NZ8(value);
1550: hd6301_reg_CCR |= (value != 0x0);
1551: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1552: }
1553:
1554: /**
1555: * COMA : complement 1 accumulator A : A=~A
1556: *
1557: * HINZVC
1558: * ..**01
1559: */
1560: static void hd6301_coma(void)
1561: {
1562: hd6301_reg_A = ~hd6301_reg_A;
1563:
1564: HD6301_CLR_NZV;
1565: hd6301_reg_CCR |= 1;
1566: HD6301_SET_NZ8(hd6301_reg_A);
1567: }
1568:
1569: /**
1570: * LSRA : logical shift right, accumulator A : A=A>>1
1571: *
1572: * HINZVC
1573: * ..0***
1574: */
1575: static void hd6301_lsra(void)
1576: {
1577: Uint8 carry;
1578:
1579: carry = hd6301_reg_A & 1;
1580: hd6301_reg_A >>= 1;
1581:
1582: HD6301_CLR_NZVC;
1583: hd6301_reg_CCR |= carry;
1584: HD6301_SET_Z8(hd6301_reg_A);
1585: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
1586: }
1587:
1588: /**
1589: * RORA : rotate right, accumulator A : A=A>>1 + carry<<8
1590: *
1591: * HINZVC
1592: * ..****
1593: */
1594: static void hd6301_rora(void)
1595: {
1596: Uint8 carry, result, bitN;
1597:
1598: carry = hd6301_reg_A & 1;
1599: result = (hd6301_reg_CCR & 1) << 7;
1600: result += hd6301_reg_A >> 1;
1601: hd6301_reg_A = result;
1602:
1603: HD6301_CLR_NZVC;
1604: hd6301_reg_CCR |= carry;
1605: HD6301_SET_NZ8(hd6301_reg_A);
1606: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1607: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1608: }
1609:
1610: /**
1611: * ASRA : arithmetic shift right, accumulator A : A=A>>1
1612: *
1613: * HINZVC
1614: * ..****
1615: */
1616: static void hd6301_asra(void)
1617: {
1618: Uint8 carry, bitN;
1619:
1620: carry = hd6301_reg_A & 1;
1621: hd6301_reg_A >>= 1;
1622: hd6301_reg_A |= (hd6301_reg_A & 0x40) << 1;
1623:
1624: HD6301_CLR_NZVC;
1625: hd6301_reg_CCR |= carry;
1626: HD6301_SET_NZ8(hd6301_reg_A);
1627: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1628: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1629: }
1630:
1631: /**
1632: * ASLA : arithmetic shift left, accumulator A : A=A<<1
1633: *
1634: * HINZVC
1635: * ..****
1636: */
1637: static void hd6301_asla(void)
1638: {
1639: Uint8 carry, bitN;
1640:
1641: carry = (hd6301_reg_A & 0X80) >> 7;
1642: hd6301_reg_A <<= 1;
1643:
1644: HD6301_CLR_NZVC;
1645: hd6301_reg_CCR |= carry;
1646: HD6301_SET_NZ8(hd6301_reg_A);
1647: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1648: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1649: }
1650:
1651: /**
1652: * ROLA : rotate left, accumulator A : A=A<<1 +C
1653: *
1654: * HINZVC
1655: * ..****
1656: */
1657: static void hd6301_rola(void)
1658: {
1659: Uint8 carry, result, bitN;
1660:
1661: carry = (hd6301_reg_A & 0x80) >> 7;
1662: result = hd6301_reg_CCR & 1;
1663: result += hd6301_reg_A << 1;
1664: hd6301_reg_A = result;
1665:
1666: HD6301_CLR_NZVC;
1667: hd6301_reg_CCR |= carry;
1668: HD6301_SET_NZ8(hd6301_reg_A);
1669: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1670: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1671: }
1672:
1673: /**
1674: * DECA : decrement accumulator A : A=A-1
1675: *
1676: * HINZVC
1677: * ..***.
1678: */
1679: static void hd6301_deca(void)
1680: {
1681: Uint8 overflow;
1682:
1683: overflow = (hd6301_reg_A == (Sint8)0x80) << hd6301_REG_CCR_V;
1684: -- hd6301_reg_A;
1685:
1686: HD6301_CLR_NZV;
1687: hd6301_reg_CCR |= overflow;
1688: HD6301_SET_NZ8(hd6301_reg_A);
1689: }
1690:
1691: /**
1692: * INCA : increment accumulator A : A=A+1
1693: *
1694: * HINZVC
1695: * ..***.
1696: */
1697: static void hd6301_inca(void)
1698: {
1699: Uint8 overflow;
1700:
1701: overflow = (hd6301_reg_A == 0x7f) << hd6301_REG_CCR_V;
1702: hd6301_reg_A ++;
1703:
1704: HD6301_CLR_NZV;
1705: hd6301_reg_CCR |= overflow;
1706: HD6301_SET_NZ8(hd6301_reg_A);
1707: }
1708:
1709: /**
1710: * TSTA : test zero or minus, accumulator A : A-0
1711: *
1712: * HINZVC
1713: * ..**00
1714: */
1715: static void hd6301_tsta(void)
1716: {
1717: HD6301_CLR_NZVC;
1718: HD6301_SET_NZ8(hd6301_reg_A);
1719: }
1720:
1721: /**
1722: * CLRA : clear accumulator A : A=0
1723: *
1724: * HINZVC
1725: * ..0100
1726: */
1727: static void hd6301_clra(void)
1728: {
1729: hd6301_reg_A = 0;
1730: HD6301_CLR_NZVC;
1731: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
1732: }
1733:
1734: /**
1735: * NEGB : negate accumulator B : B=0-B
1736: *
1737: * HINZVC
1738: * ..****
1739: */
1740: static void hd6301_negb(void)
1741: {
1742: Uint8 value;
1743:
1744: value = 0 - hd6301_reg_B;
1745: hd6301_reg_B = value;
1746:
1747: HD6301_CLR_NZVC;
1748: HD6301_SET_NZ8(value);
1749: hd6301_reg_CCR |= (value != 0x0);
1750: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1751: }
1752:
1753: /**
1754: * COMB : complement 1 accumulator B : B=~B
1755: *
1756: * HINZVC
1757: * ..**01
1758: */
1759: static void hd6301_comb(void)
1760: {
1761: hd6301_reg_B = ~hd6301_reg_B;
1762: HD6301_CLR_NZVC;
1763: hd6301_reg_CCR |= 1;
1764: HD6301_SET_NZ8(hd6301_reg_B);
1765: }
1766:
1767: /**
1768: * LSRB : logical shift right, accumulator B : B=B>>1
1769: *
1770: * HINZVC
1771: * ..0***
1772: */
1773: static void hd6301_lsrb(void)
1774: {
1775: Uint8 carry;
1776:
1777: carry = hd6301_reg_B & 1;
1778: hd6301_reg_B >>= 1;
1779:
1780: HD6301_CLR_NZVC;
1781: hd6301_reg_CCR |= carry;
1782: HD6301_SET_Z8(hd6301_reg_B);
1783: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
1784: }
1785:
1786: /**
1787: * RORB : rotate right, accumulator B : B=B>>1 + carry<<8
1788: *
1789: * HINZVC
1790: * ..****
1791: */
1792: static void hd6301_rorb(void)
1793: {
1794: Uint8 carry, result, bitN;
1795:
1796: carry = hd6301_reg_B & 1;
1797: result = (hd6301_reg_CCR & 1) << 7;
1798: result += hd6301_reg_B >> 1;
1799: hd6301_reg_B = result;
1800:
1801: HD6301_CLR_NZVC;
1802: hd6301_reg_CCR |= carry;
1803: HD6301_SET_NZ8(hd6301_reg_B);
1804: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1805: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1806: }
1807:
1808: /**
1809: * ASRB : arithmetic shift right, accumulator B : B=B>>1
1810: *
1811: * HINZVC
1812: * ..****
1813: */
1814: static void hd6301_asrb(void)
1815: {
1816: Uint8 carry, bitN;
1817:
1818: carry = hd6301_reg_B & 1;
1819: hd6301_reg_B >>= 1;
1820: hd6301_reg_B |= (hd6301_reg_B & 0x40) << 1;
1821:
1822: HD6301_CLR_NZVC;
1823: hd6301_reg_CCR |= carry;
1824: HD6301_SET_NZ8(hd6301_reg_B);
1825: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1826: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1827: }
1828:
1829: /**
1830: * ASLB : arithmetic shift left, accumulator B : B=B<<1
1831: *
1832: * HINZVC
1833: * ..****
1834: */
1835: static void hd6301_aslb(void)
1836: {
1837: Uint8 carry, bitN;
1838:
1839: carry = (hd6301_reg_B & 0x80) >> 7;
1840: hd6301_reg_B <<= 1;
1841:
1842: HD6301_CLR_NZVC;
1843: hd6301_reg_CCR |= carry;
1844: HD6301_SET_NZ8(hd6301_reg_B);
1845: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1846: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1847: }
1848:
1849: /**
1850: * ROLB : rotate left, accumulator B : B=B<<1 +C
1851: *
1852: * HINZVC
1853: * ..****
1854: */
1855: static void hd6301_rolb(void)
1856: {
1857: Uint8 carry, result, bitN;
1858:
1859: carry = (hd6301_reg_B & 0x80) >> 7;
1860: result = hd6301_reg_CCR & 1;
1861: result += hd6301_reg_B << 1;
1862: hd6301_reg_B = result;
1863:
1864: HD6301_CLR_NZVC;
1865: hd6301_reg_CCR |= carry;
1866: HD6301_SET_NZ8(hd6301_reg_B);
1867: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1868: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1869: }
1870:
1871: /**
1872: * DECB : decrement accumulator B : B=B-1
1873: *
1874: * HINZVC
1875: * ..***.
1876: */
1877: static void hd6301_decb(void)
1878: {
1879: Uint8 overflow;
1880:
1881: overflow = (hd6301_reg_B == (Sint8)0x80) << hd6301_REG_CCR_V;
1882: -- hd6301_reg_B;
1883:
1884: HD6301_CLR_NZV;
1885: hd6301_reg_CCR |= overflow;
1886: HD6301_SET_NZ8(hd6301_reg_B);
1887: }
1888:
1889: /**
1890: * INCB : increment accumulator B : B=B+1
1891: *
1892: * HINZVC
1893: * ..***.
1894: */
1895: static void hd6301_incb(void)
1896: {
1897: Uint8 overflow;
1898:
1899: overflow = (hd6301_reg_B == 0x7f) << hd6301_REG_CCR_V;
1900: hd6301_reg_B ++;
1901:
1902: HD6301_CLR_NZV;
1903: hd6301_reg_CCR |= overflow;
1904: HD6301_SET_NZ8(hd6301_reg_B);
1905: }
1906:
1907: /**
1908: * TSTB : test zero or minus, accumulator B : B-0
1909: *
1910: * HINZVC
1911: * ..**00
1912: */
1913: static void hd6301_tstb(void)
1914: {
1915: HD6301_CLR_NZVC;
1916: HD6301_SET_NZ8(hd6301_reg_B);
1917: }
1918:
1919: /**
1920: * CLRB : clear accumulator B : B=0
1921: *
1922: * HINZVC
1923: * ..0100
1924: */
1925: static void hd6301_clrb(void)
1926: {
1927: hd6301_reg_B = 0;
1928: HD6301_CLR_NZVC;
1929: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
1930: }
1931:
1932: /**
1933: * NEG_IND : negate indexed memory : M=0-M
1934: *
1935: * HINZVC
1936: * ..****
1937: */
1938: static void hd6301_neg_ind(void)
1939: {
1940: Uint8 value;
1941: Uint16 addr;
1942:
1943: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
1944: value = -hd6301_read_memory(addr);
1945: hd6301_write_memory(addr, value);
1946:
1947: HD6301_CLR_NZVC;
1948: hd6301_reg_CCR |= (value != 0x0);
1949: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1950: HD6301_SET_NZ8(value);
1951: }
1952:
1953: /**
1954: * AIM_IND : and immediate indexed memory : M=M&IMM
1955: *
1956: * HINZVC
1957: * ..**0.
1958: */
1959: static void hd6301_aim_ind(void)
1960: {
1961: Uint8 value;
1962: Uint16 addr;
1963:
1964: value = hd6301_read_memory(hd6301_reg_PC+1);
1965: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
1966: value &= hd6301_read_memory(addr);
1967: hd6301_write_memory(addr, value);
1968:
1969: HD6301_CLR_NZV;
1970: HD6301_SET_NZ8(value);
1971: }
1972:
1973: /**
1974: * OIM_IND : or immediate indexed memory : M=M|IMM
1975: *
1976: * HINZVC
1977: * ..**0.
1978: */
1979: static void hd6301_oim_ind(void)
1980: {
1981: Uint8 value;
1982: Uint16 addr;
1983:
1984: value = hd6301_read_memory(hd6301_reg_PC+1);
1985: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
1986: value |= hd6301_read_memory(addr);
1987: hd6301_write_memory(addr, value);
1988:
1989: HD6301_CLR_NZV;
1990: HD6301_SET_NZ8(value);
1991: }
1992:
1993: /**
1994: * COM_IND : complement 1 indexed memory : M=~M
1995: *
1996: * HINZVC
1997: * ..**01
1998: */
1999: static void hd6301_com_ind(void)
2000: {
2001: Uint8 value;
2002: Uint16 addr;
2003:
2004: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2005: value = ~hd6301_read_memory(addr);
2006: hd6301_write_memory(addr, value);
2007:
2008: HD6301_CLR_NZV;
2009: hd6301_reg_CCR |= 1;
2010: HD6301_SET_NZ8(value);
2011: }
2012:
2013: /**
2014: * LSR_IND : logical shift right indexed memory : M=M>>1
2015: *
2016: * HINZVC
2017: * ..0***
2018: */
2019: static void hd6301_lsr_ind(void)
2020: {
2021: Uint8 value, carry;
2022: Uint16 addr;
2023:
2024: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2025: value = hd6301_read_memory(addr);
2026:
2027: carry = value & 1;
2028: value >>= 1;
2029: hd6301_write_memory(addr, value);
2030:
2031: HD6301_CLR_NZVC;
2032: hd6301_reg_CCR |= carry;
2033: HD6301_SET_Z8(value);
2034: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
2035: }
2036:
2037: /**
2038: * EIM_IND : eor immediate indexed memory : M=M^IMM
2039: *
2040: * HINZVC
2041: * ..**0.
2042: */
2043: static void hd6301_eim_ind(void)
2044: {
2045: Uint8 value;
2046: Uint16 addr;
2047:
2048: value = hd6301_read_memory(hd6301_reg_PC+1);
2049: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
2050: value ^= hd6301_read_memory(addr);
2051: hd6301_write_memory(addr, value);
2052:
2053: HD6301_CLR_NZV;
2054: HD6301_SET_NZ8(value);
2055: }
2056:
2057: /**
2058: * ROR_IND : rotate right indexed memory : M=M>>1 + carry<<8
2059: *
2060: * HINZVC
2061: * ..****
2062: */
2063: static void hd6301_ror_ind(void)
2064: {
2065: Uint8 value, carry, result, bitN;
2066: Uint16 addr;
2067:
2068: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2069: value = hd6301_read_memory(addr);
2070:
2071: carry = value & 1;
2072: result = (hd6301_reg_CCR & 1) << 7;
2073: result += value >> 1;
2074: hd6301_write_memory(addr, result);
2075:
2076: HD6301_CLR_NZVC;
2077: hd6301_reg_CCR |= carry;
2078: HD6301_SET_NZ8(result);
2079: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2080: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2081: }
2082:
2083: /**
2084: * ASR_IND : arithmetic shift right indexed memory : M=M>>1
2085: *
2086: * HINZVC
2087: * ..****
2088: */
2089: static void hd6301_asr_ind(void)
2090: {
2091: Uint8 value, carry, bitN;
2092: Uint16 addr;
2093:
2094: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2095: value = hd6301_read_memory(addr);
2096:
2097: carry = value & 1;
2098: value >>= 1;
2099: value |= (value & 0x40) << 1;
2100: hd6301_write_memory(addr, value);
2101:
2102: HD6301_CLR_NZVC;
2103: hd6301_reg_CCR |= carry;
2104: HD6301_SET_NZ8(value);
2105: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2106: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2107: }
2108:
2109: /**
2110: * ASL_IND : arithmetic shift left indexed memory : M=M<<1
2111: *
2112: * HINZVC
2113: * ..****
2114: */
2115: static void hd6301_asl_ind(void)
2116: {
2117: Uint8 value, carry, bitN;
2118: Uint16 addr;
2119:
2120: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2121: value = hd6301_read_memory(addr);
2122:
2123: carry = (value & 0X80) >> 7;
2124: value <<= 1;
2125: hd6301_write_memory(addr, value);
2126:
2127: HD6301_CLR_NZVC;
2128: hd6301_reg_CCR |= carry;
2129: HD6301_SET_NZ8(value);
2130: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2131: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2132: }
2133:
2134: /**
2135: * ROL_IND : rotate left indexed memory : M=M<<1 + carry
2136: *
2137: * HINZVC
2138: * ..****
2139: */
2140: static void hd6301_rol_ind(void)
2141: {
2142: Uint8 value, carry, result, bitN;
2143: Uint16 addr;
2144:
2145: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2146: value = hd6301_read_memory(addr);
2147:
2148: result = hd6301_reg_CCR & 1;
2149: carry = (value & 0x80) >> 7;
2150: result += value << 1;
2151: hd6301_write_memory(addr, result);
2152:
2153: HD6301_CLR_NZVC;
2154: hd6301_reg_CCR |= carry;
2155: HD6301_SET_NZ8(result);
2156: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2157: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2158: }
2159:
2160: /**
2161: * DEC_IND : decrement indexed memory : M=M-1
2162: *
2163: * HINZVC
2164: * ..***.
2165: */
2166: static void hd6301_dec_ind(void)
2167: {
2168: Uint8 value, overflow;
2169: Uint16 addr;
2170:
2171: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2172: value = hd6301_read_memory(addr);
2173:
2174: overflow = (value == 0x80) << hd6301_REG_CCR_V;
2175: --value;
2176: hd6301_write_memory(addr, value);
2177:
2178: HD6301_CLR_NZV;
2179: hd6301_reg_CCR |= overflow;
2180: HD6301_SET_NZ8(value);
2181: }
2182:
2183: /**
2184: * TIM_IND : test immediate indexed memory : M&IMM
2185: *
2186: * HINZVC
2187: * ..**0.
2188: */
2189: static void hd6301_tim_ind(void)
2190: {
2191: Uint8 value;
2192: Uint16 addr;
2193:
2194: value = hd6301_read_memory(hd6301_reg_PC+1);
2195: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
2196: value &= hd6301_read_memory(addr);
2197: hd6301_write_memory(addr, value);
2198:
2199: HD6301_CLR_NZV;
2200: HD6301_SET_NZ8(value);
2201: }
2202:
2203: /**
2204: * INC_IND : increment indexed memory : M=M+1
2205: *
2206: * HINZVC
2207: * ..***.
2208: */
2209: static void hd6301_inc_ind(void)
2210: {
2211: Uint8 value, overflow;
2212: Uint16 addr;
2213:
2214: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2215: value = hd6301_read_memory(addr);
2216:
2217: overflow = (value == 0x7f) << hd6301_REG_CCR_V;
2218: value ++;
2219: hd6301_write_memory(addr, value);
2220:
2221: HD6301_CLR_NZV;
2222: hd6301_reg_CCR |= overflow;
2223: HD6301_SET_NZ8(value);
2224: }
2225:
2226: /**
2227: * TST_IND : test indexed memory : M-0
2228: *
2229: * HINZVC
2230: * ..**00
2231: */
2232: static void hd6301_tst_ind(void)
2233: {
2234: Uint8 value;
2235: Uint16 addr;
2236:
2237: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2238: value = hd6301_read_memory(addr);
2239:
2240: HD6301_CLR_NZVC;
2241: HD6301_SET_NZ8(value);
2242: }
2243:
2244: /**
2245: * JMP_IND : jump to indexed memory address : PC=M
2246: *
2247: * HINZVC
2248: * ......
2249: */
2250: static void hd6301_jmp_ind(void)
2251: {
2252: Uint8 value;
2253: Uint16 addr;
2254:
2255: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2256: value = hd6301_read_memory(addr);
2257: hd6301_reg_PC = value;
2258: }
2259:
2260: /**
2261: * CLR_IND : clear indexed memory : M=0
2262: *
2263: * HINZVC
2264: * ..0100
2265: */
2266: static void hd6301_clr_ind(void)
2267: {
2268: Uint16 addr;
2269:
2270: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2271: hd6301_write_memory(addr, 0);
2272:
2273: HD6301_CLR_NZVC;
2274: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
2275: }
2276:
2277: /**
2278: * NEG_EXT : negate extended memory : M=0-M
2279: *
2280: * HINZVC
2281: * ..****
2282: */
2283: static void hd6301_neg_ext(void)
2284: {
2285: Uint8 value;
2286: Uint16 addr;
2287:
2288: addr = hd6301_get_memory_ext();
2289: value = -hd6301_read_memory(addr);
2290: hd6301_write_memory(addr, value);
2291:
2292: HD6301_CLR_NZVC;
2293: hd6301_reg_CCR |= (value != 0x0);
2294: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
2295: HD6301_SET_NZ8(value);
2296: }
2297:
2298: /**
2299: * AIM_DIR : and immediate direct memory address : M=M&IMM
2300: *
2301: * HINZVC
2302: * ..**0.
2303: */
2304: static void hd6301_aim_dir(void)
2305: {
2306: Uint8 value;
2307: Uint16 addr;
2308:
2309: value = hd6301_read_memory(hd6301_reg_PC+1);
2310: addr = hd6301_read_memory(hd6301_reg_PC+2);
2311: value &= hd6301_read_memory(addr);
2312: hd6301_write_memory(addr, value);
2313:
2314: HD6301_CLR_NZV;
2315: HD6301_SET_NZ8(value);
2316: }
2317:
2318: /**
2319: * OIM_DIR : or immediate direct memory address : M=M|IMM
2320: *
2321: * HINZVC
2322: * ..**0.
2323: */
2324: static void hd6301_oim_dir(void)
2325: {
2326: Uint8 value;
2327: Uint16 addr;
2328:
2329: value = hd6301_read_memory(hd6301_reg_PC+1);
2330: addr = hd6301_read_memory(hd6301_reg_PC+2);
2331: value |= hd6301_read_memory(addr);
2332: hd6301_write_memory(addr, value);
2333:
2334: HD6301_CLR_NZV;
2335: HD6301_SET_NZ8(value);
2336: }
2337:
2338: /**
2339: * COM_EXT : complement 1 extended memory : M=~M
2340: *
2341: * HINZVC
2342: * ..**01
2343: */
2344: static void hd6301_com_ext(void)
2345: {
2346: Uint8 value;
2347: Uint16 addr;
2348:
2349: addr = hd6301_get_memory_ext();
2350: value = ~hd6301_read_memory(addr);
2351: hd6301_write_memory(addr, value);
2352:
2353: HD6301_CLR_NZV;
2354: hd6301_reg_CCR |= 1;
2355: HD6301_SET_NZ8(value);
2356: }
2357:
2358: /**
2359: * LSR_EXT : logical shift right extended memory : M=M>>1
2360: *
2361: * HINZVC
2362: * ..0***
2363: */
2364: static void hd6301_lsr_ext(void)
2365: {
2366: Uint8 value, carry;
2367: Uint16 addr;
2368:
2369: addr = hd6301_get_memory_ext();
2370: value = hd6301_read_memory(addr);
2371:
2372: carry = value & 1;
2373: value >>= 1;
2374: hd6301_write_memory(addr, value);
2375:
2376: HD6301_CLR_NZVC;
2377: hd6301_reg_CCR |= carry;
2378: HD6301_SET_Z8(value);
2379: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
2380: }
2381:
2382: /**
2383: * EIM_DIR : eor immediate direct memory address : M=M^IMM
2384: *
2385: * HINZVC
2386: * ..**0.
2387: */
2388: static void hd6301_eim_dir(void)
2389: {
2390: Uint8 value;
2391: Uint16 addr;
2392:
2393: value = hd6301_read_memory(hd6301_reg_PC+1);
2394: addr = hd6301_read_memory(hd6301_reg_PC+2);
2395: value ^= hd6301_read_memory(addr);
2396: hd6301_write_memory(addr, value);
2397:
2398: HD6301_CLR_NZV;
2399: HD6301_SET_NZ8(value);
2400: }
2401:
2402: /**
2403: * ROR_EXT : rotate right extended memory : M=M>>1 + carry<<8
2404: *
2405: * HINZVC
2406: * ..****
2407: */
2408: static void hd6301_ror_ext(void)
2409: {
2410: Uint8 value, carry, result, bitN;
2411: Uint16 addr;
2412:
2413: addr = hd6301_get_memory_ext();
2414: value = hd6301_read_memory(addr);
2415:
2416: result = (hd6301_reg_CCR & 1) << 7;
2417: carry = value & 1;
2418: result += value >> 1;
2419: hd6301_write_memory(addr, result);
2420:
2421: HD6301_CLR_NZVC;
2422: hd6301_reg_CCR |= carry;
2423: HD6301_SET_NZ8(value);
2424: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2425: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2426: }
2427:
2428: /**
2429: * ASR_EXT : arithmetic shift right extended memory : M=M>>1
2430: *
2431: * HINZVC
2432: * ..****
2433: */
2434: static void hd6301_asr_ext(void)
2435: {
2436: Uint8 value, carry, bitN;
2437: Uint16 addr;
2438:
2439: addr = hd6301_get_memory_ext();
2440: value = hd6301_read_memory(addr);
2441:
2442: carry = value & 1;
2443: value >>= 1;
2444: value |= (value & 0x40) << 1;
2445: hd6301_write_memory(addr, value);
2446:
2447: HD6301_CLR_NZVC;
2448: hd6301_reg_CCR |= carry;
2449: HD6301_SET_NZ8(value);
2450: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2451: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2452: }
2453:
2454: /**
2455: * ASL_EXT : arithmetic shift left extended memory : M=M<<1
2456: *
2457: * HINZVC
2458: * ..****
2459: */
2460: static void hd6301_asl_ext(void)
2461: {
2462: Uint8 value, carry, bitN;
2463: Uint16 addr;
2464:
2465: addr = hd6301_get_memory_ext();
2466: value = hd6301_read_memory(addr);
2467:
2468: carry = (value & 0X80) >> 7;
2469: value <<= 1;
2470: hd6301_write_memory(addr, value);
2471:
2472: HD6301_CLR_NZVC;
2473: hd6301_reg_CCR |= carry;
2474: HD6301_SET_NZ8(value);
2475: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2476: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2477: }
2478:
2479: /**
2480: * ROL_EXT : rotate left extended memory : M=M<<1 + carry
2481: *
2482: * HINZVC
2483: * ..****
2484: */
2485: static void hd6301_rol_ext(void)
2486: {
2487: Uint8 value, carry, result, bitN;
2488: Uint16 addr;
2489:
2490: addr = hd6301_get_memory_ext();
2491: value = hd6301_read_memory(addr);
2492:
2493: result = hd6301_reg_CCR & 1;
2494: carry = (value & 0x80) >> 7;
2495: result += value << 1;
2496: hd6301_write_memory(addr, result);
2497:
2498: HD6301_CLR_NZVC;
2499: hd6301_reg_CCR |= carry;
2500: HD6301_SET_NZ8(value);
2501: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2502: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2503: }
2504:
2505: /**
2506: * DEC_EXT : decrement extended memory : M=M-1
2507: *
2508: * HINZVC
2509: * ..***.
2510: */
2511: static void hd6301_dec_ext(void)
2512: {
2513: Uint8 value, overflow;
2514: Uint16 addr;
2515:
2516: addr = hd6301_get_memory_ext();
2517: value = hd6301_read_memory(addr);
2518:
2519: overflow = (value == 0x80) << hd6301_REG_CCR_V;
2520: --value;
2521: hd6301_write_memory(addr, value);
2522:
2523: HD6301_CLR_NZV;
2524: hd6301_reg_CCR |= overflow;
2525: HD6301_SET_NZ8(value);
2526: }
2527:
2528: /**
2529: * TIM_DIR : test direct memory address value : M&IMM
2530: *
2531: * HINZVC
2532: * ..**0.
2533: */
2534: static void hd6301_tim_dir(void)
2535: {
2536: Uint8 value;
2537: Uint16 addr;
2538:
2539: value = hd6301_read_memory(hd6301_reg_PC+1);
2540: addr = hd6301_read_memory(hd6301_reg_PC+2);
2541: value &= hd6301_read_memory(addr);
2542: hd6301_write_memory(addr, value);
2543:
2544: HD6301_CLR_NZV;
2545: HD6301_SET_NZ8(value);
2546: }
2547:
2548: /**
2549: * INC_EXT : increment extended memory : M=M+1
2550: *
2551: * HINZVC
2552: * ..***.
2553: */
2554: static void hd6301_inc_ext(void)
2555: {
2556: Uint8 value, overflow;
2557: Uint16 addr;
2558:
2559: addr = hd6301_get_memory_ext();
2560: value = hd6301_read_memory(addr);
2561:
2562: overflow = (value == 0x7f) << hd6301_REG_CCR_V;
2563: value ++;
2564: hd6301_write_memory(addr, value);
2565:
2566: HD6301_CLR_NZV;
2567: hd6301_reg_CCR |= overflow;
2568: HD6301_SET_NZ8(value);
2569: }
2570:
2571: /**
2572: * TST_EXT : test extended memory : M-0
2573: *
2574: * HINZVC
2575: * ..**00
2576: */
2577: static void hd6301_tst_ext(void)
2578: {
2579: Uint8 value;
2580: Uint16 addr;
2581:
2582: addr = hd6301_get_memory_ext();
2583: value = hd6301_read_memory(addr);
2584:
2585: HD6301_CLR_NZVC;
2586: HD6301_SET_NZ8(value);
2587: }
2588:
2589: /**
2590: * JMP_EXT : jump to extended memory address : PC=M
2591: *
2592: * HINZVC
2593: * ......
2594: */
2595: static void hd6301_jmp_ext(void)
2596: {
2597: Uint8 value;
2598: Uint16 addr;
2599:
2600: addr = hd6301_get_memory_ext();
2601: value = hd6301_read_memory(addr);
2602:
2603: hd6301_reg_PC = value;
2604: }
2605:
2606: /**
2607: * CLR_EXT : clear extended memory : M=0
2608: *
2609: * HINZVC
2610: * ..0100
2611: */
2612: static void hd6301_clr_ext(void)
2613: {
2614: Uint16 addr;
2615:
2616: addr = hd6301_get_memory_ext();
2617: hd6301_write_memory(addr, 0);
2618:
2619: HD6301_CLR_NZVC;
2620: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
2621: }
2622:
2623: /**
1.1.1.2 root 2624: * SUBA_IMM : subtract immediate value from accumulator A : A=A-M
1.1 root 2625: *
2626: * HINZVC
2627: * ..****
2628: */
2629: static void hd6301_suba_imm(void)
2630: {
2631: Uint8 value;
2632: Uint16 result;
2633:
2634: value = hd6301_read_memory(hd6301_reg_PC+1);
2635: result = hd6301_reg_A - value;
2636:
2637: HD6301_CLR_NZVC;
2638: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2639:
2640: hd6301_reg_A = result;
2641: }
2642:
2643: /**
2644: * CMPA_IMM : compare immediate value to accumulator A : A-M
2645: *
2646: * HINZVC
2647: * ..****
2648: */
2649: static void hd6301_cmpa_imm(void)
2650: {
2651: Uint8 value;
2652: Uint16 result;
2653:
2654: value = hd6301_read_memory(hd6301_reg_PC+1);
2655: result = hd6301_reg_A - value;
2656:
2657: HD6301_CLR_NZVC;
2658: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2659: }
2660:
2661: /**
1.1.1.2 root 2662: * SBCA_IMM : subtract with carry immediate value from accumulator A : A=A-M-C
1.1 root 2663: *
2664: * HINZVC
2665: * ..****
2666: */
2667: static void hd6301_sbca_imm(void)
2668: {
2669: Uint8 value, carry;
2670: Uint16 result;
2671:
2672: carry = hd6301_REG_CCR_C & 1;
2673: value = hd6301_read_memory(hd6301_reg_PC+1);
2674: result = hd6301_reg_A - value - carry;
2675:
2676: HD6301_CLR_NZVC;
2677: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2678:
2679: hd6301_reg_A = result;
2680: }
2681:
2682: /**
1.1.1.2 root 2683: * SUBD_IMM : subtract immediate value from accumulator D : D=D-MM
1.1 root 2684: *
2685: * HINZVC
2686: * ..****
2687: */
2688: static void hd6301_subd_imm(void)
2689: {
2690: Uint16 value, regD;
2691: Uint32 result;
2692:
2693: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2694: value += hd6301_read_memory(hd6301_reg_PC+2);
2695: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
2696: result = regD - value;
2697:
2698: hd6301_reg_A = (result >> 8) & 0xff;
2699: hd6301_reg_B = result & 0xff;
2700:
2701: HD6301_CLR_NZVC;
2702: HD6301_SET_FLAGS16(regD, value, result);
2703: }
2704:
2705: /**
2706: * ANDA_IMM : and immediate value with accumulator A : A=A&M
2707: *
2708: * HINZVC
2709: * ..**0.
2710: */
2711: static void hd6301_anda_imm(void)
2712: {
2713: hd6301_reg_A &= hd6301_read_memory(hd6301_reg_PC+1);
2714:
2715: HD6301_CLR_NZV;
2716: HD6301_SET_NZ8(hd6301_reg_A);
2717: }
2718:
2719: /**
2720: * BITA_IMM : bit test immediate value with accumulator A : A&M
2721: *
2722: * HINZVC
2723: * ..**0.
2724: */
2725: static void hd6301_bita_imm(void)
2726: {
2727: Uint8 value;
2728:
2729: value = hd6301_reg_A & hd6301_read_memory(hd6301_reg_PC+1);
2730:
2731: HD6301_CLR_NZV;
2732: HD6301_SET_NZ8(value);
2733: }
2734:
2735: /**
2736: * LDAA_IMM : load accumulator A with immediate value : A=M
2737: *
2738: * HINZVC
2739: * ..**0.
2740: */
2741: static void hd6301_ldaa_imm(void)
2742: {
2743: hd6301_reg_A = hd6301_read_memory(hd6301_reg_PC+1);
2744:
2745: HD6301_CLR_NZV;
2746: HD6301_SET_NZ8(hd6301_reg_A);
2747: }
2748:
2749: /**
2750: * EORA_IMM : exclusive or immediate value with accumulator A : A=A^M
2751: *
2752: * HINZVC
2753: * ..**0.
2754: */
2755: static void hd6301_eora_imm(void)
2756: {
2757: hd6301_reg_A ^= hd6301_read_memory(hd6301_reg_PC+1);
2758:
2759: HD6301_CLR_NZV;
2760: HD6301_SET_NZ8(hd6301_reg_A);
2761: }
2762:
2763: /**
2764: * ADCA_IMM : add with carry immediate value to accumulator A : A=A+M+C
2765: *
2766: * HINZVC
2767: * *.****
2768: */
2769: static void hd6301_adca_imm(void)
2770: {
2771: Uint8 value, carry;
2772: Uint16 result;
2773:
2774: carry = hd6301_REG_CCR_C & 1;
2775: value = hd6301_read_memory(hd6301_reg_PC+1);
2776: result = hd6301_reg_A + value + carry;
2777:
2778: HD6301_CLR_HNZVC;
2779: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2780: HD6301_SET_H(hd6301_reg_A, value, result);
2781:
2782: hd6301_reg_A = result;
2783: }
2784:
2785: /**
2786: * ORAA_IMM : inclusive or accumulator A with immediate value : A=A|M
2787: *
2788: * HINZVC
2789: * ..**0.
2790: */
2791: static void hd6301_oraa_imm(void)
2792: {
2793: hd6301_reg_A |= hd6301_read_memory(hd6301_reg_PC+1);
2794:
2795: HD6301_CLR_NZV;
2796: HD6301_SET_NZ8(hd6301_reg_A);
2797: }
2798:
2799: /**
2800: * ADDA_IMM : add immediate value with accumulator A : A=A+M
2801: *
2802: * HINZVC
2803: * *.****
2804: */
2805: static void hd6301_adda_imm(void)
2806: {
2807: Uint8 value;
2808: Uint16 result;
2809:
2810: value = hd6301_read_memory(hd6301_reg_PC+1);
2811: result = hd6301_reg_A + value;
2812:
2813: HD6301_CLR_HNZVC;
2814: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2815: HD6301_SET_H(hd6301_reg_A, value, result);
2816:
2817: hd6301_reg_A = result;
2818: }
2819:
2820: /**
2821: * CPX_IMM : compare index register with immediate value : X-MM
2822: *
2823: * HINZVC
2824: * ..****
2825: */
2826: static void hd6301_cpx_imm(void)
2827: {
2828: Uint16 value;
2829: Uint32 result;
2830:
2831: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2832: value += hd6301_read_memory(hd6301_reg_PC+2);
2833: result = hd6301_reg_X - value;
2834:
2835: HD6301_CLR_NZVC;
2836: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
2837: }
2838:
2839: /**
2840: * BSR : branch to subroutine
2841: *
2842: * HINZVC
2843: * ......
2844: */
2845: static void hd6301_bsr(void)
2846: {
2847: Sint8 addr;
2848:
2849: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
2850: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
2851:
2852: addr = hd6301_read_memory(hd6301_reg_PC + 1);
2853: hd6301_reg_PC += addr + 2;
2854: }
2855:
2856: /**
2857: * LDS_IMM : load stack pointer with immediate value : SP=MM
2858: *
2859: * HINZVC
2860: * ..**0.
2861: */
2862: static void hd6301_lds_imm(void)
2863: {
2864: Uint16 value;
2865:
2866: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2867: value += hd6301_read_memory(hd6301_reg_PC+2);
2868: hd6301_reg_SP = value;
2869:
2870: HD6301_CLR_NZV;
2871: HD6301_SET_NZ16(value);
2872: }
2873:
2874: /**
1.1.1.2 root 2875: * SUBA_DIR : subtract direct memory address value from accumulator A : A=A-M
1.1 root 2876: *
2877: * HINZVC
2878: * ..****
2879: */
2880: static void hd6301_suba_dir(void)
2881: {
2882: Uint8 value;
2883: Uint16 result, addr;
2884:
2885: addr = hd6301_read_memory(hd6301_reg_PC+1);
2886: value = hd6301_read_memory(addr);
2887: result = hd6301_reg_A - value;
2888:
2889: HD6301_CLR_NZVC;
2890: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2891:
2892: hd6301_reg_A = result;
2893: }
2894:
2895: /**
2896: * CMPA_DIR : compare direct memory address value to accumulator A : A-M
2897: *
2898: * HINZVC
2899: * ..****
2900: */
2901: static void hd6301_cmpa_dir(void)
2902: {
2903: Uint8 value;
2904: Uint16 addr, result;
2905:
2906: addr = hd6301_read_memory(hd6301_reg_PC+1);
2907: value = hd6301_read_memory(addr);
2908: result = hd6301_reg_A - value;
2909:
2910: HD6301_CLR_NZVC;
2911: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2912: }
2913:
2914: /**
1.1.1.2 root 2915: * SBCA_DIR : subtract with carry direct memory address value from accumulator A : A=A-M-C
1.1 root 2916: *
2917: * HINZVC
2918: * ..****
2919: */
2920: static void hd6301_sbca_dir(void)
2921: {
2922: Uint8 value, carry;
2923: Uint16 addr, result;
2924:
2925: carry = hd6301_REG_CCR_C & 1;
2926: addr = hd6301_read_memory(hd6301_reg_PC+1);
2927: value = hd6301_read_memory(addr);
2928: result = hd6301_reg_A - value - carry;
2929:
2930: HD6301_CLR_NZVC;
2931: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2932:
2933: hd6301_reg_A = result;
2934: }
2935:
2936: /**
1.1.1.2 root 2937: * SUBD_DIR : subtract direct memory address value from accumulator D : D=D-MM
1.1 root 2938: *
2939: * HINZVC
2940: * ..****
2941: */
2942: static void hd6301_subd_dir(void)
2943: {
2944: Uint16 addr, value, regD;
2945: Uint32 result;
2946:
2947: addr = hd6301_read_memory(hd6301_reg_PC+1);
2948: value = hd6301_read_memory(addr) << 8;
2949: value += hd6301_read_memory(addr+1);
2950: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
2951: result = regD - value;
2952:
2953: hd6301_reg_A = (result >> 8) & 0xff;
2954: hd6301_reg_B = result & 0xff;
2955:
2956: HD6301_CLR_NZVC;
2957: HD6301_SET_FLAGS16(regD, value, result);
2958: }
2959:
2960: /**
2961: * ANDA_DIR : and direct memory address value with accumulator A : A=A&M
2962: *
2963: * HINZVC
2964: * ..**0.
2965: */
2966: static void hd6301_anda_dir(void)
2967: {
2968: Uint16 addr;
2969:
2970: addr = hd6301_read_memory(hd6301_reg_PC+1);
2971: hd6301_reg_A &= hd6301_read_memory(addr);
2972:
2973: HD6301_CLR_NZV;
2974: HD6301_SET_NZ8(hd6301_reg_A);
2975: }
2976:
2977: /**
2978: * BITA_DIR : bit test direct memory address value with accumulator A : A&M
2979: *
2980: * HINZVC
2981: * ..**0.
2982: */
2983: static void hd6301_bita_dir(void)
2984: {
2985: Uint8 value;
2986: Uint16 addr;
2987:
2988: addr = hd6301_read_memory(hd6301_reg_PC+1);
2989: value = hd6301_reg_A & hd6301_read_memory(addr);
2990:
2991: HD6301_CLR_NZV;
2992: HD6301_SET_NZ8(value);
2993: }
2994:
2995: /**
2996: * LDAA_DIR : load accumulator A with direct memory address value : A=M
2997: *
2998: * HINZVC
2999: * ..**0.
3000: */
3001: static void hd6301_ldaa_dir(void)
3002: {
3003: Uint16 addr;
3004:
3005: addr = hd6301_read_memory(hd6301_reg_PC+1);
3006: hd6301_reg_A = hd6301_read_memory(addr);
3007:
3008: HD6301_CLR_NZV;
3009: HD6301_SET_NZ8(hd6301_reg_A);
3010: }
3011:
3012: /**
3013: * STAA_DIR : store accumulator A into direct memory address value : M=A
3014: *
3015: * HINZVC
3016: * ..**0.
3017: */
3018: static void hd6301_staa_dir(void)
3019: {
3020: Uint16 addr;
3021:
3022: addr = hd6301_read_memory(hd6301_reg_PC+1);
3023: hd6301_write_memory(addr, hd6301_reg_A);
3024:
3025: HD6301_CLR_NZV;
3026: HD6301_SET_NZ8(hd6301_reg_A);
3027: }
3028:
3029: /**
3030: * EORA_DIR : exclusive or direct memory address value with accumulator A : A=A^M
3031: *
3032: * HINZVC
3033: * ..**0.
3034: */
3035: static void hd6301_eora_dir(void)
3036: {
3037: Uint16 addr;
3038:
3039: addr = hd6301_read_memory(hd6301_reg_PC+1);
3040: hd6301_reg_A ^= hd6301_read_memory(addr);
3041:
3042: HD6301_CLR_NZV;
3043: HD6301_SET_NZ8(hd6301_reg_A);
3044: }
3045:
3046: /**
3047: * ADCA_DIR : add with carry direct memory address value to accumulator A : A=A+M+C
3048: *
3049: * HINZVC
3050: * *.****
3051: */
3052: static void hd6301_adca_dir(void)
3053: {
3054: Uint8 value, carry;
3055: Uint16 addr, result;
3056:
3057: carry = hd6301_REG_CCR_C & 1;
3058: addr = hd6301_read_memory(hd6301_reg_PC+1);
3059: value = hd6301_read_memory(addr);
3060: result = hd6301_reg_A + value + carry;
3061:
3062: HD6301_CLR_HNZVC;
3063: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3064: HD6301_SET_H(hd6301_reg_A, value, result);
3065:
3066: hd6301_reg_A = result;
3067: }
3068:
3069: /**
3070: * ORAA_DIR : inclusive or accumulator A with direct memory address value : A=A|M
3071: *
3072: * HINZVC
3073: * ..**0.
3074: */
3075: static void hd6301_oraa_dir(void)
3076: {
3077: Uint16 addr;
3078:
3079: addr = hd6301_read_memory(hd6301_reg_PC+1);
3080: hd6301_reg_A |= hd6301_read_memory(addr);
3081:
3082: HD6301_CLR_NZV;
3083: HD6301_SET_NZ8(hd6301_reg_A);
3084: }
3085:
3086: /**
3087: * ADDA_DIR : add direct memory address value with accumulator A : A=A+M
3088: *
3089: * HINZVC
3090: * *.****
3091: */
3092: static void hd6301_adda_dir(void)
3093: {
3094: Uint8 value;
3095: Uint16 addr, result;
3096:
3097: addr = hd6301_read_memory(hd6301_reg_PC+1);
3098: value = hd6301_read_memory(addr);
3099: result = hd6301_reg_A + value;
3100:
3101: HD6301_CLR_NZVC;
3102: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3103: HD6301_SET_H(hd6301_reg_A, value, result);
3104:
3105: hd6301_reg_A = result;
3106: }
3107:
3108: /**
3109: * CPX_DIR : compare index register with direct memory address value : X-MM
3110: *
3111: * HINZVC
3112: * ..****
3113: */
3114: static void hd6301_cpx_dir(void)
3115: {
3116: Uint16 addr, value;
3117: Uint32 result;
3118:
3119: addr = hd6301_read_memory(hd6301_reg_PC+1);
3120: value = hd6301_read_memory(addr) << 8;
3121: value += hd6301_read_memory(addr+1);
3122: result = hd6301_reg_X - value;
3123:
3124: HD6301_CLR_NZVC;
3125: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3126: }
3127:
3128: /**
3129: * JSR_DIR : jump to subroutine at direct memory address
3130: *
3131: * HINZVC
3132: * ......
3133: */
3134: static void hd6301_jsr_dir(void)
3135: {
3136: Uint16 addr;
3137:
3138: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3139: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3140:
3141: addr = hd6301_read_memory(hd6301_reg_PC + 1);
3142: hd6301_reg_PC += addr + 2;
3143: }
3144:
3145: /**
3146: * LDS_DIR : load stack pointer with direct memory address value : SP=MM
3147: *
3148: * HINZVC
3149: * ..**0.
3150: */
3151: static void hd6301_lds_dir(void)
3152: {
3153: Uint16 addr;
3154:
3155: addr = hd6301_read_memory(hd6301_reg_PC+1);
3156: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3157: hd6301_reg_SP += hd6301_read_memory(addr+1);
3158:
3159: HD6301_CLR_NZV;
3160: HD6301_SET_NZ16(hd6301_reg_SP);
3161: }
3162:
3163: /**
3164: * STS_DIR : store stack pointer into direct memory address value : MM=SP
3165: *
3166: * HINZVC
3167: * ..**0.
3168: */
3169: static void hd6301_sts_dir(void)
3170: {
3171: Uint16 addr;
3172:
3173: addr = hd6301_read_memory(hd6301_reg_PC+1);
3174: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3175: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3176:
3177: HD6301_CLR_NZV;
3178: HD6301_SET_NZ16(hd6301_reg_SP);
3179: }
3180:
3181: /**
1.1.1.2 root 3182: * SUBA_IND : subtract indexed memory address value from accumulator A : A=A-M
1.1 root 3183: *
3184: * HINZVC
3185: * ..****
3186: */
3187: static void hd6301_suba_ind(void)
3188: {
3189: Uint8 value;
3190: Uint16 result, addr;
3191:
3192: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3193: value = hd6301_read_memory(addr);
3194: result = hd6301_reg_A - value;
3195:
3196: HD6301_CLR_NZVC;
3197: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3198:
3199: hd6301_reg_A = result;
3200: }
3201:
3202: /**
3203: * CMPA_IND : compare indexed memory address value to accumulator A : A-M
3204: *
3205: * HINZVC
3206: * ..****
3207: */
3208: static void hd6301_cmpa_ind(void)
3209: {
3210: Uint8 value;
3211: Uint16 addr, result;
3212:
3213: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3214: value = hd6301_read_memory(addr);
3215: result = hd6301_reg_A - value;
3216:
3217: HD6301_CLR_NZVC;
3218: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3219: }
3220:
3221: /**
1.1.1.2 root 3222: * SBCA_IND : subtract with carry indexed memory address value from accumulator A : A=A-M-C
1.1 root 3223: *
3224: * HINZVC
3225: * ..****
3226: */
3227: static void hd6301_sbca_ind(void)
3228: {
3229: Uint8 value, carry;
3230: Uint16 addr, result;
3231:
3232: carry = hd6301_REG_CCR_C & 1;
3233: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3234: value = hd6301_read_memory(addr);
3235: result = hd6301_reg_A - value - carry;
3236:
3237: HD6301_CLR_NZVC;
3238: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3239:
3240: hd6301_reg_A = result;
3241: }
3242:
3243: /**
1.1.1.2 root 3244: * SUBD_IND : subtract indexed memory address value from accumulator D : D=D-MM
1.1 root 3245: *
3246: * HINZVC
3247: * ..****
3248: */
3249: static void hd6301_subd_ind(void)
3250: {
3251: Uint16 addr, value, regD;
3252: Uint32 result;
3253:
3254: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3255: value = hd6301_read_memory(addr) << 8;
3256: value += hd6301_read_memory(addr+1);
3257: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3258: result = regD - value;
3259:
3260: hd6301_reg_A = (result >> 8) & 0xff;
3261: hd6301_reg_B = result & 0xff;
3262:
3263: HD6301_CLR_NZVC;
3264: HD6301_SET_FLAGS16(regD, value, result);
3265: }
3266:
3267: /**
3268: * ANDA_IND : and indexed memory address value with accumulator A : A=A&M
3269: *
3270: * HINZVC
3271: * ..**0.
3272: */
3273: static void hd6301_anda_ind(void)
3274: {
3275: Uint16 addr;
3276:
3277: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3278: hd6301_reg_A &= hd6301_read_memory(addr);
3279:
3280: HD6301_CLR_NZV;
3281: HD6301_SET_NZ8(hd6301_reg_A);
3282: }
3283:
3284: /**
3285: * BITA_IND : bit test indexed memory address value with accumulator A : A&M
3286: *
3287: * HINZVC
3288: * ..**0.
3289: */
3290: static void hd6301_bita_ind(void)
3291: {
3292: Uint8 value;
3293: Uint16 addr;
3294:
3295: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3296: value = hd6301_reg_A & hd6301_read_memory(addr);
3297:
3298: HD6301_CLR_NZV;
3299: HD6301_SET_NZ8(value);
3300: }
3301:
3302: /**
3303: * LDAA_IND : load accumulator A with indexed memory address value : A=M
3304: *
3305: * HINZVC
3306: * ..**0.
3307: */
3308: static void hd6301_ldaa_ind(void)
3309: {
3310: Uint16 addr;
3311:
3312: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3313: hd6301_reg_A = hd6301_read_memory(addr);
3314:
3315: HD6301_CLR_NZV;
3316: HD6301_SET_NZ8(hd6301_reg_A);
3317: }
3318:
3319: /**
3320: * STAA_IND : store accumulator A into indexed memory address value : M=A
3321: *
3322: * HINZVC
3323: * ..**0.
3324: */
3325: static void hd6301_staa_ind(void)
3326: {
3327: Uint16 addr;
3328:
3329: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3330: hd6301_write_memory(addr, hd6301_reg_A);
3331:
3332: HD6301_CLR_NZV;
3333: HD6301_SET_NZ8(hd6301_reg_A);
3334: }
3335:
3336: /**
3337: * EORA_IND : exclusive or indexed memory address value with accumulator A : A=A^M
3338: *
3339: * HINZVC
3340: * ..**0.
3341: */
3342: static void hd6301_eora_ind(void)
3343: {
3344: Uint16 addr;
3345:
3346: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3347: hd6301_reg_A ^= hd6301_read_memory(addr);
3348:
3349: HD6301_CLR_NZV;
3350: HD6301_SET_NZ8(hd6301_reg_A);
3351: }
3352:
3353: /**
3354: * ADCA_IND : add with carry indexed memory address value to accumulator A : A=A+M+C
3355: *
3356: * HINZVC
3357: * *.****
3358: */
3359: static void hd6301_adca_ind(void)
3360: {
3361: Uint8 value, carry;
3362: Uint16 addr, result;
3363:
3364: carry = hd6301_REG_CCR_C & 1;
3365: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3366: value = hd6301_read_memory(addr);
3367: result = hd6301_reg_A + value + carry;
3368:
3369: HD6301_CLR_HNZVC;
3370: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3371: HD6301_SET_H(hd6301_reg_A, value, result);
3372:
3373: hd6301_reg_A = result;
3374: }
3375:
3376: /**
3377: * ORAA_IND : inclusive or accumulator A with indexed memory address value : A=A|M
3378: *
3379: * HINZVC
3380: * ..**0.
3381: */
3382: static void hd6301_oraa_ind(void)
3383: {
3384: Uint16 addr;
3385:
3386: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3387: hd6301_reg_A |= hd6301_read_memory(addr);
3388:
3389: HD6301_CLR_NZV;
3390: HD6301_SET_NZ8(hd6301_reg_A);
3391: }
3392:
3393: /**
3394: * ADDA_IND : add indexed memory address value with accumulator A : A=A+M
3395: *
3396: * HINZVC
3397: * *.****
3398: */
3399: static void hd6301_adda_ind(void)
3400: {
3401: Uint8 value;
3402: Uint16 addr, result;
3403:
3404: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3405: value = hd6301_read_memory(addr);
3406: result = hd6301_reg_A + value;
3407:
3408: HD6301_CLR_HNZVC;
3409: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3410: HD6301_SET_H(hd6301_reg_A, value, result);
3411:
3412: hd6301_reg_A = result;
3413: }
3414:
3415: /**
3416: * CPX_IND : compare index register with indexed memory address value : X-MM
3417: *
3418: * HINZVC
3419: * ..****
3420: */
3421: static void hd6301_cpx_ind(void)
3422: {
3423: Uint16 addr, value;
3424: Uint32 result;
3425:
3426: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3427: value = hd6301_read_memory(addr) << 8;
3428: value += hd6301_read_memory(addr+1);
3429: result = hd6301_reg_X - value;
3430:
3431: HD6301_CLR_NZVC;
3432: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3433: }
3434:
3435: /**
3436: * JSR_IND : jump to subroutine at indexed address
3437: *
3438: * HINZVC
3439: * ......
3440: */
3441: static void hd6301_jsr_ind(void)
3442: {
3443: Uint16 addr;
3444:
3445: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3446: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3447:
3448: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3449: hd6301_reg_PC += addr + 2;
3450: }
3451:
3452: /**
3453: * LDS_IND : load stack pointer with indexed memory address value : SP=MM
3454: *
3455: * HINZVC
3456: * ..**0.
3457: */
3458: static void hd6301_lds_ind(void)
3459: {
3460: Uint16 addr;
3461:
3462: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3463: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3464: hd6301_reg_SP += hd6301_read_memory(addr+1);
3465:
3466: HD6301_CLR_NZV;
3467: HD6301_SET_NZ16(hd6301_reg_SP);
3468: }
3469:
3470: /**
3471: * STS_IND : store stack pointer into indexed memory address value : MM=SP
3472: *
3473: * HINZVC
3474: * ..**0.
3475: */
3476: static void hd6301_sts_ind(void)
3477: {
3478: Uint16 addr;
3479:
3480: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3481: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3482: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3483:
3484: HD6301_CLR_NZV;
3485: HD6301_SET_NZ16(hd6301_reg_SP);
3486: }
3487:
3488: /**
1.1.1.2 root 3489: * SUBA_EXT : subtract extented memory address value from accumulator A : A=A-M
1.1 root 3490: *
3491: * HINZVC
3492: * ..****
3493: */
3494: static void hd6301_suba_ext(void)
3495: {
3496: Uint8 value;
3497: Uint16 result, addr;
3498:
3499: addr = hd6301_get_memory_ext();
3500: value = hd6301_read_memory(addr);
3501: result = hd6301_reg_A - value;
3502:
3503: HD6301_CLR_NZVC;
3504: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3505:
3506: hd6301_reg_A = result;
3507: }
3508:
3509: /**
3510: * CMPA_EXT : compare extented memory address value to accumulator A : A-M
3511: *
3512: * HINZVC
3513: * ..****
3514: */
3515: static void hd6301_cmpa_ext(void)
3516: {
3517: Uint8 value;
3518: Uint16 addr, result;
3519:
3520: addr = hd6301_get_memory_ext();
3521: value = hd6301_read_memory(addr);
3522: result = hd6301_reg_A - value;
3523:
3524: HD6301_CLR_NZVC;
3525: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3526: }
3527:
3528: /**
1.1.1.2 root 3529: * SBCA_EXT : subtract with carry extented memory address value from accumulator A : A=A-M-C
1.1 root 3530: *
3531: * HINZVC
3532: * ..****
3533: */
3534: static void hd6301_sbca_ext(void)
3535: {
3536: Uint8 value, carry;
3537: Uint16 addr, result;
3538:
3539: carry = hd6301_REG_CCR_C & 1;
3540: addr = hd6301_get_memory_ext();
3541: value = hd6301_read_memory(addr);
3542: result = hd6301_reg_A - value - carry;
3543:
3544: HD6301_CLR_NZVC;
3545: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3546:
3547: hd6301_reg_A = result;
3548: }
3549:
3550: /**
1.1.1.2 root 3551: * SUBD_EXT : subtract extented memory address value from accumulator D : D=D-MM
1.1 root 3552: *
3553: * HINZVC
3554: * ..****
3555: */
3556: static void hd6301_subd_ext(void)
3557: {
3558: Uint16 addr, value, regD;
3559: Uint32 result;
3560:
3561: addr = hd6301_get_memory_ext();
3562: value = hd6301_read_memory(addr) << 8;
3563: value += hd6301_read_memory(addr+1);
3564: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3565: result = regD - value;
3566:
3567: hd6301_reg_A = (result >> 8) & 0xff;
3568: hd6301_reg_B = result & 0xff;
3569:
3570: HD6301_CLR_NZVC;
3571: HD6301_SET_FLAGS16(regD, value, result);
3572: }
3573:
3574: /**
3575: * ANDA_EXT : and extented memory address value with accumulator A : A=A&M
3576: *
3577: * HINZVC
3578: * ..**0.
3579: */
3580: static void hd6301_anda_ext(void)
3581: {
3582: Uint16 addr;
3583:
3584: addr = hd6301_get_memory_ext();
3585: hd6301_reg_A &= hd6301_read_memory(addr);
3586:
3587: HD6301_CLR_NZV;
3588: HD6301_SET_NZ8(hd6301_reg_A);
3589: }
3590:
3591: /**
3592: * BITA_EXT : bit test extented memory address value with accumulator A : A&M
3593: *
3594: * HINZVC
3595: * ..**0.
3596: */
3597: static void hd6301_bita_ext(void)
3598: {
3599: Uint8 value;
3600: Uint16 addr;
3601:
3602: addr = hd6301_get_memory_ext();
3603: value = hd6301_reg_A & hd6301_read_memory(addr);
3604:
3605: HD6301_CLR_NZV;
3606: HD6301_SET_NZ8(value);
3607: }
3608:
3609: /**
3610: * LDAA_EXT : load accumulator A with extented memory address value : A=M
3611: *
3612: * HINZVC
3613: * ..**0.
3614: */
3615: static void hd6301_ldaa_ext(void)
3616: {
3617: Uint16 addr;
3618:
3619: addr = hd6301_get_memory_ext();
3620: hd6301_reg_A = hd6301_read_memory(addr);
3621:
3622: HD6301_CLR_NZV;
3623: HD6301_SET_NZ8(hd6301_reg_A);
3624: }
3625:
3626: /**
3627: * STAA_EXT : store accumulator A into extented memory address value : M=A
3628: *
3629: * HINZVC
3630: * ..**0.
3631: */
3632: static void hd6301_staa_ext(void)
3633: {
3634: Uint16 addr;
3635:
3636: addr = hd6301_get_memory_ext();
3637: hd6301_write_memory(addr, hd6301_reg_A);
3638:
3639: HD6301_CLR_NZV;
3640: HD6301_SET_NZ8(hd6301_reg_A);
3641: }
3642:
3643: /**
3644: * EORA_EXT : exclusive or extented memory address value with accumulator A : A=A^M
3645: *
3646: * HINZVC
3647: * ..**0.
3648: */
3649: static void hd6301_eora_ext(void)
3650: {
3651: Uint16 addr;
3652:
3653: addr = hd6301_get_memory_ext();
3654: hd6301_reg_A ^= hd6301_read_memory(addr);
3655:
3656: HD6301_CLR_NZV;
3657: HD6301_SET_NZ8(hd6301_reg_A);
3658: }
3659:
3660: /**
3661: * ADCA_EXT : add with carry extented memory address value to accumulator A : A=A+M+C
3662: *
3663: * HINZVC
3664: * *.****
3665: */
3666: static void hd6301_adca_ext(void)
3667: {
3668: Uint8 value, carry;
3669: Uint16 addr, result;
3670:
3671: carry = hd6301_REG_CCR_C & 1;
3672: addr = hd6301_get_memory_ext();
3673: value = hd6301_read_memory(addr);
3674: result = hd6301_reg_A + value + carry;
3675:
3676: HD6301_CLR_HNZVC;
3677: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3678: HD6301_SET_H(hd6301_reg_A, value, result);
3679:
3680: hd6301_reg_A = result;
3681: }
3682:
3683: /**
3684: * ORAA_EXT : inclusive or accumulator A with extented memory address value : A=A|M
3685: *
3686: * HINZVC
3687: * ..**0.
3688: */
3689: static void hd6301_oraa_ext(void)
3690: {
3691: Uint16 addr;
3692:
3693: addr = hd6301_get_memory_ext();
3694: hd6301_reg_A |= hd6301_read_memory(addr);
3695:
3696: HD6301_CLR_NZV;
3697: HD6301_SET_NZ8(hd6301_reg_A);
3698: }
3699:
3700: /**
3701: * ADDA_EXT : add extented memory address value with accumulator A : A=A+M
3702: *
3703: * HINZVC
3704: * *.****
3705: */
3706: static void hd6301_adda_ext(void)
3707: {
3708: Uint8 value;
3709: Uint16 addr, result;
3710:
3711: addr = hd6301_get_memory_ext();
3712: value = hd6301_read_memory(addr);
3713: result = hd6301_reg_A + value;
3714:
3715: HD6301_CLR_HNZVC;
3716: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3717: HD6301_SET_H(hd6301_reg_A, value, result);
3718:
3719: hd6301_reg_A = result;
3720: }
3721:
3722: /**
3723: * CPX_EXT : compare index register with extented memory address value : X-MM
3724: *
3725: * HINZVC
3726: * ..****
3727: */
3728: static void hd6301_cpx_ext(void)
3729: {
3730: Uint16 addr, value;
3731: Uint32 result;
3732:
3733: addr = hd6301_get_memory_ext();
3734: value = hd6301_read_memory(addr) << 8;
3735: value += hd6301_read_memory(addr+1);
3736: result = hd6301_reg_X - value;
3737:
3738: HD6301_CLR_NZVC;
3739: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3740: }
3741:
3742: /**
3743: * JSR_EXT : jump to subroutine at extented address
3744: *
3745: * HINZVC
3746: * ......
3747: */
3748: static void hd6301_jsr_ext(void)
3749: {
3750: Uint16 addr;
3751:
3752: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3753: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3754:
3755: addr = hd6301_get_memory_ext();
3756: hd6301_reg_PC += addr + 2;
3757: }
3758:
3759: /**
3760: * LDS_EXT : load stack pointer with extented memory address value : SP=MM
3761: *
3762: * HINZVC
3763: * ..**0.
3764: */
3765: static void hd6301_lds_ext(void)
3766: {
3767: Uint16 addr;
3768:
3769: addr = hd6301_get_memory_ext();
3770: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3771: hd6301_reg_SP += hd6301_read_memory(addr+1);
3772:
3773: HD6301_CLR_NZV;
3774: HD6301_SET_NZ16(hd6301_reg_SP);
3775: }
3776:
3777: /**
3778: * STS_EXT : store stack pointer into extented memory address value : MM=SP
3779: *
3780: * HINZVC
3781: * ..**0.
3782: */
3783: static void hd6301_sts_ext(void)
3784: {
3785: Uint16 addr;
3786:
3787: addr = hd6301_get_memory_ext();
3788: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3789: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3790:
3791: HD6301_CLR_NZV;
3792: HD6301_SET_NZ16(hd6301_reg_SP);
3793: }
3794:
3795: /**
1.1.1.2 root 3796: * SUBB_IMM : subtract immediate value from accumulator B : B=B-M
1.1 root 3797: *
3798: * HINZVC
3799: * ..****
3800: */
3801: static void hd6301_subb_imm(void)
3802: {
3803: Uint8 value;
3804: Uint16 result;
3805:
3806: value = hd6301_read_memory(hd6301_reg_PC+1);
3807: result = hd6301_reg_B - value;
3808:
3809: HD6301_CLR_NZVC;
3810: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3811:
3812: hd6301_reg_B = result;
3813: }
3814:
3815: /**
3816: * CMPB_IMM : compare immediate value to accumulator B : B-M
3817: *
3818: * HINZVC
3819: * ..****
3820: */
3821: static void hd6301_cmpb_imm(void)
3822: {
3823: Uint8 value;
3824: Uint16 result;
3825:
3826: value = hd6301_read_memory(hd6301_reg_PC+1);
3827: result = hd6301_reg_B - value;
3828:
3829: HD6301_CLR_NZVC;
3830: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3831: }
3832:
3833: /**
1.1.1.2 root 3834: * SBCB_IMM : subtract with carry immediate value from accumulator B : B=B-M-C
1.1 root 3835: *
3836: * HINZVC
3837: * ..****
3838: */
3839: static void hd6301_sbcb_imm(void)
3840: {
3841: Uint8 value, carry;
3842: Uint16 result;
3843:
3844: carry = hd6301_REG_CCR_C & 1;
3845: value = hd6301_read_memory(hd6301_reg_PC+1);
3846: result = hd6301_reg_B - value - carry;
3847:
3848: HD6301_CLR_NZVC;
3849: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3850:
3851: hd6301_reg_B = result;
3852: }
3853:
3854: /**
3855: * ADDD_IMM : add immediate value from accumulator D : D=D+MM
3856: *
3857: * HINZVC
3858: * ..****
3859: */
3860: static void hd6301_addd_imm(void)
3861: {
3862: Uint16 value, regD;
3863: Uint32 result;
3864:
3865: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
3866: value += hd6301_read_memory(hd6301_reg_PC+2);
3867: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3868: result = regD + value;
3869:
3870: hd6301_reg_A = (result >> 8) & 0xff;
3871: hd6301_reg_B = result & 0xff;
3872:
3873: HD6301_CLR_NZVC;
3874: HD6301_SET_FLAGS16(regD, value, result);
3875: }
3876:
3877: /**
3878: * ANDB_IMM : and immediate value with accumulator B : B=B&M
3879: *
3880: * HINZVC
3881: * ..**0.
3882: */
3883: static void hd6301_andb_imm(void)
3884: {
3885: hd6301_reg_B &= hd6301_read_memory(hd6301_reg_PC+1);
3886:
3887: HD6301_CLR_NZV;
3888: HD6301_SET_NZ8(hd6301_reg_B);
3889: }
3890:
3891: /**
3892: * BITB_IMM : bit test immediate value with accumulator B : B&M
3893: *
3894: * HINZVC
3895: * ..**0.
3896: */
3897: static void hd6301_bitb_imm(void)
3898: {
3899: Uint8 value;
3900:
3901: value = hd6301_reg_B & hd6301_read_memory(hd6301_reg_PC+1);
3902:
3903: HD6301_CLR_NZV;
3904: HD6301_SET_NZ8(value);
3905: }
3906:
3907: /**
3908: * LDAB_IMM : load accumulator B with immediate value : B=M
3909: *
3910: * HINZVC
3911: * ..**0.
3912: */
3913: static void hd6301_ldab_imm(void)
3914: {
3915: hd6301_reg_B = hd6301_read_memory(hd6301_reg_PC+1);
3916:
3917: HD6301_CLR_NZV;
3918: HD6301_SET_NZ8(hd6301_reg_B);
3919: }
3920:
3921: /**
3922: * EORB_IMM : exclusive or immediate value with accumulator B : B=B^M
3923: *
3924: * HINZVC
3925: * ..**0.
3926: */
3927: static void hd6301_eorb_imm(void)
3928: {
3929: hd6301_reg_B ^= hd6301_read_memory(hd6301_reg_PC+1);
3930:
3931: HD6301_CLR_NZV;
3932: HD6301_SET_NZ8(hd6301_reg_B);
3933: }
3934:
3935: /**
3936: * ADCB_IMM : add with carry immediate value to accumulator B : B=B+M+C
3937: *
3938: * HINZVC
3939: * *.****
3940: */
3941: static void hd6301_adcb_imm(void)
3942: {
3943: Uint8 value, carry;
3944: Uint16 result;
3945:
3946: carry = hd6301_REG_CCR_C & 1;
3947: value = hd6301_read_memory(hd6301_reg_PC+1);
3948: result = hd6301_reg_B + value + carry;
3949:
3950: HD6301_CLR_HNZVC;
3951: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3952: HD6301_SET_H(hd6301_reg_B, value, result);
3953:
3954: hd6301_reg_B = result;
3955: }
3956:
3957: /**
3958: * ORAB_IMM : inclusive or accumulator B with immediate value : B=B|M
3959: *
3960: * HINZVC
3961: * ..**0.
3962: */
3963: static void hd6301_orab_imm(void)
3964: {
3965: hd6301_reg_B |= hd6301_read_memory(hd6301_reg_PC+1);
3966:
3967: HD6301_CLR_NZV;
3968: HD6301_SET_NZ8(hd6301_reg_B);
3969: }
3970:
3971: /**
3972: * ADDB_IMM : add immediate value with accumulator B : B=B+M
3973: *
3974: * HINZVC
3975: * ..****
3976: */
3977: static void hd6301_addb_imm(void)
3978: {
3979: Uint8 value;
3980: Uint16 result;
3981:
3982: value = hd6301_read_memory(hd6301_reg_PC+1);
3983: result = hd6301_reg_B + value;
3984:
3985: HD6301_CLR_HNZVC;
3986: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3987: HD6301_SET_H(hd6301_reg_B, value, result);
3988:
3989: hd6301_reg_B = result;
3990: }
3991:
3992: /**
3993: * LDD_IMM : load accumulator D with immediate value : D=MM
3994: *
3995: * HINZVC
3996: * ..**0.
3997: */
3998: static void hd6301_ldd_imm(void)
3999: {
4000: hd6301_reg_A = hd6301_read_memory(hd6301_reg_PC+1);
4001: hd6301_reg_B = hd6301_read_memory(hd6301_reg_PC+2);
4002:
4003: HD6301_CLR_NZV;
4004: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4005: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4006: }
4007:
4008: /**
4009: * LDX_IMM : load register X with immediate value : X=MM
4010: *
4011: * HINZVC
4012: * ..**0.
4013: */
4014: static void hd6301_ldx_imm(void)
4015: {
4016: Uint16 value;
4017:
4018: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
4019: value += hd6301_read_memory(hd6301_reg_PC+2);
4020: hd6301_reg_X = value;
4021:
4022: HD6301_CLR_NZV;
4023: HD6301_SET_NZ16(hd6301_reg_X);
4024: }
4025:
4026: /**
1.1.1.2 root 4027: * SUBB_DIR : subtract direct memory address value from accumulator B : B=B-M
1.1 root 4028: *
4029: * HINZVC
4030: * ..****
4031: */
4032: static void hd6301_subb_dir(void)
4033: {
4034: Uint8 value;
4035: Uint16 result, addr;
4036:
4037: addr = hd6301_read_memory(hd6301_reg_PC+1);
4038: value = hd6301_read_memory(addr);
4039: result = hd6301_reg_B - value;
4040:
4041: HD6301_CLR_NZVC;
4042: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4043:
4044: hd6301_reg_B = result;
4045: }
4046:
4047: /**
4048: * CMPB_DIR : compare direct memory address value to accumulator B : B-M
4049: *
4050: * HINZVC
4051: * ..****
4052: */
4053: static void hd6301_cmpb_dir(void)
4054: {
4055: Uint8 value;
4056: Uint16 addr, result;
4057:
4058: addr = hd6301_read_memory(hd6301_reg_PC+1);
4059: value = hd6301_read_memory(addr);
4060: result = hd6301_reg_B - value;
4061:
4062: HD6301_CLR_NZVC;
4063: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4064: }
4065:
4066: /**
1.1.1.2 root 4067: * SBCB_DIR : subtract with carry direct memory address value from accumulator B : B=B-M-C
1.1 root 4068: *
4069: * HINZVC
4070: * ..****
4071: */
4072: static void hd6301_sbcb_dir(void)
4073: {
4074: Uint8 value, carry;
4075: Uint16 addr, result;
4076:
4077: carry = hd6301_REG_CCR_C & 1;
4078: addr = hd6301_read_memory(hd6301_reg_PC+1);
4079: value = hd6301_read_memory(addr);
4080: result = hd6301_reg_B - value - carry;
4081:
4082: HD6301_CLR_NZVC;
4083: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4084:
4085: hd6301_reg_B = result;
4086: }
4087:
4088: /**
4089: * ADDD_DIR : add direct memory address value from accumulator D : D=D+MM
4090: *
4091: * HINZVC
4092: * ..****
4093: */
4094: static void hd6301_addd_dir(void)
4095: {
4096: Uint16 addr, value, regD;
4097: Uint32 result;
4098:
4099: addr = hd6301_read_memory(hd6301_reg_PC+1);
4100: value = hd6301_read_memory(addr) << 8;
4101: value += hd6301_read_memory(addr+1);
4102: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4103: result = regD + value;
4104:
4105: hd6301_reg_A = (result >> 8) & 0xff;
4106: hd6301_reg_B = result & 0xff;
4107:
4108: HD6301_CLR_NZVC;
4109: HD6301_SET_FLAGS16(regD, value, result);
4110: }
4111:
4112: /**
4113: * ANDB_DIR : and direct memory address value with accumulator B : B=B&M
4114: *
4115: * HINZVC
4116: * ..**0.
4117: */
4118: static void hd6301_andb_dir(void)
4119: {
4120: Uint16 addr;
4121:
4122: addr = hd6301_read_memory(hd6301_reg_PC+1);
4123: hd6301_reg_B &= hd6301_read_memory(addr);
4124:
4125: HD6301_CLR_NZV;
4126: HD6301_SET_NZ8(hd6301_reg_B);
4127: }
4128:
4129: /**
4130: * BITB_DIR : bit test direct memory address value with accumulator B : B&M
4131: *
4132: * HINZVC
4133: * ..**0.
4134: */
4135: static void hd6301_bitb_dir(void)
4136: {
4137: Uint8 value;
4138: Uint16 addr;
4139:
4140: addr = hd6301_read_memory(hd6301_reg_PC+1);
4141: value = hd6301_reg_B & hd6301_read_memory(addr);
4142:
4143: HD6301_CLR_NZV;
4144: HD6301_SET_NZ8(value);
4145: }
4146:
4147: /**
4148: * LDAB_DIR : load accumulator B with direct memory address value : B=M
4149: *
4150: * HINZVC
4151: * ..**0.
4152: */
4153: static void hd6301_ldab_dir(void)
4154: {
4155: Uint16 addr;
4156:
4157: addr = hd6301_read_memory(hd6301_reg_PC+1);
4158: hd6301_reg_B = hd6301_read_memory(addr);
4159:
4160: HD6301_CLR_NZV;
4161: HD6301_SET_NZ8(hd6301_reg_B);
4162: }
4163:
4164: /**
4165: * STAB_DIR : store accumulator B into direct memory address value : M=B
4166: *
4167: * HINZVC
4168: * ..**0.
4169: */
4170: static void hd6301_stab_dir(void)
4171: {
4172: Uint16 addr;
4173:
4174: addr = hd6301_read_memory(hd6301_reg_PC+1);
4175: hd6301_write_memory(addr, hd6301_reg_B);
4176:
4177: HD6301_CLR_NZV;
4178: HD6301_SET_NZ8(hd6301_reg_B);
4179: }
4180:
4181: /**
4182: * EORB_DIR : exclusive or direct memory address value with accumulator B : B=B^M
4183: *
4184: * HINZVC
4185: * ..**0.
4186: */
4187: static void hd6301_eorb_dir(void)
4188: {
4189: Uint16 addr;
4190:
4191: addr = hd6301_read_memory(hd6301_reg_PC+1);
4192: hd6301_reg_B ^= hd6301_read_memory(addr);
4193:
4194: HD6301_CLR_NZV;
4195: HD6301_SET_NZ8(hd6301_reg_B);
4196: }
4197:
4198: /**
4199: * ADCB_DIR : add with carry direct memory address value to accumulator B : B=B+M+C
4200: *
4201: * HINZVC
4202: * *.****
4203: */
4204: static void hd6301_adcb_dir(void)
4205: {
4206: Uint8 value, carry;
4207: Uint16 addr, result;
4208:
4209: carry = hd6301_REG_CCR_C & 1;
4210: addr = hd6301_read_memory(hd6301_reg_PC+1);
4211: value = hd6301_read_memory(addr);
4212: result = hd6301_reg_B + value + carry;
4213:
4214: HD6301_CLR_HNZVC;
4215: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4216: HD6301_SET_H(hd6301_reg_B, value, result);
4217:
4218: hd6301_reg_B = result;
4219: }
4220:
4221: /**
4222: * ORAB_DIR : inclusive or accumulator B with direct memory address value : B=B|M
4223: *
4224: * HINZVC
4225: * ..**0.
4226: */
4227: static void hd6301_orab_dir(void)
4228: {
4229: Uint16 addr;
4230:
4231: addr = hd6301_read_memory(hd6301_reg_PC+1);
4232: hd6301_reg_B |= hd6301_read_memory(addr);
4233:
4234: HD6301_CLR_NZV;
4235: HD6301_SET_NZ8(hd6301_reg_B);
4236: }
4237:
4238: /**
4239: * ADDB_DIR : add direct memory address value with accumulator B : B=B+M
4240: *
4241: * HINZVC
4242: * *.****
4243: */
4244: static void hd6301_addb_dir(void)
4245: {
4246: Uint8 value;
4247: Uint16 addr, result;
4248:
4249: addr = hd6301_read_memory(hd6301_reg_PC+1);
4250: value = hd6301_read_memory(addr);
4251: result = hd6301_reg_B + value;
4252:
4253: HD6301_CLR_HNZVC;
4254: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4255: HD6301_SET_H(hd6301_reg_B, value, result);
4256:
4257: hd6301_reg_B = result;
4258: }
4259:
4260: /**
4261: * LDD_DIR : load accumulator D with direct memory address value : D=MM
4262: *
4263: * HINZVC
4264: * ..**0.
4265: */
4266: static void hd6301_ldd_dir(void)
4267: {
4268: Uint16 addr;
4269:
4270: addr = hd6301_read_memory(hd6301_reg_PC+1);
4271:
4272: hd6301_reg_A = hd6301_read_memory(addr);
4273: hd6301_reg_B = hd6301_read_memory(addr+1);
4274:
4275: HD6301_CLR_NZV;
4276: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4277: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4278: }
4279:
4280: /**
4281: * STD_DIR : store accumulator D into direct memory address value : MM=D
4282: *
4283: * HINZVC
4284: * ..**0.
4285: */
4286: static void hd6301_std_dir(void)
4287: {
4288: Uint16 addr;
4289:
4290: addr = hd6301_read_memory(hd6301_reg_PC+1);
4291:
4292: hd6301_write_memory(addr, hd6301_reg_A);
4293: hd6301_write_memory(addr+1, hd6301_reg_B);
4294:
4295: HD6301_CLR_NZV;
4296: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4297: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4298: }
4299:
4300: /**
4301: * LDX_DIR : load register X with direct memory address value : X=MM
4302: *
4303: * HINZVC
4304: * ..**0.
4305: */
4306: static void hd6301_ldx_dir(void)
4307: {
4308: Uint16 addr;
4309:
4310: addr = hd6301_read_memory(hd6301_reg_PC+1);
4311:
4312: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4313: hd6301_reg_X += hd6301_read_memory(addr+1);
4314:
4315: HD6301_CLR_NZV;
4316: HD6301_SET_NZ16(hd6301_reg_X);
4317: }
4318:
4319: /**
4320: * STX_DIR : store register X into direct memory address value : MM=X
4321: *
4322: * HINZVC
4323: * ..**0.
4324: */
4325: static void hd6301_stx_dir(void)
4326: {
4327: Uint16 addr;
4328:
4329: addr = hd6301_read_memory(hd6301_reg_PC+1);
4330:
4331: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4332: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4333:
4334: HD6301_CLR_NZV;
4335: HD6301_SET_NZ16(hd6301_reg_X);
4336: }
4337:
4338: /**
1.1.1.2 root 4339: * SUBB_IND : subtract indexed memory address value from accumulator B : B=B-M
1.1 root 4340: *
4341: * HINZVC
4342: * ..****
4343: */
4344: static void hd6301_subb_ind(void)
4345: {
4346: Uint8 value;
4347: Uint16 result, addr;
4348:
4349: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4350: value = hd6301_read_memory(addr);
4351: result = hd6301_reg_B - value;
4352:
4353: HD6301_CLR_NZVC;
4354: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4355:
4356: hd6301_reg_B = result;
4357: }
4358:
4359: /**
4360: * CMPB_IND : compare indexed memory address value to accumulator B : B-M
4361: *
4362: * HINZVC
4363: * ..****
4364: */
4365: static void hd6301_cmpb_ind(void)
4366: {
4367: Uint8 value;
4368: Uint16 addr, result;
4369:
4370: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4371: value = hd6301_read_memory(addr);
4372: result = hd6301_reg_B - value;
4373:
4374: HD6301_CLR_NZVC;
4375: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4376: }
4377:
4378: /**
1.1.1.2 root 4379: * SBCB_IND : subtract with carry indexed memory address value from accumulator B : B=B-M-C
1.1 root 4380: *
4381: * HINZVC
4382: * ..****
4383: */
4384: static void hd6301_sbcb_ind(void)
4385: {
4386: Uint8 value, carry;
4387: Uint16 addr, result;
4388:
4389: carry = hd6301_REG_CCR_C & 1;
4390: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4391: value = hd6301_read_memory(addr);
4392: result = hd6301_reg_B - value - carry;
4393:
4394: HD6301_CLR_NZVC;
4395: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4396:
4397: hd6301_reg_B = result;
4398: }
4399:
4400: /**
4401: * ADDD_IND : add indexed memory address value from accumulator D : D=D+MM
4402: *
4403: * HINZVC
4404: * ..****
4405: */
4406: static void hd6301_addd_ind(void)
4407: {
4408: Uint16 addr, value, regD;
4409: Uint32 result;
4410:
4411: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4412: value = hd6301_read_memory(addr) << 8;
4413: value += hd6301_read_memory(addr+1);
4414: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4415: result = regD + value;
4416:
4417: hd6301_reg_A = (result >> 8) & 0xff;
4418: hd6301_reg_B = result & 0xff;
4419:
4420: HD6301_CLR_NZVC;
4421: HD6301_SET_FLAGS16(regD, value, result);
4422: }
4423:
4424: /**
4425: * ANDB_IND : and indexed memory address value with accumulator B : B=B&M
4426: *
4427: * HINZVC
4428: * ..**0.
4429: */
4430: static void hd6301_andb_ind(void)
4431: {
4432: Uint16 addr;
4433:
4434: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4435: hd6301_reg_B &= hd6301_read_memory(addr);
4436:
4437: HD6301_CLR_NZV;
4438: HD6301_SET_NZ8(hd6301_reg_B);
4439: }
4440:
4441: /**
4442: * BITB_IND : bit test indexed memory address value with accumulator B : B&M
4443: *
4444: * HINZVC
4445: * ..**0.
4446: */
4447: static void hd6301_bitb_ind(void)
4448: {
4449: Uint8 value;
4450: Uint16 addr;
4451:
4452: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4453: value = hd6301_reg_B & hd6301_read_memory(addr);
4454:
4455: HD6301_CLR_NZV;
4456: HD6301_SET_NZ8(value);
4457: }
4458:
4459: /**
4460: * LDAB_IND : load accumulator B with indexed memory address value : B=M
4461: *
4462: * HINZVC
4463: * ..**0.
4464: */
4465: static void hd6301_ldab_ind(void)
4466: {
4467: Uint16 addr;
4468:
4469: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4470: hd6301_reg_B = hd6301_read_memory(addr);
4471:
4472: HD6301_CLR_NZV;
4473: HD6301_SET_NZ8(hd6301_reg_B);
4474: }
4475:
4476: /**
4477: * STAB_IND : store accumulator B into indexed memory address value : M=B
4478: *
4479: * HINZVC
4480: * ..**0.
4481: */
4482: static void hd6301_stab_ind(void)
4483: {
4484: Uint16 addr;
4485:
4486: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4487: hd6301_write_memory(addr, hd6301_reg_B);
4488:
4489: HD6301_CLR_NZV;
4490: HD6301_SET_NZ8(hd6301_reg_B);
4491: }
4492:
4493: /**
4494: * EORB_IND : exclusive or indexed memory address value with accumulator B : B=B^M
4495: *
4496: * HINZVC
4497: * ..**0.
4498: */
4499: static void hd6301_eorb_ind(void)
4500: {
4501: Uint16 addr;
4502:
4503: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4504: hd6301_reg_B ^= hd6301_read_memory(addr);
4505:
4506: HD6301_CLR_NZV;
4507: HD6301_SET_NZ8(hd6301_reg_B);
4508: }
4509:
4510: /**
4511: * ADCB_IND : add with carry indexed memory address value to accumulator B : B=B+M+C
4512: *
4513: * HINZVC
4514: * *.****
4515: */
4516: static void hd6301_adcb_ind(void)
4517: {
4518: Uint8 value, carry;
4519: Uint16 addr, result;
4520:
4521: carry = hd6301_REG_CCR_C & 1;
4522: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4523: value = hd6301_read_memory(addr);
4524: result = hd6301_reg_B + value + carry;
4525:
4526: HD6301_CLR_HNZVC;
4527: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4528: HD6301_SET_H(hd6301_reg_B, value, result);
4529:
4530: hd6301_reg_B = result;
4531: }
4532:
4533: /**
4534: * ORAB_IND : inclusive or accumulator B with indexed memory address value : B=B|M
4535: *
4536: * HINZVC
4537: * ..**0.
4538: */
4539: static void hd6301_orab_ind(void)
4540: {
4541: Uint16 addr;
4542:
4543: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4544: hd6301_reg_B |= hd6301_read_memory(addr);
4545:
4546: HD6301_CLR_NZV;
4547: HD6301_SET_NZ8(hd6301_reg_B);
4548: }
4549:
4550: /**
4551: * ADDB_IND : add indexed memory address value with accumulator B : B=B+M
4552: *
4553: * HINZVC
4554: * *.****
4555: */
4556: static void hd6301_addb_ind(void)
4557: {
4558: Uint8 value;
4559: Uint16 addr, result;
4560:
4561: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4562: value = hd6301_read_memory(addr);
4563: result = hd6301_reg_B + value;
4564:
4565: HD6301_CLR_HNZVC;
4566: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4567: HD6301_SET_H(hd6301_reg_B, value, result);
4568:
4569: hd6301_reg_B = result;
4570: }
4571:
4572: /**
4573: * LDD_IND : load accumulator D with indexed memory address value : D=MM
4574: *
4575: * HINZVC
4576: * ..**0.
4577: */
4578: static void hd6301_ldd_ind(void)
4579: {
4580: Uint16 addr;
4581:
4582: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4583:
4584: hd6301_reg_A = hd6301_read_memory(addr);
4585: hd6301_reg_B = hd6301_read_memory(addr+1);
4586:
4587: HD6301_CLR_NZV;
4588: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4589: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4590: }
4591:
4592: /**
4593: * STD_IND : store accumulator D into indexed memory address value : MM=D
4594: *
4595: * HINZVC
4596: * ..**0.
4597: */
4598: static void hd6301_std_ind(void)
4599: {
4600: Uint16 addr;
4601:
4602: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4603:
4604: hd6301_write_memory(addr, hd6301_reg_A);
4605: hd6301_write_memory(addr+1, hd6301_reg_B);
4606:
4607: HD6301_CLR_NZV;
4608: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4609: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4610: }
4611:
4612: /**
4613: * LDX_IND : load register X with indexed memory address value : X=MM
4614: *
4615: * HINZVC
4616: * ..**0.
4617: */
4618: static void hd6301_ldx_ind(void)
4619: {
4620: Uint16 addr;
4621:
4622: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4623:
4624: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4625: hd6301_reg_X += hd6301_read_memory(addr+1);
4626:
4627: HD6301_CLR_NZV;
4628: HD6301_SET_NZ16(hd6301_reg_X);
4629: }
4630:
4631: /**
4632: * STX_IND : store register X into indexed memory address value : MM=X
4633: *
4634: * HINZVC
4635: * ..**0.
4636: */
4637: static void hd6301_stx_ind(void)
4638: {
4639: Uint16 addr;
4640:
4641: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4642:
4643: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4644: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4645:
4646: HD6301_CLR_NZV;
4647: HD6301_SET_NZ16(hd6301_reg_X);
4648: }
4649:
4650: /**
1.1.1.2 root 4651: * SUBB_EXT : subtract extended memory address value from accumulator B : B=B-M
1.1 root 4652: *
4653: * HINZVC
4654: * ..****
4655: */
4656: static void hd6301_subb_ext(void)
4657: {
4658: Uint8 value;
4659: Uint16 result, addr;
4660:
4661: addr = hd6301_get_memory_ext();
4662: value = hd6301_read_memory(addr);
4663: result = hd6301_reg_B - value;
4664:
4665: HD6301_CLR_NZVC;
4666: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4667:
4668: hd6301_reg_B = result;
4669: }
4670:
4671: /**
4672: * CMPB_EXT : compare extended memory address value to accumulator B : B-M
4673: *
4674: * HINZVC
4675: * ..****
4676: */
4677: static void hd6301_cmpb_ext(void)
4678: {
4679: Uint8 value;
4680: Uint16 addr, result;
4681:
4682: addr = hd6301_get_memory_ext();
4683: value = hd6301_read_memory(addr);
4684: result = hd6301_reg_B - value;
4685:
4686: HD6301_CLR_NZVC;
4687: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4688: }
4689:
4690: /**
1.1.1.2 root 4691: * SBCB_EXT : subtract with carry extended memory address value from accumulator B : B=B-M-C
1.1 root 4692: *
4693: * HINZVC
4694: * ..****
4695: */
4696: static void hd6301_sbcb_ext(void)
4697: {
4698: Uint8 value, carry;
4699: Uint16 addr, result;
4700:
4701: carry = hd6301_REG_CCR_C & 1;
4702: addr = hd6301_get_memory_ext();
4703: value = hd6301_read_memory(addr);
4704: result = hd6301_reg_B - value - carry;
4705:
4706: HD6301_CLR_NZVC;
4707: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4708:
4709: hd6301_reg_B = result;
4710: }
4711:
4712: /**
4713: * ADDD_EXT : add extended memory address value from accumulator D : D=D+MM
4714: *
4715: * HINZVC
4716: * ..****
4717: */
4718: static void hd6301_addd_ext(void)
4719: {
4720: Uint16 addr, value, regD;
4721: Uint32 result;
4722:
4723: addr = hd6301_get_memory_ext();
4724: value = hd6301_read_memory(addr) << 8;
4725: value += hd6301_read_memory(addr+1);
4726: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4727: result = regD + value;
4728:
4729: hd6301_reg_A = (result >> 8) & 0xff;
4730: hd6301_reg_B = result & 0xff;
4731:
4732: HD6301_CLR_NZVC;
4733: HD6301_SET_FLAGS16(regD, value, result);
4734: }
4735:
4736: /**
4737: * ANDB_EXT : and extended memory address value with accumulator B : B=B&M
4738: *
4739: * HINZVC
4740: * ..**0.
4741: */
4742: static void hd6301_andb_ext(void)
4743: {
4744: Uint16 addr;
4745:
4746: addr = hd6301_get_memory_ext();
4747: hd6301_reg_B &= hd6301_read_memory(addr);
4748:
4749: HD6301_CLR_NZV;
4750: HD6301_SET_NZ8(hd6301_reg_B);
4751: }
4752:
4753: /**
4754: * BITB_EXT : bit test extended memory address value with accumulator B : B&M
4755: *
4756: * HINZVC
4757: * ..**0.
4758: */
4759: static void hd6301_bitb_ext(void)
4760: {
4761: Uint8 value;
4762: Uint16 addr;
4763:
4764: addr = hd6301_get_memory_ext();
4765: value = hd6301_reg_B & hd6301_read_memory(addr);
4766:
4767: HD6301_CLR_NZV;
4768: HD6301_SET_NZ8(value);
4769: }
4770:
4771: /**
4772: * LDAB_EXT : load accumulator B with extended memory address value : B=M
4773: *
4774: * HINZVC
4775: * ..**0.
4776: */
4777: static void hd6301_ldab_ext(void)
4778: {
4779: Uint16 addr;
4780:
4781: addr = hd6301_get_memory_ext();
4782: hd6301_reg_B = hd6301_read_memory(addr);
4783:
4784: HD6301_CLR_NZV;
4785: HD6301_SET_NZ8(hd6301_reg_B);
4786: }
4787:
4788: /**
4789: * STAB_EXT : store accumulator B into extended memory address value : M=B
4790: *
4791: * HINZVC
4792: * ..**0.
4793: */
4794: static void hd6301_stab_ext(void)
4795: {
4796: Uint16 addr;
4797:
4798: addr = hd6301_get_memory_ext();
4799: hd6301_write_memory(addr, hd6301_reg_B);
4800:
4801: HD6301_CLR_NZV;
4802: HD6301_SET_NZ8(hd6301_reg_B);
4803: }
4804:
4805: /**
4806: * EORB_EXT : exclusive or extended memory address value with accumulator B : B=B^M
4807: *
4808: * HINZVC
4809: * ..**0.
4810: */
4811: static void hd6301_eorb_ext(void)
4812: {
4813: Uint16 addr;
4814:
4815: addr = hd6301_get_memory_ext();
4816: hd6301_reg_B ^= hd6301_read_memory(addr);
4817:
4818: HD6301_CLR_NZV;
4819: HD6301_SET_NZ8(hd6301_reg_B);
4820: }
4821:
4822: /**
4823: * ADCB_EXT : add with carry extended memory address value to accumulator B : B=B+M+C
4824: *
4825: * HINZVC
4826: * *.****
4827: */
4828: static void hd6301_adcb_ext(void)
4829: {
4830: Uint8 value, carry;
4831: Uint16 addr, result;
4832:
4833: carry = hd6301_REG_CCR_C & 1;
4834: addr = hd6301_get_memory_ext();
4835: value = hd6301_read_memory(addr);
4836: result = hd6301_reg_B + value + carry;
4837:
4838: HD6301_CLR_HNZVC;
4839: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4840: HD6301_SET_H(hd6301_reg_B, value, result);
4841:
4842: hd6301_reg_B = result;
4843: }
4844:
4845: /**
4846: * ORAB_EXT : inclusive or accumulator B with extended memory address value : B=B|M
4847: *
4848: * HINZVC
4849: * ..**0.
4850: */
4851: static void hd6301_orab_ext(void)
4852: {
4853: Uint16 addr;
4854:
4855: addr = hd6301_get_memory_ext();
4856: hd6301_reg_B |= hd6301_read_memory(addr);
4857:
4858: HD6301_CLR_NZV;
4859: HD6301_SET_NZ8(hd6301_reg_B);
4860: }
4861:
4862: /**
4863: * ADDB_EXT : add extended memory address value with accumulator B : B=B+M
4864: *
4865: * HINZVC
4866: * *.****
4867: */
4868: static void hd6301_addb_ext(void)
4869: {
4870: Uint8 value;
4871: Uint16 addr, result;
4872:
4873: addr = hd6301_get_memory_ext();
4874: value = hd6301_read_memory(addr);
4875: result = hd6301_reg_B + value;
4876:
4877: HD6301_CLR_HNZVC;
4878: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4879: HD6301_SET_H(hd6301_reg_B, value, result);
4880:
4881: hd6301_reg_B = result;
4882: }
4883:
4884: /**
4885: * LDD_EXT : load accumulator D with extended memory address value : D=MM
4886: *
4887: * HINZVC
4888: * ..**0.
4889: */
4890: static void hd6301_ldd_ext(void)
4891: {
4892: Uint16 addr;
4893:
4894: addr = hd6301_get_memory_ext();
4895:
4896: hd6301_reg_A = hd6301_read_memory(addr);
4897: hd6301_reg_B = hd6301_read_memory(addr+1);
4898:
4899: HD6301_CLR_NZV;
4900: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4901: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4902: }
4903:
4904: /**
4905: * STD_EXT : store accumulator D into extended memory address value : MM=D
4906: *
4907: * HINZVC
4908: * ..**0.
4909: */
4910: static void hd6301_std_ext(void)
4911: {
4912: Uint16 addr;
4913:
4914: addr = hd6301_get_memory_ext();
4915:
4916: hd6301_write_memory(addr, hd6301_reg_A);
4917: hd6301_write_memory(addr+1, hd6301_reg_B);
4918:
4919: HD6301_CLR_NZV;
4920: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4921: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4922: }
4923:
4924: /**
4925: * LDX_EXT : load register X with extended memory address value : X=MM
4926: *
4927: * HINZVC
4928: * ..**0.
4929: */
4930: static void hd6301_ldx_ext(void)
4931: {
4932: Uint16 addr;
4933:
4934: addr = hd6301_get_memory_ext();
4935:
4936: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4937: hd6301_reg_X += hd6301_read_memory(addr+1);
4938:
4939: HD6301_CLR_NZV;
4940: HD6301_SET_NZ16(hd6301_reg_X);
4941: }
4942:
4943: /**
4944: * STX_EXT : store register X into extended memory address value : MM=X
4945: *
4946: * HINZVC
4947: * ..**0.
4948: */
4949: static void hd6301_stx_ext(void)
4950: {
4951: Uint16 addr;
4952:
4953: addr = hd6301_get_memory_ext();
4954:
4955: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4956: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4957:
4958: HD6301_CLR_NZV;
4959: HD6301_SET_NZ16(hd6301_reg_X);
4960: }
4961:
4962:
4963:
4964: /**
4965: * hd6301_disasm : disasm hd6301 memory
4966: */
4967: void hd6301_disasm(void)
4968: {
4969: switch(hd6301_opcode.op_disasm) {
4970: case HD6301_DISASM_UNDEFINED:
4971: sprintf(hd6301_str_instr, "0x%02x : unknown instruction", hd6301_cur_inst);
4972: break;
4973: case HD6301_DISASM_NONE:
4974: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, 0);
4975: break;
4976: case HD6301_DISASM_MEMORY8:
4977: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, hd6301_read_memory(hd6301_reg_PC+1));
4978: break;
4979: case HD6301_DISASM_MEMORY16:
4980: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, hd6301_get_memory_ext());
4981: break;
4982: case HD6301_DISASM_XIM:
4983: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic,
4984: hd6301_read_memory(hd6301_reg_PC+1),
4985: hd6301_read_memory(hd6301_reg_PC+2));
4986: break;
4987: }
4988:
4989: fprintf(stderr, "%02x: %s\n", hd6301_reg_PC, hd6301_str_instr);
4990:
4991: }
4992:
4993: /**
4994: * hd6301_display_registers : display hd6301 registers state
4995: */
4996: void hd6301_display_registers(void)
4997: {
4998: fprintf(stderr, "A: %02x B: %02x\n", hd6301_reg_A, hd6301_reg_B);
4999: fprintf(stderr, "X: %04x CCR: %02x\n", hd6301_reg_X, hd6301_reg_CCR);
5000: fprintf(stderr, "SP: %04x PC: %04x\n", hd6301_reg_SP, hd6301_reg_PC);
5001: }
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