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1.1 root 1: /*
2: Hatari - hd6301_cpu.c
3: Copyright Laurent Sallafranque 2009
4:
1.1.1.2 root 5: This file is distributed under the GNU General Public License, version 2
6: or at your option any later version. Read the file gpl.txt for details.
1.1 root 7:
8: hd6301_cpu.c - this is the cpu core emulation for hd 6301 processor
9: */
10:
1.1.1.4 ! root 11: #include "main.h"
1.1 root 12: #include "hd6301_cpu.h"
13:
14:
15: /**********************************
16: * Defines
17: **********************************/
18: #define HD6301_DISASM 1
19: #define HD6301_DISPLAY_REGS 1
20:
21: /* HD6301 Disasm and debug code */
22: #define HD6301_DISASM_UNDEFINED 0
23: #define HD6301_DISASM_NONE 1
24: #define HD6301_DISASM_MEMORY8 2
25: #define HD6301_DISASM_MEMORY16 3
26: #define HD6301_DISASM_XIM 4
27:
28: /* CCR bits for clearing */
29:
30: #define HD6301_CLR_HNZVC hd6301_reg_CCR &= 0xd0
31: #define HD6301_CLR_HNZC hd6301_reg_CCR &= 0xd2
32: #define HD6301_CLR_NZVC hd6301_reg_CCR &= 0xf0
33: #define HD6301_CLR_NZV hd6301_reg_CCR &= 0xf1
34: #define HD6301_CLR_NZC hd6301_reg_CCR &= 0xf2
35: #define HD6301_CLR_ZC hd6301_reg_CCR &= 0xfa
36: #define HD6301_CLR_I hd6301_reg_CCR &= 0xef
37: #define HD6301_CLR_Z hd6301_reg_CCR &= 0xfb
38: #define HD6301_CLR_V hd6301_reg_CCR &= 0xfd
39: #define HD6301_CLR_C hd6301_reg_CCR &= 0xfe
40:
41:
42: /**********************************
43: * macros for CCR processing
44: * adapted from mame project
45: **********************************/
46: #define HD6301_SET_Z8(a) hd6301_reg_CCR |= (((Uint8)(a) == 0) << 1)
47: #define HD6301_SET_Z16(a) hd6301_reg_CCR |= (((Uint16)(a) == 0) << 1)
48: #define HD6301_SET_N8(a) hd6301_reg_CCR |= (((a) & 0x80) >> 4)
49: #define HD6301_SET_N16(a) hd6301_reg_CCR |= (((a) & 0x8000) >> 12)
50: #define HD6301_SET_C8(a) hd6301_reg_CCR |= (((a) & 0x100) >> 8)
51: #define HD6301_SET_C16(a) hd6301_reg_CCR |= (((a) & 0x10000) >> 16)
52: #define HD6301_SET_V8(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)^((r)>>1)) & 0x80) >> 6)
53: #define HD6301_SET_V16(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)^((r)>>1)) & 0x8000) >> 14)
54: #define HD6301_SET_H(a,b,r) hd6301_reg_CCR |= ((((a)^(b)^(r)) & 0x10) << 1)
55:
56:
57: #define HD6301_SET_NZ8(a) {HD6301_SET_N8(a);HD6301_SET_Z8(a);}
58: #define HD6301_SET_NZ16(a) {HD6301_SET_N16(a);HD6301_SET_Z16(a);}
59: #define HD6301_SET_FLAGS8(a,b,r) {HD6301_SET_N8(r);HD6301_SET_Z8(r);HD6301_SET_V8(a,b,r);HD6301_SET_C8(r);}
60: #define HD6301_SET_FLAGS16(a,b,r) {HD6301_SET_N16(r);HD6301_SET_Z16(r);HD6301_SET_V16(a,b,r);HD6301_SET_C16(r);}
61:
62:
63: /**********************************
64: * Functions
65: **********************************/
66:
67: /* HD6301 internal functions */
68: static Uint8 hd6301_read_memory(Uint16 addr);
69: static void hd6301_write_memory (Uint16 addr, Uint8 value);
70: static Uint16 hd6301_get_memory_ext(void);
71:
72: /* HD6301 opcodes functions */
73: static void hd6301_undefined(void);
74: static void hd6301_nop(void);
75: static void hd6301_lsrd(void);
76: static void hd6301_asld(void);
77: static void hd6301_tap(void);
78: static void hd6301_tpa(void);
79: static void hd6301_inx(void);
80: static void hd6301_dex(void);
81: static void hd6301_clv(void);
82: static void hd6301_sev(void);
83: static void hd6301_clc(void);
84: static void hd6301_sec(void);
85: static void hd6301_cli(void);
86: static void hd6301_sei(void);
87: static void hd6301_sba(void);
88: static void hd6301_cba(void);
89: static void hd6301_tab(void);
90: static void hd6301_tba(void);
91: static void hd6301_xgdx(void);
92: static void hd6301_daa(void);
93: static void hd6301_slp(void);
94: static void hd6301_aba(void);
95: static void hd6301_bra(void);
96: static void hd6301_brn(void);
97: static void hd6301_bhi(void);
98: static void hd6301_bls(void);
99: static void hd6301_bcc(void);
100: static void hd6301_bcs(void);
101: static void hd6301_bne(void);
102: static void hd6301_beq(void);
103: static void hd6301_bvc(void);
104: static void hd6301_bvs(void);
105: static void hd6301_bpl(void);
106: static void hd6301_bmi(void);
107: static void hd6301_bge(void);
108: static void hd6301_blt(void);
109: static void hd6301_bgt(void);
110: static void hd6301_ble(void);
111: static void hd6301_tsx(void);
112: static void hd6301_ins(void);
113: static void hd6301_pula(void);
114: static void hd6301_pulb(void);
115: static void hd6301_des(void);
116: static void hd6301_txs(void);
117: static void hd6301_psha(void);
118: static void hd6301_pshb(void);
119: static void hd6301_pulx(void);
120: static void hd6301_rts(void);
121: static void hd6301_abx(void);
122: static void hd6301_rti(void);
123: static void hd6301_pshx(void);
124: static void hd6301_mul(void);
125: static void hd6301_wai(void);
126: static void hd6301_swi(void);
127: static void hd6301_nega(void);
128: static void hd6301_coma(void);
129: static void hd6301_lsra(void);
130: static void hd6301_rora(void);
131: static void hd6301_asra(void);
132: static void hd6301_asla(void);
133: static void hd6301_rola(void);
134: static void hd6301_deca(void);
135: static void hd6301_inca(void);
136: static void hd6301_tsta(void);
137: static void hd6301_clra(void);
138: static void hd6301_negb(void);
139: static void hd6301_comb(void);
140: static void hd6301_lsrb(void);
141: static void hd6301_rorb(void);
142: static void hd6301_asrb(void);
143: static void hd6301_aslb(void);
144: static void hd6301_rolb(void);
145: static void hd6301_decb(void);
146: static void hd6301_incb(void);
147: static void hd6301_tstb(void);
148: static void hd6301_clrb(void);
149: static void hd6301_neg_ind(void);
150: static void hd6301_aim_ind(void);
151: static void hd6301_oim_ind(void);
152: static void hd6301_com_ind(void);
153: static void hd6301_lsr_ind(void);
154: static void hd6301_eim_ind(void);
155: static void hd6301_ror_ind(void);
156: static void hd6301_asr_ind(void);
157: static void hd6301_asl_ind(void);
158: static void hd6301_rol_ind(void);
159: static void hd6301_dec_ind(void);
160: static void hd6301_tim_ind(void);
161: static void hd6301_inc_ind(void);
162: static void hd6301_tst_ind(void);
163: static void hd6301_jmp_ind(void);
164: static void hd6301_clr_ind(void);
165: static void hd6301_neg_ext(void);
166: static void hd6301_aim_dir(void);
167: static void hd6301_oim_dir(void);
168: static void hd6301_com_ext(void);
169: static void hd6301_lsr_ext(void);
170: static void hd6301_eim_dir(void);
171: static void hd6301_ror_ext(void);
172: static void hd6301_asr_ext(void);
173: static void hd6301_asl_ext(void);
174: static void hd6301_rol_ext(void);
175: static void hd6301_dec_ext(void);
176: static void hd6301_tim_dir(void);
177: static void hd6301_inc_ext(void);
178: static void hd6301_tst_ext(void);
179: static void hd6301_jmp_ext(void);
180: static void hd6301_clr_ext(void);
181: static void hd6301_suba_imm(void);
182: static void hd6301_cmpa_imm(void);
183: static void hd6301_sbca_imm(void);
184: static void hd6301_subd_imm(void);
185: static void hd6301_anda_imm(void);
186: static void hd6301_bita_imm(void);
187: static void hd6301_ldaa_imm(void);
188: static void hd6301_eora_imm(void);
189: static void hd6301_adca_imm(void);
190: static void hd6301_oraa_imm(void);
191: static void hd6301_adda_imm(void);
192: static void hd6301_cpx_imm(void);
193: static void hd6301_bsr(void);
194: static void hd6301_lds_imm(void);
195: static void hd6301_suba_dir(void);
196: static void hd6301_cmpa_dir(void);
197: static void hd6301_sbca_dir(void);
198: static void hd6301_subd_dir(void);
199: static void hd6301_anda_dir(void);
200: static void hd6301_bita_dir(void);
201: static void hd6301_ldaa_dir(void);
202: static void hd6301_staa_dir(void);
203: static void hd6301_eora_dir(void);
204: static void hd6301_adca_dir(void);
205: static void hd6301_oraa_dir(void);
206: static void hd6301_adda_dir(void);
207: static void hd6301_cpx_dir(void);
208: static void hd6301_jsr_dir(void);
209: static void hd6301_lds_dir(void);
210: static void hd6301_sts_dir(void);
211: static void hd6301_suba_ind(void);
212: static void hd6301_cmpa_ind(void);
213: static void hd6301_sbca_ind(void);
214: static void hd6301_subd_ind(void);
215: static void hd6301_anda_ind(void);
216: static void hd6301_bita_ind(void);
217: static void hd6301_ldaa_ind(void);
218: static void hd6301_staa_ind(void);
219: static void hd6301_eora_ind(void);
220: static void hd6301_adca_ind(void);
221: static void hd6301_oraa_ind(void);
222: static void hd6301_adda_ind(void);
223: static void hd6301_cpx_ind(void);
224: static void hd6301_jsr_ind(void);
225: static void hd6301_lds_ind(void);
226: static void hd6301_sts_ind(void);
227: static void hd6301_suba_ext(void);
228: static void hd6301_cmpa_ext(void);
229: static void hd6301_sbca_ext(void);
230: static void hd6301_subd_ext(void);
231: static void hd6301_anda_ext(void);
232: static void hd6301_bita_ext(void);
233: static void hd6301_ldaa_ext(void);
234: static void hd6301_staa_ext(void);
235: static void hd6301_eora_ext(void);
236: static void hd6301_adca_ext(void);
237: static void hd6301_oraa_ext(void);
238: static void hd6301_adda_ext(void);
239: static void hd6301_cpx_ext(void);
240: static void hd6301_jsr_ext(void);
241: static void hd6301_lds_ext(void);
242: static void hd6301_sts_ext(void);
243: static void hd6301_subb_imm(void);
244: static void hd6301_cmpb_imm(void);
245: static void hd6301_sbcb_imm(void);
246: static void hd6301_addd_imm(void);
247: static void hd6301_andb_imm(void);
248: static void hd6301_bitb_imm(void);
249: static void hd6301_ldab_imm(void);
250: static void hd6301_eorb_imm(void);
251: static void hd6301_adcb_imm(void);
252: static void hd6301_orab_imm(void);
253: static void hd6301_addb_imm(void);
254: static void hd6301_ldd_imm(void);
255: static void hd6301_ldx_imm(void);
256: static void hd6301_subb_dir(void);
257: static void hd6301_cmpb_dir(void);
258: static void hd6301_sbcb_dir(void);
259: static void hd6301_addd_dir(void);
260: static void hd6301_andb_dir(void);
261: static void hd6301_bitb_dir(void);
262: static void hd6301_ldab_dir(void);
263: static void hd6301_stab_dir(void);
264: static void hd6301_eorb_dir(void);
265: static void hd6301_adcb_dir(void);
266: static void hd6301_orab_dir(void);
267: static void hd6301_addb_dir(void);
268: static void hd6301_ldd_dir(void);
269: static void hd6301_std_dir(void);
270: static void hd6301_ldx_dir(void);
271: static void hd6301_stx_dir(void);
272: static void hd6301_subb_ind(void);
273: static void hd6301_cmpb_ind(void);
274: static void hd6301_sbcb_ind(void);
275: static void hd6301_addd_ind(void);
276: static void hd6301_andb_ind(void);
277: static void hd6301_bitb_ind(void);
278: static void hd6301_ldab_ind(void);
279: static void hd6301_stab_ind(void);
280: static void hd6301_eorb_ind(void);
281: static void hd6301_adcb_ind(void);
282: static void hd6301_orab_ind(void);
283: static void hd6301_addb_ind(void);
284: static void hd6301_ldd_ind(void);
285: static void hd6301_std_ind(void);
286: static void hd6301_ldx_ind(void);
287: static void hd6301_stx_ind(void);
288: static void hd6301_subb_ext(void);
289: static void hd6301_cmpb_ext(void);
290: static void hd6301_sbcb_ext(void);
291: static void hd6301_addd_ext(void);
292: static void hd6301_andb_ext(void);
293: static void hd6301_bitb_ext(void);
294: static void hd6301_ldab_ext(void);
295: static void hd6301_stab_ext(void);
296: static void hd6301_eorb_ext(void);
297: static void hd6301_adcb_ext(void);
298: static void hd6301_orab_ext(void);
299: static void hd6301_addb_ext(void);
300: static void hd6301_ldd_ext(void);
301: static void hd6301_std_ext(void);
302: static void hd6301_ldx_ext(void);
303: static void hd6301_stx_ext(void);
304:
305:
306: /**********************************
307: * Variables
308: **********************************/
309: static char hd6301_str_instr[50];
310:
311: static struct hd6301_opcode_t hd6301_opcode;
312:
313: static struct hd6301_opcode_t hd6301_opcode_table[256] = {
314:
315: {0x00, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
316: {0x01, 1, hd6301_nop, 1, "nop", HD6301_DISASM_NONE},
317: {0x02, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
318: {0x03, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
319: {0x04, 1, hd6301_lsrd, 1, "lsrd", HD6301_DISASM_NONE},
320: {0x05, 1, hd6301_asld, 1, "asld", HD6301_DISASM_NONE},
321: {0x06, 1, hd6301_tap, 1, "tap", HD6301_DISASM_NONE},
322: {0x07, 1, hd6301_tpa, 1, "tpa", HD6301_DISASM_NONE},
323: {0x08, 1, hd6301_inx, 1, "inx", HD6301_DISASM_NONE},
324: {0x09, 1, hd6301_dex, 1, "dex", HD6301_DISASM_NONE},
325: {0x0a, 1, hd6301_clv, 1, "clv", HD6301_DISASM_NONE},
326: {0x0b, 1, hd6301_sev, 1, "sev", HD6301_DISASM_NONE},
327: {0x0c, 1, hd6301_clc, 1, "clc", HD6301_DISASM_NONE},
328: {0x0d, 1, hd6301_sec, 1, "sec", HD6301_DISASM_NONE},
329: {0x0e, 1, hd6301_cli, 1, "cli", HD6301_DISASM_NONE},
330: {0x0f, 1, hd6301_sei, 1, "sei", HD6301_DISASM_NONE},
331:
332: {0x10, 1, hd6301_sba, 1, "sba", HD6301_DISASM_NONE},
333: {0x11, 1, hd6301_cba, 1, "cba", HD6301_DISASM_NONE},
334: {0x12, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
335: {0x13, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
336: {0x14, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
337: {0x15, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
338: {0x16, 1, hd6301_tab, 1, "tab", HD6301_DISASM_NONE},
339: {0x17, 1, hd6301_tba, 1, "tba", HD6301_DISASM_NONE},
340: {0x18, 1, hd6301_xgdx, 2, "xgdx", HD6301_DISASM_NONE},
341: {0x19, 1, hd6301_daa, 2, "daa", HD6301_DISASM_NONE},
342: {0x1a, 1, hd6301_slp, 4, "slp", HD6301_DISASM_NONE},
343: {0x1b, 1, hd6301_aba, 1, "aba", HD6301_DISASM_NONE},
344: {0x1c, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
345: {0x1d, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
346: {0x1e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
347: {0x1f, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
348:
349: {0x20, 0, hd6301_bra, 3, "bra $%02x", HD6301_DISASM_MEMORY8},
350: {0x21, 0, hd6301_brn, 3, "brn $%02x", HD6301_DISASM_MEMORY8},
351: {0x22, 0, hd6301_bhi, 3, "bhi $%02x", HD6301_DISASM_MEMORY8},
352: {0x23, 0, hd6301_bls, 3, "bls $%02x", HD6301_DISASM_MEMORY8},
353: {0x24, 0, hd6301_bcc, 3, "bcc $%02x", HD6301_DISASM_MEMORY8},
354: {0x25, 0, hd6301_bcs, 3, "bcs $%02x", HD6301_DISASM_MEMORY8},
355: {0x26, 0, hd6301_bne, 3, "bne $%02x", HD6301_DISASM_MEMORY8},
356: {0x27, 0, hd6301_beq, 3, "beq $%02x", HD6301_DISASM_MEMORY8},
357: {0x28, 0, hd6301_bvc, 3, "bvc $%02x", HD6301_DISASM_MEMORY8},
358: {0x29, 0, hd6301_bvs, 3, "bvs $%02x", HD6301_DISASM_MEMORY8},
359: {0x2a, 0, hd6301_bpl, 3, "bpl $%02x", HD6301_DISASM_MEMORY8},
360: {0x2b, 0, hd6301_bmi, 3, "bmi $%02x", HD6301_DISASM_MEMORY8},
361: {0x2c, 0, hd6301_bge, 3, "bge $%02x", HD6301_DISASM_MEMORY8},
362: {0x2d, 0, hd6301_blt, 3, "blt $%02x", HD6301_DISASM_MEMORY8},
363: {0x2e, 0, hd6301_bgt, 3, "bgt $%02x", HD6301_DISASM_MEMORY8},
364: {0x2f, 0, hd6301_ble, 3, "ble $%02x", HD6301_DISASM_MEMORY8},
365:
366: {0x30, 1, hd6301_tsx, 1, "tsx", HD6301_DISASM_NONE},
367: {0x31, 1, hd6301_ins, 1, "ins", HD6301_DISASM_NONE},
368: {0x32, 1, hd6301_pula, 3, "pula", HD6301_DISASM_NONE},
369: {0x33, 1, hd6301_pulb, 3, "pulb", HD6301_DISASM_NONE},
370: {0x34, 1, hd6301_des, 1, "des", HD6301_DISASM_NONE},
371: {0x35, 1, hd6301_txs, 1, "txs", HD6301_DISASM_NONE},
372: {0x36, 1, hd6301_psha, 4, "psha", HD6301_DISASM_NONE},
373: {0x37, 1, hd6301_pshb, 4, "pshb", HD6301_DISASM_NONE},
374: {0x38, 1, hd6301_pulx, 4, "pulx", HD6301_DISASM_NONE},
375: {0x39, 0, hd6301_rts, 5, "rts", HD6301_DISASM_NONE},
376: {0x3a, 1, hd6301_abx, 1, "abx", HD6301_DISASM_NONE},
377: {0x3b, 0, hd6301_rti, 10, "rti", HD6301_DISASM_NONE},
378: {0x3c, 1, hd6301_pshx, 5 , "pshx", HD6301_DISASM_NONE},
379: {0x3d, 1, hd6301_mul, 7, "mul", HD6301_DISASM_NONE},
380: {0x3e, 0, hd6301_wai, 9, "wai", HD6301_DISASM_NONE},
381: {0x3f, 0, hd6301_swi, 12, "swi", HD6301_DISASM_NONE},
382:
383: {0x40, 1, hd6301_nega, 1, "nega", HD6301_DISASM_NONE},
384: {0x41, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
385: {0x42, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
386: {0x43, 1, hd6301_coma, 1, "coma", HD6301_DISASM_NONE},
387: {0x44, 1, hd6301_lsra, 1, "lsra", HD6301_DISASM_NONE},
388: {0x45, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
389: {0x46, 1, hd6301_rora, 1, "rora", HD6301_DISASM_NONE},
390: {0x47, 1, hd6301_asra, 1, "asra", HD6301_DISASM_NONE},
391: {0x48, 1, hd6301_asla, 1, "lsla", HD6301_DISASM_NONE},
392: {0x49, 1, hd6301_rola, 1, "rola", HD6301_DISASM_NONE},
393: {0x4a, 1, hd6301_deca, 1, "deca", HD6301_DISASM_NONE},
394: {0x4b, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
395: {0x4c, 1, hd6301_inca, 1, "inca", HD6301_DISASM_NONE},
396: {0x4d, 1, hd6301_tsta, 1, "tsta", HD6301_DISASM_NONE},
397: {0x4e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
398: {0x4f, 1, hd6301_clra, 1, "clra", HD6301_DISASM_NONE},
399:
400: {0x50, 1, hd6301_negb, 1, "negb", HD6301_DISASM_NONE},
401: {0x51, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
402: {0x52, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
403: {0x53, 1, hd6301_comb, 1, "comb", HD6301_DISASM_NONE},
404: {0x54, 1, hd6301_lsrb, 1, "lsrb", HD6301_DISASM_NONE},
405: {0x55, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
406: {0x56, 1, hd6301_rorb, 1, "rorb", HD6301_DISASM_NONE},
407: {0x57, 1, hd6301_asrb, 1, "asrb", HD6301_DISASM_NONE},
408: {0x58, 1, hd6301_aslb, 1, "lslb", HD6301_DISASM_NONE},
409: {0x59, 1, hd6301_rolb, 1, "rolb", HD6301_DISASM_NONE},
410: {0x5a, 1, hd6301_decb, 1, "decb", HD6301_DISASM_NONE},
411: {0x5b, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
412: {0x5c, 1, hd6301_incb, 1, "incb", HD6301_DISASM_NONE},
413: {0x5d, 1, hd6301_tstb, 1, "tstb", HD6301_DISASM_NONE},
414: {0x5e, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
415: {0x5f, 1, hd6301_clrb, 1, "clrb", HD6301_DISASM_NONE},
416:
417: {0x60, 2, hd6301_neg_ind, 6, "neg $%02x,x", HD6301_DISASM_MEMORY8},
418: {0x61, 3, hd6301_aim_ind, 7, "aim #$%02x,$%02x x", HD6301_DISASM_XIM},
419: {0x62, 3, hd6301_oim_ind, 7, "oim #$%02x,$%02x x", HD6301_DISASM_XIM},
420: {0x63, 2, hd6301_com_ind, 6, "com $%02x,x", HD6301_DISASM_MEMORY8},
421: {0x64, 2, hd6301_lsr_ind, 6, "lsr $%02x,x", HD6301_DISASM_MEMORY8},
422: {0x65, 3, hd6301_eim_ind, 7, "eim #$%02x,$%02x x", HD6301_DISASM_XIM},
423: {0x66, 2, hd6301_ror_ind, 6, "ror $%02x,x", HD6301_DISASM_MEMORY8},
424: {0x67, 2, hd6301_asr_ind, 6, "asr $%02x,x", HD6301_DISASM_MEMORY8},
425: {0x68, 2, hd6301_asl_ind, 6, "lsl $%02x,x", HD6301_DISASM_MEMORY8},
426: {0x69, 2, hd6301_rol_ind, 6, "rol $%02x,x", HD6301_DISASM_MEMORY8},
427: {0x6a, 2, hd6301_dec_ind, 6, "dec $%02x,x", HD6301_DISASM_MEMORY8},
428: {0x6b, 3, hd6301_tim_ind, 5, "tim #$%02x,$%02x x", HD6301_DISASM_XIM},
429: {0x6c, 2, hd6301_inc_ind, 6, "inc $%02x,x", HD6301_DISASM_MEMORY8},
430: {0x6d, 2, hd6301_tst_ind, 4, "tst $%02x,x", HD6301_DISASM_MEMORY8},
431: {0x6e, 0, hd6301_jmp_ind, 3, "jmp $%02x,x", HD6301_DISASM_MEMORY8},
432: {0x6f, 2, hd6301_clr_ind, 5, "clr $%02x,x", HD6301_DISASM_MEMORY8},
433:
434: {0x70, 3, hd6301_neg_ext, 6, "neg $%04x", HD6301_DISASM_MEMORY16},
435: {0x71, 3, hd6301_aim_dir, 6, "aim #$%02x,$%02x", HD6301_DISASM_XIM},
436: {0x72, 3, hd6301_oim_dir, 6, "oim #$%02x,$%02x", HD6301_DISASM_XIM},
437: {0x73, 3, hd6301_com_ext, 6, "com $%04x", HD6301_DISASM_MEMORY16},
438: {0x74, 3, hd6301_lsr_ext, 6, "lsr $%04x", HD6301_DISASM_MEMORY16},
439: {0x75, 3, hd6301_eim_dir, 6, "eim #$%02x,$%02x", HD6301_DISASM_XIM},
440: {0x76, 3, hd6301_ror_ext, 6, "ror $%04x", HD6301_DISASM_MEMORY16},
441: {0x77, 3, hd6301_asr_ext, 6, "asr $%04x", HD6301_DISASM_MEMORY16},
442: {0x78, 3, hd6301_asl_ext, 6, "lsl $%04x", HD6301_DISASM_MEMORY16},
443: {0x79, 3, hd6301_rol_ext, 6, "rol $%04x", HD6301_DISASM_MEMORY16},
444: {0x7a, 3, hd6301_dec_ext, 6, "dec $%04x", HD6301_DISASM_MEMORY16},
445: {0x7b, 3, hd6301_tim_dir, 4, "tim #$%02x,$%02x", HD6301_DISASM_XIM},
446: {0x7c, 3, hd6301_inc_ext, 6, "inc $%04x", HD6301_DISASM_MEMORY16},
447: {0x7d, 3, hd6301_tst_ext, 4, "tst $%04x", HD6301_DISASM_MEMORY16},
448: {0x7e, 0, hd6301_jmp_ext, 3, "jmp $%04x", HD6301_DISASM_MEMORY16},
449: {0x7f, 3, hd6301_clr_ext, 5, "clr $%04x", HD6301_DISASM_MEMORY16},
450:
451: {0x80, 2, hd6301_suba_imm, 2, "suba #$%02x", HD6301_DISASM_MEMORY8},
452: {0x81, 2, hd6301_cmpa_imm, 2, "cmpa #$%02x", HD6301_DISASM_MEMORY8},
453: {0x82, 2, hd6301_sbca_imm, 2, "sbca #$%02x", HD6301_DISASM_MEMORY8},
454: {0x83, 3, hd6301_subd_imm, 3, "subd #$%04x", HD6301_DISASM_MEMORY16},
455: {0x84, 2, hd6301_anda_imm, 2, "anda #$%02x", HD6301_DISASM_MEMORY8},
456: {0x85, 2, hd6301_bita_imm, 2, "bita #$%02x", HD6301_DISASM_MEMORY8},
457: {0x86, 2, hd6301_ldaa_imm, 2, "ldaa #$%02x", HD6301_DISASM_MEMORY8},
458: {0x87, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
459: {0x88, 2, hd6301_eora_imm, 2, "eora #$%02x", HD6301_DISASM_MEMORY8},
460: {0x89, 2, hd6301_adca_imm, 2, "adca #$%02x", HD6301_DISASM_MEMORY8},
461: {0x8a, 2, hd6301_oraa_imm, 2, "oraa #$%02x", HD6301_DISASM_MEMORY8},
462: {0x8b, 2, hd6301_adda_imm, 2, "adda #$%02x", HD6301_DISASM_MEMORY8},
463: {0x8c, 3, hd6301_cpx_imm, 3, "cpx #$%04x", HD6301_DISASM_MEMORY16},
464: {0x8d, 0, hd6301_bsr, 5, "bsr $%02x", HD6301_DISASM_MEMORY8},
465: {0x8e, 3, hd6301_lds_imm, 3, "lds #$%04x", HD6301_DISASM_MEMORY16},
466: {0x8f, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
467:
468: {0x90, 2, hd6301_suba_dir, 3, "suba $%02x", HD6301_DISASM_MEMORY8},
469: {0x91, 2, hd6301_cmpa_dir, 3, "cmpa $%02x", HD6301_DISASM_MEMORY8},
470: {0x92, 2, hd6301_sbca_dir, 3, "sbca $%02x", HD6301_DISASM_MEMORY8},
471: {0x93, 2, hd6301_subd_dir, 4, "subd $%02x", HD6301_DISASM_MEMORY8},
472: {0x94, 2, hd6301_anda_dir, 3, "anda $%02x", HD6301_DISASM_MEMORY8},
473: {0x95, 2, hd6301_bita_dir, 3, "bita $%02x", HD6301_DISASM_MEMORY8},
474: {0x96, 2, hd6301_ldaa_dir, 3, "ldaa $%02x", HD6301_DISASM_MEMORY8},
475: {0x97, 2, hd6301_staa_dir, 3, "staa $%02x", HD6301_DISASM_MEMORY8},
476: {0x98, 2, hd6301_eora_dir, 3, "eora $%02x", HD6301_DISASM_MEMORY8},
477: {0x99, 2, hd6301_adca_dir, 3, "adca $%02x", HD6301_DISASM_MEMORY8},
478: {0x9a, 2, hd6301_oraa_dir, 3, "oraa $%02x", HD6301_DISASM_MEMORY8},
479: {0x9b, 2, hd6301_adda_dir, 3, "adda $%02x", HD6301_DISASM_MEMORY8},
480: {0x9c, 2, hd6301_cpx_dir, 4, "cpx $%02x", HD6301_DISASM_MEMORY8},
481: {0x9d, 0, hd6301_jsr_dir, 5, "jsr $%02x", HD6301_DISASM_MEMORY8},
482: {0x9e, 2, hd6301_lds_dir, 4, "lds $%02x", HD6301_DISASM_MEMORY8},
483: {0x9f, 2, hd6301_sts_dir, 4, "sts $%02x", HD6301_DISASM_MEMORY8},
484:
485: {0xa0, 2, hd6301_suba_ind, 4, "suba $%02x,x", HD6301_DISASM_MEMORY8},
486: {0xa1, 2, hd6301_cmpa_ind, 4, "cmpa $%02x,x", HD6301_DISASM_MEMORY8},
487: {0xa2, 2, hd6301_sbca_ind, 4, "sbca $%02x,x", HD6301_DISASM_MEMORY8},
488: {0xa3, 2, hd6301_subd_ind, 5, "subd $%02x,x", HD6301_DISASM_MEMORY8},
489: {0xa4, 2, hd6301_anda_ind, 4, "anda $%02x,x", HD6301_DISASM_MEMORY8},
490: {0xa5, 2, hd6301_bita_ind, 4, "bita $%02x,x", HD6301_DISASM_MEMORY8},
491: {0xa6, 2, hd6301_ldaa_ind, 4, "ldaa $%02x,x", HD6301_DISASM_MEMORY8},
492: {0xa7, 2, hd6301_staa_ind, 4, "staa $%02x,x", HD6301_DISASM_MEMORY8},
493: {0xa8, 2, hd6301_eora_ind, 4, "eora $%02x,x", HD6301_DISASM_MEMORY8},
494: {0xa9, 2, hd6301_adca_ind, 4, "adca $%02x,x", HD6301_DISASM_MEMORY8},
495: {0xaa, 2, hd6301_oraa_ind, 4, "oraa $%02x,x", HD6301_DISASM_MEMORY8},
496: {0xab, 2, hd6301_adda_ind, 4, "adda $%02x,x", HD6301_DISASM_MEMORY8},
497: {0xac, 2, hd6301_cpx_ind, 5, "cpx $%02x,x", HD6301_DISASM_MEMORY8},
498: {0xad, 0, hd6301_jsr_ind, 5, "jsr $%02x,x", HD6301_DISASM_MEMORY8},
499: {0xae, 2, hd6301_lds_ind, 5, "lds $%02x,x", HD6301_DISASM_MEMORY8},
500: {0xaf, 2, hd6301_sts_ind, 5, "sts $%02x,x", HD6301_DISASM_MEMORY8},
501:
502: {0xb0, 3, hd6301_suba_ext, 4, "suba $%04x", HD6301_DISASM_MEMORY16},
503: {0xb1, 3, hd6301_cmpa_ext, 4, "cmpa $%04x", HD6301_DISASM_MEMORY16},
504: {0xb2, 3, hd6301_sbca_ext, 4, "sbca $%04x", HD6301_DISASM_MEMORY16},
505: {0xb3, 3, hd6301_subd_ext, 5, "subd $%04x", HD6301_DISASM_MEMORY16},
506: {0xb4, 3, hd6301_anda_ext, 4, "anda $%04x", HD6301_DISASM_MEMORY16},
507: {0xb5, 3, hd6301_bita_ext, 4, "bita $%04x", HD6301_DISASM_MEMORY16},
508: {0xb6, 3, hd6301_ldaa_ext, 4, "ldaa $%04x", HD6301_DISASM_MEMORY16},
509: {0xb7, 3, hd6301_staa_ext, 4, "staa $%04x", HD6301_DISASM_MEMORY16},
510: {0xb8, 3, hd6301_eora_ext, 4, "eora $%04x", HD6301_DISASM_MEMORY16},
511: {0xb9, 3, hd6301_adca_ext, 4, "adca $%04x", HD6301_DISASM_MEMORY16},
512: {0xba, 3, hd6301_oraa_ext, 4, "oraa $%04x", HD6301_DISASM_MEMORY16},
513: {0xbb, 3, hd6301_adda_ext, 4, "adda $%04x", HD6301_DISASM_MEMORY16},
514: {0xbc, 3, hd6301_cpx_ext, 5, "cpx $%04x", HD6301_DISASM_MEMORY16},
515: {0xbd, 0, hd6301_jsr_ext, 6, "jsr $%04x", HD6301_DISASM_MEMORY16},
516: {0xbe, 3, hd6301_lds_ext, 5, "lds $%04x", HD6301_DISASM_MEMORY16},
517: {0xbf, 3, hd6301_sts_ext, 5, "sts $%04x", HD6301_DISASM_MEMORY16},
518:
519: {0xc0, 2, hd6301_subb_imm, 2, "subb #$%02x", HD6301_DISASM_MEMORY8},
520: {0xc1, 2, hd6301_cmpb_imm, 2, "cmpb #$%02x", HD6301_DISASM_MEMORY8},
521: {0xc2, 2, hd6301_sbcb_imm, 2, "sbcb #$%02x", HD6301_DISASM_MEMORY8},
522: {0xc3, 3, hd6301_addd_imm, 3, "addd #$%04x", HD6301_DISASM_MEMORY16},
523: {0xc4, 2, hd6301_andb_imm, 2, "andb #$%02x", HD6301_DISASM_MEMORY8},
524: {0xc5, 2, hd6301_bitb_imm, 2, "bitb #$%02x", HD6301_DISASM_MEMORY8},
525: {0xc6, 2, hd6301_ldab_imm, 2, "ldab #$%02x", HD6301_DISASM_MEMORY8},
526: {0xc7, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
527: {0xc8, 2, hd6301_eorb_imm, 2, "eorb #$%02x", HD6301_DISASM_MEMORY8},
528: {0xc9, 2, hd6301_adcb_imm, 2, "adcb #$%02x", HD6301_DISASM_MEMORY8},
529: {0xca, 2, hd6301_orab_imm, 2, "orab #$%02x", HD6301_DISASM_MEMORY8},
530: {0xcb, 2, hd6301_addb_imm, 2, "addb #$%02x", HD6301_DISASM_MEMORY8},
531: {0xcc, 3, hd6301_ldd_imm, 3, "ldd #$%04x", HD6301_DISASM_MEMORY16},
532: {0xcd, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
533: {0xce, 3, hd6301_ldx_imm, 3, "ldx #$%04x", HD6301_DISASM_MEMORY16},
534: {0xcf, 0, hd6301_undefined, 0, "", HD6301_DISASM_UNDEFINED},
535:
536: {0xd0, 2, hd6301_subb_dir, 3, "subb $%02x", HD6301_DISASM_MEMORY8},
537: {0xd1, 2, hd6301_cmpb_dir, 3, "cmpb $%02x", HD6301_DISASM_MEMORY8},
538: {0xd2, 2, hd6301_sbcb_dir, 3, "sbcb $%02x", HD6301_DISASM_MEMORY8},
539: {0xd3, 2, hd6301_addd_dir, 4, "addd $%02x", HD6301_DISASM_MEMORY8},
540: {0xd4, 2, hd6301_andb_dir, 3, "andb $%02x", HD6301_DISASM_MEMORY8},
541: {0xd5, 2, hd6301_bitb_dir, 3, "bitb $%02x", HD6301_DISASM_MEMORY8},
542: {0xd6, 2, hd6301_ldab_dir, 3, "ldab $%02x", HD6301_DISASM_MEMORY8},
543: {0xd7, 2, hd6301_stab_dir, 3, "stab $%02x", HD6301_DISASM_MEMORY8},
544: {0xd8, 2, hd6301_eorb_dir, 3, "eorb $%02x", HD6301_DISASM_MEMORY8},
545: {0xd9, 2, hd6301_adcb_dir, 3, "adcb $%02x", HD6301_DISASM_MEMORY8},
546: {0xda, 2, hd6301_orab_dir, 3, "orab $%02x", HD6301_DISASM_MEMORY8},
547: {0xdb, 2, hd6301_addb_dir, 3, "addb $%02x", HD6301_DISASM_MEMORY8},
548: {0xdc, 2, hd6301_ldd_dir, 4, "ldd $%02x", HD6301_DISASM_MEMORY8},
549: {0xdd, 2, hd6301_std_dir, 4, "std $%02x", HD6301_DISASM_MEMORY8},
550: {0xde, 2, hd6301_ldx_dir, 4, "ldx $%02x", HD6301_DISASM_MEMORY8},
551: {0xdf, 2, hd6301_stx_dir, 4, "stx $%02x", HD6301_DISASM_MEMORY8},
552:
553: {0xe0, 2, hd6301_subb_ind, 4, "subb $%02x,x", HD6301_DISASM_MEMORY8},
554: {0xe1, 2, hd6301_cmpb_ind, 4, "cmpb $%02x,x", HD6301_DISASM_MEMORY8},
555: {0xe2, 2, hd6301_sbcb_ind, 4, "sbcb $%02x,x", HD6301_DISASM_MEMORY8},
556: {0xe3, 2, hd6301_addd_ind, 5, "addd $%02x,x", HD6301_DISASM_MEMORY8},
557: {0xe4, 2, hd6301_andb_ind, 4, "andb $%02x,x", HD6301_DISASM_MEMORY8},
558: {0xe5, 2, hd6301_bitb_ind, 4, "bitb $%02x,x", HD6301_DISASM_MEMORY8},
559: {0xe6, 2, hd6301_ldab_ind, 4, "ldab $%02x,x", HD6301_DISASM_MEMORY8},
560: {0xe7, 2, hd6301_stab_ind, 4, "stab $%02x,x", HD6301_DISASM_MEMORY8},
561: {0xe8, 2, hd6301_eorb_ind, 4, "eorb $%02x,x", HD6301_DISASM_MEMORY8},
562: {0xe9, 2, hd6301_adcb_ind, 4, "adcb $%02x,x", HD6301_DISASM_MEMORY8},
563: {0xea, 2, hd6301_orab_ind, 4, "orab $%02x,x", HD6301_DISASM_MEMORY8},
564: {0xeb, 2, hd6301_addb_ind, 4, "addb $%02x,x", HD6301_DISASM_MEMORY8},
565: {0xec, 2, hd6301_ldd_ind, 5, "ldd $%02x,x", HD6301_DISASM_MEMORY8},
566: {0xed, 2, hd6301_std_ind, 5, "std $%02x,x", HD6301_DISASM_MEMORY8},
567: {0xee, 2, hd6301_ldx_ind, 5, "ldx $%02x,x", HD6301_DISASM_MEMORY8},
568: {0xef, 2, hd6301_stx_ind, 5, "stx $%02x,x", HD6301_DISASM_MEMORY8},
569:
570: {0xf0, 3, hd6301_subb_ext, 4, "subb $%04x", HD6301_DISASM_MEMORY16},
571: {0xf1, 3, hd6301_cmpb_ext, 4, "cmpb $%04x", HD6301_DISASM_MEMORY16},
572: {0xf2, 3, hd6301_sbcb_ext, 4, "sbcb $%04x", HD6301_DISASM_MEMORY16},
573: {0xf3, 3, hd6301_addd_ext, 5, "addd $%04x", HD6301_DISASM_MEMORY16},
574: {0xf4, 3, hd6301_andb_ext, 4, "andb $%04x", HD6301_DISASM_MEMORY16},
575: {0xf5, 3, hd6301_bitb_ext, 4, "bitb $%04x", HD6301_DISASM_MEMORY16},
576: {0xf6, 3, hd6301_ldab_ext, 4, "ldab $%04x", HD6301_DISASM_MEMORY16},
577: {0xf7, 3, hd6301_stab_ext, 4, "stab $%04x", HD6301_DISASM_MEMORY16},
578: {0xf8, 3, hd6301_eorb_ext, 4, "eorb $%04x", HD6301_DISASM_MEMORY16},
579: {0xf9, 3, hd6301_adcb_ext, 4, "adcb $%04x", HD6301_DISASM_MEMORY16},
580: {0xfa, 3, hd6301_orab_ext, 4, "orab $%04x", HD6301_DISASM_MEMORY16},
581: {0xfb, 3, hd6301_addb_ext, 4, "addb $%04x", HD6301_DISASM_MEMORY16},
582: {0xfc, 3, hd6301_ldd_ext, 5, "ldd $%04x", HD6301_DISASM_MEMORY16},
583: {0xfd, 3, hd6301_std_ext, 5, "std $%04x", HD6301_DISASM_MEMORY16},
584: {0xfe, 3, hd6301_ldx_ext, 5, "ldx $%04x", HD6301_DISASM_MEMORY16},
585: {0xff, 3, hd6301_stx_ext, 5, "stx $%04x", HD6301_DISASM_MEMORY16}
586: };
587:
588:
589: /* Variables */
590: static Uint8 hd6301_cycles;
591: static Uint8 hd6301_cur_inst;
592:
593: static Sint8 hd6301_reg_A;
594: static Sint8 hd6301_reg_B;
595: static Sint16 hd6301_reg_X;
596: static Uint16 hd6301_reg_SP;
597: static Uint16 hd6301_reg_PC;
598: static Uint8 hd6301_reg_CCR;
599:
600: //Uint8 hd6301_reg_RMCR;
601:
602: static Uint8 hd6301_intREG[32];
603: static Uint8 hd6301_intRAM[128];
604: static Uint8 hd6301_intROM[4096];
605:
606:
607: /**********************************
608: * Emulator kernel
609: **********************************/
610:
611: /**
612: * Initialise hd6301 cpu
613: */
614: void hd6301_init_cpu(void)
615: {
616: hd6301_reg_CCR = 0xc0;
617: }
618:
619: /**
620: * Execute 1 hd6301 instruction
621: */
622: void hd6301_execute_one_instruction(void)
623: {
624: hd6301_cur_inst = hd6301_read_memory(hd6301_reg_PC);
625:
626: /* Get opcode to execute */
627: hd6301_opcode = hd6301_opcode_table[hd6301_cur_inst];
628:
629: /* disasm opcode ? */
630: #ifdef HD6301_DISASM
631: hd6301_disasm();
632: #endif
633: /* execute opcode */
634: hd6301_opcode.op_func();
635:
636: #ifdef HD6301_DISPLAY_REGS
637: hd6301_display_registers();
638: #endif
639:
640: /* Increment instruction cycles */
641: hd6301_cycles += hd6301_opcode.op_n_cycles;
642:
643: /* Increment PC register */
644: hd6301_reg_PC += hd6301_opcode.op_bytes;
645:
646: /* post process interrupts */
647:
648: /* post process timers */
649:
650: /* post process SCI */
651: }
652:
653: /**
654: * Read hd6301 memory (Ram, Rom, Internal registers)
655: */
656: static Uint8 hd6301_read_memory(Uint16 addr)
657: {
658: /* Internal registers */
659: if (addr <= 0x1f) {
660: return hd6301_intREG[addr];
661: }
662:
663: /* Internal RAM */
664: if ((addr >= 0x80) && (addr <= 0xff)) {
665: return hd6301_intRAM[addr-0x80];
666: }
667:
668: /* Internal ROM */
669: if (addr >= 0xf000) {
670: return hd6301_intROM[addr-0xf000];
671: }
672:
673: fprintf(stderr, "hd6301: 0x%04x: 0x%04x illegal memory address\n", hd6301_reg_PC, addr);
674: exit(-1);
675: }
676:
677: /**
678: * Write hd6301 memory (Ram, Internal registers)
679: */
680: static void hd6301_write_memory (Uint16 addr, Uint8 value)
681: {
682: /* Internal registers */
683: if (addr <= 0x1f) {
684: hd6301_intREG[addr] = value;
685: }
686:
687: /* Internal RAM */
688: else if ((addr >= 0x80) && (addr <= 0xff)) {
689: hd6301_intRAM[addr-0x80] = value;
690: }
691:
692: /* Internal ROM */
693: else if (addr >= 0xf000) {
694: fprintf(stderr, "hd6301: 0x%04x: attempt to write to rom\n", addr);
695: }
696:
697: /* Illegal address */
698: else {
699: fprintf(stderr, "hd6301: 0x%04x: write to illegal address\n", addr);
700: exit(-1);
701: }
702: }
703:
704: /**
705: * Get extended memory (16 bits)
706: */
707: static Uint16 hd6301_get_memory_ext(void)
708: {
709: Uint16 addr;
710:
711: addr = hd6301_read_memory(hd6301_reg_PC+1)<<8;
712: addr += hd6301_read_memory(hd6301_reg_PC+2);
713: return addr;
714: }
715:
716: /**
717: * Undefined opcode
718: */
719: static void hd6301_undefined(void)
720: {
721: fprintf(stderr, "hd6301: 0x%04x: 0x%02x unknown instruction\n", hd6301_reg_PC, hd6301_cur_inst);
722: exit(-1); /* TODO: Trap the error correctly */
723: }
724:
725: /**
726: * NOP : no operation
727: *
728: * HINZVC
729: * ......
730: */
731: static void hd6301_nop(void)
732: {
733: }
734:
735: /**
736: * LSRD : logical Shift Right, accumulator D : D=D>>1
737: *
738: * HINZVC
739: * ..0***
740: */
741: static void hd6301_lsrd(void)
742: {
743: Uint16 regD;
744: Uint8 carry;
745:
746: regD = (hd6301_reg_A<<8) + hd6301_reg_B;
747: carry = regD & 1;
748: regD >>= 1;
749:
750: hd6301_reg_A = regD >> 8;
751: hd6301_reg_B = regD;
752:
753: HD6301_CLR_NZVC;
754: hd6301_reg_CCR |= carry;
755: HD6301_SET_Z16(regD);
756: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
757: }
758:
759: /**
760: * ASLD : arythmetic Shift left, accumulator D : D=D<<1
761: *
762: * HINZVC
763: * ..****
764: */
765: static void hd6301_asld(void)
766: {
767: Uint16 regD;
768: Uint8 carry, bitN;
769:
770: regD = (hd6301_reg_A<<8) + hd6301_reg_B;
771: carry = (regD >> 15) & 1;
772: regD <<= 1;
773:
774: hd6301_reg_A = regD >> 8;
775: hd6301_reg_B = regD;
776:
777: HD6301_CLR_NZVC;
778: hd6301_reg_CCR |= carry;
779: HD6301_SET_NZ16(regD);
780: bitN = (hd6301_reg_CCR & 0x8) >> 3;
781: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
782: }
783:
784:
785: /**
786: * TAP : transfer accumulator A into register CCR : CCR=A
787: *
788: * HINZVC
789: * ******
790: */
791: static void hd6301_tap(void)
792: {
793: hd6301_reg_CCR = hd6301_reg_A;
794: hd6301_reg_CCR |= 0xc0;
795: }
796:
797: /**
798: * TPA : transfer register CCR into accumulator A : A=CCR
799: *
800: * HINZVC
801: * ......
802: */
803: static void hd6301_tpa(void)
804: {
805: hd6301_reg_A = hd6301_reg_CCR;
806: }
807:
808: /**
809: * INX : increment register X : X=X+1
810: *
811: * HINZVC
812: * ...*..
813: */
814: static void hd6301_inx(void)
815: {
816: ++ hd6301_reg_X;
817:
818: HD6301_CLR_Z;
819: HD6301_SET_Z16(hd6301_reg_X);
820: }
821:
822: /**
823: * DEX : decrement register X : X=X-1
824: *
825: * HINZVC
826: * ...*..
827: */
828: static void hd6301_dex(void)
829: {
830: -- hd6301_reg_X;
831:
832: HD6301_CLR_Z;
833: HD6301_SET_Z16(hd6301_reg_X);
834: }
835:
836: /**
837: * CLV : clear register CCR bit V : V=0
838: *
839: * HINZVC
840: * ....0.
841: */
842: static void hd6301_clv(void)
843: {
844: HD6301_CLR_V;
845: }
846:
847: /**
848: * SEV : set register CCR bit V : V=1
849: *
850: * HINZVC
851: * ....1.
852: */
853: static void hd6301_sev(void)
854: {
855: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_V;
856: }
857:
858: /**
859: * CLC : clear register CCR bit C : C=0
860: *
861: * HINZVC
862: * .....0
863: */
864: static void hd6301_clc(void)
865: {
866: HD6301_CLR_C;
867: }
868:
869: /**
870: * SEC : set register CCR bit C : C=1
871: *
872: * HINZVC
873: * .....1
874: */
875: static void hd6301_sec(void)
876: {
877: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_C;
878: }
879:
880: /**
881: * CLI : clear register CCR bit I : I=0
882: *
883: * HINZVC
884: * .0....
885: */
886: static void hd6301_cli(void)
887: {
888: HD6301_CLR_I;
889: }
890:
891: /**
892: * SEI : set register CCR bit I : I=1
893: *
894: * HINZVC
895: * .1....
896: */
897: static void hd6301_sei(void)
898: {
899: hd6301_reg_CCR |= 1<<hd6301_REG_CCR_I;
900: }
901:
902: /**
1.1.1.2 root 903: * SBA : subtract accumulator B from accumulator A : A=A-B
1.1 root 904: *
905: * HINZVC
906: * ..****
907: */
908: static void hd6301_sba(void)
909: {
910: Uint16 result;
911:
912: result = hd6301_reg_A - hd6301_reg_B;
913:
914: HD6301_CLR_NZVC;
915: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
916:
917: hd6301_reg_A = result;
918: }
919:
920: /**
921: * CBA : compare accumulator A and accumulator B : A-B
922: *
923: * HINZVC
924: * ..****
925: */
926: static void hd6301_cba(void)
927: {
928: Uint16 result;
929:
930: result = hd6301_reg_A - hd6301_reg_B;
931:
932: HD6301_CLR_NZVC;
933: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
934: }
935:
936: /**
937: * TAB : transfer accumulator A into accumulator B : B=A
938: *
939: * HINZVC
940: * ..**0.
941: */
942: static void hd6301_tab(void)
943: {
944: hd6301_reg_B = hd6301_reg_A;
945:
946: HD6301_CLR_NZV;
947: HD6301_SET_NZ8(hd6301_reg_B);
948: }
949:
950: /**
951: * TBA : transfer accumulator B into accumulator A : A=B
952: *
953: * HINZVC
954: * ..**0.
955: */
956: static void hd6301_tba(void)
957: {
958: hd6301_reg_A = hd6301_reg_B;
959:
960: HD6301_CLR_NZV;
961: HD6301_SET_NZ8(hd6301_reg_A);
962: }
963:
964: /**
965: * XGDX : exchange register X and accumulator D : X<->D
966: *
967: * HINZVC
968: * ......
969: */
970: static void hd6301_xgdx(void)
971: {
972: Uint16 temp;
973:
974: temp = hd6301_reg_X;
975: hd6301_reg_X = (hd6301_reg_A << 8) + hd6301_reg_B;
976: hd6301_reg_A = temp >> 8;
977: hd6301_reg_B = temp;
978: }
979:
980: /**
981: * DAA : converts binary add of BCD characters into BCD format : A=BCD(A)
982: *
983: * HINZVC
984: * ..****
985: */
986: static void hd6301_daa(void)
987: {
988: /* Todo */
989: }
990:
991: /**
992: * SLP : sleep
993: *
994: * HINZVC
995: * ......
996: */
997: static void hd6301_slp(void)
998: {
999: /* Todo */
1000: }
1001:
1002: /**
1003: * ABA : add accumulator A and accumulator B into accumulator A : A=A+B
1004: *
1005: * HINZVC
1006: * *.****
1007: */
1008: static void hd6301_aba(void)
1009: {
1010: Uint16 result;
1011:
1012: result = hd6301_reg_A + hd6301_reg_B;
1013:
1014: HD6301_CLR_HNZVC;
1015: HD6301_SET_FLAGS8(hd6301_reg_A, hd6301_reg_B, result);
1016: HD6301_SET_H(hd6301_reg_A, hd6301_reg_B, result);
1017:
1018: hd6301_reg_A = result;
1019: }
1020:
1021: /**
1022: * BRA : branch always
1023: *
1024: * HINZVC
1025: * ......
1026: */
1027: static void hd6301_bra(void)
1028: {
1029: Sint8 addr;
1030:
1031: addr = hd6301_read_memory(hd6301_reg_PC + 1);
1032: hd6301_reg_PC += addr + 2;
1033: }
1034:
1035: /**
1036: * BRN : branch never
1037: *
1038: * HINZVC
1039: * ......
1040: */
1041: static void hd6301_brn(void)
1042: {
1043: hd6301_reg_PC += 2;
1044: }
1045:
1046: /**
1047: * BHI : branch if higher : C|Z=0
1048: *
1049: * HINZVC
1050: * ......
1051: */
1052: static void hd6301_bhi(void)
1053: {
1054: Sint8 addr;
1055: Uint8 bitC, bitZ;
1056:
1057: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1058: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1059: addr = 2;
1060: if ((bitC | bitZ) == 0) {
1061: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1062: }
1063: hd6301_reg_PC += addr;
1064: }
1065:
1066: /**
1067: * BLS : branch if lower or same : C|Z=1
1068: *
1069: * HINZVC
1070: * ......
1071: */
1072: static void hd6301_bls(void)
1073: {
1074: Sint8 addr;
1075: Uint8 bitC, bitZ;
1076:
1077: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1078: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1079: addr = 2;
1080: if ((bitC | bitZ) == 1) {
1081: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1082: }
1083: hd6301_reg_PC += addr;
1084: }
1085:
1086: /**
1087: * BCC : branch if carry clear : C=0
1088: *
1089: * HINZVC
1090: * ......
1091: */
1092: static void hd6301_bcc(void)
1093: {
1094: Sint8 addr;
1095: Uint8 bitC;
1096:
1097: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1098: addr = 2;
1099: if (bitC == 0) {
1100: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1101: }
1102: hd6301_reg_PC += addr;
1103: }
1104:
1105: /**
1106: * BCS : branch if carry set : C=1
1107: *
1108: * HINZVC
1109: * ......
1110: */
1111: static void hd6301_bcs(void)
1112: {
1113: Sint8 addr;
1114: Uint8 bitC;
1115:
1116: bitC = (hd6301_reg_CCR >> hd6301_REG_CCR_C) & 1;
1117: addr = 2;
1118: if (bitC == 1) {
1119: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1120: }
1121: hd6301_reg_PC += addr;
1122: }
1123:
1124: /**
1125: * BNE : branch if not equal 0 : Z=0
1126: *
1127: * HINZVC
1128: * ......
1129: */
1130: static void hd6301_bne(void)
1131: {
1132: Sint8 addr;
1133: Uint8 bitZ;
1134:
1135: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1136: addr = 2;
1137: if (bitZ == 0) {
1138: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1139: }
1140: hd6301_reg_PC += addr;
1141: }
1142:
1143: /**
1144: * BEQ : branch if equal 0 : Z=1
1145: *
1146: * HINZVC
1147: * ......
1148: */
1149: static void hd6301_beq(void)
1150: {
1151: Sint8 addr;
1152: Uint8 bitZ;
1153:
1154: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1155: addr = 2;
1156: if (bitZ == 1) {
1157: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1158: }
1159: hd6301_reg_PC += addr;
1160: }
1161:
1162: /**
1163: * BVC : branch if overflow clear : V=0
1164: *
1165: * HINZVC
1166: * ......
1167: */
1168: static void hd6301_bvc(void)
1169: {
1170: Sint8 addr;
1171: Uint8 bitV;
1172:
1173: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1174: addr = 2;
1175: if (bitV == 0) {
1176: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1177: }
1178: hd6301_reg_PC += addr;
1179: }
1180:
1181: /**
1182: * BVS : branch if overflow set : V=1
1183: *
1184: * HINZVC
1185: * ......
1186: */
1187: static void hd6301_bvs(void)
1188: {
1189: Sint8 addr;
1190: Uint8 bitV;
1191:
1192: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1193: addr = 2;
1194: if (bitV == 1) {
1195: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1196: }
1197: hd6301_reg_PC += addr;
1198: }
1199:
1200: /**
1201: * BPL : branch if plus : N=0
1202: *
1203: * HINZVC
1204: * ......
1205: */
1206: static void hd6301_bpl(void)
1207: {
1208: Sint8 addr;
1209: Uint8 bitN;
1210:
1211: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1212: addr = 2;
1213: if (bitN == 0) {
1214: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1215: }
1216: hd6301_reg_PC += addr;
1217: }
1218:
1219: /**
1220: * BMI : branch if minus : N=1
1221: *
1222: * HINZVC
1223: * ......
1224: */
1225: static void hd6301_bmi(void)
1226: {
1227: Sint8 addr;
1228: Uint8 bitN;
1229:
1230: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1231: addr = 2;
1232: if (bitN == 1) {
1233: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1234: }
1235: hd6301_reg_PC += addr;
1236: }
1237:
1238: /**
1239: * BGE : branch if greater or equal to zero : N^V=0
1240: *
1241: * HINZVC
1242: * ......
1243: */
1244: static void hd6301_bge(void)
1245: {
1246: Sint8 addr;
1247: Uint8 bitN, bitV;
1248:
1249: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1250: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1251: addr = 2;
1252: if ((bitN ^ bitV) == 0) {
1253: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1254: }
1255: hd6301_reg_PC += addr;
1256: }
1257:
1258: /**
1259: * BLT : branch if lower to zero : N^V=1
1260: *
1261: * HINZVC
1262: * ......
1263: */
1264: static void hd6301_blt(void)
1265: {
1266: Sint8 addr;
1267: Uint8 bitN, bitV;
1268:
1269: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1270: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1271: addr = 2;
1272: if ((bitN ^ bitV) == 1) {
1273: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1274: }
1275: hd6301_reg_PC += addr;
1276: }
1277:
1278: /**
1279: * BGT : branch if greater to zero : Z|(N^V)=0
1280: *
1281: * HINZVC
1282: * ......
1283: */
1284: static void hd6301_bgt(void)
1285: {
1286: Sint8 addr;
1287: Uint8 bitN, bitV, bitZ;
1288:
1289: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1290: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1291: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1292: addr = 2;
1293: if ((bitZ | (bitN ^ bitV)) == 0) {
1294: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1295: }
1296: hd6301_reg_PC += addr;
1297: }
1298:
1299: /**
1300: * BLE : branch if lower or equal to zero : Z|(N^V)=1
1301: *
1302: * HINZVC
1303: * ......
1304: */
1305: static void hd6301_ble(void)
1306: {
1307: Sint8 addr;
1308: Uint8 bitN, bitV, bitZ;
1309:
1310: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1311: bitV = (hd6301_reg_CCR >> hd6301_REG_CCR_V) & 1;
1312: bitZ = (hd6301_reg_CCR >> hd6301_REG_CCR_Z) & 1;
1313: addr = 2;
1314: if ((bitZ | (bitN ^ bitV)) == 1) {
1315: addr += hd6301_read_memory(hd6301_reg_PC + 1);
1316: }
1317: hd6301_reg_PC += addr;
1318: }
1319:
1320: /**
1321: * TSX : transfer stack pointer to register X : X=SP+1
1322: *
1323: * HINZVC
1324: * ......
1325: */
1326: static void hd6301_tsx(void)
1327: {
1328: hd6301_reg_X = hd6301_reg_SP + 1;
1329: }
1330:
1331: /**
1332: * INS : increment stack pointer : SP=SP+1
1333: *
1334: * HINZVC
1335: * ......
1336: */
1337: static void hd6301_ins(void)
1338: {
1339: ++ hd6301_reg_SP;
1340: }
1341:
1342: /**
1343: * PULA : pull accumulator A from stack : SP=SP+1 ; A=(SP)
1344: *
1345: * HINZVC
1346: * ......
1347: */
1348: static void hd6301_pula(void)
1349: {
1350: ++ hd6301_reg_SP;
1351: hd6301_reg_A = hd6301_read_memory(hd6301_reg_SP);
1352: }
1353:
1354: /**
1355: * PULB : pull accumulator B from stack : SP=SP+1 ; B=(SP)
1356: *
1357: * HINZVC
1358: * ......
1359: */
1360: static void hd6301_pulb(void)
1361: {
1362: ++ hd6301_reg_SP;
1363: hd6301_reg_B = hd6301_read_memory(hd6301_reg_SP);
1364: }
1365:
1366: /**
1367: * DES : decrement stack pointer : SP=SP-1
1368: *
1369: * HINZVC
1370: * ......
1371: */
1372: static void hd6301_des(void)
1373: {
1374: -- hd6301_reg_SP;
1375: }
1376:
1377: /**
1378: * TXS : transfer register X to stack pointer : SP=X-1
1379: *
1380: * HINZVC
1381: * ......
1382: */
1383: static void hd6301_txs(void)
1384: {
1385: hd6301_reg_SP = hd6301_reg_X - 1;
1386: }
1387:
1388: /**
1389: * PSHA : push accumulator A to stack : (SP)=A ; SP=SP-1
1390: *
1391: * HINZVC
1392: * ......
1393: */
1394: static void hd6301_psha(void)
1395: {
1396: hd6301_write_memory(hd6301_reg_SP, hd6301_reg_A);
1397: -- hd6301_reg_SP;
1398: }
1399:
1400: /**
1401: * PSHB : push accumulator B to stack : (SP)=B ; SP=SP-1
1402: *
1403: * HINZVC
1404: * ......
1405: */
1406: static void hd6301_pshb(void)
1407: {
1408: hd6301_write_memory(hd6301_reg_SP, hd6301_reg_B);
1409: -- hd6301_reg_SP;
1410: }
1411:
1412: /**
1413: * PULX : pull register X from stack : SP=SP+1 ; X=(SP)
1414: *
1415: * HINZVC
1416: * ......
1417: */
1418: static void hd6301_pulx(void)
1419: {
1420: hd6301_reg_X = hd6301_read_memory(++hd6301_reg_SP)<<8;
1421: hd6301_reg_X += hd6301_read_memory(++hd6301_reg_SP);
1422: }
1423:
1424: /**
1425: * RTS : return from subroutine
1426: *
1427: * HINZVC
1428: * ......
1429: */
1430: static void hd6301_rts(void)
1431: {
1432: hd6301_reg_PC = hd6301_read_memory(++hd6301_reg_SP)<<8;
1433: hd6301_reg_PC += hd6301_read_memory(++hd6301_reg_SP);
1434: }
1435:
1436: /**
1437: * ABX : add accumulator B to register X : X=X+B
1438: *
1439: * HINZVC
1440: * ......
1441: */
1442: static void hd6301_abx(void)
1443: {
1444: hd6301_reg_X += hd6301_reg_B;
1445: }
1446:
1447: /**
1448: * RTI : return from interrupt
1449: *
1450: * HINZVC
1451: * ******
1452: */
1453: static void hd6301_rti(void)
1454: {
1455: hd6301_reg_CCR = hd6301_read_memory(++hd6301_reg_SP);
1456: hd6301_reg_B = hd6301_read_memory(++hd6301_reg_SP);
1457: hd6301_reg_A = hd6301_read_memory(++hd6301_reg_SP);
1458: hd6301_reg_X = hd6301_read_memory(++hd6301_reg_SP)<<8;
1459: hd6301_reg_X += hd6301_read_memory(++hd6301_reg_SP);
1460: hd6301_reg_PC = hd6301_read_memory(++hd6301_reg_SP)<<8;
1461: hd6301_reg_PC += hd6301_read_memory(++hd6301_reg_SP);
1462: }
1463:
1464: /**
1465: * PSHX : push register X to stack : (SP)=X ; SP=SP-1
1466: *
1467: * HINZVC
1468: * ......
1469: */
1470: static void hd6301_pshx(void)
1471: {
1472: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X & 0xff);
1473: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X >> 8);
1474: }
1475:
1476: /**
1477: * MUL : multiply unsigned : D=A*B
1478: *
1479: * HINZVC
1480: * .....*
1481: */
1482: static void hd6301_mul(void)
1483: {
1484: Uint16 regD;
1485:
1486: regD = hd6301_reg_B * hd6301_reg_A;
1487: hd6301_reg_A = regD >> 8;
1488: hd6301_reg_B = regD;
1489:
1490: HD6301_CLR_C;
1491: hd6301_reg_CCR |= hd6301_reg_B >> 7;
1492: }
1493:
1494: /**
1495: * WAI : wait for interrupt
1496: *
1497: * HINZVC
1498: * .*....
1499: */
1500: static void hd6301_wai(void)
1501: {
1502: /* Todo */
1503: }
1504:
1505: /**
1506: * SWI : software interrupt
1507: *
1508: * HINZVC
1509: * .1....
1510: */
1511: static void hd6301_swi(void)
1512: {
1513: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC+1) & 0xff);
1514: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC+1) >> 8);
1515: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X & 0xff);
1516: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_X >> 8);
1517: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_A);
1518: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_B);
1519: hd6301_write_memory(hd6301_reg_SP--, hd6301_reg_CCR);
1520:
1521: hd6301_reg_PC = hd6301_read_memory(0xfffa) << 8;
1522: hd6301_reg_PC += hd6301_read_memory(0xfffb);
1523:
1524: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_I;
1525: }
1526:
1527: /**
1528: * NEGA : negate accumulator A : A=0-A
1529: *
1530: * HINZVC
1531: * ..****
1532: */
1533: static void hd6301_nega(void)
1534: {
1535: Uint8 value;
1536:
1537: value = 0 - hd6301_reg_A;
1538: hd6301_reg_A = value;
1539:
1540: HD6301_CLR_NZVC;
1541: HD6301_SET_NZ8(value);
1542: hd6301_reg_CCR |= (value != 0x0);
1543: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1544: }
1545:
1546: /**
1547: * COMA : complement 1 accumulator A : A=~A
1548: *
1549: * HINZVC
1550: * ..**01
1551: */
1552: static void hd6301_coma(void)
1553: {
1554: hd6301_reg_A = ~hd6301_reg_A;
1555:
1556: HD6301_CLR_NZV;
1557: hd6301_reg_CCR |= 1;
1558: HD6301_SET_NZ8(hd6301_reg_A);
1559: }
1560:
1561: /**
1562: * LSRA : logical shift right, accumulator A : A=A>>1
1563: *
1564: * HINZVC
1565: * ..0***
1566: */
1567: static void hd6301_lsra(void)
1568: {
1569: Uint8 carry;
1570:
1571: carry = hd6301_reg_A & 1;
1572: hd6301_reg_A >>= 1;
1573:
1574: HD6301_CLR_NZVC;
1575: hd6301_reg_CCR |= carry;
1576: HD6301_SET_Z8(hd6301_reg_A);
1577: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
1578: }
1579:
1580: /**
1581: * RORA : rotate right, accumulator A : A=A>>1 + carry<<8
1582: *
1583: * HINZVC
1584: * ..****
1585: */
1586: static void hd6301_rora(void)
1587: {
1588: Uint8 carry, result, bitN;
1589:
1590: carry = hd6301_reg_A & 1;
1591: result = (hd6301_reg_CCR & 1) << 7;
1592: result += hd6301_reg_A >> 1;
1593: hd6301_reg_A = result;
1594:
1595: HD6301_CLR_NZVC;
1596: hd6301_reg_CCR |= carry;
1597: HD6301_SET_NZ8(hd6301_reg_A);
1598: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1599: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1600: }
1601:
1602: /**
1603: * ASRA : arithmetic shift right, accumulator A : A=A>>1
1604: *
1605: * HINZVC
1606: * ..****
1607: */
1608: static void hd6301_asra(void)
1609: {
1610: Uint8 carry, bitN;
1611:
1612: carry = hd6301_reg_A & 1;
1613: hd6301_reg_A >>= 1;
1614: hd6301_reg_A |= (hd6301_reg_A & 0x40) << 1;
1615:
1616: HD6301_CLR_NZVC;
1617: hd6301_reg_CCR |= carry;
1618: HD6301_SET_NZ8(hd6301_reg_A);
1619: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1620: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1621: }
1622:
1623: /**
1624: * ASLA : arithmetic shift left, accumulator A : A=A<<1
1625: *
1626: * HINZVC
1627: * ..****
1628: */
1629: static void hd6301_asla(void)
1630: {
1631: Uint8 carry, bitN;
1632:
1633: carry = (hd6301_reg_A & 0X80) >> 7;
1634: hd6301_reg_A <<= 1;
1635:
1636: HD6301_CLR_NZVC;
1637: hd6301_reg_CCR |= carry;
1638: HD6301_SET_NZ8(hd6301_reg_A);
1639: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1640: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1641: }
1642:
1643: /**
1644: * ROLA : rotate left, accumulator A : A=A<<1 +C
1645: *
1646: * HINZVC
1647: * ..****
1648: */
1649: static void hd6301_rola(void)
1650: {
1651: Uint8 carry, result, bitN;
1652:
1653: carry = (hd6301_reg_A & 0x80) >> 7;
1654: result = hd6301_reg_CCR & 1;
1655: result += hd6301_reg_A << 1;
1656: hd6301_reg_A = result;
1657:
1658: HD6301_CLR_NZVC;
1659: hd6301_reg_CCR |= carry;
1660: HD6301_SET_NZ8(hd6301_reg_A);
1661: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1662: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1663: }
1664:
1665: /**
1666: * DECA : decrement accumulator A : A=A-1
1667: *
1668: * HINZVC
1669: * ..***.
1670: */
1671: static void hd6301_deca(void)
1672: {
1673: Uint8 overflow;
1674:
1675: overflow = (hd6301_reg_A == (Sint8)0x80) << hd6301_REG_CCR_V;
1676: -- hd6301_reg_A;
1677:
1678: HD6301_CLR_NZV;
1679: hd6301_reg_CCR |= overflow;
1680: HD6301_SET_NZ8(hd6301_reg_A);
1681: }
1682:
1683: /**
1684: * INCA : increment accumulator A : A=A+1
1685: *
1686: * HINZVC
1687: * ..***.
1688: */
1689: static void hd6301_inca(void)
1690: {
1691: Uint8 overflow;
1692:
1693: overflow = (hd6301_reg_A == 0x7f) << hd6301_REG_CCR_V;
1694: hd6301_reg_A ++;
1695:
1696: HD6301_CLR_NZV;
1697: hd6301_reg_CCR |= overflow;
1698: HD6301_SET_NZ8(hd6301_reg_A);
1699: }
1700:
1701: /**
1702: * TSTA : test zero or minus, accumulator A : A-0
1703: *
1704: * HINZVC
1705: * ..**00
1706: */
1707: static void hd6301_tsta(void)
1708: {
1709: HD6301_CLR_NZVC;
1710: HD6301_SET_NZ8(hd6301_reg_A);
1711: }
1712:
1713: /**
1714: * CLRA : clear accumulator A : A=0
1715: *
1716: * HINZVC
1717: * ..0100
1718: */
1719: static void hd6301_clra(void)
1720: {
1721: hd6301_reg_A = 0;
1722: HD6301_CLR_NZVC;
1723: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
1724: }
1725:
1726: /**
1727: * NEGB : negate accumulator B : B=0-B
1728: *
1729: * HINZVC
1730: * ..****
1731: */
1732: static void hd6301_negb(void)
1733: {
1734: Uint8 value;
1735:
1736: value = 0 - hd6301_reg_B;
1737: hd6301_reg_B = value;
1738:
1739: HD6301_CLR_NZVC;
1740: HD6301_SET_NZ8(value);
1741: hd6301_reg_CCR |= (value != 0x0);
1742: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1743: }
1744:
1745: /**
1746: * COMB : complement 1 accumulator B : B=~B
1747: *
1748: * HINZVC
1749: * ..**01
1750: */
1751: static void hd6301_comb(void)
1752: {
1753: hd6301_reg_B = ~hd6301_reg_B;
1754: HD6301_CLR_NZVC;
1755: hd6301_reg_CCR |= 1;
1756: HD6301_SET_NZ8(hd6301_reg_B);
1757: }
1758:
1759: /**
1760: * LSRB : logical shift right, accumulator B : B=B>>1
1761: *
1762: * HINZVC
1763: * ..0***
1764: */
1765: static void hd6301_lsrb(void)
1766: {
1767: Uint8 carry;
1768:
1769: carry = hd6301_reg_B & 1;
1770: hd6301_reg_B >>= 1;
1771:
1772: HD6301_CLR_NZVC;
1773: hd6301_reg_CCR |= carry;
1774: HD6301_SET_Z8(hd6301_reg_B);
1775: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
1776: }
1777:
1778: /**
1779: * RORB : rotate right, accumulator B : B=B>>1 + carry<<8
1780: *
1781: * HINZVC
1782: * ..****
1783: */
1784: static void hd6301_rorb(void)
1785: {
1786: Uint8 carry, result, bitN;
1787:
1788: carry = hd6301_reg_B & 1;
1789: result = (hd6301_reg_CCR & 1) << 7;
1790: result += hd6301_reg_B >> 1;
1791: hd6301_reg_B = result;
1792:
1793: HD6301_CLR_NZVC;
1794: hd6301_reg_CCR |= carry;
1795: HD6301_SET_NZ8(hd6301_reg_B);
1796: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1797: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1798: }
1799:
1800: /**
1801: * ASRB : arithmetic shift right, accumulator B : B=B>>1
1802: *
1803: * HINZVC
1804: * ..****
1805: */
1806: static void hd6301_asrb(void)
1807: {
1808: Uint8 carry, bitN;
1809:
1810: carry = hd6301_reg_B & 1;
1811: hd6301_reg_B >>= 1;
1812: hd6301_reg_B |= (hd6301_reg_B & 0x40) << 1;
1813:
1814: HD6301_CLR_NZVC;
1815: hd6301_reg_CCR |= carry;
1816: HD6301_SET_NZ8(hd6301_reg_B);
1817: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1818: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1819: }
1820:
1821: /**
1822: * ASLB : arithmetic shift left, accumulator B : B=B<<1
1823: *
1824: * HINZVC
1825: * ..****
1826: */
1827: static void hd6301_aslb(void)
1828: {
1829: Uint8 carry, bitN;
1830:
1831: carry = (hd6301_reg_B & 0x80) >> 7;
1832: hd6301_reg_B <<= 1;
1833:
1834: HD6301_CLR_NZVC;
1835: hd6301_reg_CCR |= carry;
1836: HD6301_SET_NZ8(hd6301_reg_B);
1837: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1838: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1839: }
1840:
1841: /**
1842: * ROLB : rotate left, accumulator B : B=B<<1 +C
1843: *
1844: * HINZVC
1845: * ..****
1846: */
1847: static void hd6301_rolb(void)
1848: {
1849: Uint8 carry, result, bitN;
1850:
1851: carry = (hd6301_reg_B & 0x80) >> 7;
1852: result = hd6301_reg_CCR & 1;
1853: result += hd6301_reg_B << 1;
1854: hd6301_reg_B = result;
1855:
1856: HD6301_CLR_NZVC;
1857: hd6301_reg_CCR |= carry;
1858: HD6301_SET_NZ8(hd6301_reg_B);
1859: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
1860: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
1861: }
1862:
1863: /**
1864: * DECB : decrement accumulator B : B=B-1
1865: *
1866: * HINZVC
1867: * ..***.
1868: */
1869: static void hd6301_decb(void)
1870: {
1871: Uint8 overflow;
1872:
1873: overflow = (hd6301_reg_B == (Sint8)0x80) << hd6301_REG_CCR_V;
1874: -- hd6301_reg_B;
1875:
1876: HD6301_CLR_NZV;
1877: hd6301_reg_CCR |= overflow;
1878: HD6301_SET_NZ8(hd6301_reg_B);
1879: }
1880:
1881: /**
1882: * INCB : increment accumulator B : B=B+1
1883: *
1884: * HINZVC
1885: * ..***.
1886: */
1887: static void hd6301_incb(void)
1888: {
1889: Uint8 overflow;
1890:
1891: overflow = (hd6301_reg_B == 0x7f) << hd6301_REG_CCR_V;
1892: hd6301_reg_B ++;
1893:
1894: HD6301_CLR_NZV;
1895: hd6301_reg_CCR |= overflow;
1896: HD6301_SET_NZ8(hd6301_reg_B);
1897: }
1898:
1899: /**
1900: * TSTB : test zero or minus, accumulator B : B-0
1901: *
1902: * HINZVC
1903: * ..**00
1904: */
1905: static void hd6301_tstb(void)
1906: {
1907: HD6301_CLR_NZVC;
1908: HD6301_SET_NZ8(hd6301_reg_B);
1909: }
1910:
1911: /**
1912: * CLRB : clear accumulator B : B=0
1913: *
1914: * HINZVC
1915: * ..0100
1916: */
1917: static void hd6301_clrb(void)
1918: {
1919: hd6301_reg_B = 0;
1920: HD6301_CLR_NZVC;
1921: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
1922: }
1923:
1924: /**
1925: * NEG_IND : negate indexed memory : M=0-M
1926: *
1927: * HINZVC
1928: * ..****
1929: */
1930: static void hd6301_neg_ind(void)
1931: {
1932: Uint8 value;
1933: Uint16 addr;
1934:
1935: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
1936: value = -hd6301_read_memory(addr);
1937: hd6301_write_memory(addr, value);
1938:
1939: HD6301_CLR_NZVC;
1940: hd6301_reg_CCR |= (value != 0x0);
1941: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
1942: HD6301_SET_NZ8(value);
1943: }
1944:
1945: /**
1946: * AIM_IND : and immediate indexed memory : M=M&IMM
1947: *
1948: * HINZVC
1949: * ..**0.
1950: */
1951: static void hd6301_aim_ind(void)
1952: {
1953: Uint8 value;
1954: Uint16 addr;
1955:
1956: value = hd6301_read_memory(hd6301_reg_PC+1);
1957: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
1958: value &= hd6301_read_memory(addr);
1959: hd6301_write_memory(addr, value);
1960:
1961: HD6301_CLR_NZV;
1962: HD6301_SET_NZ8(value);
1963: }
1964:
1965: /**
1966: * OIM_IND : or immediate indexed memory : M=M|IMM
1967: *
1968: * HINZVC
1969: * ..**0.
1970: */
1971: static void hd6301_oim_ind(void)
1972: {
1973: Uint8 value;
1974: Uint16 addr;
1975:
1976: value = hd6301_read_memory(hd6301_reg_PC+1);
1977: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
1978: value |= hd6301_read_memory(addr);
1979: hd6301_write_memory(addr, value);
1980:
1981: HD6301_CLR_NZV;
1982: HD6301_SET_NZ8(value);
1983: }
1984:
1985: /**
1986: * COM_IND : complement 1 indexed memory : M=~M
1987: *
1988: * HINZVC
1989: * ..**01
1990: */
1991: static void hd6301_com_ind(void)
1992: {
1993: Uint8 value;
1994: Uint16 addr;
1995:
1996: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
1997: value = ~hd6301_read_memory(addr);
1998: hd6301_write_memory(addr, value);
1999:
2000: HD6301_CLR_NZV;
2001: hd6301_reg_CCR |= 1;
2002: HD6301_SET_NZ8(value);
2003: }
2004:
2005: /**
2006: * LSR_IND : logical shift right indexed memory : M=M>>1
2007: *
2008: * HINZVC
2009: * ..0***
2010: */
2011: static void hd6301_lsr_ind(void)
2012: {
2013: Uint8 value, carry;
2014: Uint16 addr;
2015:
2016: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2017: value = hd6301_read_memory(addr);
2018:
2019: carry = value & 1;
2020: value >>= 1;
2021: hd6301_write_memory(addr, value);
2022:
2023: HD6301_CLR_NZVC;
2024: hd6301_reg_CCR |= carry;
2025: HD6301_SET_Z8(value);
2026: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
2027: }
2028:
2029: /**
2030: * EIM_IND : eor immediate indexed memory : M=M^IMM
2031: *
2032: * HINZVC
2033: * ..**0.
2034: */
2035: static void hd6301_eim_ind(void)
2036: {
2037: Uint8 value;
2038: Uint16 addr;
2039:
2040: value = hd6301_read_memory(hd6301_reg_PC+1);
2041: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
2042: value ^= hd6301_read_memory(addr);
2043: hd6301_write_memory(addr, value);
2044:
2045: HD6301_CLR_NZV;
2046: HD6301_SET_NZ8(value);
2047: }
2048:
2049: /**
2050: * ROR_IND : rotate right indexed memory : M=M>>1 + carry<<8
2051: *
2052: * HINZVC
2053: * ..****
2054: */
2055: static void hd6301_ror_ind(void)
2056: {
2057: Uint8 value, carry, result, bitN;
2058: Uint16 addr;
2059:
2060: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2061: value = hd6301_read_memory(addr);
2062:
2063: carry = value & 1;
2064: result = (hd6301_reg_CCR & 1) << 7;
2065: result += value >> 1;
2066: hd6301_write_memory(addr, result);
2067:
2068: HD6301_CLR_NZVC;
2069: hd6301_reg_CCR |= carry;
2070: HD6301_SET_NZ8(result);
2071: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2072: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2073: }
2074:
2075: /**
2076: * ASR_IND : arithmetic shift right indexed memory : M=M>>1
2077: *
2078: * HINZVC
2079: * ..****
2080: */
2081: static void hd6301_asr_ind(void)
2082: {
2083: Uint8 value, carry, bitN;
2084: Uint16 addr;
2085:
2086: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2087: value = hd6301_read_memory(addr);
2088:
2089: carry = value & 1;
2090: value >>= 1;
2091: value |= (value & 0x40) << 1;
2092: hd6301_write_memory(addr, value);
2093:
2094: HD6301_CLR_NZVC;
2095: hd6301_reg_CCR |= carry;
2096: HD6301_SET_NZ8(value);
2097: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2098: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2099: }
2100:
2101: /**
2102: * ASL_IND : arithmetic shift left indexed memory : M=M<<1
2103: *
2104: * HINZVC
2105: * ..****
2106: */
2107: static void hd6301_asl_ind(void)
2108: {
2109: Uint8 value, carry, bitN;
2110: Uint16 addr;
2111:
2112: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2113: value = hd6301_read_memory(addr);
2114:
2115: carry = (value & 0X80) >> 7;
2116: value <<= 1;
2117: hd6301_write_memory(addr, value);
2118:
2119: HD6301_CLR_NZVC;
2120: hd6301_reg_CCR |= carry;
2121: HD6301_SET_NZ8(value);
2122: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2123: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2124: }
2125:
2126: /**
2127: * ROL_IND : rotate left indexed memory : M=M<<1 + carry
2128: *
2129: * HINZVC
2130: * ..****
2131: */
2132: static void hd6301_rol_ind(void)
2133: {
2134: Uint8 value, carry, result, bitN;
2135: Uint16 addr;
2136:
2137: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2138: value = hd6301_read_memory(addr);
2139:
2140: result = hd6301_reg_CCR & 1;
2141: carry = (value & 0x80) >> 7;
2142: result += value << 1;
2143: hd6301_write_memory(addr, result);
2144:
2145: HD6301_CLR_NZVC;
2146: hd6301_reg_CCR |= carry;
2147: HD6301_SET_NZ8(result);
2148: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2149: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2150: }
2151:
2152: /**
2153: * DEC_IND : decrement indexed memory : M=M-1
2154: *
2155: * HINZVC
2156: * ..***.
2157: */
2158: static void hd6301_dec_ind(void)
2159: {
2160: Uint8 value, overflow;
2161: Uint16 addr;
2162:
2163: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2164: value = hd6301_read_memory(addr);
2165:
2166: overflow = (value == 0x80) << hd6301_REG_CCR_V;
2167: --value;
2168: hd6301_write_memory(addr, value);
2169:
2170: HD6301_CLR_NZV;
2171: hd6301_reg_CCR |= overflow;
2172: HD6301_SET_NZ8(value);
2173: }
2174:
2175: /**
2176: * TIM_IND : test immediate indexed memory : M&IMM
2177: *
2178: * HINZVC
2179: * ..**0.
2180: */
2181: static void hd6301_tim_ind(void)
2182: {
2183: Uint8 value;
2184: Uint16 addr;
2185:
2186: value = hd6301_read_memory(hd6301_reg_PC+1);
2187: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+2);
2188: value &= hd6301_read_memory(addr);
2189: hd6301_write_memory(addr, value);
2190:
2191: HD6301_CLR_NZV;
2192: HD6301_SET_NZ8(value);
2193: }
2194:
2195: /**
2196: * INC_IND : increment indexed memory : M=M+1
2197: *
2198: * HINZVC
2199: * ..***.
2200: */
2201: static void hd6301_inc_ind(void)
2202: {
2203: Uint8 value, overflow;
2204: Uint16 addr;
2205:
2206: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2207: value = hd6301_read_memory(addr);
2208:
2209: overflow = (value == 0x7f) << hd6301_REG_CCR_V;
2210: value ++;
2211: hd6301_write_memory(addr, value);
2212:
2213: HD6301_CLR_NZV;
2214: hd6301_reg_CCR |= overflow;
2215: HD6301_SET_NZ8(value);
2216: }
2217:
2218: /**
2219: * TST_IND : test indexed memory : M-0
2220: *
2221: * HINZVC
2222: * ..**00
2223: */
2224: static void hd6301_tst_ind(void)
2225: {
2226: Uint8 value;
2227: Uint16 addr;
2228:
2229: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2230: value = hd6301_read_memory(addr);
2231:
2232: HD6301_CLR_NZVC;
2233: HD6301_SET_NZ8(value);
2234: }
2235:
2236: /**
2237: * JMP_IND : jump to indexed memory address : PC=M
2238: *
2239: * HINZVC
2240: * ......
2241: */
2242: static void hd6301_jmp_ind(void)
2243: {
2244: Uint8 value;
2245: Uint16 addr;
2246:
2247: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2248: value = hd6301_read_memory(addr);
2249: hd6301_reg_PC = value;
2250: }
2251:
2252: /**
2253: * CLR_IND : clear indexed memory : M=0
2254: *
2255: * HINZVC
2256: * ..0100
2257: */
2258: static void hd6301_clr_ind(void)
2259: {
2260: Uint16 addr;
2261:
2262: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
2263: hd6301_write_memory(addr, 0);
2264:
2265: HD6301_CLR_NZVC;
2266: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
2267: }
2268:
2269: /**
2270: * NEG_EXT : negate extended memory : M=0-M
2271: *
2272: * HINZVC
2273: * ..****
2274: */
2275: static void hd6301_neg_ext(void)
2276: {
2277: Uint8 value;
2278: Uint16 addr;
2279:
2280: addr = hd6301_get_memory_ext();
2281: value = -hd6301_read_memory(addr);
2282: hd6301_write_memory(addr, value);
2283:
2284: HD6301_CLR_NZVC;
2285: hd6301_reg_CCR |= (value != 0x0);
2286: hd6301_reg_CCR |= (value == 0x80) << hd6301_REG_CCR_V;
2287: HD6301_SET_NZ8(value);
2288: }
2289:
2290: /**
2291: * AIM_DIR : and immediate direct memory address : M=M&IMM
2292: *
2293: * HINZVC
2294: * ..**0.
2295: */
2296: static void hd6301_aim_dir(void)
2297: {
2298: Uint8 value;
2299: Uint16 addr;
2300:
2301: value = hd6301_read_memory(hd6301_reg_PC+1);
2302: addr = hd6301_read_memory(hd6301_reg_PC+2);
2303: value &= hd6301_read_memory(addr);
2304: hd6301_write_memory(addr, value);
2305:
2306: HD6301_CLR_NZV;
2307: HD6301_SET_NZ8(value);
2308: }
2309:
2310: /**
2311: * OIM_DIR : or immediate direct memory address : M=M|IMM
2312: *
2313: * HINZVC
2314: * ..**0.
2315: */
2316: static void hd6301_oim_dir(void)
2317: {
2318: Uint8 value;
2319: Uint16 addr;
2320:
2321: value = hd6301_read_memory(hd6301_reg_PC+1);
2322: addr = hd6301_read_memory(hd6301_reg_PC+2);
2323: value |= hd6301_read_memory(addr);
2324: hd6301_write_memory(addr, value);
2325:
2326: HD6301_CLR_NZV;
2327: HD6301_SET_NZ8(value);
2328: }
2329:
2330: /**
2331: * COM_EXT : complement 1 extended memory : M=~M
2332: *
2333: * HINZVC
2334: * ..**01
2335: */
2336: static void hd6301_com_ext(void)
2337: {
2338: Uint8 value;
2339: Uint16 addr;
2340:
2341: addr = hd6301_get_memory_ext();
2342: value = ~hd6301_read_memory(addr);
2343: hd6301_write_memory(addr, value);
2344:
2345: HD6301_CLR_NZV;
2346: hd6301_reg_CCR |= 1;
2347: HD6301_SET_NZ8(value);
2348: }
2349:
2350: /**
2351: * LSR_EXT : logical shift right extended memory : M=M>>1
2352: *
2353: * HINZVC
2354: * ..0***
2355: */
2356: static void hd6301_lsr_ext(void)
2357: {
2358: Uint8 value, carry;
2359: Uint16 addr;
2360:
2361: addr = hd6301_get_memory_ext();
2362: value = hd6301_read_memory(addr);
2363:
2364: carry = value & 1;
2365: value >>= 1;
2366: hd6301_write_memory(addr, value);
2367:
2368: HD6301_CLR_NZVC;
2369: hd6301_reg_CCR |= carry;
2370: HD6301_SET_Z8(value);
2371: hd6301_reg_CCR |= ((0 ^ carry) == 1) << hd6301_REG_CCR_V;
2372: }
2373:
2374: /**
2375: * EIM_DIR : eor immediate direct memory address : M=M^IMM
2376: *
2377: * HINZVC
2378: * ..**0.
2379: */
2380: static void hd6301_eim_dir(void)
2381: {
2382: Uint8 value;
2383: Uint16 addr;
2384:
2385: value = hd6301_read_memory(hd6301_reg_PC+1);
2386: addr = hd6301_read_memory(hd6301_reg_PC+2);
2387: value ^= hd6301_read_memory(addr);
2388: hd6301_write_memory(addr, value);
2389:
2390: HD6301_CLR_NZV;
2391: HD6301_SET_NZ8(value);
2392: }
2393:
2394: /**
2395: * ROR_EXT : rotate right extended memory : M=M>>1 + carry<<8
2396: *
2397: * HINZVC
2398: * ..****
2399: */
2400: static void hd6301_ror_ext(void)
2401: {
2402: Uint8 value, carry, result, bitN;
2403: Uint16 addr;
2404:
2405: addr = hd6301_get_memory_ext();
2406: value = hd6301_read_memory(addr);
2407:
2408: result = (hd6301_reg_CCR & 1) << 7;
2409: carry = value & 1;
2410: result += value >> 1;
2411: hd6301_write_memory(addr, result);
2412:
2413: HD6301_CLR_NZVC;
2414: hd6301_reg_CCR |= carry;
2415: HD6301_SET_NZ8(value);
2416: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2417: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2418: }
2419:
2420: /**
2421: * ASR_EXT : arithmetic shift right extended memory : M=M>>1
2422: *
2423: * HINZVC
2424: * ..****
2425: */
2426: static void hd6301_asr_ext(void)
2427: {
2428: Uint8 value, carry, bitN;
2429: Uint16 addr;
2430:
2431: addr = hd6301_get_memory_ext();
2432: value = hd6301_read_memory(addr);
2433:
2434: carry = value & 1;
2435: value >>= 1;
2436: value |= (value & 0x40) << 1;
2437: hd6301_write_memory(addr, value);
2438:
2439: HD6301_CLR_NZVC;
2440: hd6301_reg_CCR |= carry;
2441: HD6301_SET_NZ8(value);
2442: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2443: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2444: }
2445:
2446: /**
2447: * ASL_EXT : arithmetic shift left extended memory : M=M<<1
2448: *
2449: * HINZVC
2450: * ..****
2451: */
2452: static void hd6301_asl_ext(void)
2453: {
2454: Uint8 value, carry, bitN;
2455: Uint16 addr;
2456:
2457: addr = hd6301_get_memory_ext();
2458: value = hd6301_read_memory(addr);
2459:
2460: carry = (value & 0X80) >> 7;
2461: value <<= 1;
2462: hd6301_write_memory(addr, value);
2463:
2464: HD6301_CLR_NZVC;
2465: hd6301_reg_CCR |= carry;
2466: HD6301_SET_NZ8(value);
2467: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2468: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2469: }
2470:
2471: /**
2472: * ROL_EXT : rotate left extended memory : M=M<<1 + carry
2473: *
2474: * HINZVC
2475: * ..****
2476: */
2477: static void hd6301_rol_ext(void)
2478: {
2479: Uint8 value, carry, result, bitN;
2480: Uint16 addr;
2481:
2482: addr = hd6301_get_memory_ext();
2483: value = hd6301_read_memory(addr);
2484:
2485: result = hd6301_reg_CCR & 1;
2486: carry = (value & 0x80) >> 7;
2487: result += value << 1;
2488: hd6301_write_memory(addr, result);
2489:
2490: HD6301_CLR_NZVC;
2491: hd6301_reg_CCR |= carry;
2492: HD6301_SET_NZ8(value);
2493: bitN = (hd6301_reg_CCR >> hd6301_REG_CCR_N) & 1;
2494: hd6301_reg_CCR |= ((bitN ^ carry) == 1) << hd6301_REG_CCR_V;
2495: }
2496:
2497: /**
2498: * DEC_EXT : decrement extended memory : M=M-1
2499: *
2500: * HINZVC
2501: * ..***.
2502: */
2503: static void hd6301_dec_ext(void)
2504: {
2505: Uint8 value, overflow;
2506: Uint16 addr;
2507:
2508: addr = hd6301_get_memory_ext();
2509: value = hd6301_read_memory(addr);
2510:
2511: overflow = (value == 0x80) << hd6301_REG_CCR_V;
2512: --value;
2513: hd6301_write_memory(addr, value);
2514:
2515: HD6301_CLR_NZV;
2516: hd6301_reg_CCR |= overflow;
2517: HD6301_SET_NZ8(value);
2518: }
2519:
2520: /**
2521: * TIM_DIR : test direct memory address value : M&IMM
2522: *
2523: * HINZVC
2524: * ..**0.
2525: */
2526: static void hd6301_tim_dir(void)
2527: {
2528: Uint8 value;
2529: Uint16 addr;
2530:
2531: value = hd6301_read_memory(hd6301_reg_PC+1);
2532: addr = hd6301_read_memory(hd6301_reg_PC+2);
2533: value &= hd6301_read_memory(addr);
2534: hd6301_write_memory(addr, value);
2535:
2536: HD6301_CLR_NZV;
2537: HD6301_SET_NZ8(value);
2538: }
2539:
2540: /**
2541: * INC_EXT : increment extended memory : M=M+1
2542: *
2543: * HINZVC
2544: * ..***.
2545: */
2546: static void hd6301_inc_ext(void)
2547: {
2548: Uint8 value, overflow;
2549: Uint16 addr;
2550:
2551: addr = hd6301_get_memory_ext();
2552: value = hd6301_read_memory(addr);
2553:
2554: overflow = (value == 0x7f) << hd6301_REG_CCR_V;
2555: value ++;
2556: hd6301_write_memory(addr, value);
2557:
2558: HD6301_CLR_NZV;
2559: hd6301_reg_CCR |= overflow;
2560: HD6301_SET_NZ8(value);
2561: }
2562:
2563: /**
2564: * TST_EXT : test extended memory : M-0
2565: *
2566: * HINZVC
2567: * ..**00
2568: */
2569: static void hd6301_tst_ext(void)
2570: {
2571: Uint8 value;
2572: Uint16 addr;
2573:
2574: addr = hd6301_get_memory_ext();
2575: value = hd6301_read_memory(addr);
2576:
2577: HD6301_CLR_NZVC;
2578: HD6301_SET_NZ8(value);
2579: }
2580:
2581: /**
2582: * JMP_EXT : jump to extended memory address : PC=M
2583: *
2584: * HINZVC
2585: * ......
2586: */
2587: static void hd6301_jmp_ext(void)
2588: {
2589: Uint8 value;
2590: Uint16 addr;
2591:
2592: addr = hd6301_get_memory_ext();
2593: value = hd6301_read_memory(addr);
2594:
2595: hd6301_reg_PC = value;
2596: }
2597:
2598: /**
2599: * CLR_EXT : clear extended memory : M=0
2600: *
2601: * HINZVC
2602: * ..0100
2603: */
2604: static void hd6301_clr_ext(void)
2605: {
2606: Uint16 addr;
2607:
2608: addr = hd6301_get_memory_ext();
2609: hd6301_write_memory(addr, 0);
2610:
2611: HD6301_CLR_NZVC;
2612: hd6301_reg_CCR |= 1 << hd6301_REG_CCR_Z;
2613: }
2614:
2615: /**
1.1.1.2 root 2616: * SUBA_IMM : subtract immediate value from accumulator A : A=A-M
1.1 root 2617: *
2618: * HINZVC
2619: * ..****
2620: */
2621: static void hd6301_suba_imm(void)
2622: {
2623: Uint8 value;
2624: Uint16 result;
2625:
2626: value = hd6301_read_memory(hd6301_reg_PC+1);
2627: result = hd6301_reg_A - value;
2628:
2629: HD6301_CLR_NZVC;
2630: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2631:
2632: hd6301_reg_A = result;
2633: }
2634:
2635: /**
2636: * CMPA_IMM : compare immediate value to accumulator A : A-M
2637: *
2638: * HINZVC
2639: * ..****
2640: */
2641: static void hd6301_cmpa_imm(void)
2642: {
2643: Uint8 value;
2644: Uint16 result;
2645:
2646: value = hd6301_read_memory(hd6301_reg_PC+1);
2647: result = hd6301_reg_A - value;
2648:
2649: HD6301_CLR_NZVC;
2650: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2651: }
2652:
2653: /**
1.1.1.2 root 2654: * SBCA_IMM : subtract with carry immediate value from accumulator A : A=A-M-C
1.1 root 2655: *
2656: * HINZVC
2657: * ..****
2658: */
2659: static void hd6301_sbca_imm(void)
2660: {
2661: Uint8 value, carry;
2662: Uint16 result;
2663:
2664: carry = hd6301_REG_CCR_C & 1;
2665: value = hd6301_read_memory(hd6301_reg_PC+1);
2666: result = hd6301_reg_A - value - carry;
2667:
2668: HD6301_CLR_NZVC;
2669: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2670:
2671: hd6301_reg_A = result;
2672: }
2673:
2674: /**
1.1.1.2 root 2675: * SUBD_IMM : subtract immediate value from accumulator D : D=D-MM
1.1 root 2676: *
2677: * HINZVC
2678: * ..****
2679: */
2680: static void hd6301_subd_imm(void)
2681: {
2682: Uint16 value, regD;
2683: Uint32 result;
2684:
2685: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2686: value += hd6301_read_memory(hd6301_reg_PC+2);
2687: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
2688: result = regD - value;
2689:
2690: hd6301_reg_A = (result >> 8) & 0xff;
2691: hd6301_reg_B = result & 0xff;
2692:
2693: HD6301_CLR_NZVC;
2694: HD6301_SET_FLAGS16(regD, value, result);
2695: }
2696:
2697: /**
2698: * ANDA_IMM : and immediate value with accumulator A : A=A&M
2699: *
2700: * HINZVC
2701: * ..**0.
2702: */
2703: static void hd6301_anda_imm(void)
2704: {
2705: hd6301_reg_A &= hd6301_read_memory(hd6301_reg_PC+1);
2706:
2707: HD6301_CLR_NZV;
2708: HD6301_SET_NZ8(hd6301_reg_A);
2709: }
2710:
2711: /**
2712: * BITA_IMM : bit test immediate value with accumulator A : A&M
2713: *
2714: * HINZVC
2715: * ..**0.
2716: */
2717: static void hd6301_bita_imm(void)
2718: {
2719: Uint8 value;
2720:
2721: value = hd6301_reg_A & hd6301_read_memory(hd6301_reg_PC+1);
2722:
2723: HD6301_CLR_NZV;
2724: HD6301_SET_NZ8(value);
2725: }
2726:
2727: /**
2728: * LDAA_IMM : load accumulator A with immediate value : A=M
2729: *
2730: * HINZVC
2731: * ..**0.
2732: */
2733: static void hd6301_ldaa_imm(void)
2734: {
2735: hd6301_reg_A = hd6301_read_memory(hd6301_reg_PC+1);
2736:
2737: HD6301_CLR_NZV;
2738: HD6301_SET_NZ8(hd6301_reg_A);
2739: }
2740:
2741: /**
2742: * EORA_IMM : exclusive or immediate value with accumulator A : A=A^M
2743: *
2744: * HINZVC
2745: * ..**0.
2746: */
2747: static void hd6301_eora_imm(void)
2748: {
2749: hd6301_reg_A ^= hd6301_read_memory(hd6301_reg_PC+1);
2750:
2751: HD6301_CLR_NZV;
2752: HD6301_SET_NZ8(hd6301_reg_A);
2753: }
2754:
2755: /**
2756: * ADCA_IMM : add with carry immediate value to accumulator A : A=A+M+C
2757: *
2758: * HINZVC
2759: * *.****
2760: */
2761: static void hd6301_adca_imm(void)
2762: {
2763: Uint8 value, carry;
2764: Uint16 result;
2765:
2766: carry = hd6301_REG_CCR_C & 1;
2767: value = hd6301_read_memory(hd6301_reg_PC+1);
2768: result = hd6301_reg_A + value + carry;
2769:
2770: HD6301_CLR_HNZVC;
2771: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2772: HD6301_SET_H(hd6301_reg_A, value, result);
2773:
2774: hd6301_reg_A = result;
2775: }
2776:
2777: /**
2778: * ORAA_IMM : inclusive or accumulator A with immediate value : A=A|M
2779: *
2780: * HINZVC
2781: * ..**0.
2782: */
2783: static void hd6301_oraa_imm(void)
2784: {
2785: hd6301_reg_A |= hd6301_read_memory(hd6301_reg_PC+1);
2786:
2787: HD6301_CLR_NZV;
2788: HD6301_SET_NZ8(hd6301_reg_A);
2789: }
2790:
2791: /**
2792: * ADDA_IMM : add immediate value with accumulator A : A=A+M
2793: *
2794: * HINZVC
2795: * *.****
2796: */
2797: static void hd6301_adda_imm(void)
2798: {
2799: Uint8 value;
2800: Uint16 result;
2801:
2802: value = hd6301_read_memory(hd6301_reg_PC+1);
2803: result = hd6301_reg_A + value;
2804:
2805: HD6301_CLR_HNZVC;
2806: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2807: HD6301_SET_H(hd6301_reg_A, value, result);
2808:
2809: hd6301_reg_A = result;
2810: }
2811:
2812: /**
2813: * CPX_IMM : compare index register with immediate value : X-MM
2814: *
2815: * HINZVC
2816: * ..****
2817: */
2818: static void hd6301_cpx_imm(void)
2819: {
2820: Uint16 value;
2821: Uint32 result;
2822:
2823: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2824: value += hd6301_read_memory(hd6301_reg_PC+2);
2825: result = hd6301_reg_X - value;
2826:
2827: HD6301_CLR_NZVC;
2828: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
2829: }
2830:
2831: /**
2832: * BSR : branch to subroutine
2833: *
2834: * HINZVC
2835: * ......
2836: */
2837: static void hd6301_bsr(void)
2838: {
2839: Sint8 addr;
2840:
2841: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
2842: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
2843:
2844: addr = hd6301_read_memory(hd6301_reg_PC + 1);
2845: hd6301_reg_PC += addr + 2;
2846: }
2847:
2848: /**
2849: * LDS_IMM : load stack pointer with immediate value : SP=MM
2850: *
2851: * HINZVC
2852: * ..**0.
2853: */
2854: static void hd6301_lds_imm(void)
2855: {
2856: Uint16 value;
2857:
2858: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
2859: value += hd6301_read_memory(hd6301_reg_PC+2);
2860: hd6301_reg_SP = value;
2861:
2862: HD6301_CLR_NZV;
2863: HD6301_SET_NZ16(value);
2864: }
2865:
2866: /**
1.1.1.2 root 2867: * SUBA_DIR : subtract direct memory address value from accumulator A : A=A-M
1.1 root 2868: *
2869: * HINZVC
2870: * ..****
2871: */
2872: static void hd6301_suba_dir(void)
2873: {
2874: Uint8 value;
2875: Uint16 result, addr;
2876:
2877: addr = hd6301_read_memory(hd6301_reg_PC+1);
2878: value = hd6301_read_memory(addr);
2879: result = hd6301_reg_A - value;
2880:
2881: HD6301_CLR_NZVC;
2882: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2883:
2884: hd6301_reg_A = result;
2885: }
2886:
2887: /**
2888: * CMPA_DIR : compare direct memory address value to accumulator A : A-M
2889: *
2890: * HINZVC
2891: * ..****
2892: */
2893: static void hd6301_cmpa_dir(void)
2894: {
2895: Uint8 value;
2896: Uint16 addr, result;
2897:
2898: addr = hd6301_read_memory(hd6301_reg_PC+1);
2899: value = hd6301_read_memory(addr);
2900: result = hd6301_reg_A - value;
2901:
2902: HD6301_CLR_NZVC;
2903: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2904: }
2905:
2906: /**
1.1.1.2 root 2907: * SBCA_DIR : subtract with carry direct memory address value from accumulator A : A=A-M-C
1.1 root 2908: *
2909: * HINZVC
2910: * ..****
2911: */
2912: static void hd6301_sbca_dir(void)
2913: {
2914: Uint8 value, carry;
2915: Uint16 addr, result;
2916:
2917: carry = hd6301_REG_CCR_C & 1;
2918: addr = hd6301_read_memory(hd6301_reg_PC+1);
2919: value = hd6301_read_memory(addr);
2920: result = hd6301_reg_A - value - carry;
2921:
2922: HD6301_CLR_NZVC;
2923: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
2924:
2925: hd6301_reg_A = result;
2926: }
2927:
2928: /**
1.1.1.2 root 2929: * SUBD_DIR : subtract direct memory address value from accumulator D : D=D-MM
1.1 root 2930: *
2931: * HINZVC
2932: * ..****
2933: */
2934: static void hd6301_subd_dir(void)
2935: {
2936: Uint16 addr, value, regD;
2937: Uint32 result;
2938:
2939: addr = hd6301_read_memory(hd6301_reg_PC+1);
2940: value = hd6301_read_memory(addr) << 8;
2941: value += hd6301_read_memory(addr+1);
2942: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
2943: result = regD - value;
2944:
2945: hd6301_reg_A = (result >> 8) & 0xff;
2946: hd6301_reg_B = result & 0xff;
2947:
2948: HD6301_CLR_NZVC;
2949: HD6301_SET_FLAGS16(regD, value, result);
2950: }
2951:
2952: /**
2953: * ANDA_DIR : and direct memory address value with accumulator A : A=A&M
2954: *
2955: * HINZVC
2956: * ..**0.
2957: */
2958: static void hd6301_anda_dir(void)
2959: {
2960: Uint16 addr;
2961:
2962: addr = hd6301_read_memory(hd6301_reg_PC+1);
2963: hd6301_reg_A &= hd6301_read_memory(addr);
2964:
2965: HD6301_CLR_NZV;
2966: HD6301_SET_NZ8(hd6301_reg_A);
2967: }
2968:
2969: /**
2970: * BITA_DIR : bit test direct memory address value with accumulator A : A&M
2971: *
2972: * HINZVC
2973: * ..**0.
2974: */
2975: static void hd6301_bita_dir(void)
2976: {
2977: Uint8 value;
2978: Uint16 addr;
2979:
2980: addr = hd6301_read_memory(hd6301_reg_PC+1);
2981: value = hd6301_reg_A & hd6301_read_memory(addr);
2982:
2983: HD6301_CLR_NZV;
2984: HD6301_SET_NZ8(value);
2985: }
2986:
2987: /**
2988: * LDAA_DIR : load accumulator A with direct memory address value : A=M
2989: *
2990: * HINZVC
2991: * ..**0.
2992: */
2993: static void hd6301_ldaa_dir(void)
2994: {
2995: Uint16 addr;
2996:
2997: addr = hd6301_read_memory(hd6301_reg_PC+1);
2998: hd6301_reg_A = hd6301_read_memory(addr);
2999:
3000: HD6301_CLR_NZV;
3001: HD6301_SET_NZ8(hd6301_reg_A);
3002: }
3003:
3004: /**
3005: * STAA_DIR : store accumulator A into direct memory address value : M=A
3006: *
3007: * HINZVC
3008: * ..**0.
3009: */
3010: static void hd6301_staa_dir(void)
3011: {
3012: Uint16 addr;
3013:
3014: addr = hd6301_read_memory(hd6301_reg_PC+1);
3015: hd6301_write_memory(addr, hd6301_reg_A);
3016:
3017: HD6301_CLR_NZV;
3018: HD6301_SET_NZ8(hd6301_reg_A);
3019: }
3020:
3021: /**
3022: * EORA_DIR : exclusive or direct memory address value with accumulator A : A=A^M
3023: *
3024: * HINZVC
3025: * ..**0.
3026: */
3027: static void hd6301_eora_dir(void)
3028: {
3029: Uint16 addr;
3030:
3031: addr = hd6301_read_memory(hd6301_reg_PC+1);
3032: hd6301_reg_A ^= hd6301_read_memory(addr);
3033:
3034: HD6301_CLR_NZV;
3035: HD6301_SET_NZ8(hd6301_reg_A);
3036: }
3037:
3038: /**
3039: * ADCA_DIR : add with carry direct memory address value to accumulator A : A=A+M+C
3040: *
3041: * HINZVC
3042: * *.****
3043: */
3044: static void hd6301_adca_dir(void)
3045: {
3046: Uint8 value, carry;
3047: Uint16 addr, result;
3048:
3049: carry = hd6301_REG_CCR_C & 1;
3050: addr = hd6301_read_memory(hd6301_reg_PC+1);
3051: value = hd6301_read_memory(addr);
3052: result = hd6301_reg_A + value + carry;
3053:
3054: HD6301_CLR_HNZVC;
3055: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3056: HD6301_SET_H(hd6301_reg_A, value, result);
3057:
3058: hd6301_reg_A = result;
3059: }
3060:
3061: /**
3062: * ORAA_DIR : inclusive or accumulator A with direct memory address value : A=A|M
3063: *
3064: * HINZVC
3065: * ..**0.
3066: */
3067: static void hd6301_oraa_dir(void)
3068: {
3069: Uint16 addr;
3070:
3071: addr = hd6301_read_memory(hd6301_reg_PC+1);
3072: hd6301_reg_A |= hd6301_read_memory(addr);
3073:
3074: HD6301_CLR_NZV;
3075: HD6301_SET_NZ8(hd6301_reg_A);
3076: }
3077:
3078: /**
3079: * ADDA_DIR : add direct memory address value with accumulator A : A=A+M
3080: *
3081: * HINZVC
3082: * *.****
3083: */
3084: static void hd6301_adda_dir(void)
3085: {
3086: Uint8 value;
3087: Uint16 addr, result;
3088:
3089: addr = hd6301_read_memory(hd6301_reg_PC+1);
3090: value = hd6301_read_memory(addr);
3091: result = hd6301_reg_A + value;
3092:
3093: HD6301_CLR_NZVC;
3094: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3095: HD6301_SET_H(hd6301_reg_A, value, result);
3096:
3097: hd6301_reg_A = result;
3098: }
3099:
3100: /**
3101: * CPX_DIR : compare index register with direct memory address value : X-MM
3102: *
3103: * HINZVC
3104: * ..****
3105: */
3106: static void hd6301_cpx_dir(void)
3107: {
3108: Uint16 addr, value;
3109: Uint32 result;
3110:
3111: addr = hd6301_read_memory(hd6301_reg_PC+1);
3112: value = hd6301_read_memory(addr) << 8;
3113: value += hd6301_read_memory(addr+1);
3114: result = hd6301_reg_X - value;
3115:
3116: HD6301_CLR_NZVC;
3117: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3118: }
3119:
3120: /**
3121: * JSR_DIR : jump to subroutine at direct memory address
3122: *
3123: * HINZVC
3124: * ......
3125: */
3126: static void hd6301_jsr_dir(void)
3127: {
3128: Uint16 addr;
3129:
3130: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3131: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3132:
3133: addr = hd6301_read_memory(hd6301_reg_PC + 1);
3134: hd6301_reg_PC += addr + 2;
3135: }
3136:
3137: /**
3138: * LDS_DIR : load stack pointer with direct memory address value : SP=MM
3139: *
3140: * HINZVC
3141: * ..**0.
3142: */
3143: static void hd6301_lds_dir(void)
3144: {
3145: Uint16 addr;
3146:
3147: addr = hd6301_read_memory(hd6301_reg_PC+1);
3148: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3149: hd6301_reg_SP += hd6301_read_memory(addr+1);
3150:
3151: HD6301_CLR_NZV;
3152: HD6301_SET_NZ16(hd6301_reg_SP);
3153: }
3154:
3155: /**
3156: * STS_DIR : store stack pointer into direct memory address value : MM=SP
3157: *
3158: * HINZVC
3159: * ..**0.
3160: */
3161: static void hd6301_sts_dir(void)
3162: {
3163: Uint16 addr;
3164:
3165: addr = hd6301_read_memory(hd6301_reg_PC+1);
3166: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3167: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3168:
3169: HD6301_CLR_NZV;
3170: HD6301_SET_NZ16(hd6301_reg_SP);
3171: }
3172:
3173: /**
1.1.1.2 root 3174: * SUBA_IND : subtract indexed memory address value from accumulator A : A=A-M
1.1 root 3175: *
3176: * HINZVC
3177: * ..****
3178: */
3179: static void hd6301_suba_ind(void)
3180: {
3181: Uint8 value;
3182: Uint16 result, addr;
3183:
3184: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3185: value = hd6301_read_memory(addr);
3186: result = hd6301_reg_A - value;
3187:
3188: HD6301_CLR_NZVC;
3189: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3190:
3191: hd6301_reg_A = result;
3192: }
3193:
3194: /**
3195: * CMPA_IND : compare indexed memory address value to accumulator A : A-M
3196: *
3197: * HINZVC
3198: * ..****
3199: */
3200: static void hd6301_cmpa_ind(void)
3201: {
3202: Uint8 value;
3203: Uint16 addr, result;
3204:
3205: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3206: value = hd6301_read_memory(addr);
3207: result = hd6301_reg_A - value;
3208:
3209: HD6301_CLR_NZVC;
3210: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3211: }
3212:
3213: /**
1.1.1.2 root 3214: * SBCA_IND : subtract with carry indexed memory address value from accumulator A : A=A-M-C
1.1 root 3215: *
3216: * HINZVC
3217: * ..****
3218: */
3219: static void hd6301_sbca_ind(void)
3220: {
3221: Uint8 value, carry;
3222: Uint16 addr, result;
3223:
3224: carry = hd6301_REG_CCR_C & 1;
3225: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3226: value = hd6301_read_memory(addr);
3227: result = hd6301_reg_A - value - carry;
3228:
3229: HD6301_CLR_NZVC;
3230: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3231:
3232: hd6301_reg_A = result;
3233: }
3234:
3235: /**
1.1.1.2 root 3236: * SUBD_IND : subtract indexed memory address value from accumulator D : D=D-MM
1.1 root 3237: *
3238: * HINZVC
3239: * ..****
3240: */
3241: static void hd6301_subd_ind(void)
3242: {
3243: Uint16 addr, value, regD;
3244: Uint32 result;
3245:
3246: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3247: value = hd6301_read_memory(addr) << 8;
3248: value += hd6301_read_memory(addr+1);
3249: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3250: result = regD - value;
3251:
3252: hd6301_reg_A = (result >> 8) & 0xff;
3253: hd6301_reg_B = result & 0xff;
3254:
3255: HD6301_CLR_NZVC;
3256: HD6301_SET_FLAGS16(regD, value, result);
3257: }
3258:
3259: /**
3260: * ANDA_IND : and indexed memory address value with accumulator A : A=A&M
3261: *
3262: * HINZVC
3263: * ..**0.
3264: */
3265: static void hd6301_anda_ind(void)
3266: {
3267: Uint16 addr;
3268:
3269: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3270: hd6301_reg_A &= hd6301_read_memory(addr);
3271:
3272: HD6301_CLR_NZV;
3273: HD6301_SET_NZ8(hd6301_reg_A);
3274: }
3275:
3276: /**
3277: * BITA_IND : bit test indexed memory address value with accumulator A : A&M
3278: *
3279: * HINZVC
3280: * ..**0.
3281: */
3282: static void hd6301_bita_ind(void)
3283: {
3284: Uint8 value;
3285: Uint16 addr;
3286:
3287: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3288: value = hd6301_reg_A & hd6301_read_memory(addr);
3289:
3290: HD6301_CLR_NZV;
3291: HD6301_SET_NZ8(value);
3292: }
3293:
3294: /**
3295: * LDAA_IND : load accumulator A with indexed memory address value : A=M
3296: *
3297: * HINZVC
3298: * ..**0.
3299: */
3300: static void hd6301_ldaa_ind(void)
3301: {
3302: Uint16 addr;
3303:
3304: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3305: hd6301_reg_A = hd6301_read_memory(addr);
3306:
3307: HD6301_CLR_NZV;
3308: HD6301_SET_NZ8(hd6301_reg_A);
3309: }
3310:
3311: /**
3312: * STAA_IND : store accumulator A into indexed memory address value : M=A
3313: *
3314: * HINZVC
3315: * ..**0.
3316: */
3317: static void hd6301_staa_ind(void)
3318: {
3319: Uint16 addr;
3320:
3321: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3322: hd6301_write_memory(addr, hd6301_reg_A);
3323:
3324: HD6301_CLR_NZV;
3325: HD6301_SET_NZ8(hd6301_reg_A);
3326: }
3327:
3328: /**
3329: * EORA_IND : exclusive or indexed memory address value with accumulator A : A=A^M
3330: *
3331: * HINZVC
3332: * ..**0.
3333: */
3334: static void hd6301_eora_ind(void)
3335: {
3336: Uint16 addr;
3337:
3338: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3339: hd6301_reg_A ^= hd6301_read_memory(addr);
3340:
3341: HD6301_CLR_NZV;
3342: HD6301_SET_NZ8(hd6301_reg_A);
3343: }
3344:
3345: /**
3346: * ADCA_IND : add with carry indexed memory address value to accumulator A : A=A+M+C
3347: *
3348: * HINZVC
3349: * *.****
3350: */
3351: static void hd6301_adca_ind(void)
3352: {
3353: Uint8 value, carry;
3354: Uint16 addr, result;
3355:
3356: carry = hd6301_REG_CCR_C & 1;
3357: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3358: value = hd6301_read_memory(addr);
3359: result = hd6301_reg_A + value + carry;
3360:
3361: HD6301_CLR_HNZVC;
3362: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3363: HD6301_SET_H(hd6301_reg_A, value, result);
3364:
3365: hd6301_reg_A = result;
3366: }
3367:
3368: /**
3369: * ORAA_IND : inclusive or accumulator A with indexed memory address value : A=A|M
3370: *
3371: * HINZVC
3372: * ..**0.
3373: */
3374: static void hd6301_oraa_ind(void)
3375: {
3376: Uint16 addr;
3377:
3378: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3379: hd6301_reg_A |= hd6301_read_memory(addr);
3380:
3381: HD6301_CLR_NZV;
3382: HD6301_SET_NZ8(hd6301_reg_A);
3383: }
3384:
3385: /**
3386: * ADDA_IND : add indexed memory address value with accumulator A : A=A+M
3387: *
3388: * HINZVC
3389: * *.****
3390: */
3391: static void hd6301_adda_ind(void)
3392: {
3393: Uint8 value;
3394: Uint16 addr, result;
3395:
3396: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3397: value = hd6301_read_memory(addr);
3398: result = hd6301_reg_A + value;
3399:
3400: HD6301_CLR_HNZVC;
3401: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3402: HD6301_SET_H(hd6301_reg_A, value, result);
3403:
3404: hd6301_reg_A = result;
3405: }
3406:
3407: /**
3408: * CPX_IND : compare index register with indexed memory address value : X-MM
3409: *
3410: * HINZVC
3411: * ..****
3412: */
3413: static void hd6301_cpx_ind(void)
3414: {
3415: Uint16 addr, value;
3416: Uint32 result;
3417:
3418: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3419: value = hd6301_read_memory(addr) << 8;
3420: value += hd6301_read_memory(addr+1);
3421: result = hd6301_reg_X - value;
3422:
3423: HD6301_CLR_NZVC;
3424: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3425: }
3426:
3427: /**
3428: * JSR_IND : jump to subroutine at indexed address
3429: *
3430: * HINZVC
3431: * ......
3432: */
3433: static void hd6301_jsr_ind(void)
3434: {
3435: Uint16 addr;
3436:
3437: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3438: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3439:
3440: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3441: hd6301_reg_PC += addr + 2;
3442: }
3443:
3444: /**
3445: * LDS_IND : load stack pointer with indexed memory address value : SP=MM
3446: *
3447: * HINZVC
3448: * ..**0.
3449: */
3450: static void hd6301_lds_ind(void)
3451: {
3452: Uint16 addr;
3453:
3454: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3455: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3456: hd6301_reg_SP += hd6301_read_memory(addr+1);
3457:
3458: HD6301_CLR_NZV;
3459: HD6301_SET_NZ16(hd6301_reg_SP);
3460: }
3461:
3462: /**
3463: * STS_IND : store stack pointer into indexed memory address value : MM=SP
3464: *
3465: * HINZVC
3466: * ..**0.
3467: */
3468: static void hd6301_sts_ind(void)
3469: {
3470: Uint16 addr;
3471:
3472: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
3473: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3474: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3475:
3476: HD6301_CLR_NZV;
3477: HD6301_SET_NZ16(hd6301_reg_SP);
3478: }
3479:
3480: /**
1.1.1.2 root 3481: * SUBA_EXT : subtract extented memory address value from accumulator A : A=A-M
1.1 root 3482: *
3483: * HINZVC
3484: * ..****
3485: */
3486: static void hd6301_suba_ext(void)
3487: {
3488: Uint8 value;
3489: Uint16 result, addr;
3490:
3491: addr = hd6301_get_memory_ext();
3492: value = hd6301_read_memory(addr);
3493: result = hd6301_reg_A - value;
3494:
3495: HD6301_CLR_NZVC;
3496: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3497:
3498: hd6301_reg_A = result;
3499: }
3500:
3501: /**
3502: * CMPA_EXT : compare extented memory address value to accumulator A : A-M
3503: *
3504: * HINZVC
3505: * ..****
3506: */
3507: static void hd6301_cmpa_ext(void)
3508: {
3509: Uint8 value;
3510: Uint16 addr, result;
3511:
3512: addr = hd6301_get_memory_ext();
3513: value = hd6301_read_memory(addr);
3514: result = hd6301_reg_A - value;
3515:
3516: HD6301_CLR_NZVC;
3517: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3518: }
3519:
3520: /**
1.1.1.2 root 3521: * SBCA_EXT : subtract with carry extented memory address value from accumulator A : A=A-M-C
1.1 root 3522: *
3523: * HINZVC
3524: * ..****
3525: */
3526: static void hd6301_sbca_ext(void)
3527: {
3528: Uint8 value, carry;
3529: Uint16 addr, result;
3530:
3531: carry = hd6301_REG_CCR_C & 1;
3532: addr = hd6301_get_memory_ext();
3533: value = hd6301_read_memory(addr);
3534: result = hd6301_reg_A - value - carry;
3535:
3536: HD6301_CLR_NZVC;
3537: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3538:
3539: hd6301_reg_A = result;
3540: }
3541:
3542: /**
1.1.1.2 root 3543: * SUBD_EXT : subtract extented memory address value from accumulator D : D=D-MM
1.1 root 3544: *
3545: * HINZVC
3546: * ..****
3547: */
3548: static void hd6301_subd_ext(void)
3549: {
3550: Uint16 addr, value, regD;
3551: Uint32 result;
3552:
3553: addr = hd6301_get_memory_ext();
3554: value = hd6301_read_memory(addr) << 8;
3555: value += hd6301_read_memory(addr+1);
3556: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3557: result = regD - value;
3558:
3559: hd6301_reg_A = (result >> 8) & 0xff;
3560: hd6301_reg_B = result & 0xff;
3561:
3562: HD6301_CLR_NZVC;
3563: HD6301_SET_FLAGS16(regD, value, result);
3564: }
3565:
3566: /**
3567: * ANDA_EXT : and extented memory address value with accumulator A : A=A&M
3568: *
3569: * HINZVC
3570: * ..**0.
3571: */
3572: static void hd6301_anda_ext(void)
3573: {
3574: Uint16 addr;
3575:
3576: addr = hd6301_get_memory_ext();
3577: hd6301_reg_A &= hd6301_read_memory(addr);
3578:
3579: HD6301_CLR_NZV;
3580: HD6301_SET_NZ8(hd6301_reg_A);
3581: }
3582:
3583: /**
3584: * BITA_EXT : bit test extented memory address value with accumulator A : A&M
3585: *
3586: * HINZVC
3587: * ..**0.
3588: */
3589: static void hd6301_bita_ext(void)
3590: {
3591: Uint8 value;
3592: Uint16 addr;
3593:
3594: addr = hd6301_get_memory_ext();
3595: value = hd6301_reg_A & hd6301_read_memory(addr);
3596:
3597: HD6301_CLR_NZV;
3598: HD6301_SET_NZ8(value);
3599: }
3600:
3601: /**
3602: * LDAA_EXT : load accumulator A with extented memory address value : A=M
3603: *
3604: * HINZVC
3605: * ..**0.
3606: */
3607: static void hd6301_ldaa_ext(void)
3608: {
3609: Uint16 addr;
3610:
3611: addr = hd6301_get_memory_ext();
3612: hd6301_reg_A = hd6301_read_memory(addr);
3613:
3614: HD6301_CLR_NZV;
3615: HD6301_SET_NZ8(hd6301_reg_A);
3616: }
3617:
3618: /**
3619: * STAA_EXT : store accumulator A into extented memory address value : M=A
3620: *
3621: * HINZVC
3622: * ..**0.
3623: */
3624: static void hd6301_staa_ext(void)
3625: {
3626: Uint16 addr;
3627:
3628: addr = hd6301_get_memory_ext();
3629: hd6301_write_memory(addr, hd6301_reg_A);
3630:
3631: HD6301_CLR_NZV;
3632: HD6301_SET_NZ8(hd6301_reg_A);
3633: }
3634:
3635: /**
3636: * EORA_EXT : exclusive or extented memory address value with accumulator A : A=A^M
3637: *
3638: * HINZVC
3639: * ..**0.
3640: */
3641: static void hd6301_eora_ext(void)
3642: {
3643: Uint16 addr;
3644:
3645: addr = hd6301_get_memory_ext();
3646: hd6301_reg_A ^= hd6301_read_memory(addr);
3647:
3648: HD6301_CLR_NZV;
3649: HD6301_SET_NZ8(hd6301_reg_A);
3650: }
3651:
3652: /**
3653: * ADCA_EXT : add with carry extented memory address value to accumulator A : A=A+M+C
3654: *
3655: * HINZVC
3656: * *.****
3657: */
3658: static void hd6301_adca_ext(void)
3659: {
3660: Uint8 value, carry;
3661: Uint16 addr, result;
3662:
3663: carry = hd6301_REG_CCR_C & 1;
3664: addr = hd6301_get_memory_ext();
3665: value = hd6301_read_memory(addr);
3666: result = hd6301_reg_A + value + carry;
3667:
3668: HD6301_CLR_HNZVC;
3669: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3670: HD6301_SET_H(hd6301_reg_A, value, result);
3671:
3672: hd6301_reg_A = result;
3673: }
3674:
3675: /**
3676: * ORAA_EXT : inclusive or accumulator A with extented memory address value : A=A|M
3677: *
3678: * HINZVC
3679: * ..**0.
3680: */
3681: static void hd6301_oraa_ext(void)
3682: {
3683: Uint16 addr;
3684:
3685: addr = hd6301_get_memory_ext();
3686: hd6301_reg_A |= hd6301_read_memory(addr);
3687:
3688: HD6301_CLR_NZV;
3689: HD6301_SET_NZ8(hd6301_reg_A);
3690: }
3691:
3692: /**
3693: * ADDA_EXT : add extented memory address value with accumulator A : A=A+M
3694: *
3695: * HINZVC
3696: * *.****
3697: */
3698: static void hd6301_adda_ext(void)
3699: {
3700: Uint8 value;
3701: Uint16 addr, result;
3702:
3703: addr = hd6301_get_memory_ext();
3704: value = hd6301_read_memory(addr);
3705: result = hd6301_reg_A + value;
3706:
3707: HD6301_CLR_HNZVC;
3708: HD6301_SET_FLAGS8(hd6301_reg_A, value, result);
3709: HD6301_SET_H(hd6301_reg_A, value, result);
3710:
3711: hd6301_reg_A = result;
3712: }
3713:
3714: /**
3715: * CPX_EXT : compare index register with extented memory address value : X-MM
3716: *
3717: * HINZVC
3718: * ..****
3719: */
3720: static void hd6301_cpx_ext(void)
3721: {
3722: Uint16 addr, value;
3723: Uint32 result;
3724:
3725: addr = hd6301_get_memory_ext();
3726: value = hd6301_read_memory(addr) << 8;
3727: value += hd6301_read_memory(addr+1);
3728: result = hd6301_reg_X - value;
3729:
3730: HD6301_CLR_NZVC;
3731: HD6301_SET_FLAGS16(hd6301_reg_X, value, result);
3732: }
3733:
3734: /**
3735: * JSR_EXT : jump to subroutine at extented address
3736: *
3737: * HINZVC
3738: * ......
3739: */
3740: static void hd6301_jsr_ext(void)
3741: {
3742: Uint16 addr;
3743:
3744: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) & 0xff);
3745: hd6301_write_memory(hd6301_reg_SP--, (hd6301_reg_PC + 2) >> 8);
3746:
3747: addr = hd6301_get_memory_ext();
3748: hd6301_reg_PC += addr + 2;
3749: }
3750:
3751: /**
3752: * LDS_EXT : load stack pointer with extented memory address value : SP=MM
3753: *
3754: * HINZVC
3755: * ..**0.
3756: */
3757: static void hd6301_lds_ext(void)
3758: {
3759: Uint16 addr;
3760:
3761: addr = hd6301_get_memory_ext();
3762: hd6301_reg_SP = hd6301_read_memory(addr) << 8;
3763: hd6301_reg_SP += hd6301_read_memory(addr+1);
3764:
3765: HD6301_CLR_NZV;
3766: HD6301_SET_NZ16(hd6301_reg_SP);
3767: }
3768:
3769: /**
3770: * STS_EXT : store stack pointer into extented memory address value : MM=SP
3771: *
3772: * HINZVC
3773: * ..**0.
3774: */
3775: static void hd6301_sts_ext(void)
3776: {
3777: Uint16 addr;
3778:
3779: addr = hd6301_get_memory_ext();
3780: hd6301_write_memory(addr, hd6301_reg_SP >> 8);
3781: hd6301_write_memory(addr+1, hd6301_reg_SP & 8);
3782:
3783: HD6301_CLR_NZV;
3784: HD6301_SET_NZ16(hd6301_reg_SP);
3785: }
3786:
3787: /**
1.1.1.2 root 3788: * SUBB_IMM : subtract immediate value from accumulator B : B=B-M
1.1 root 3789: *
3790: * HINZVC
3791: * ..****
3792: */
3793: static void hd6301_subb_imm(void)
3794: {
3795: Uint8 value;
3796: Uint16 result;
3797:
3798: value = hd6301_read_memory(hd6301_reg_PC+1);
3799: result = hd6301_reg_B - value;
3800:
3801: HD6301_CLR_NZVC;
3802: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3803:
3804: hd6301_reg_B = result;
3805: }
3806:
3807: /**
3808: * CMPB_IMM : compare immediate value to accumulator B : B-M
3809: *
3810: * HINZVC
3811: * ..****
3812: */
3813: static void hd6301_cmpb_imm(void)
3814: {
3815: Uint8 value;
3816: Uint16 result;
3817:
3818: value = hd6301_read_memory(hd6301_reg_PC+1);
3819: result = hd6301_reg_B - value;
3820:
3821: HD6301_CLR_NZVC;
3822: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3823: }
3824:
3825: /**
1.1.1.2 root 3826: * SBCB_IMM : subtract with carry immediate value from accumulator B : B=B-M-C
1.1 root 3827: *
3828: * HINZVC
3829: * ..****
3830: */
3831: static void hd6301_sbcb_imm(void)
3832: {
3833: Uint8 value, carry;
3834: Uint16 result;
3835:
3836: carry = hd6301_REG_CCR_C & 1;
3837: value = hd6301_read_memory(hd6301_reg_PC+1);
3838: result = hd6301_reg_B - value - carry;
3839:
3840: HD6301_CLR_NZVC;
3841: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3842:
3843: hd6301_reg_B = result;
3844: }
3845:
3846: /**
3847: * ADDD_IMM : add immediate value from accumulator D : D=D+MM
3848: *
3849: * HINZVC
3850: * ..****
3851: */
3852: static void hd6301_addd_imm(void)
3853: {
3854: Uint16 value, regD;
3855: Uint32 result;
3856:
3857: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
3858: value += hd6301_read_memory(hd6301_reg_PC+2);
3859: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
3860: result = regD + value;
3861:
3862: hd6301_reg_A = (result >> 8) & 0xff;
3863: hd6301_reg_B = result & 0xff;
3864:
3865: HD6301_CLR_NZVC;
3866: HD6301_SET_FLAGS16(regD, value, result);
3867: }
3868:
3869: /**
3870: * ANDB_IMM : and immediate value with accumulator B : B=B&M
3871: *
3872: * HINZVC
3873: * ..**0.
3874: */
3875: static void hd6301_andb_imm(void)
3876: {
3877: hd6301_reg_B &= hd6301_read_memory(hd6301_reg_PC+1);
3878:
3879: HD6301_CLR_NZV;
3880: HD6301_SET_NZ8(hd6301_reg_B);
3881: }
3882:
3883: /**
3884: * BITB_IMM : bit test immediate value with accumulator B : B&M
3885: *
3886: * HINZVC
3887: * ..**0.
3888: */
3889: static void hd6301_bitb_imm(void)
3890: {
3891: Uint8 value;
3892:
3893: value = hd6301_reg_B & hd6301_read_memory(hd6301_reg_PC+1);
3894:
3895: HD6301_CLR_NZV;
3896: HD6301_SET_NZ8(value);
3897: }
3898:
3899: /**
3900: * LDAB_IMM : load accumulator B with immediate value : B=M
3901: *
3902: * HINZVC
3903: * ..**0.
3904: */
3905: static void hd6301_ldab_imm(void)
3906: {
3907: hd6301_reg_B = hd6301_read_memory(hd6301_reg_PC+1);
3908:
3909: HD6301_CLR_NZV;
3910: HD6301_SET_NZ8(hd6301_reg_B);
3911: }
3912:
3913: /**
3914: * EORB_IMM : exclusive or immediate value with accumulator B : B=B^M
3915: *
3916: * HINZVC
3917: * ..**0.
3918: */
3919: static void hd6301_eorb_imm(void)
3920: {
3921: hd6301_reg_B ^= hd6301_read_memory(hd6301_reg_PC+1);
3922:
3923: HD6301_CLR_NZV;
3924: HD6301_SET_NZ8(hd6301_reg_B);
3925: }
3926:
3927: /**
3928: * ADCB_IMM : add with carry immediate value to accumulator B : B=B+M+C
3929: *
3930: * HINZVC
3931: * *.****
3932: */
3933: static void hd6301_adcb_imm(void)
3934: {
3935: Uint8 value, carry;
3936: Uint16 result;
3937:
3938: carry = hd6301_REG_CCR_C & 1;
3939: value = hd6301_read_memory(hd6301_reg_PC+1);
3940: result = hd6301_reg_B + value + carry;
3941:
3942: HD6301_CLR_HNZVC;
3943: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3944: HD6301_SET_H(hd6301_reg_B, value, result);
3945:
3946: hd6301_reg_B = result;
3947: }
3948:
3949: /**
3950: * ORAB_IMM : inclusive or accumulator B with immediate value : B=B|M
3951: *
3952: * HINZVC
3953: * ..**0.
3954: */
3955: static void hd6301_orab_imm(void)
3956: {
3957: hd6301_reg_B |= hd6301_read_memory(hd6301_reg_PC+1);
3958:
3959: HD6301_CLR_NZV;
3960: HD6301_SET_NZ8(hd6301_reg_B);
3961: }
3962:
3963: /**
3964: * ADDB_IMM : add immediate value with accumulator B : B=B+M
3965: *
3966: * HINZVC
3967: * ..****
3968: */
3969: static void hd6301_addb_imm(void)
3970: {
3971: Uint8 value;
3972: Uint16 result;
3973:
3974: value = hd6301_read_memory(hd6301_reg_PC+1);
3975: result = hd6301_reg_B + value;
3976:
3977: HD6301_CLR_HNZVC;
3978: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
3979: HD6301_SET_H(hd6301_reg_B, value, result);
3980:
3981: hd6301_reg_B = result;
3982: }
3983:
3984: /**
3985: * LDD_IMM : load accumulator D with immediate value : D=MM
3986: *
3987: * HINZVC
3988: * ..**0.
3989: */
3990: static void hd6301_ldd_imm(void)
3991: {
3992: hd6301_reg_A = hd6301_read_memory(hd6301_reg_PC+1);
3993: hd6301_reg_B = hd6301_read_memory(hd6301_reg_PC+2);
3994:
3995: HD6301_CLR_NZV;
3996: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
3997: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
3998: }
3999:
4000: /**
4001: * LDX_IMM : load register X with immediate value : X=MM
4002: *
4003: * HINZVC
4004: * ..**0.
4005: */
4006: static void hd6301_ldx_imm(void)
4007: {
4008: Uint16 value;
4009:
4010: value = hd6301_read_memory(hd6301_reg_PC+1) << 8;
4011: value += hd6301_read_memory(hd6301_reg_PC+2);
4012: hd6301_reg_X = value;
4013:
4014: HD6301_CLR_NZV;
4015: HD6301_SET_NZ16(hd6301_reg_X);
4016: }
4017:
4018: /**
1.1.1.2 root 4019: * SUBB_DIR : subtract direct memory address value from accumulator B : B=B-M
1.1 root 4020: *
4021: * HINZVC
4022: * ..****
4023: */
4024: static void hd6301_subb_dir(void)
4025: {
4026: Uint8 value;
4027: Uint16 result, addr;
4028:
4029: addr = hd6301_read_memory(hd6301_reg_PC+1);
4030: value = hd6301_read_memory(addr);
4031: result = hd6301_reg_B - value;
4032:
4033: HD6301_CLR_NZVC;
4034: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4035:
4036: hd6301_reg_B = result;
4037: }
4038:
4039: /**
4040: * CMPB_DIR : compare direct memory address value to accumulator B : B-M
4041: *
4042: * HINZVC
4043: * ..****
4044: */
4045: static void hd6301_cmpb_dir(void)
4046: {
4047: Uint8 value;
4048: Uint16 addr, result;
4049:
4050: addr = hd6301_read_memory(hd6301_reg_PC+1);
4051: value = hd6301_read_memory(addr);
4052: result = hd6301_reg_B - value;
4053:
4054: HD6301_CLR_NZVC;
4055: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4056: }
4057:
4058: /**
1.1.1.2 root 4059: * SBCB_DIR : subtract with carry direct memory address value from accumulator B : B=B-M-C
1.1 root 4060: *
4061: * HINZVC
4062: * ..****
4063: */
4064: static void hd6301_sbcb_dir(void)
4065: {
4066: Uint8 value, carry;
4067: Uint16 addr, result;
4068:
4069: carry = hd6301_REG_CCR_C & 1;
4070: addr = hd6301_read_memory(hd6301_reg_PC+1);
4071: value = hd6301_read_memory(addr);
4072: result = hd6301_reg_B - value - carry;
4073:
4074: HD6301_CLR_NZVC;
4075: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4076:
4077: hd6301_reg_B = result;
4078: }
4079:
4080: /**
4081: * ADDD_DIR : add direct memory address value from accumulator D : D=D+MM
4082: *
4083: * HINZVC
4084: * ..****
4085: */
4086: static void hd6301_addd_dir(void)
4087: {
4088: Uint16 addr, value, regD;
4089: Uint32 result;
4090:
4091: addr = hd6301_read_memory(hd6301_reg_PC+1);
4092: value = hd6301_read_memory(addr) << 8;
4093: value += hd6301_read_memory(addr+1);
4094: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4095: result = regD + value;
4096:
4097: hd6301_reg_A = (result >> 8) & 0xff;
4098: hd6301_reg_B = result & 0xff;
4099:
4100: HD6301_CLR_NZVC;
4101: HD6301_SET_FLAGS16(regD, value, result);
4102: }
4103:
4104: /**
4105: * ANDB_DIR : and direct memory address value with accumulator B : B=B&M
4106: *
4107: * HINZVC
4108: * ..**0.
4109: */
4110: static void hd6301_andb_dir(void)
4111: {
4112: Uint16 addr;
4113:
4114: addr = hd6301_read_memory(hd6301_reg_PC+1);
4115: hd6301_reg_B &= hd6301_read_memory(addr);
4116:
4117: HD6301_CLR_NZV;
4118: HD6301_SET_NZ8(hd6301_reg_B);
4119: }
4120:
4121: /**
4122: * BITB_DIR : bit test direct memory address value with accumulator B : B&M
4123: *
4124: * HINZVC
4125: * ..**0.
4126: */
4127: static void hd6301_bitb_dir(void)
4128: {
4129: Uint8 value;
4130: Uint16 addr;
4131:
4132: addr = hd6301_read_memory(hd6301_reg_PC+1);
4133: value = hd6301_reg_B & hd6301_read_memory(addr);
4134:
4135: HD6301_CLR_NZV;
4136: HD6301_SET_NZ8(value);
4137: }
4138:
4139: /**
4140: * LDAB_DIR : load accumulator B with direct memory address value : B=M
4141: *
4142: * HINZVC
4143: * ..**0.
4144: */
4145: static void hd6301_ldab_dir(void)
4146: {
4147: Uint16 addr;
4148:
4149: addr = hd6301_read_memory(hd6301_reg_PC+1);
4150: hd6301_reg_B = hd6301_read_memory(addr);
4151:
4152: HD6301_CLR_NZV;
4153: HD6301_SET_NZ8(hd6301_reg_B);
4154: }
4155:
4156: /**
4157: * STAB_DIR : store accumulator B into direct memory address value : M=B
4158: *
4159: * HINZVC
4160: * ..**0.
4161: */
4162: static void hd6301_stab_dir(void)
4163: {
4164: Uint16 addr;
4165:
4166: addr = hd6301_read_memory(hd6301_reg_PC+1);
4167: hd6301_write_memory(addr, hd6301_reg_B);
4168:
4169: HD6301_CLR_NZV;
4170: HD6301_SET_NZ8(hd6301_reg_B);
4171: }
4172:
4173: /**
4174: * EORB_DIR : exclusive or direct memory address value with accumulator B : B=B^M
4175: *
4176: * HINZVC
4177: * ..**0.
4178: */
4179: static void hd6301_eorb_dir(void)
4180: {
4181: Uint16 addr;
4182:
4183: addr = hd6301_read_memory(hd6301_reg_PC+1);
4184: hd6301_reg_B ^= hd6301_read_memory(addr);
4185:
4186: HD6301_CLR_NZV;
4187: HD6301_SET_NZ8(hd6301_reg_B);
4188: }
4189:
4190: /**
4191: * ADCB_DIR : add with carry direct memory address value to accumulator B : B=B+M+C
4192: *
4193: * HINZVC
4194: * *.****
4195: */
4196: static void hd6301_adcb_dir(void)
4197: {
4198: Uint8 value, carry;
4199: Uint16 addr, result;
4200:
4201: carry = hd6301_REG_CCR_C & 1;
4202: addr = hd6301_read_memory(hd6301_reg_PC+1);
4203: value = hd6301_read_memory(addr);
4204: result = hd6301_reg_B + value + carry;
4205:
4206: HD6301_CLR_HNZVC;
4207: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4208: HD6301_SET_H(hd6301_reg_B, value, result);
4209:
4210: hd6301_reg_B = result;
4211: }
4212:
4213: /**
4214: * ORAB_DIR : inclusive or accumulator B with direct memory address value : B=B|M
4215: *
4216: * HINZVC
4217: * ..**0.
4218: */
4219: static void hd6301_orab_dir(void)
4220: {
4221: Uint16 addr;
4222:
4223: addr = hd6301_read_memory(hd6301_reg_PC+1);
4224: hd6301_reg_B |= hd6301_read_memory(addr);
4225:
4226: HD6301_CLR_NZV;
4227: HD6301_SET_NZ8(hd6301_reg_B);
4228: }
4229:
4230: /**
4231: * ADDB_DIR : add direct memory address value with accumulator B : B=B+M
4232: *
4233: * HINZVC
4234: * *.****
4235: */
4236: static void hd6301_addb_dir(void)
4237: {
4238: Uint8 value;
4239: Uint16 addr, result;
4240:
4241: addr = hd6301_read_memory(hd6301_reg_PC+1);
4242: value = hd6301_read_memory(addr);
4243: result = hd6301_reg_B + value;
4244:
4245: HD6301_CLR_HNZVC;
4246: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4247: HD6301_SET_H(hd6301_reg_B, value, result);
4248:
4249: hd6301_reg_B = result;
4250: }
4251:
4252: /**
4253: * LDD_DIR : load accumulator D with direct memory address value : D=MM
4254: *
4255: * HINZVC
4256: * ..**0.
4257: */
4258: static void hd6301_ldd_dir(void)
4259: {
4260: Uint16 addr;
4261:
4262: addr = hd6301_read_memory(hd6301_reg_PC+1);
4263:
4264: hd6301_reg_A = hd6301_read_memory(addr);
4265: hd6301_reg_B = hd6301_read_memory(addr+1);
4266:
4267: HD6301_CLR_NZV;
4268: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4269: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4270: }
4271:
4272: /**
4273: * STD_DIR : store accumulator D into direct memory address value : MM=D
4274: *
4275: * HINZVC
4276: * ..**0.
4277: */
4278: static void hd6301_std_dir(void)
4279: {
4280: Uint16 addr;
4281:
4282: addr = hd6301_read_memory(hd6301_reg_PC+1);
4283:
4284: hd6301_write_memory(addr, hd6301_reg_A);
4285: hd6301_write_memory(addr+1, hd6301_reg_B);
4286:
4287: HD6301_CLR_NZV;
4288: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4289: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4290: }
4291:
4292: /**
4293: * LDX_DIR : load register X with direct memory address value : X=MM
4294: *
4295: * HINZVC
4296: * ..**0.
4297: */
4298: static void hd6301_ldx_dir(void)
4299: {
4300: Uint16 addr;
4301:
4302: addr = hd6301_read_memory(hd6301_reg_PC+1);
4303:
4304: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4305: hd6301_reg_X += hd6301_read_memory(addr+1);
4306:
4307: HD6301_CLR_NZV;
4308: HD6301_SET_NZ16(hd6301_reg_X);
4309: }
4310:
4311: /**
4312: * STX_DIR : store register X into direct memory address value : MM=X
4313: *
4314: * HINZVC
4315: * ..**0.
4316: */
4317: static void hd6301_stx_dir(void)
4318: {
4319: Uint16 addr;
4320:
4321: addr = hd6301_read_memory(hd6301_reg_PC+1);
4322:
4323: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4324: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4325:
4326: HD6301_CLR_NZV;
4327: HD6301_SET_NZ16(hd6301_reg_X);
4328: }
4329:
4330: /**
1.1.1.2 root 4331: * SUBB_IND : subtract indexed memory address value from accumulator B : B=B-M
1.1 root 4332: *
4333: * HINZVC
4334: * ..****
4335: */
4336: static void hd6301_subb_ind(void)
4337: {
4338: Uint8 value;
4339: Uint16 result, addr;
4340:
4341: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4342: value = hd6301_read_memory(addr);
4343: result = hd6301_reg_B - value;
4344:
4345: HD6301_CLR_NZVC;
4346: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4347:
4348: hd6301_reg_B = result;
4349: }
4350:
4351: /**
4352: * CMPB_IND : compare indexed memory address value to accumulator B : B-M
4353: *
4354: * HINZVC
4355: * ..****
4356: */
4357: static void hd6301_cmpb_ind(void)
4358: {
4359: Uint8 value;
4360: Uint16 addr, result;
4361:
4362: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4363: value = hd6301_read_memory(addr);
4364: result = hd6301_reg_B - value;
4365:
4366: HD6301_CLR_NZVC;
4367: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4368: }
4369:
4370: /**
1.1.1.2 root 4371: * SBCB_IND : subtract with carry indexed memory address value from accumulator B : B=B-M-C
1.1 root 4372: *
4373: * HINZVC
4374: * ..****
4375: */
4376: static void hd6301_sbcb_ind(void)
4377: {
4378: Uint8 value, carry;
4379: Uint16 addr, result;
4380:
4381: carry = hd6301_REG_CCR_C & 1;
4382: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4383: value = hd6301_read_memory(addr);
4384: result = hd6301_reg_B - value - carry;
4385:
4386: HD6301_CLR_NZVC;
4387: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4388:
4389: hd6301_reg_B = result;
4390: }
4391:
4392: /**
4393: * ADDD_IND : add indexed memory address value from accumulator D : D=D+MM
4394: *
4395: * HINZVC
4396: * ..****
4397: */
4398: static void hd6301_addd_ind(void)
4399: {
4400: Uint16 addr, value, regD;
4401: Uint32 result;
4402:
4403: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4404: value = hd6301_read_memory(addr) << 8;
4405: value += hd6301_read_memory(addr+1);
4406: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4407: result = regD + value;
4408:
4409: hd6301_reg_A = (result >> 8) & 0xff;
4410: hd6301_reg_B = result & 0xff;
4411:
4412: HD6301_CLR_NZVC;
4413: HD6301_SET_FLAGS16(regD, value, result);
4414: }
4415:
4416: /**
4417: * ANDB_IND : and indexed memory address value with accumulator B : B=B&M
4418: *
4419: * HINZVC
4420: * ..**0.
4421: */
4422: static void hd6301_andb_ind(void)
4423: {
4424: Uint16 addr;
4425:
4426: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4427: hd6301_reg_B &= hd6301_read_memory(addr);
4428:
4429: HD6301_CLR_NZV;
4430: HD6301_SET_NZ8(hd6301_reg_B);
4431: }
4432:
4433: /**
4434: * BITB_IND : bit test indexed memory address value with accumulator B : B&M
4435: *
4436: * HINZVC
4437: * ..**0.
4438: */
4439: static void hd6301_bitb_ind(void)
4440: {
4441: Uint8 value;
4442: Uint16 addr;
4443:
4444: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4445: value = hd6301_reg_B & hd6301_read_memory(addr);
4446:
4447: HD6301_CLR_NZV;
4448: HD6301_SET_NZ8(value);
4449: }
4450:
4451: /**
4452: * LDAB_IND : load accumulator B with indexed memory address value : B=M
4453: *
4454: * HINZVC
4455: * ..**0.
4456: */
4457: static void hd6301_ldab_ind(void)
4458: {
4459: Uint16 addr;
4460:
4461: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4462: hd6301_reg_B = hd6301_read_memory(addr);
4463:
4464: HD6301_CLR_NZV;
4465: HD6301_SET_NZ8(hd6301_reg_B);
4466: }
4467:
4468: /**
4469: * STAB_IND : store accumulator B into indexed memory address value : M=B
4470: *
4471: * HINZVC
4472: * ..**0.
4473: */
4474: static void hd6301_stab_ind(void)
4475: {
4476: Uint16 addr;
4477:
4478: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4479: hd6301_write_memory(addr, hd6301_reg_B);
4480:
4481: HD6301_CLR_NZV;
4482: HD6301_SET_NZ8(hd6301_reg_B);
4483: }
4484:
4485: /**
4486: * EORB_IND : exclusive or indexed memory address value with accumulator B : B=B^M
4487: *
4488: * HINZVC
4489: * ..**0.
4490: */
4491: static void hd6301_eorb_ind(void)
4492: {
4493: Uint16 addr;
4494:
4495: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4496: hd6301_reg_B ^= hd6301_read_memory(addr);
4497:
4498: HD6301_CLR_NZV;
4499: HD6301_SET_NZ8(hd6301_reg_B);
4500: }
4501:
4502: /**
4503: * ADCB_IND : add with carry indexed memory address value to accumulator B : B=B+M+C
4504: *
4505: * HINZVC
4506: * *.****
4507: */
4508: static void hd6301_adcb_ind(void)
4509: {
4510: Uint8 value, carry;
4511: Uint16 addr, result;
4512:
4513: carry = hd6301_REG_CCR_C & 1;
4514: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4515: value = hd6301_read_memory(addr);
4516: result = hd6301_reg_B + value + carry;
4517:
4518: HD6301_CLR_HNZVC;
4519: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4520: HD6301_SET_H(hd6301_reg_B, value, result);
4521:
4522: hd6301_reg_B = result;
4523: }
4524:
4525: /**
4526: * ORAB_IND : inclusive or accumulator B with indexed memory address value : B=B|M
4527: *
4528: * HINZVC
4529: * ..**0.
4530: */
4531: static void hd6301_orab_ind(void)
4532: {
4533: Uint16 addr;
4534:
4535: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4536: hd6301_reg_B |= hd6301_read_memory(addr);
4537:
4538: HD6301_CLR_NZV;
4539: HD6301_SET_NZ8(hd6301_reg_B);
4540: }
4541:
4542: /**
4543: * ADDB_IND : add indexed memory address value with accumulator B : B=B+M
4544: *
4545: * HINZVC
4546: * *.****
4547: */
4548: static void hd6301_addb_ind(void)
4549: {
4550: Uint8 value;
4551: Uint16 addr, result;
4552:
4553: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4554: value = hd6301_read_memory(addr);
4555: result = hd6301_reg_B + value;
4556:
4557: HD6301_CLR_HNZVC;
4558: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4559: HD6301_SET_H(hd6301_reg_B, value, result);
4560:
4561: hd6301_reg_B = result;
4562: }
4563:
4564: /**
4565: * LDD_IND : load accumulator D with indexed memory address value : D=MM
4566: *
4567: * HINZVC
4568: * ..**0.
4569: */
4570: static void hd6301_ldd_ind(void)
4571: {
4572: Uint16 addr;
4573:
4574: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4575:
4576: hd6301_reg_A = hd6301_read_memory(addr);
4577: hd6301_reg_B = hd6301_read_memory(addr+1);
4578:
4579: HD6301_CLR_NZV;
4580: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4581: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4582: }
4583:
4584: /**
4585: * STD_IND : store accumulator D into indexed memory address value : MM=D
4586: *
4587: * HINZVC
4588: * ..**0.
4589: */
4590: static void hd6301_std_ind(void)
4591: {
4592: Uint16 addr;
4593:
4594: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4595:
4596: hd6301_write_memory(addr, hd6301_reg_A);
4597: hd6301_write_memory(addr+1, hd6301_reg_B);
4598:
4599: HD6301_CLR_NZV;
4600: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4601: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4602: }
4603:
4604: /**
4605: * LDX_IND : load register X with indexed memory address value : X=MM
4606: *
4607: * HINZVC
4608: * ..**0.
4609: */
4610: static void hd6301_ldx_ind(void)
4611: {
4612: Uint16 addr;
4613:
4614: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4615:
4616: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4617: hd6301_reg_X += hd6301_read_memory(addr+1);
4618:
4619: HD6301_CLR_NZV;
4620: HD6301_SET_NZ16(hd6301_reg_X);
4621: }
4622:
4623: /**
4624: * STX_IND : store register X into indexed memory address value : MM=X
4625: *
4626: * HINZVC
4627: * ..**0.
4628: */
4629: static void hd6301_stx_ind(void)
4630: {
4631: Uint16 addr;
4632:
4633: addr = hd6301_reg_X + hd6301_read_memory(hd6301_reg_PC+1);
4634:
4635: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4636: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4637:
4638: HD6301_CLR_NZV;
4639: HD6301_SET_NZ16(hd6301_reg_X);
4640: }
4641:
4642: /**
1.1.1.2 root 4643: * SUBB_EXT : subtract extended memory address value from accumulator B : B=B-M
1.1 root 4644: *
4645: * HINZVC
4646: * ..****
4647: */
4648: static void hd6301_subb_ext(void)
4649: {
4650: Uint8 value;
4651: Uint16 result, addr;
4652:
4653: addr = hd6301_get_memory_ext();
4654: value = hd6301_read_memory(addr);
4655: result = hd6301_reg_B - value;
4656:
4657: HD6301_CLR_NZVC;
4658: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4659:
4660: hd6301_reg_B = result;
4661: }
4662:
4663: /**
4664: * CMPB_EXT : compare extended memory address value to accumulator B : B-M
4665: *
4666: * HINZVC
4667: * ..****
4668: */
4669: static void hd6301_cmpb_ext(void)
4670: {
4671: Uint8 value;
4672: Uint16 addr, result;
4673:
4674: addr = hd6301_get_memory_ext();
4675: value = hd6301_read_memory(addr);
4676: result = hd6301_reg_B - value;
4677:
4678: HD6301_CLR_NZVC;
4679: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4680: }
4681:
4682: /**
1.1.1.2 root 4683: * SBCB_EXT : subtract with carry extended memory address value from accumulator B : B=B-M-C
1.1 root 4684: *
4685: * HINZVC
4686: * ..****
4687: */
4688: static void hd6301_sbcb_ext(void)
4689: {
4690: Uint8 value, carry;
4691: Uint16 addr, result;
4692:
4693: carry = hd6301_REG_CCR_C & 1;
4694: addr = hd6301_get_memory_ext();
4695: value = hd6301_read_memory(addr);
4696: result = hd6301_reg_B - value - carry;
4697:
4698: HD6301_CLR_NZVC;
4699: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4700:
4701: hd6301_reg_B = result;
4702: }
4703:
4704: /**
4705: * ADDD_EXT : add extended memory address value from accumulator D : D=D+MM
4706: *
4707: * HINZVC
4708: * ..****
4709: */
4710: static void hd6301_addd_ext(void)
4711: {
4712: Uint16 addr, value, regD;
4713: Uint32 result;
4714:
4715: addr = hd6301_get_memory_ext();
4716: value = hd6301_read_memory(addr) << 8;
4717: value += hd6301_read_memory(addr+1);
4718: regD = (hd6301_reg_A << 8) + hd6301_reg_B;
4719: result = regD + value;
4720:
4721: hd6301_reg_A = (result >> 8) & 0xff;
4722: hd6301_reg_B = result & 0xff;
4723:
4724: HD6301_CLR_NZVC;
4725: HD6301_SET_FLAGS16(regD, value, result);
4726: }
4727:
4728: /**
4729: * ANDB_EXT : and extended memory address value with accumulator B : B=B&M
4730: *
4731: * HINZVC
4732: * ..**0.
4733: */
4734: static void hd6301_andb_ext(void)
4735: {
4736: Uint16 addr;
4737:
4738: addr = hd6301_get_memory_ext();
4739: hd6301_reg_B &= hd6301_read_memory(addr);
4740:
4741: HD6301_CLR_NZV;
4742: HD6301_SET_NZ8(hd6301_reg_B);
4743: }
4744:
4745: /**
4746: * BITB_EXT : bit test extended memory address value with accumulator B : B&M
4747: *
4748: * HINZVC
4749: * ..**0.
4750: */
4751: static void hd6301_bitb_ext(void)
4752: {
4753: Uint8 value;
4754: Uint16 addr;
4755:
4756: addr = hd6301_get_memory_ext();
4757: value = hd6301_reg_B & hd6301_read_memory(addr);
4758:
4759: HD6301_CLR_NZV;
4760: HD6301_SET_NZ8(value);
4761: }
4762:
4763: /**
4764: * LDAB_EXT : load accumulator B with extended memory address value : B=M
4765: *
4766: * HINZVC
4767: * ..**0.
4768: */
4769: static void hd6301_ldab_ext(void)
4770: {
4771: Uint16 addr;
4772:
4773: addr = hd6301_get_memory_ext();
4774: hd6301_reg_B = hd6301_read_memory(addr);
4775:
4776: HD6301_CLR_NZV;
4777: HD6301_SET_NZ8(hd6301_reg_B);
4778: }
4779:
4780: /**
4781: * STAB_EXT : store accumulator B into extended memory address value : M=B
4782: *
4783: * HINZVC
4784: * ..**0.
4785: */
4786: static void hd6301_stab_ext(void)
4787: {
4788: Uint16 addr;
4789:
4790: addr = hd6301_get_memory_ext();
4791: hd6301_write_memory(addr, hd6301_reg_B);
4792:
4793: HD6301_CLR_NZV;
4794: HD6301_SET_NZ8(hd6301_reg_B);
4795: }
4796:
4797: /**
4798: * EORB_EXT : exclusive or extended memory address value with accumulator B : B=B^M
4799: *
4800: * HINZVC
4801: * ..**0.
4802: */
4803: static void hd6301_eorb_ext(void)
4804: {
4805: Uint16 addr;
4806:
4807: addr = hd6301_get_memory_ext();
4808: hd6301_reg_B ^= hd6301_read_memory(addr);
4809:
4810: HD6301_CLR_NZV;
4811: HD6301_SET_NZ8(hd6301_reg_B);
4812: }
4813:
4814: /**
4815: * ADCB_EXT : add with carry extended memory address value to accumulator B : B=B+M+C
4816: *
4817: * HINZVC
4818: * *.****
4819: */
4820: static void hd6301_adcb_ext(void)
4821: {
4822: Uint8 value, carry;
4823: Uint16 addr, result;
4824:
4825: carry = hd6301_REG_CCR_C & 1;
4826: addr = hd6301_get_memory_ext();
4827: value = hd6301_read_memory(addr);
4828: result = hd6301_reg_B + value + carry;
4829:
4830: HD6301_CLR_HNZVC;
4831: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4832: HD6301_SET_H(hd6301_reg_B, value, result);
4833:
4834: hd6301_reg_B = result;
4835: }
4836:
4837: /**
4838: * ORAB_EXT : inclusive or accumulator B with extended memory address value : B=B|M
4839: *
4840: * HINZVC
4841: * ..**0.
4842: */
4843: static void hd6301_orab_ext(void)
4844: {
4845: Uint16 addr;
4846:
4847: addr = hd6301_get_memory_ext();
4848: hd6301_reg_B |= hd6301_read_memory(addr);
4849:
4850: HD6301_CLR_NZV;
4851: HD6301_SET_NZ8(hd6301_reg_B);
4852: }
4853:
4854: /**
4855: * ADDB_EXT : add extended memory address value with accumulator B : B=B+M
4856: *
4857: * HINZVC
4858: * *.****
4859: */
4860: static void hd6301_addb_ext(void)
4861: {
4862: Uint8 value;
4863: Uint16 addr, result;
4864:
4865: addr = hd6301_get_memory_ext();
4866: value = hd6301_read_memory(addr);
4867: result = hd6301_reg_B + value;
4868:
4869: HD6301_CLR_HNZVC;
4870: HD6301_SET_FLAGS8(hd6301_reg_B, value, result);
4871: HD6301_SET_H(hd6301_reg_B, value, result);
4872:
4873: hd6301_reg_B = result;
4874: }
4875:
4876: /**
4877: * LDD_EXT : load accumulator D with extended memory address value : D=MM
4878: *
4879: * HINZVC
4880: * ..**0.
4881: */
4882: static void hd6301_ldd_ext(void)
4883: {
4884: Uint16 addr;
4885:
4886: addr = hd6301_get_memory_ext();
4887:
4888: hd6301_reg_A = hd6301_read_memory(addr);
4889: hd6301_reg_B = hd6301_read_memory(addr+1);
4890:
4891: HD6301_CLR_NZV;
4892: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4893: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4894: }
4895:
4896: /**
4897: * STD_EXT : store accumulator D into extended memory address value : MM=D
4898: *
4899: * HINZVC
4900: * ..**0.
4901: */
4902: static void hd6301_std_ext(void)
4903: {
4904: Uint16 addr;
4905:
4906: addr = hd6301_get_memory_ext();
4907:
4908: hd6301_write_memory(addr, hd6301_reg_A);
4909: hd6301_write_memory(addr+1, hd6301_reg_B);
4910:
4911: HD6301_CLR_NZV;
4912: hd6301_reg_CCR |= ((hd6301_reg_A == 0) && (hd6301_reg_B == 0)) << hd6301_REG_CCR_Z;
4913: hd6301_reg_CCR |= (hd6301_reg_A >> 7) << hd6301_REG_CCR_N;
4914: }
4915:
4916: /**
4917: * LDX_EXT : load register X with extended memory address value : X=MM
4918: *
4919: * HINZVC
4920: * ..**0.
4921: */
4922: static void hd6301_ldx_ext(void)
4923: {
4924: Uint16 addr;
4925:
4926: addr = hd6301_get_memory_ext();
4927:
4928: hd6301_reg_X = hd6301_read_memory(addr) << 8;
4929: hd6301_reg_X += hd6301_read_memory(addr+1);
4930:
4931: HD6301_CLR_NZV;
4932: HD6301_SET_NZ16(hd6301_reg_X);
4933: }
4934:
4935: /**
4936: * STX_EXT : store register X into extended memory address value : MM=X
4937: *
4938: * HINZVC
4939: * ..**0.
4940: */
4941: static void hd6301_stx_ext(void)
4942: {
4943: Uint16 addr;
4944:
4945: addr = hd6301_get_memory_ext();
4946:
4947: hd6301_write_memory(addr, hd6301_reg_X >> 8);
4948: hd6301_write_memory(addr+1, hd6301_reg_X & 0xff);
4949:
4950: HD6301_CLR_NZV;
4951: HD6301_SET_NZ16(hd6301_reg_X);
4952: }
4953:
4954:
4955:
4956: /**
4957: * hd6301_disasm : disasm hd6301 memory
4958: */
4959: void hd6301_disasm(void)
4960: {
4961: switch(hd6301_opcode.op_disasm) {
4962: case HD6301_DISASM_UNDEFINED:
4963: sprintf(hd6301_str_instr, "0x%02x : unknown instruction", hd6301_cur_inst);
4964: break;
4965: case HD6301_DISASM_NONE:
4966: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, 0);
4967: break;
4968: case HD6301_DISASM_MEMORY8:
4969: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, hd6301_read_memory(hd6301_reg_PC+1));
4970: break;
4971: case HD6301_DISASM_MEMORY16:
4972: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic, hd6301_get_memory_ext());
4973: break;
4974: case HD6301_DISASM_XIM:
4975: sprintf(hd6301_str_instr, hd6301_opcode.op_mnemonic,
4976: hd6301_read_memory(hd6301_reg_PC+1),
4977: hd6301_read_memory(hd6301_reg_PC+2));
4978: break;
4979: }
4980:
4981: fprintf(stderr, "%02x: %s\n", hd6301_reg_PC, hd6301_str_instr);
4982:
4983: }
4984:
4985: /**
4986: * hd6301_display_registers : display hd6301 registers state
4987: */
4988: void hd6301_display_registers(void)
4989: {
4990: fprintf(stderr, "A: %02x B: %02x\n", hd6301_reg_A, hd6301_reg_B);
4991: fprintf(stderr, "X: %04x CCR: %02x\n", hd6301_reg_X, hd6301_reg_CCR);
4992: fprintf(stderr, "SP: %04x PC: %04x\n", hd6301_reg_SP, hd6301_reg_PC);
4993: }
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