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1.1 root 1: /*
2: Hatari - acia.h
3:
4: This file is distributed under the GNU General Public License, version 2 or at
5: your option any later version. Read the file gpl.txt for details.
6: */
7:
8: #ifndef HATARI_ACIA_H
9: #define HATARI_ACIA_H
10:
11:
12: typedef struct {
13: /* MC6850 internal registers */
14: Uint8 CR; /* Control Register */
15: Uint8 SR; /* Status Register */
16: Uint8 TDR; /* Transmit Data Register */
17: Uint8 RDR; /* Receive Data Register */
18:
19: Uint32 TX_Clock; /* 500 MHz on ST */
20: Uint32 RX_Clock; /* 500 MHz on ST */
21: int Clock_Divider; /* 1, 16 or 64 */
22:
23: Uint8 FirstMasterReset; /* Set to 1 on first use, always 0 after 1st Master Reset */
24: Uint8 SR_Read; /* Set to 1 when SR is read and reset to 0 when RDR is read */
25:
26: int TX_State;
27: Uint8 TSR; /* Transmit Shift Register */
28: Uint8 TX_Size; /* How many data bits left to transmit in TSR (7/8 .. 0) */
29: Uint8 TX_Parity; /* Current parity bit value for transmit */
30: Uint8 TX_StopBits; /* How many stop bits left to transmit (1 or 2) */
31: Uint8 TX_EnableInt; /* When TDRE goes from 0 to 1 : 0=disable interrupt, 1=enable interrupt */
32: Uint8 TX_SendBrk; /* Send a break bit in idle state */
33:
34: int RX_State;
35: Uint8 RSR; /* Receive Shift Register */
36: Uint8 RX_Size; /* How many bits left to receive in RSR (7/8 .. 0) */
37: Uint8 RX_Parity; /* Current parity bit value for receive */
38: Uint8 RX_StopBits; /* How many stop bits left to receive (1 or 2) */
39: Uint8 RX_Overrun; /* Set to 1 if previous RDR was not read when RSR is full */
40:
41: /* Callback functions */
42: Uint8 (*Get_Line_RX) ( void ); /* Input : RX */
43: void (*Set_Line_TX) ( int val ); /* Output : TX */
44: void (*Set_Line_IRQ) ( int val ); /* Output : IRQ */
45:
46: void (*Set_Timers) ( void *pACIA ); /* Start timers to handle RX and TX bits at specified baud rate */
47:
48: Uint8 (*Get_Line_CTS) ( void ); /* Input : Clear To Send (not connected in ST) */
49: Uint8 (*Get_Line_DCD) ( void ); /* Input : Data Carrier Detect (not connected in ST) */
50: void (*Set_Line_RTS) ( int val ); /* Output : Request To Send (not connected in ST) */
51:
52: /* Other variables */
53: char ACIA_Name[ 10 ]; /* IKBD or MIDI */
54:
55: } ACIA_STRUCT;
56:
57:
58: #define ACIA_MAX_NB 2 /* 2 ACIAs in the ST */
59:
60: extern ACIA_STRUCT ACIA_Array[ ACIA_MAX_NB ];
61: extern ACIA_STRUCT *pACIA_IKBD;
62: extern ACIA_STRUCT *pACIA_MIDI;
63:
64:
65:
66: void ACIA_Init ( ACIA_STRUCT *pAllACIA , Uint32 TX_Clock , Uint32 RX_Clock );
67: void ACIA_Reset ( ACIA_STRUCT *pAllACIA );
68: void ACIA_MemorySnapShot_Capture ( bool bSave );
69:
70: void ACIA_InterruptHandler_IKBD ( void );
71: void ACIA_InterruptHandler_MIDI ( void );
72:
73: void ACIA_AddWaitCycles ( void );
74:
75: void ACIA_IKBD_Read_SR ( void );
76: void ACIA_IKBD_Read_RDR ( void );
77: void ACIA_IKBD_Write_CR ( void );
78: void ACIA_IKBD_Write_TDR ( void );
79:
80:
81:
82: #endif /* ifndef HATARI_ACIA_H */
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