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1.1 root 1: /*
1.1.1.3 root 2: Hatari - fdc.h
3:
1.1.1.12 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1 root 6: */
7:
1.1.1.3 root 8: #ifndef HATARI_FDC_H
9: #define HATARI_FDC_H
10:
1.1 root 11:
1.1.1.13 root 12: /* Values for the Size byte in the Address Field of a sector */
13: #define FDC_SECTOR_SIZE_MASK 0x03 /* Only bits 0-1 of the Sector size in the ID field are used by the WD1772 */
14:
15: #define FDC_SECTOR_SIZE_128 0 /* Sector size used in the ID fields */
16: #define FDC_SECTOR_SIZE_256 1
17: #define FDC_SECTOR_SIZE_512 2
18: #define FDC_SECTOR_SIZE_1024 3
19:
20:
21: /* These are some standard GAP values to format a track with 9 or 10 sectors */
22: /* When handling ST/MSA disk images, those values are required to get accurate */
23: /* timings when emulating disk's spin and index's position. */
24: /* Those values are also use to build standard sector in STX disk images when */
25: /* track contains only the sector data and no sector info. */
26: #define FDC_TRACK_LAYOUT_STANDARD_GAP1 60 /* Track Pre GAP : 0x4e */
27: #define FDC_TRACK_LAYOUT_STANDARD_GAP2 12 /* Sector ID Pre GAP : 0x00 */
28: #define FDC_TRACK_LAYOUT_STANDARD_GAP3a 22 /* Sector ID Post GAP : 0x4e */
29: #define FDC_TRACK_LAYOUT_STANDARD_GAP3b 12 /* Sector DATA Pre GAP : 0x00 */
30: #define FDC_TRACK_LAYOUT_STANDARD_GAP4 40 /* Sector DATA Pre GAP : 0x4e */
31: #define FDC_TRACK_LAYOUT_STANDARD_GAP5 0 /* Track Post GAP : 0x4e (to fill the rest of the track, value is variable) */
32: /* GAP5 is 664 bytes for 9 sectors or 50 bytes for 10 sectors */
33:
34: /* Size of a raw standard 512 byte sector in a track, including ID field and all GAPs : 614 bytes */
35: /* (this must be the same as the data returned in FDC_UpdateReadTrackCmd() ) */
36: #define FDC_TRACK_LAYOUT_STANDARD_RAW_SECTOR_512 ( FDC_TRACK_LAYOUT_STANDARD_GAP2 \
37: + 3 + 1 + 6 + FDC_TRACK_LAYOUT_STANDARD_GAP3a + FDC_TRACK_LAYOUT_STANDARD_GAP3b \
38: + 3 + 1 + 512 + 2 + FDC_TRACK_LAYOUT_STANDARD_GAP4 )
39:
40:
41: #define FDC_IRQ_SOURCE_COMPLETE (1<<0) /* IRQ set after completing a command */
42: #define FDC_IRQ_SOURCE_INDEX (1<<1) /* IRQ set when COND_IP is set and index is reached */
43: #define FDC_IRQ_SOURCE_FORCED (1<<2) /* IRQ was forced by a previous Dx command with COND_IMMEDIATE */
44: #define FDC_IRQ_SOURCE_HDC (1<<3) /* IRQ set by HDC */
45: #define FDC_IRQ_SOURCE_OTHER (1<<4) /* IRQ set by other parts (IPF) */
46:
47:
1.1.1.15! root 48: /* Option bits in the command register */
! 49: #define FDC_COMMAND_BIT_VERIFY (1<<2) /* 0=no verify after type I, 1=verify after type I */
! 50: #define FDC_COMMAND_BIT_HEAD_LOAD (1<<2) /* for type II/III 0=no extra delay, 1=add 30 ms delay to set the head */
! 51: #define FDC_COMMAND_BIT_SPIN_UP (1<<3) /* 0=enable motor's spin up, 1=disable motor's spin up */
! 52: #define FDC_COMMAND_BIT_UPDATE_TRACK (1<<4) /* 0=don't update TR after type I, 1=update TR after type I */
! 53: #define FDC_COMMAND_BIT_MULTIPLE_SECTOR (1<<4) /* 0=read/write only 1 sector, 1=read/write many sectors */
! 54:
! 55:
! 56: #define FDC_INTERRUPT_COND_IP (1<<2) /* Force interrupt on Index Pulse */
! 57: #define FDC_INTERRUPT_COND_IMMEDIATE (1<<3) /* Force interrupt immediate */
! 58:
! 59: extern int FDC_StepRate_ms[];
! 60:
! 61:
1.1.1.11 root 62: extern void FDC_MemorySnapShot_Capture ( bool bSave );
1.1.1.13 root 63: extern void FDC_Init ( void );
64: extern void FDC_Reset ( bool bCold );
1.1.1.11 root 65: extern void FDC_SetDMAStatus ( bool bError );
1.1.1.3 root 66:
1.1.1.13 root 67: extern void FDC_SetIRQ ( Uint8 IRQ_Source );
68: extern void FDC_ClearIRQ ( void );
1.1.1.14 root 69: extern void FDC_ClearHdcIRQ(void);
1.1.1.11 root 70: extern void FDC_InterruptHandler_Update ( void );
1.1.1.3 root 71:
1.1.1.13 root 72: extern void FDC_Drive_Set_BusyLed ( Uint8 SR );
73: extern int FDC_Get_Statusbar_Text ( char *text, size_t maxlen );
74: extern void FDC_Drive_Set_Enable ( int Drive , bool value );
75: extern void FDC_Drive_Set_NumberOfHeads ( int Drive , int NbrHeads );
76: extern void FDC_InsertFloppy ( int Drive );
77: extern void FDC_EjectFloppy ( int Drive );
78: extern void FDC_SetDriveSide ( Uint8 io_porta_old , Uint8 io_porta_new );
79: extern int FDC_GetBytesPerTrack ( int Drive );
80:
81: extern int FDC_IndexPulse_GetCurrentPos_FdcCycles ( Uint32 *pFdcCyclesPerRev );
82: extern int FDC_IndexPulse_GetCurrentPos_NbBytes ( void );
83: extern int FDC_IndexPulse_GetState ( void );
84: extern int FDC_NextIndexPulse_FdcCycles ( void );
85:
86: extern Uint8 FDC_GetCmdType ( Uint8 CR );
87:
1.1.1.11 root 88: extern void FDC_DiskController_WriteWord ( void );
89: extern void FDC_DiskControllerStatus_ReadWord ( void );
90: extern void FDC_DmaModeControl_WriteWord ( void );
91: extern void FDC_DmaStatus_ReadWord ( void );
1.1.1.13 root 92: extern int FDC_DMA_GetModeControl_R_WR ( void );
93: extern void FDC_DMA_FIFO_Push ( Uint8 Byte );
94: extern Uint8 FDC_DMA_FIFO_Pull ( void );
1.1.1.15! root 95: extern int FDC_DMA_GetSectorCount ( void );
1.1.1.13 root 96:
97: extern void FDC_Buffer_Reset ( void );
98: extern void FDC_Buffer_Add_Timing ( Uint8 Byte , Uint16 Timing );
99: extern void FDC_Buffer_Add ( Uint8 Byte );
100: extern Uint16 FDC_Buffer_Read_Timing ( void );
101: extern Uint8 FDC_Buffer_Read_Byte ( void );
102: extern Uint8 FDC_Buffer_Read_Byte_pos ( int pos );
103: extern int FDC_Buffer_Get_Size ( void );
104:
1.1.1.11 root 105: extern void FDC_DmaAddress_ReadByte ( void );
106: extern void FDC_DmaAddress_WriteByte ( void );
107: extern Uint32 FDC_GetDMAAddress ( void );
108: extern void FDC_WriteDMAAddress ( Uint32 Address );
109:
110: extern void FDC_FloppyMode_ReadByte ( void );
111: extern void FDC_FloppyMode_WriteByte ( void );
1.1.1.3 root 112:
113: #endif /* ifndef HATARI_FDC_H */
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