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1.1 root 1: /*
2: Hatari - ioMem.h
3:
1.1.1.6 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1 root 6: */
7:
8: #ifndef HATARI_IOMEM_H
9: #define HATARI_IOMEM_H
10:
1.1.1.3 root 11: #include "config.h"
12:
13: #if ENABLE_SMALL_MEM
14: # include "sysdeps.h"
15: # include "maccess.h"
16: # include "main.h"
17: extern uae_u8 *IOmemory;
18: # define IoMem (IOmemory-0xff0000)
1.1 root 19: #else
1.1.1.3 root 20: # include "stMemory.h"
21: # define IoMem STRam
22: #endif /* ENABLE_SMALL_MEM */
1.1 root 23:
24:
1.1.1.7 ! root 25: extern int nIoMemAccessSize;
1.1 root 26: extern Uint32 IoAccessBaseAddress;
1.1.1.3 root 27: extern Uint32 IoAccessCurrentAddress;
1.1.1.7 ! root 28:
! 29: extern int IoAccessInstrCount;
1.1 root 30:
31:
1.1.1.4 root 32: /**
33: * Read 32-bit word from IO memory space without interception.
34: * NOTE - value will be converted to PC endian.
35: */
1.1 root 36: static inline Uint32 IoMem_ReadLong(Uint32 Address)
37: {
38: Address &= 0x0ffffff;
39: return do_get_mem_long(&IoMem[Address]);
40: }
41:
1.1.1.4 root 42:
43: /**
44: * Read 16-bit word from IO memory space without interception.
45: * NOTE - value will be converted to PC endian.
46: */
1.1 root 47: static inline Uint16 IoMem_ReadWord(Uint32 Address)
48: {
49: Address &= 0x0ffffff;
50: return do_get_mem_word(&IoMem[Address]);
51: }
52:
1.1.1.4 root 53:
54: /**
55: * Read 8-bit byte from IO memory space without interception.
56: */
1.1 root 57: static inline Uint8 IoMem_ReadByte(Uint32 Address)
58: {
59: Address &= 0x0ffffff;
60: return IoMem[Address];
61: }
62:
63:
1.1.1.4 root 64: /**
65: * Write 32-bit word into IO memory space without interception.
66: * NOTE - value will be convert to 68000 endian
67: */
1.1 root 68: static inline void IoMem_WriteLong(Uint32 Address, Uint32 Var)
69: {
70: Address &= 0x0ffffff;
71: do_put_mem_long(&IoMem[Address], Var);
72: }
73:
1.1.1.4 root 74:
75: /**
76: * Write 16-bit word into IO memory space without interception.
77: * NOTE - value will be convert to 68000 endian.
78: */
1.1 root 79: static inline void IoMem_WriteWord(Uint32 Address, Uint16 Var)
80: {
81: Address &= 0xffffff;
82: do_put_mem_word(&IoMem[Address], Var);
83: }
84:
1.1.1.4 root 85:
86: /**
87: * Write 8-bit byte into IO memory space without interception.
88: */
1.1 root 89: static inline void IoMem_WriteByte(Uint32 Address, Uint8 Var)
90: {
91: Address &= 0x0ffffff;
92: IoMem[Address] = Var;
93: }
94:
95:
96: extern void IoMem_Init(void);
97: extern void IoMem_UnInit(void);
1.1.1.5 root 98: extern void IoMem_Init_FalconInSTeBuscompatibilityMode(Uint8 value);
99:
1.1 root 100:
1.1.1.7 ! root 101: extern uae_u32 REGPARAM3 IoMem_bget(uaecptr addr);
! 102: extern uae_u32 REGPARAM3 IoMem_wget(uaecptr addr);
! 103: extern uae_u32 REGPARAM3 IoMem_lget(uaecptr addr);
! 104:
! 105: extern void REGPARAM3 IoMem_bput(uaecptr addr, uae_u32 val);
! 106: extern void REGPARAM3 IoMem_wput(uaecptr addr, uae_u32 val);
! 107: extern void REGPARAM3 IoMem_lput(uaecptr addr, uae_u32 val);
1.1 root 108:
109: extern void IoMem_BusErrorEvenReadAccess(void);
110: extern void IoMem_BusErrorOddReadAccess(void);
111: extern void IoMem_BusErrorEvenWriteAccess(void);
112: extern void IoMem_BusErrorOddWriteAccess(void);
113: extern void IoMem_VoidRead(void);
1.1.1.5 root 114: extern void IoMem_VoidRead_00(void);
1.1 root 115: extern void IoMem_VoidWrite(void);
116: extern void IoMem_WriteWithoutInterception(void);
117: extern void IoMem_ReadWithoutInterception(void);
118:
1.1.1.5 root 119: extern void IoMem_MemorySnapShot_Capture(bool bSave);
120:
1.1 root 121: #endif
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