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1.1 root 1: /*
2: Hatari - ioMem.h
3:
1.1.1.6 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1 root 6: */
7:
8: #ifndef HATARI_IOMEM_H
9: #define HATARI_IOMEM_H
10:
1.1.1.3 root 11: #include "config.h"
12:
13: #if ENABLE_SMALL_MEM
14: # include "sysdeps.h"
15: # include "maccess.h"
16: # include "main.h"
17: extern uae_u8 *IOmemory;
18: # define IoMem (IOmemory-0xff0000)
1.1 root 19: #else
1.1.1.3 root 20: # include "stMemory.h"
21: # define IoMem STRam
22: #endif /* ENABLE_SMALL_MEM */
1.1 root 23:
24:
1.1.1.7 root 25: extern int nIoMemAccessSize;
1.1.1.8 root 26: extern Uint32 IoAccessFullAddress;
1.1 root 27: extern Uint32 IoAccessBaseAddress;
1.1.1.3 root 28: extern Uint32 IoAccessCurrentAddress;
1.1.1.7 root 29:
30: extern int IoAccessInstrCount;
1.1 root 31:
1.1.1.9 ! root 32: enum FALCON_BUS_MODE {
! 33: STE_BUS_COMPATIBLE,
! 34: FALCON_ONLY_BUS
! 35: };
1.1 root 36:
1.1.1.4 root 37: /**
38: * Read 32-bit word from IO memory space without interception.
39: * NOTE - value will be converted to PC endian.
40: */
1.1 root 41: static inline Uint32 IoMem_ReadLong(Uint32 Address)
42: {
43: Address &= 0x0ffffff;
44: return do_get_mem_long(&IoMem[Address]);
45: }
46:
1.1.1.4 root 47:
48: /**
49: * Read 16-bit word from IO memory space without interception.
50: * NOTE - value will be converted to PC endian.
51: */
1.1 root 52: static inline Uint16 IoMem_ReadWord(Uint32 Address)
53: {
54: Address &= 0x0ffffff;
55: return do_get_mem_word(&IoMem[Address]);
56: }
57:
1.1.1.4 root 58:
59: /**
60: * Read 8-bit byte from IO memory space without interception.
61: */
1.1 root 62: static inline Uint8 IoMem_ReadByte(Uint32 Address)
63: {
64: Address &= 0x0ffffff;
65: return IoMem[Address];
66: }
67:
68:
1.1.1.4 root 69: /**
70: * Write 32-bit word into IO memory space without interception.
71: * NOTE - value will be convert to 68000 endian
72: */
1.1 root 73: static inline void IoMem_WriteLong(Uint32 Address, Uint32 Var)
74: {
75: Address &= 0x0ffffff;
76: do_put_mem_long(&IoMem[Address], Var);
77: }
78:
1.1.1.4 root 79:
80: /**
81: * Write 16-bit word into IO memory space without interception.
82: * NOTE - value will be convert to 68000 endian.
83: */
1.1 root 84: static inline void IoMem_WriteWord(Uint32 Address, Uint16 Var)
85: {
86: Address &= 0xffffff;
87: do_put_mem_word(&IoMem[Address], Var);
88: }
89:
1.1.1.4 root 90:
91: /**
92: * Write 8-bit byte into IO memory space without interception.
93: */
1.1 root 94: static inline void IoMem_WriteByte(Uint32 Address, Uint8 Var)
95: {
96: Address &= 0x0ffffff;
97: IoMem[Address] = Var;
98: }
99:
100:
101: extern void IoMem_Init(void);
102: extern void IoMem_UnInit(void);
1.1.1.9 ! root 103: extern void IoMem_Reset(void);
! 104: extern void IoMem_SetFalconBusMode(enum FALCON_BUS_MODE mode);
! 105: extern bool IoMem_IsFalconBusMode(void);
1.1 root 106:
1.1.1.7 root 107: extern uae_u32 REGPARAM3 IoMem_bget(uaecptr addr);
108: extern uae_u32 REGPARAM3 IoMem_wget(uaecptr addr);
109: extern uae_u32 REGPARAM3 IoMem_lget(uaecptr addr);
110:
111: extern void REGPARAM3 IoMem_bput(uaecptr addr, uae_u32 val);
112: extern void REGPARAM3 IoMem_wput(uaecptr addr, uae_u32 val);
113: extern void REGPARAM3 IoMem_lput(uaecptr addr, uae_u32 val);
1.1 root 114:
115: extern void IoMem_BusErrorEvenReadAccess(void);
116: extern void IoMem_BusErrorOddReadAccess(void);
117: extern void IoMem_BusErrorEvenWriteAccess(void);
118: extern void IoMem_BusErrorOddWriteAccess(void);
119: extern void IoMem_VoidRead(void);
1.1.1.5 root 120: extern void IoMem_VoidRead_00(void);
1.1 root 121: extern void IoMem_VoidWrite(void);
122: extern void IoMem_WriteWithoutInterception(void);
123: extern void IoMem_ReadWithoutInterception(void);
124:
1.1.1.5 root 125: extern void IoMem_MemorySnapShot_Capture(bool bSave);
126:
1.1 root 127: #endif
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