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1.1 root 1: /*
2: Hatari - ioMemTabSTE.c
3:
1.1.1.7 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1 root 6:
7: Table with hardware IO handlers for the STE.
8: */
1.1.1.3 root 9: const char IoMemTabSTE_fileid[] = "Hatari ioMemTabSTE.c : " __DATE__ " " __TIME__;
1.1 root 10:
11: #include "main.h"
1.1.1.9 root 12: #include "configuration.h"
1.1 root 13: #include "dmaSnd.h"
14: #include "fdc.h"
1.1.1.7 root 15: #include "acia.h"
1.1 root 16: #include "ioMem.h"
17: #include "ioMemTables.h"
1.1.1.9 root 18: #include "m68000.h"
1.1 root 19: #include "joy.h"
20: #include "mfp.h"
21: #include "midi.h"
22: #include "psg.h"
23: #include "rs232.h"
24: #include "rtc.h"
1.1.1.5 root 25: #include "screen.h"
1.1 root 26: #include "video.h"
27: #include "blitter.h"
1.1.1.9 root 28: #include "statusbar.h"
1.1.1.10! root 29: #include "stMemory.h"
1.1.1.9 root 30:
31:
32: /**
33: * Take into account Mega STe Cache/Processor Control register $ff8e21.b
34: $FFFF8E21 Mega STe Cache/Processor Control
35: BIT 1 : Cache (0 - disabled, 1 - enabled)
36: BIT 0 : CPU Speed (0 - 8mhz, 1 - 16mhz)
37:
38: We handle only bit 0, bit 1 is ignored (cache is not emulated)
39: */
40: void IoMemTabMegaSTE_CacheCpuCtrl_WriteByte(void)
41: {
42: Uint8 busCtrl = IoMem_ReadByte(0xff8e21);
43:
1.1.1.10! root 44: /* 68000 Frequency changed ? We change freq only in 68000 mode for a
! 45: * normal MegaSTE, if the user did not request a faster one manually */
! 46: if (ConfigureParams.System.nCpuLevel == 0 && ConfigureParams.System.nCpuFreq <= 16)
1.1.1.9 root 47: {
48: if ((busCtrl & 0x1) == 1) {
49: /* 16 Mhz bus for 68000 */
1.1.1.10! root 50: Configuration_ChangeCpuFreq ( 16 );
1.1.1.9 root 51: }
52: else {
53: /* 8 Mhz bus for 68000 */
1.1.1.10! root 54: Configuration_ChangeCpuFreq ( 8 );
1.1.1.9 root 55: }
56: }
57: Statusbar_UpdateInfo(); /* Update clock speed in the status bar */
58: }
1.1 root 59:
60:
61: /*-----------------------------------------------------------------------*/
62: /*
63: List of functions to handle read/write hardware interceptions for a STE.
64: */
65: const INTERCEPT_ACCESS_FUNC IoMemTable_STE[] =
66: {
67: { 0xff8000, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.10! root 68: { 0xff8001, SIZE_BYTE, STMemory_MMU_Config_ReadByte, STMemory_MMU_Config_WriteByte }, /* Memory configuration */
1.1 root 69: { 0xff8002, 14, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus errors here */
70:
71: { 0xff8200, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.9 root 72: { 0xff8201, SIZE_BYTE, IoMem_ReadWithoutInterception, Video_ScreenBase_WriteByte }, /* Video base high byte */
1.1 root 73: { 0xff8202, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.9 root 74: { 0xff8203, SIZE_BYTE, IoMem_ReadWithoutInterception, Video_ScreenBase_WriteByte }, /* Video base med byte */
1.1 root 75: { 0xff8204, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
76: { 0xff8205, SIZE_BYTE, Video_ScreenCounter_ReadByte, Video_ScreenCounter_WriteByte },
77: { 0xff8206, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
78: { 0xff8207, SIZE_BYTE, Video_ScreenCounter_ReadByte, Video_ScreenCounter_WriteByte },
79: { 0xff8208, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
80: { 0xff8209, SIZE_BYTE, Video_ScreenCounter_ReadByte, Video_ScreenCounter_WriteByte },
81: { 0xff820a, SIZE_BYTE, Video_Sync_ReadByte, Video_Sync_WriteByte },
1.1.1.5 root 82: { 0xff820b, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here : return 0 not ff */
1.1 root 83: { 0xff820c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.9 root 84: { 0xff820d, SIZE_BYTE, Video_BaseLow_ReadByte, Video_ScreenBase_WriteByte },
1.1 root 85: { 0xff820e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
86: { 0xff820f, SIZE_BYTE, Video_LineWidth_ReadByte, Video_LineWidth_WriteByte },
1.1.1.8 root 87: { 0xff8240, SIZE_WORD, Video_Color0_ReadWord, Video_Color0_WriteWord }, /* COLOR 0 */
88: { 0xff8242, SIZE_WORD, Video_Color1_ReadWord, Video_Color1_WriteWord }, /* COLOR 1 */
89: { 0xff8244, SIZE_WORD, Video_Color2_ReadWord, Video_Color2_WriteWord }, /* COLOR 2 */
90: { 0xff8246, SIZE_WORD, Video_Color3_ReadWord, Video_Color3_WriteWord }, /* COLOR 3 */
91: { 0xff8248, SIZE_WORD, Video_Color4_ReadWord, Video_Color4_WriteWord }, /* COLOR 4 */
92: { 0xff824a, SIZE_WORD, Video_Color5_ReadWord, Video_Color5_WriteWord }, /* COLOR 5 */
93: { 0xff824c, SIZE_WORD, Video_Color6_ReadWord, Video_Color6_WriteWord }, /* COLOR 6 */
94: { 0xff824e, SIZE_WORD, Video_Color7_ReadWord, Video_Color7_WriteWord }, /* COLOR 7 */
95: { 0xff8250, SIZE_WORD, Video_Color8_ReadWord, Video_Color8_WriteWord }, /* COLOR 8 */
96: { 0xff8252, SIZE_WORD, Video_Color9_ReadWord, Video_Color9_WriteWord }, /* COLOR 9 */
97: { 0xff8254, SIZE_WORD, Video_Color10_ReadWord, Video_Color10_WriteWord }, /* COLOR 10 */
98: { 0xff8256, SIZE_WORD, Video_Color11_ReadWord, Video_Color11_WriteWord }, /* COLOR 11 */
99: { 0xff8258, SIZE_WORD, Video_Color12_ReadWord, Video_Color12_WriteWord }, /* COLOR 12 */
100: { 0xff825a, SIZE_WORD, Video_Color13_ReadWord, Video_Color13_WriteWord }, /* COLOR 13 */
101: { 0xff825c, SIZE_WORD, Video_Color14_ReadWord, Video_Color14_WriteWord }, /* COLOR 14 */
102: { 0xff825e, SIZE_WORD, Video_Color15_ReadWord, Video_Color15_WriteWord }, /* COLOR 15 */
1.1.1.9 root 103: { 0xff8260, SIZE_BYTE, Video_Res_ReadByte, Video_Res_WriteByte },
1.1.1.5 root 104: { 0xff8261, 3, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus errors here : return 0 not ff */
1.1.1.9 root 105: { 0xff8264, SIZE_BYTE, Video_HorScroll_Read_8264, Video_HorScroll_Write_8264 }, /* STE horizontal fine scrolling (no prefetch) */
106: { 0xff8265, SIZE_BYTE, Video_HorScroll_Read_8265, Video_HorScroll_Write_8265 }, /* STE horizontal fine scrolling */
1.1.1.5 root 107: { 0xff8266, 26, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus errors here : return 0 not ff */
1.1 root 108:
109: { 0xff8604, SIZE_WORD, FDC_DiskControllerStatus_ReadWord, FDC_DiskController_WriteWord },
110: { 0xff8606, SIZE_WORD, FDC_DmaStatus_ReadWord, FDC_DmaModeControl_WriteWord },
111: { 0xff8608, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.6 root 112: { 0xff8609, SIZE_BYTE, FDC_DmaAddress_ReadByte, FDC_DmaAddress_WriteByte }, /* DMA base and counter high byte */
1.1 root 113: { 0xff860a, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.6 root 114: { 0xff860b, SIZE_BYTE, FDC_DmaAddress_ReadByte, FDC_DmaAddress_WriteByte }, /* DMA base and counter med byte */
1.1 root 115: { 0xff860c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.6 root 116: { 0xff860d, SIZE_BYTE, FDC_DmaAddress_ReadByte, FDC_DmaAddress_WriteByte }, /* DMA base and counter low byte */
1.1 root 117: { 0xff860e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
118: { 0xff860f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
119:
1.1.1.9 root 120: { 0xff8800, SIZE_BYTE, PSG_ff8800_ReadByte, PSG_ff8800_WriteByte },
121: { 0xff8801, SIZE_BYTE, PSG_ff880x_ReadByte, PSG_ff8801_WriteByte },
122: { 0xff8802, SIZE_BYTE, PSG_ff880x_ReadByte, PSG_ff8802_WriteByte },
123: { 0xff8803, SIZE_BYTE, PSG_ff880x_ReadByte, PSG_ff8803_WriteByte },
1.1 root 124:
125: { 0xff8900, SIZE_WORD, DmaSnd_SoundControl_ReadWord, DmaSnd_SoundControl_WriteWord }, /* DMA sound control */
126: { 0xff8902, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 127: { 0xff8903, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameStartHigh_WriteByte },/* DMA sound frame start high */
1.1 root 128: { 0xff8904, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 129: { 0xff8905, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameStartMed_WriteByte }, /* DMA sound frame start med */
1.1 root 130: { 0xff8906, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 131: { 0xff8907, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameStartLow_WriteByte }, /* DMA sound frame start low */
1.1 root 132: { 0xff8908, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 133: { 0xff8909, SIZE_BYTE, DmaSnd_FrameCountHigh_ReadByte, DmaSnd_FrameCountHigh_WriteByte },/* DMA sound frame count high */
1.1 root 134: { 0xff890a, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 135: { 0xff890b, SIZE_BYTE, DmaSnd_FrameCountMed_ReadByte, DmaSnd_FrameCountMed_WriteByte }, /* DMA sound frame count med */
1.1 root 136: { 0xff890c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 137: { 0xff890d, SIZE_BYTE, DmaSnd_FrameCountLow_ReadByte, DmaSnd_FrameCountLow_WriteByte }, /* DMA sound frame count low */
1.1 root 138: { 0xff890e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 139: { 0xff890f, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameEndHigh_WriteByte }, /* DMA sound frame end high */
1.1 root 140: { 0xff8910, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 141: { 0xff8911, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameEndMed_WriteByte }, /* DMA sound frame end med */
1.1 root 142: { 0xff8912, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 143: { 0xff8913, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameEndLow_WriteByte }, /* DMA sound frame end low */
1.1 root 144: { 0xff8914, 12, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus errors here */
1.1.1.4 root 145: { 0xff8920, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* DMA sound mode control (contains 0) */
146: { 0xff8921, SIZE_BYTE, DmaSnd_SoundModeCtrl_ReadByte, DmaSnd_SoundModeCtrl_WriteByte }, /* DMA sound mode control */
1.1 root 147: { 0xff8922, SIZE_WORD, DmaSnd_MicrowireData_ReadWord, DmaSnd_MicrowireData_WriteWord }, /* Microwire data */
148: { 0xff8924, SIZE_WORD, DmaSnd_MicrowireMask_ReadWord, DmaSnd_MicrowireMask_WriteWord }, /* Microwire mask */
149: { 0xff8926, 26, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus errors here */
150:
1.1.1.3 root 151: { 0xff8a00, SIZE_WORD, Blitter_Halftone00_ReadWord, Blitter_Halftone00_WriteWord }, /* Blitter halftone RAM 0 */
152: { 0xff8a02, SIZE_WORD, Blitter_Halftone01_ReadWord, Blitter_Halftone01_WriteWord }, /* Blitter halftone RAM 1 */
153: { 0xff8a04, SIZE_WORD, Blitter_Halftone02_ReadWord, Blitter_Halftone02_WriteWord }, /* Blitter halftone RAM 2 */
154: { 0xff8a06, SIZE_WORD, Blitter_Halftone03_ReadWord, Blitter_Halftone03_WriteWord }, /* Blitter halftone RAM 3 */
155: { 0xff8a08, SIZE_WORD, Blitter_Halftone04_ReadWord, Blitter_Halftone04_WriteWord }, /* Blitter halftone RAM 4 */
156: { 0xff8a0a, SIZE_WORD, Blitter_Halftone05_ReadWord, Blitter_Halftone05_WriteWord }, /* Blitter halftone RAM 5 */
157: { 0xff8a0c, SIZE_WORD, Blitter_Halftone06_ReadWord, Blitter_Halftone06_WriteWord }, /* Blitter halftone RAM 6 */
158: { 0xff8a0e, SIZE_WORD, Blitter_Halftone07_ReadWord, Blitter_Halftone07_WriteWord }, /* Blitter halftone RAM 7 */
159: { 0xff8a10, SIZE_WORD, Blitter_Halftone08_ReadWord, Blitter_Halftone08_WriteWord }, /* Blitter halftone RAM 8 */
160: { 0xff8a12, SIZE_WORD, Blitter_Halftone09_ReadWord, Blitter_Halftone09_WriteWord }, /* Blitter halftone RAM 9 */
161: { 0xff8a14, SIZE_WORD, Blitter_Halftone10_ReadWord, Blitter_Halftone10_WriteWord }, /* Blitter halftone RAM 10 */
162: { 0xff8a16, SIZE_WORD, Blitter_Halftone11_ReadWord, Blitter_Halftone11_WriteWord }, /* Blitter halftone RAM 11 */
163: { 0xff8a18, SIZE_WORD, Blitter_Halftone12_ReadWord, Blitter_Halftone12_WriteWord }, /* Blitter halftone RAM 12 */
164: { 0xff8a1a, SIZE_WORD, Blitter_Halftone13_ReadWord, Blitter_Halftone13_WriteWord }, /* Blitter halftone RAM 13 */
165: { 0xff8a1c, SIZE_WORD, Blitter_Halftone14_ReadWord, Blitter_Halftone14_WriteWord }, /* Blitter halftone RAM 14 */
166: { 0xff8a1e, SIZE_WORD, Blitter_Halftone15_ReadWord, Blitter_Halftone15_WriteWord }, /* Blitter halftone RAM 15 */
167: { 0xff8a20, SIZE_WORD, Blitter_SourceXInc_ReadWord, Blitter_SourceXInc_WriteWord }, /* Blitter source x increment */
168: { 0xff8a22, SIZE_WORD, Blitter_SourceYInc_ReadWord, Blitter_SourceYInc_WriteWord }, /* Blitter source y increment */
1.1.1.2 root 169: { 0xff8a24, SIZE_LONG, Blitter_SourceAddr_ReadLong, Blitter_SourceAddr_WriteLong }, /* Blitter source address */
1.1 root 170: { 0xff8a28, SIZE_WORD, Blitter_Endmask1_ReadWord, Blitter_Endmask1_WriteWord },
171: { 0xff8a2a, SIZE_WORD, Blitter_Endmask2_ReadWord, Blitter_Endmask2_WriteWord },
172: { 0xff8a2c, SIZE_WORD, Blitter_Endmask3_ReadWord, Blitter_Endmask3_WriteWord },
1.1.1.3 root 173: { 0xff8a2e, SIZE_WORD, Blitter_DestXInc_ReadWord, Blitter_DestXInc_WriteWord }, /* Blitter dest. x increment */
174: { 0xff8a30, SIZE_WORD, Blitter_DestYInc_ReadWord, Blitter_DestYInc_WriteWord }, /* Blitter dest. y increment */
1.1 root 175: { 0xff8a32, SIZE_LONG, Blitter_DestAddr_ReadLong, Blitter_DestAddr_WriteLong },
176: { 0xff8a36, SIZE_WORD, Blitter_WordsPerLine_ReadWord, Blitter_WordsPerLine_WriteWord },
177: { 0xff8a38, SIZE_WORD, Blitter_LinesPerBitblock_ReadWord, Blitter_LinesPerBitblock_WriteWord },
178: { 0xff8a3a, SIZE_BYTE, Blitter_HalftoneOp_ReadByte, Blitter_HalftoneOp_WriteByte },
179: { 0xff8a3b, SIZE_BYTE, Blitter_LogOp_ReadByte, Blitter_LogOp_WriteByte },
180: { 0xff8a3c, SIZE_BYTE, Blitter_Control_ReadByte, Blitter_Control_WriteByte },
181: { 0xff8a3d, SIZE_BYTE, Blitter_Skew_ReadByte, Blitter_Skew_WriteByte },
182: { 0xff8a3e, SIZE_WORD, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
183:
184: { 0xff9000, SIZE_WORD, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.9 root 185: { 0xff9201, SIZE_BYTE, Joy_StePadButtons_ReadByte, IoMem_WriteWithoutInterception }, /* Joypad fire buttons */
1.1 root 186: { 0xff9202, SIZE_WORD, Joy_StePadMulti_ReadWord, Joy_StePadMulti_WriteWord }, /* Joypad directions/buttons/selection */
187: { 0xff9211, SIZE_BYTE, IoMem_VoidRead, IoMem_WriteWithoutInterception }, /* Joypad 0 X position (?) */
188: { 0xff9213, SIZE_BYTE, IoMem_VoidRead, IoMem_WriteWithoutInterception }, /* Joypad 0 Y position (?) */
189: { 0xff9215, SIZE_BYTE, IoMem_VoidRead, IoMem_WriteWithoutInterception }, /* Joypad 1 X position (?) */
190: { 0xff9217, SIZE_BYTE, IoMem_VoidRead, IoMem_WriteWithoutInterception }, /* Joypad 1 Y position (?) */
191: { 0xff9220, SIZE_WORD, IoMem_VoidRead, IoMem_WriteWithoutInterception }, /* Lightpen X position */
192: { 0xff9222, SIZE_WORD, IoMem_VoidRead, IoMem_WriteWithoutInterception }, /* Lightpen Y position */
193:
194: { 0xfffa01, SIZE_BYTE, MFP_GPIP_ReadByte, MFP_GPIP_WriteByte },
195: { 0xfffa03, SIZE_BYTE, MFP_ActiveEdge_ReadByte, MFP_ActiveEdge_WriteByte },
196: { 0xfffa05, SIZE_BYTE, MFP_DataDirection_ReadByte, MFP_DataDirection_WriteByte },
197: { 0xfffa07, SIZE_BYTE, MFP_EnableA_ReadByte, MFP_EnableA_WriteByte },
198: { 0xfffa09, SIZE_BYTE, MFP_EnableB_ReadByte, MFP_EnableB_WriteByte },
199: { 0xfffa0b, SIZE_BYTE, MFP_PendingA_ReadByte, MFP_PendingA_WriteByte },
200: { 0xfffa0d, SIZE_BYTE, MFP_PendingB_ReadByte, MFP_PendingB_WriteByte },
201: { 0xfffa0f, SIZE_BYTE, MFP_InServiceA_ReadByte, MFP_InServiceA_WriteByte },
202: { 0xfffa11, SIZE_BYTE, MFP_InServiceB_ReadByte, MFP_InServiceB_WriteByte },
203: { 0xfffa13, SIZE_BYTE, MFP_MaskA_ReadByte, MFP_MaskA_WriteByte },
204: { 0xfffa15, SIZE_BYTE, MFP_MaskB_ReadByte, MFP_MaskB_WriteByte },
205: { 0xfffa17, SIZE_BYTE, MFP_VectorReg_ReadByte, MFP_VectorReg_WriteByte },
206: { 0xfffa19, SIZE_BYTE, MFP_TimerACtrl_ReadByte, MFP_TimerACtrl_WriteByte },
207: { 0xfffa1b, SIZE_BYTE, MFP_TimerBCtrl_ReadByte, MFP_TimerBCtrl_WriteByte },
208: { 0xfffa1d, SIZE_BYTE, MFP_TimerCDCtrl_ReadByte, MFP_TimerCDCtrl_WriteByte },
209: { 0xfffa1f, SIZE_BYTE, MFP_TimerAData_ReadByte, MFP_TimerAData_WriteByte },
210: { 0xfffa21, SIZE_BYTE, MFP_TimerBData_ReadByte, MFP_TimerBData_WriteByte },
211: { 0xfffa23, SIZE_BYTE, MFP_TimerCData_ReadByte, MFP_TimerCData_WriteByte },
212: { 0xfffa25, SIZE_BYTE, MFP_TimerDData_ReadByte, MFP_TimerDData_WriteByte },
213:
214: { 0xfffa27, SIZE_BYTE, RS232_SCR_ReadByte, RS232_SCR_WriteByte }, /* Sync character register */
215: { 0xfffa29, SIZE_BYTE, RS232_UCR_ReadByte, RS232_UCR_WriteByte }, /* USART control register */
216: { 0xfffa2b, SIZE_BYTE, RS232_RSR_ReadByte, RS232_RSR_WriteByte }, /* Receiver status register */
217: { 0xfffa2d, SIZE_BYTE, RS232_TSR_ReadByte, RS232_TSR_WriteByte }, /* Transmitter status register */
218: { 0xfffa2f, SIZE_BYTE, RS232_UDR_ReadByte, RS232_UDR_WriteByte }, /* USART data register */
219:
220: { 0xfffa31, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
221: { 0xfffa33, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
222: { 0xfffa35, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
223: { 0xfffa37, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
224: { 0xfffa39, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
225: { 0xfffa3b, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
226: { 0xfffa3d, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
227: { 0xfffa3f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
228:
1.1.1.7 root 229: { 0xfffc00, SIZE_BYTE, ACIA_IKBD_Read_SR, ACIA_IKBD_Write_CR },
1.1 root 230: { 0xfffc01, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.7 root 231: { 0xfffc02, SIZE_BYTE, ACIA_IKBD_Read_RDR, ACIA_IKBD_Write_TDR },
1.1 root 232: { 0xfffc03, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
233: { 0xfffc04, SIZE_BYTE, Midi_Control_ReadByte, Midi_Control_WriteByte },
234: { 0xfffc05, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
235: { 0xfffc06, SIZE_BYTE, Midi_Data_ReadByte, Midi_Data_WriteByte },
236: { 0xfffc07, 26, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus errors here */
237:
238: { 0xfffc21, SIZE_BYTE, Rtc_SecondsUnits_ReadByte, IoMem_WriteWithoutInterception },
239: { 0xfffc22, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
240: { 0xfffc23, SIZE_BYTE, Rtc_SecondsTens_ReadByte, IoMem_WriteWithoutInterception },
241: { 0xfffc24, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
242: { 0xfffc25, SIZE_BYTE, Rtc_MinutesUnits_ReadByte, Rtc_MinutesUnits_WriteByte },
243: { 0xfffc26, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
244: { 0xfffc27, SIZE_BYTE, Rtc_MinutesTens_ReadByte, Rtc_MinutesTens_WriteByte },
245: { 0xfffc28, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
246: { 0xfffc29, SIZE_BYTE, Rtc_HoursUnits_ReadByte, IoMem_WriteWithoutInterception },
247: { 0xfffc2a, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
248: { 0xfffc2b, SIZE_BYTE, Rtc_HoursTens_ReadByte, IoMem_WriteWithoutInterception },
249: { 0xfffc2c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
250: { 0xfffc2d, SIZE_BYTE, Rtc_Weekday_ReadByte, IoMem_WriteWithoutInterception },
251: { 0xfffc2e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
252: { 0xfffc2f, SIZE_BYTE, Rtc_DayUnits_ReadByte, IoMem_WriteWithoutInterception },
253: { 0xfffc30, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
254: { 0xfffc31, SIZE_BYTE, Rtc_DayTens_ReadByte, IoMem_WriteWithoutInterception },
255: { 0xfffc32, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
256: { 0xfffc33, SIZE_BYTE, Rtc_MonthUnits_ReadByte, IoMem_WriteWithoutInterception },
257: { 0xfffc34, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
258: { 0xfffc35, SIZE_BYTE, Rtc_MonthTens_ReadByte, IoMem_WriteWithoutInterception },
259: { 0xfffc36, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
260: { 0xfffc37, SIZE_BYTE, Rtc_YearUnits_ReadByte, IoMem_WriteWithoutInterception },
261: { 0xfffc38, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
262: { 0xfffc39, SIZE_BYTE, Rtc_YearTens_ReadByte, IoMem_WriteWithoutInterception },
263: { 0xfffc3a, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
264: { 0xfffc3b, SIZE_BYTE, Rtc_ClockMod_ReadByte, Rtc_ClockMod_WriteByte },
265: { 0xfffc3c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
266: { 0xfffc3d, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* Clock test */
267: { 0xfffc3e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
268: { 0xfffc3f, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* Clock reset */
269: { 0xfffc40, 448, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus errors here */
270:
271: { 0, 0, NULL, NULL }
272: };
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