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1.1 root 1: /*
2: Hatari - ioMemTabTT.c
3:
1.1.1.8 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1 root 6:
7: Table with hardware IO handlers for the TT.
1.1.1.9 root 8:
9: NOTE [NP] : contrary to some unofficial documentations, the TT doesn't have
10: hardware scrolling similar to the STE. As such, registers FF820E,
11: FF820F, FF8264 and FF8265 are not available and seem to return undefined values
12: based on the data last seen on the bus (this would need more tests on a TT)
13: move.b $ff820e,d0 -> FF
14: move.b $ff820f,d0 -> 01
15: move.b $ff8264,d0 -> 82
16: move.b $ff8265,d0 -> 65
1.1 root 17: */
1.1.1.3 root 18: const char IoMemTabTT_fileid[] = "Hatari ioMemTabTT.c : " __DATE__ " " __TIME__;
1.1 root 19:
20: #include "main.h"
1.1.1.10 root 21: #include "configuration.h"
1.1 root 22: #include "dmaSnd.h"
23: #include "fdc.h"
1.1.1.8 root 24: #include "acia.h"
1.1 root 25: #include "ioMem.h"
26: #include "ioMemTables.h"
27: #include "joy.h"
28: #include "mfp.h"
29: #include "midi.h"
1.1.1.12! root 30: #include "ncr5380.h"
1.1 root 31: #include "nvram.h"
32: #include "psg.h"
33: #include "rs232.h"
34: #include "rtc.h"
1.1.1.12! root 35: #include "scc.h"
1.1.1.5 root 36: #include "screen.h"
1.1 root 37: #include "video.h"
38: #include "blitter.h"
1.1.1.11 root 39: #include "stMemory.h"
40:
1.1 root 41:
1.1.1.10 root 42: /**
43: * The register at $FF9200.b represents the DIP switches from the
44: * TT motherboard. The meaning of the switches is as follows:
45: *
46: * 1 off (on = CaTTamaran installed, not an official setting)
47: * 2 - 6 off
48: * 7 on = 1.4mb HD floppy drive fitted
49: * 8 off (on = Disables the DMA sound hardware)
50: *
51: * Switch 1 is represented by the lowest bit in the $FF9200 register,
52: * and switch 8 is represented by the highest bit. Logic is inverted,
53: * i.e. when the switch is "on", the bit is 0.
54: */
55: static void IoMemTabTT_ReadDIPSwitches(void)
56: {
57: IoMem_WriteWord(0xff9200, 0xbf00);
58: }
1.1 root 59:
1.1.1.10 root 60: /**
61: * List of functions to handle read/write hardware interceptions for a TT.
62: */
1.1 root 63: const INTERCEPT_ACCESS_FUNC IoMemTable_TT[] =
64: {
65: { 0xff8000, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.11 root 66: { 0xff8001, SIZE_BYTE, STMemory_MMU_Config_ReadByte, STMemory_MMU_Config_WriteByte }, /* Memory configuration */
1.1 root 67:
68: { 0xff8200, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.10 root 69: { 0xff8201, SIZE_BYTE, IoMem_ReadWithoutInterception, Video_ScreenBase_WriteByte }, /* Video base high byte */
1.1 root 70: { 0xff8202, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.10 root 71: { 0xff8203, SIZE_BYTE, IoMem_ReadWithoutInterception, Video_ScreenBase_WriteByte }, /* Video base med byte */
1.1 root 72: { 0xff8204, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
73: { 0xff8205, SIZE_BYTE, Video_ScreenCounter_ReadByte, Video_ScreenCounter_WriteByte },
74: { 0xff8206, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
75: { 0xff8207, SIZE_BYTE, Video_ScreenCounter_ReadByte, Video_ScreenCounter_WriteByte },
76: { 0xff8208, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
77: { 0xff8209, SIZE_BYTE, Video_ScreenCounter_ReadByte, Video_ScreenCounter_WriteByte },
78: { 0xff820a, SIZE_BYTE, Video_Sync_ReadByte, Video_Sync_WriteByte },
1.1.1.5 root 79: { 0xff820b, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here : return 0 not ff */
80: { 0xff820c, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here : return 0 not ff */
1.1.1.10 root 81: { 0xff820d, SIZE_BYTE, Video_BaseLow_ReadByte, Video_ScreenBase_WriteByte },
1.1 root 82: { 0xff820e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.9 root 83: { 0xff820f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.10 root 84: { 0xff8240, 16*SIZE_WORD, IoMem_ReadWithoutInterception, Video_TTColorRegs_STRegWrite }, /* 16 TT ST-palette entries */
85: { 0xff8260, SIZE_BYTE, Video_Res_ReadByte, Video_Res_WriteByte },
1.1.1.5 root 86: { 0xff8261, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus errors here : return 0 not ff */
1.1 root 87: { 0xff8262, SIZE_WORD, IoMem_ReadWithoutInterception, Video_TTShiftMode_WriteWord }, /* TT screen mode */
1.1.1.10 root 88: { 0xff8264, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception },
89: { 0xff8265, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* Horizontal fine scrolling */
1.1.1.5 root 90: { 0xff8266, 26, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus errors here : return 0 not ff */
1.1 root 91:
1.1.1.10 root 92: { 0xff8400, 512, IoMem_ReadWithoutInterception, Video_TTColorRegs_Write }, /* 256 TT palette entries */
1.1 root 93:
94: { 0xff8604, SIZE_WORD, FDC_DiskControllerStatus_ReadWord, FDC_DiskController_WriteWord },
95: { 0xff8606, SIZE_WORD, FDC_DmaStatus_ReadWord, FDC_DmaModeControl_WriteWord },
96: { 0xff8608, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.6 root 97: { 0xff8609, SIZE_BYTE, FDC_DmaAddress_ReadByte, FDC_DmaAddress_WriteByte }, /* DMA base and counter high byte */
1.1 root 98: { 0xff860a, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.6 root 99: { 0xff860b, SIZE_BYTE, FDC_DmaAddress_ReadByte, FDC_DmaAddress_WriteByte }, /* DMA base and counter med byte */
1.1 root 100: { 0xff860c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.6 root 101: { 0xff860d, SIZE_BYTE, FDC_DmaAddress_ReadByte, FDC_DmaAddress_WriteByte }, /* DMA base and counter low byte */
1.1 root 102: { 0xff860e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
103: { 0xff860f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
104:
1.1.1.12! root 105: { 0xff8700, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 106: { 0xff8701, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Address Pointer (Highest byte) */
! 107: { 0xff8702, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 108: { 0xff8703, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Address Pointer (High byte) */
! 109: { 0xff8704, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 110: { 0xff8705, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Address Pointer (Low byte) */
! 111: { 0xff8706, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 112: { 0xff8707, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Address Pointer (Lowest byte) */
! 113: { 0xff8708, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 114: { 0xff8709, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Byte Count (Highest byte) */
! 115: { 0xff870a, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 116: { 0xff870b, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Byte Count (High byte) */
! 117: { 0xff870c, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 118: { 0xff870d, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Byte Count (Low byte) */
! 119: { 0xff870e, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 120: { 0xff870f, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI DMA Byte Count (Lowest byte) */
! 121: { 0xff8710, SIZE_WORD, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI Residue Data Register (High Word) */
! 122: { 0xff8712, SIZE_WORD, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCSI Residue Data Register (Low Word) */
! 123: { 0xff8714, SIZE_WORD, IoMem_ReadWithoutInterception, Ncr5380_TT_DMA_Ctrl_WriteWord }, /* SCSI Control register */
! 124: { 0xff8716, 10, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 125:
! 126: { 0xff8780, 16, Ncr5380_IoMemTT_ReadByte, Ncr5380_IoMemTT_WriteByte }, /* TT SCSI controller */
1.1 root 127:
1.1.1.7 root 128: { 0xff8800, SIZE_BYTE, PSG_ff8800_ReadByte, PSG_ff8800_WriteByte },
129: { 0xff8802, SIZE_BYTE, PSG_ff880x_ReadByte, PSG_ff8802_WriteByte },
1.1 root 130:
131: { 0xff8900, SIZE_WORD, DmaSnd_SoundControl_ReadWord, DmaSnd_SoundControl_WriteWord }, /* DMA sound control */
132: { 0xff8902, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 133: { 0xff8903, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameStartHigh_WriteByte },/* DMA sound frame start high */
1.1 root 134: { 0xff8904, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 135: { 0xff8905, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameStartMed_WriteByte }, /* DMA sound frame start med */
1.1 root 136: { 0xff8906, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 137: { 0xff8907, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameStartLow_WriteByte }, /* DMA sound frame start low */
1.1 root 138: { 0xff8908, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 139: { 0xff8909, SIZE_BYTE, DmaSnd_FrameCountHigh_ReadByte, DmaSnd_FrameCountHigh_WriteByte },/* DMA sound frame count high */
1.1 root 140: { 0xff890a, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 141: { 0xff890b, SIZE_BYTE, DmaSnd_FrameCountMed_ReadByte, DmaSnd_FrameCountMed_WriteByte }, /* DMA sound frame count med */
1.1 root 142: { 0xff890c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 143: { 0xff890d, SIZE_BYTE, DmaSnd_FrameCountLow_ReadByte, DmaSnd_FrameCountLow_WriteByte }, /* DMA sound frame count low */
1.1 root 144: { 0xff890e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 145: { 0xff890f, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameEndHigh_WriteByte }, /* DMA sound frame end high */
1.1 root 146: { 0xff8910, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 147: { 0xff8911, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameEndMed_WriteByte }, /* DMA sound frame end med */
1.1 root 148: { 0xff8912, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1.1.5 root 149: { 0xff8913, SIZE_BYTE, IoMem_ReadWithoutInterception, DmaSnd_FrameEndLow_WriteByte }, /* DMA sound frame end low */
1.1.1.4 root 150: { 0xff8920, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* DMA sound mode control (contains 0) */
151: { 0xff8921, SIZE_BYTE, DmaSnd_SoundModeCtrl_ReadByte, DmaSnd_SoundModeCtrl_WriteByte }, /* DMA sound mode control */
1.1 root 152: { 0xff8922, SIZE_WORD, DmaSnd_MicrowireData_ReadWord, DmaSnd_MicrowireData_WriteWord }, /* Microwire data */
153: { 0xff8924, SIZE_WORD, DmaSnd_MicrowireMask_ReadWord, DmaSnd_MicrowireMask_WriteWord }, /* Microwire mask */
154: { 0xff8926, 26, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus errors here */
155:
156: { 0xff8961, SIZE_BYTE, NvRam_Select_ReadByte, NvRam_Select_WriteByte }, /* NVRAM/RTC chip */
157: { 0xff8963, SIZE_BYTE, NvRam_Data_ReadByte, NvRam_Data_WriteByte }, /* NVRAM/RTC chip */
158:
159: /* Note: The TT does not have a blitter (0xff8a00 - 0xff8a3e) */
160:
1.1.1.12! root 161: { 0xff8c00, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 162: { 0xff8c01, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Address Pointer (Highest byte) */
! 163: { 0xff8c02, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 164: { 0xff8c03, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Address Pointer (High byte) */
! 165: { 0xff8c04, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 166: { 0xff8c05, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Address Pointer (Low byte) */
! 167: { 0xff8c06, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 168: { 0xff8c07, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Address Pointer (Lowest byte) */
! 169: { 0xff8c08, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 170: { 0xff8c09, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Byte Count (Highest byte) */
! 171: { 0xff8c0a, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 172: { 0xff8c0b, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Byte Count (High byte) */
! 173: { 0xff8c0c, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 174: { 0xff8c0d, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Byte Count (Low byte) */
! 175: { 0xff8c0e, SIZE_BYTE, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 176: { 0xff8c0f, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC DMA Byte Count (Lowest byte) */
! 177: { 0xff8c10, SIZE_WORD, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC Residue Data Register (High Word) */
! 178: { 0xff8c12, SIZE_WORD, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCC Residue Data Register (Low Word) */
! 179: { 0xff8c14, SIZE_WORD, IoMem_VoidRead_00, IoMem_WriteWithoutInterception }, /* SCC Control register */
! 180: { 0xff8c16, 10, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
! 181:
! 182: { 0xff8c80, 8, SCC_IoMem_ReadByte, SCC_IoMem_WriteByte }, /* SCC */
! 183: { 0xff8c88, 8, IoMem_VoidRead_00, IoMem_VoidWrite }, /* No bus error here */
1.1 root 184:
1.1.1.10 root 185: { 0xff8e01, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU system interrupt mask */
186: { 0xff8e03, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU system interrupt state */
187: { 0xff8e05, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU system interrupter */
188: { 0xff8e07, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU VME interrupter */
189: { 0xff8e09, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU general purpose 1 */
190: { 0xff8e0b, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU general purpose 2 */
191: { 0xff8e0d, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU VME interrupt mask */
192: { 0xff8e0f, 1, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, /* SCU VME interrupt state */
1.1 root 193:
1.1.1.10 root 194: { 0xff9000, SIZE_WORD, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
195: { 0xff9200, SIZE_WORD, IoMemTabTT_ReadDIPSwitches, IoMem_VoidWrite }, /* DIP switches */
1.1 root 196:
197: { 0xfffa01, SIZE_BYTE, MFP_GPIP_ReadByte, MFP_GPIP_WriteByte },
198: { 0xfffa03, SIZE_BYTE, MFP_ActiveEdge_ReadByte, MFP_ActiveEdge_WriteByte },
199: { 0xfffa05, SIZE_BYTE, MFP_DataDirection_ReadByte, MFP_DataDirection_WriteByte },
200: { 0xfffa07, SIZE_BYTE, MFP_EnableA_ReadByte, MFP_EnableA_WriteByte },
201: { 0xfffa09, SIZE_BYTE, MFP_EnableB_ReadByte, MFP_EnableB_WriteByte },
202: { 0xfffa0b, SIZE_BYTE, MFP_PendingA_ReadByte, MFP_PendingA_WriteByte },
203: { 0xfffa0d, SIZE_BYTE, MFP_PendingB_ReadByte, MFP_PendingB_WriteByte },
204: { 0xfffa0f, SIZE_BYTE, MFP_InServiceA_ReadByte, MFP_InServiceA_WriteByte },
205: { 0xfffa11, SIZE_BYTE, MFP_InServiceB_ReadByte, MFP_InServiceB_WriteByte },
206: { 0xfffa13, SIZE_BYTE, MFP_MaskA_ReadByte, MFP_MaskA_WriteByte },
207: { 0xfffa15, SIZE_BYTE, MFP_MaskB_ReadByte, MFP_MaskB_WriteByte },
208: { 0xfffa17, SIZE_BYTE, MFP_VectorReg_ReadByte, MFP_VectorReg_WriteByte },
209: { 0xfffa19, SIZE_BYTE, MFP_TimerACtrl_ReadByte, MFP_TimerACtrl_WriteByte },
210: { 0xfffa1b, SIZE_BYTE, MFP_TimerBCtrl_ReadByte, MFP_TimerBCtrl_WriteByte },
211: { 0xfffa1d, SIZE_BYTE, MFP_TimerCDCtrl_ReadByte, MFP_TimerCDCtrl_WriteByte },
212: { 0xfffa1f, SIZE_BYTE, MFP_TimerAData_ReadByte, MFP_TimerAData_WriteByte },
213: { 0xfffa21, SIZE_BYTE, MFP_TimerBData_ReadByte, MFP_TimerBData_WriteByte },
214: { 0xfffa23, SIZE_BYTE, MFP_TimerCData_ReadByte, MFP_TimerCData_WriteByte },
215: { 0xfffa25, SIZE_BYTE, MFP_TimerDData_ReadByte, MFP_TimerDData_WriteByte },
216:
217: { 0xfffa27, SIZE_BYTE, RS232_SCR_ReadByte, RS232_SCR_WriteByte }, /* Sync character register */
218: { 0xfffa29, SIZE_BYTE, RS232_UCR_ReadByte, RS232_UCR_WriteByte }, /* USART control register */
219: { 0xfffa2b, SIZE_BYTE, RS232_RSR_ReadByte, RS232_RSR_WriteByte }, /* Receiver status register */
220: { 0xfffa2d, SIZE_BYTE, RS232_TSR_ReadByte, RS232_TSR_WriteByte }, /* Transmitter status register */
221: { 0xfffa2f, SIZE_BYTE, RS232_UDR_ReadByte, RS232_UDR_WriteByte }, /* USART data register */
222:
223: { 0xfffa31, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
224: { 0xfffa33, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
225: { 0xfffa35, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
226: { 0xfffa37, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
227: { 0xfffa39, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
228: { 0xfffa3b, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
229: { 0xfffa3d, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
230: { 0xfffa3f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
231:
1.1.1.12! root 232: /* TODO: Second MFP of the TT ... */
! 233: { 0xfffa81, SIZE_BYTE, Ncr5380_TT_GPIP_ReadByte, IoMem_VoidWrite }, /* TT MFP GPIP */
! 234: { 0xfffa83, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP AER */
! 235: { 0xfffa85, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP DDR */
! 236: { 0xfffa87, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP IERA */
! 237: { 0xfffa89, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP IERB */
! 238: { 0xfffa8b, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP IPRA */
! 239: { 0xfffa8d, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP IPRB */
! 240: { 0xfffa8f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP ISRA */
! 241: { 0xfffa91, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP ISRB */
! 242: { 0xfffa93, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP IMRA */
! 243: { 0xfffa95, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP IMRB */
! 244: { 0xfffa97, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP VR */
! 245: { 0xfffa99, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TACR */
! 246: { 0xfffa9b, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TBCR */
! 247: { 0xfffa9d, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TCDCR */
! 248: { 0xfffa9f, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TADR */
! 249: { 0xfffaa1, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TBDR */
! 250: { 0xfffaa3, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TCDR */
! 251: { 0xfffaa5, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TDDR */
! 252: { 0xfffaa7, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP SCR */
! 253: { 0xfffaa9, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP UCR */
! 254: { 0xfffaab, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP RSR */
! 255: { 0xfffaad, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP TSR */
! 256: { 0xfffaaf, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* TT MFP UDR */
! 257:
! 258: { 0xfffab1, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
! 259: { 0xfffab3, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
! 260: { 0xfffab5, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
! 261: { 0xfffab7, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
! 262: { 0xfffab9, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
! 263: { 0xfffabb, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
! 264: { 0xfffabd, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
! 265: { 0xfffabf, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1 root 266:
1.1.1.8 root 267: { 0xfffc00, SIZE_BYTE, ACIA_IKBD_Read_SR, ACIA_IKBD_Write_CR },
268: { 0xfffc02, SIZE_BYTE, ACIA_IKBD_Read_RDR, ACIA_IKBD_Write_TDR },
1.1 root 269: { 0xfffc04, SIZE_BYTE, Midi_Control_ReadByte, Midi_Control_WriteByte },
270: { 0xfffc06, SIZE_BYTE, Midi_Data_ReadByte, Midi_Data_WriteByte },
1.1.1.5 root 271: { 0xfffc08, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
272: { 0xfffc0a, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
273: { 0xfffc0c, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
274: { 0xfffc0e, SIZE_BYTE, IoMem_VoidRead, IoMem_VoidWrite }, /* No bus error here */
1.1 root 275:
276: { 0, 0, NULL, NULL }
277: };
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