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1.1 root 1: /*
1.1.1.4 root 2: Hatari - psg.c
1.1 root 3:
1.1.1.4 root 4: This file is distributed under the GNU Public License, version 2 or at
5: your option any later version. Read the file gpl.txt for details.
1.1.1.3 root 6:
1.1.1.4 root 7: Programmable Sound Generator (YM-2149) - PSG
1.1.1.3 root 8:
1.1.1.4 root 9: Also used for the printer (centronics) port emulation (PSG Port B, Register 15)
1.1 root 10: */
1.1.1.7 root 11:
12:
13: /* 2007/04/14 [NP] First approximation to get cycle accurate accesses to ff8800/02 */
14: /* by cumulating wait state of 1 cycle and rounding the final */
15: /* result to 4. */
16: /* 2007/04/29 [NP] Functions PSG_Void_WriteByte and PSG_Void_ReadByte to handle */
17: /* accesses to $ff8801/03. These adresses have no effect, but they */
18: /* must give a 1 cycle wait state (e.g. move.l d0,ff8800). */
19: /* 2007/09/29 [NP] Replace printf by calls to HATARI_TRACE. */
20: /* 2007/10/23 [NP] In PSG_Void_WriteByte, add a wait state only if no wait state */
21: /* were added so far (hack, but gives good result). */
22: /* 2007/11/18 [NP] In PSG_DataRegister_WriteByte, set unused bit to 0, in case */
23: /* the data reg is read later (fix Mindbomb Demo / BBC). */
1.1.1.9 root 24: /* 2008/04/20 [NP] In PSG_DataRegister_WriteByte, set unused bit to 0 for register */
25: /* 6 too (noise period). */
26: /* 2008/07/27 [NP] Better separation between accesses to the YM hardware registers */
27: /* and the sound rendering routines. Use Sound_WriteReg() to pass */
28: /* all writes to the sound rendering functions. This allows to */
29: /* have sound.c independant of psg.c (to ease replacement of */
30: /* sound.c by another rendering method). */
31: /* 2008/08/11 [NP] Set drive leds. */
32: /* 2008/10/16 [NP] When writing to $ff8800, register select should not be masked */
33: /* with 0xf, it's a real 8 bits register where all bits are */
34: /* significant. This means only value <16 should be considered as */
35: /* valid register selection. When reg select is >= 16, all writes */
36: /* and reads in $ff8802 should be ignored. */
37: /* (fix European Demo Intro, which sets addr reg to 0x10 when */
38: /* sample playback is disabled). */
1.1.1.10 root 39: /* 2008/12/21 [NP] After testing different cases on a real STF, rewrite registers */
40: /* handling. As only pins BC1 and BDIR are used in an Atari to */
41: /* address the YM2149, this means only 1 bit is necessary to access*/
42: /* select/data registers. Other variations of the $ff88xx addresses*/
43: /* will point to either $ff8800 or $ff8802. Only bit 1 of $ff88xx */
44: /* is useful to know which register is accessed in the YM2149. */
45: /* So, it's possible to access the YM2149 with $ff8801 and $ff8803 */
46: /* but under conditions : the write to a shadow address (bit 0=1) */
47: /* can't be made by an instruction that writes to the same address */
48: /* with bit 0=0 at the same time (.W or .L access). */
49: /* In that case, only the address with bit 0=0 is taken into */
50: /* account. This means a write to $ff8801/03 will succeed only if */
51: /* the access size is .B (byte) or the opcode is a movep (because */
52: /* in that case we won't access the same register with 2 different */
53: /* addresses) (fix the game X-Out, which uses movep.w to write to */
54: /* $ff8801/03). */
55: /* Refactorize some code for cleaner handling of these accesses. */
56: /* Only reads to $ff8800 will return a data, reads to $ff8801/02/03*/
57: /* always return 0xff (tested on STF). */
58: /* When PSGRegisterSelect > 15, reads to $ff8800 also return 0xff. */
59: /* 2009/01/24 [NP] Remove redundant test, as movep implies SIZE_BYTE access. */
1.1.1.13! root 60: /* 2011/10/30 [NP] There's a special case when reading a register from $ff8800 : */
! 61: /* if the register number was not changed since the last write, */
! 62: /* then we must return the value that was written to $ff8802 */
! 63: /* without masking the unused bit (fix the game Murders In Venice, */
! 64: /* which expects to read $10 from reg 3). */
1.1.1.7 root 65:
66:
67: /* Emulating wait states when accessing $ff8800/01/02/03 with different 'move' variants */
68: /* is a complex task. So far, adding 1 cycle wait state to each access and rounding the */
69: /* final number to 4 gives some good results, but this is certainly not the way it's */
70: /* working for real in the ST. */
71: /* The following examples show some verified wait states for different accesses : */
72: /* lea $ffff8800,a1 */
73: /* lea $ffff8802,a2 */
74: /* lea $ffff8801,a3 */
75: /* */
76: /* movep.w d1,(a1) ; 20 16+4 (ventura loader) */
77: /* movep.l d1,(a1) ; 28 24+4 (ventura loader, ulm loader) */
78: /* */
79: /* movep.l d6,0(a5) ; 28 24+4 (SNY I, TCB) */
80: /* movep.w d5,0(a5) ; 20 16+4 (SNY I, TCB) */
81: /* */
82: /* move.b d1,(a1) ; 12 8+4 */
83: /* move.b d1,(a2) ; 12 8+4 */
84: /* move.b d1,(a3) ; 12 8+4 (crickey ulm hidden) */
85: /* */
86: /* move.w d1,(a1) ; 12 8+4 */
87: /* move.w d1,(a2) ; 12 8+4 */
88: /* move.l d1,(a1) ; 16 12+4 (ulm loader) */
89: /* */
90: /* movem.l d1,(a1) ; 20 16+4 */
91: /* movem.l d1-d2,(a1) ; 28 24+4 */
92: /* movem.l d1-d3,(a1) ; 40 32+4+4 */
93: /* movem.l d1-d4,(a1) ; 48 40+4+4 */
94: /* movem.l d1-d5,(a1) ; 60 48+4+4+4 */
95: /* movem.l d1-d6,(a1) ; 68 56+4+4+4 */
96: /* movem.l d1-d7,(a1) ; 80 64+4+4+4+4 */
97: /* movem.l d0-d7,(a1) ; 88 72+4+4+4+4 */
98: /* */
1.1.1.10 root 99: /* movep.w d0,(a3) (X-Out) */
100: /* */
1.1.1.7 root 101: /* This gives the following "model" : */
102: /* - each access to $ff8800 or $ff8802 add 1 cycle wait state */
1.1.1.10 root 103: /* - accesses to $ff8801 or $ff8803 are considered "valid" only if we don't access */
104: /* the corresponding "non shadow" addresses $ff8800/02 at the same time. */
105: /* This means only .B size (move.b for example) or movep opcode will work. */
106: /* If the access is valid, add 1 cycle wait state, else ignore the write and */
107: /* don't add any cycle. */
1.1.1.7 root 108:
109:
110:
1.1.1.11 root 111: const char PSG_fileid[] = "Hatari psg.c : " __DATE__ " " __TIME__;
1.1 root 112:
113: #include "main.h"
1.1.1.3 root 114: #include "configuration.h"
1.1.1.4 root 115: #include "ioMem.h"
1.1.1.5 root 116: #include "joy.h"
1.1.1.7 root 117: #include "log.h"
1.1.1.4 root 118: #include "m68000.h"
1.1 root 119: #include "memorySnapShot.h"
120: #include "sound.h"
1.1.1.4 root 121: #include "printer.h" /* because Printer I/O goes through PSG Register 15 */
1.1.1.3 root 122: #include "psg.h"
1.1.1.7 root 123: #if ENABLE_DSP_EMU
124: #include "falcon/dsp.h"
125: #endif
1.1.1.12 root 126: #include "screen.h"
1.1.1.7 root 127: #include "video.h"
1.1.1.9 root 128: #include "statusbar.h"
129: #include "mfp.h"
130:
1.1 root 131:
1.1.1.13! root 132: Uint8 PSGRegisterSelect; /* Write to 0xff8800 sets the register number used in read/write accesses */
! 133: Uint8 PSGRegisterReadData; /* Value returned when reading from 0xff8800 */
! 134: Uint8 PSGRegisters[16]; /* Registers in PSG, see PSG_REG_xxxx */
1.1.1.4 root 135:
1.1.1.9 root 136: static unsigned int LastStrobe=0; /* Falling edge of Strobe used for printer */
1.1 root 137:
138:
139: /*-----------------------------------------------------------------------*/
1.1.1.7 root 140: /**
141: * Reset variables used in PSG
142: */
1.1 root 143: void PSG_Reset(void)
144: {
1.1.1.13! root 145: int i;
! 146:
1.1.1.4 root 147: PSGRegisterSelect = 0;
1.1.1.13! root 148: PSGRegisterReadData = 0;
1.1.1.4 root 149: memset(PSGRegisters, 0, sizeof(PSGRegisters));
1.1.1.13! root 150: for ( i=0 ; i<14 ; i++ ) /* Update sound's emulation registers */
! 151: Sound_WriteReg ( i , 0 );
! 152:
1.1.1.9 root 153: LastStrobe=0;
1.1 root 154: }
155:
1.1.1.2 root 156:
157: /*-----------------------------------------------------------------------*/
1.1.1.7 root 158: /**
159: * Save/Restore snapshot of local variables ('MemorySnapShot_Store' handles type)
160: */
1.1.1.9 root 161: void PSG_MemorySnapShot_Capture(bool bSave)
1.1 root 162: {
1.1.1.4 root 163: /* Save/Restore details */
164: MemorySnapShot_Store(&PSGRegisterSelect, sizeof(PSGRegisterSelect));
1.1.1.13! root 165: MemorySnapShot_Store(&PSGRegisterReadData, sizeof(PSGRegisterReadData));
1.1.1.4 root 166: MemorySnapShot_Store(PSGRegisters, sizeof(PSGRegisters));
1.1.1.9 root 167: MemorySnapShot_Store(&LastStrobe, sizeof(LastStrobe));
1.1 root 168: }
169:
1.1.1.2 root 170:
171: /*-----------------------------------------------------------------------*/
1.1.1.7 root 172: /**
1.1.1.10 root 173: * Write byte to the YM address register (usually 0xff8800). This is used
174: * as a selector for when we read/write the YM data register (0xff8802).
1.1.1.7 root 175: */
1.1.1.10 root 176: void PSG_Set_SelectRegister(Uint8 val)
1.1 root 177: {
1.1.1.9 root 178: /* Store register used to read/write in $ff8802. This register */
179: /* is 8 bits on the YM2149, this means it should not be masked */
180: /* with 0xf. Instead, we keep the 8 bits, but we must ignore */
181: /* read/write to ff8802 when PSGRegisterSelect >= 16 */
1.1.1.10 root 182: PSGRegisterSelect = val;
1.1.1.7 root 183:
1.1.1.13! root 184: /* When address register is changed, a read from $ff8800 should */
! 185: /* return the masked value of the register. We set the value here */
! 186: /* to be returned in case PSG_Get_DataRegister is called */
! 187: PSGRegisterReadData = PSGRegisters[PSGRegisterSelect];
! 188:
1.1.1.11 root 189: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
190: {
191: int FrameCycles, HblCounterVideo, LineCycles;
192: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
193: LOG_TRACE_PRINT("ym write reg=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
194: PSGRegisterSelect, FrameCycles, LineCycles, HblCounterVideo,
195: M68000_GetPC(), CurrentInstrCycles);
196: }
1.1 root 197: }
198:
1.1.1.2 root 199:
200: /*-----------------------------------------------------------------------*/
1.1.1.7 root 201: /**
1.1.1.10 root 202: * Read byte from 0xff8800, return PSG data
1.1.1.7 root 203: */
1.1.1.10 root 204: Uint8 PSG_Get_DataRegister(void)
1.1 root 205: {
1.1.1.9 root 206: /* Is a valid PSG register currently selected ? */
207: if ( PSGRegisterSelect >= 16 )
1.1.1.10 root 208: return 0xff; /* not valid, return 0xff */
1.1.1.9 root 209:
1.1.1.5 root 210: if (PSGRegisterSelect == 14)
211: {
212: /* Second parallel port joystick uses centronics strobe bit as fire button: */
213: if (ConfigureParams.Joysticks.Joy[JOYID_PARPORT2].nJoystickMode != JOYSTICK_DISABLED)
214: {
215: if (Joy_GetStickData(JOYID_PARPORT2) & 0x80)
216: PSGRegisters[14] &= ~32;
217: else
218: PSGRegisters[14] |= 32;
219: }
220: }
221: else if (PSGRegisterSelect == 15)
222: {
223: /* PSG register 15 is parallel port data register - used by parallel port joysticks: */
224: if (ConfigureParams.Joysticks.Joy[JOYID_PARPORT1].nJoystickMode != JOYSTICK_DISABLED)
225: {
226: PSGRegisters[15] &= 0x0f;
227: PSGRegisters[15] |= ~Joy_GetStickData(JOYID_PARPORT1) << 4;
228: }
229: if (ConfigureParams.Joysticks.Joy[JOYID_PARPORT2].nJoystickMode != JOYSTICK_DISABLED)
230: {
231: PSGRegisters[15] &= 0xf0;
232: PSGRegisters[15] |= ~Joy_GetStickData(JOYID_PARPORT2) & 0x0f;
233: }
234: }
235:
1.1.1.4 root 236: /* Read data last selected by register */
1.1.1.13! root 237: return PSGRegisterReadData;
1.1 root 238: }
239:
1.1.1.2 root 240:
241: /*-----------------------------------------------------------------------*/
1.1.1.7 root 242: /**
1.1.1.10 root 243: * Write byte to YM's register (0xff8802), store according to PSG select register (0xff8800)
1.1.1.7 root 244: */
1.1.1.10 root 245: void PSG_Set_DataRegister(Uint8 val)
1.1.1.4 root 246: {
1.1.1.11 root 247: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
248: {
249: int FrameCycles, HblCounterVideo, LineCycles;
250: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
251: LOG_TRACE_PRINT("ym write data reg=0x%x val=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
252: PSGRegisterSelect, val, FrameCycles, LineCycles,
253: HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
254: }
1.1.1.9 root 255:
256: /* Is a valid PSG register currently selected ? */
257: if ( PSGRegisterSelect >= 16 )
258: return; /* not valid, ignore write and do nothing */
259:
1.1.1.8 root 260: /* Create samples up until this point with current values */
1.1.1.12 root 261: Sound_Update(false);
1.1.1.8 root 262:
1.1.1.13! root 263: /* When a read is made from $ff8800 without changing PSGRegisterSelect, we should return */
! 264: /* the non masked value. */
! 265: PSGRegisterReadData = val; /* store non masked value for PSG_Get_DataRegister */
! 266:
1.1.1.10 root 267: /* Copy value to PSGRegisters[] */
268: PSGRegisters[PSGRegisterSelect] = val;
1.1.1.4 root 269:
1.1.1.9 root 270: /* Clear unused bits for some regs */
1.1.1.7 root 271: if ( ( PSGRegisterSelect == PSG_REG_CHANNEL_A_COARSE ) || ( PSGRegisterSelect == PSG_REG_CHANNEL_B_COARSE )
272: || ( PSGRegisterSelect == PSG_REG_CHANNEL_C_COARSE ) || ( PSGRegisterSelect == PSG_REG_ENV_SHAPE ) )
273: PSGRegisters[PSGRegisterSelect] &= 0x0f; /* only keep bits 0 - 3 */
274:
275: else if ( ( PSGRegisterSelect == PSG_REG_CHANNEL_A_AMP ) || ( PSGRegisterSelect == PSG_REG_CHANNEL_B_AMP )
1.1.1.9 root 276: || ( PSGRegisterSelect == PSG_REG_CHANNEL_C_AMP ) || ( PSGRegisterSelect == PSG_REG_NOISE_GENERATOR ) )
1.1.1.7 root 277: PSGRegisters[PSGRegisterSelect] &= 0x1f; /* only keep bits 0 - 4 */
278:
279:
1.1.1.9 root 280: if ( PSGRegisterSelect < NUM_PSG_SOUND_REGISTERS )
1.1.1.4 root 281: {
1.1.1.9 root 282: /* Copy sound related registers 0..13 to the sound module's internal buffer */
283: Sound_WriteReg ( PSGRegisterSelect , PSGRegisters[PSGRegisterSelect] );
284: }
1.1.1.4 root 285:
1.1.1.9 root 286: else if ( PSGRegisterSelect == PSG_REG_IO_PORTA )
287: {
288: /*
289: * FIXME: This is only a prelimary dirty hack!
290: * Port B (Printer port) - writing here needs to be dispatched to the printer
291: * STROBE (Port A bit5) does a short LOW and back to HIGH when the char is valid
292: * To print you need to write the character byte to IOB and you need to toggle STROBE
293: * (like EmuTOS does).
294: */
1.1.1.4 root 295: /* Printer dispatching only when printing is activated */
296: if (ConfigureParams.Printer.bEnablePrinting)
297: {
1.1.1.9 root 298: /* Bit 5 - Centronics strobe? If STROBE is low and the LastStrobe was high,
299: then print/transfer to the emulated Centronics port.
1.1.1.7 root 300: */
1.1.1.9 root 301: if (LastStrobe && ( (PSGRegisters[PSG_REG_IO_PORTA]&(1<<5)) == 0 ))
1.1.1.4 root 302: {
303: /* Seems like we want to print something... */
1.1.1.9 root 304: Printer_TransferByteTo(PSGRegisters[PSG_REG_IO_PORTB]);
305: /* Initiate a possible GPIP0 Printer BUSY interrupt */
306: MFP_InputOnChannel(MFP_GPIP_0_BIT,MFP_IERB,&MFP_IPRB);
307: /* Initiate a possible GPIP1 Falcon ACK interrupt */
308: if (ConfigureParams.System.nMachineType == MACHINE_FALCON)
309: MFP_InputOnChannel(MFP_GPIP_1_BIT,MFP_IERB,&MFP_IPRB);
1.1.1.4 root 310: }
311: }
1.1.1.9 root 312: LastStrobe = PSGRegisters[PSG_REG_IO_PORTA]&(1<<5);
313:
314: /* Bit 0-2 : side and drive select */
315: if ( (PSGRegisters[PSG_REG_IO_PORTA]&(1<<1)) == 0 )
316: {
317: /* floppy drive A is ON */
1.1.1.11 root 318: Statusbar_SetFloppyLed(DRIVE_LED_A, true);
1.1.1.9 root 319: }
320: else
321: {
1.1.1.11 root 322: Statusbar_SetFloppyLed(DRIVE_LED_A, false);
1.1.1.9 root 323: }
324: if ( (PSGRegisters[PSG_REG_IO_PORTA]&(1<<2)) == 0 )
325: {
326: /* floppy drive B is ON */
1.1.1.11 root 327: Statusbar_SetFloppyLed(DRIVE_LED_B, true);
1.1.1.9 root 328: }
329: else
330: {
1.1.1.11 root 331: Statusbar_SetFloppyLed(DRIVE_LED_B, false);
1.1.1.9 root 332: }
333:
1.1.1.7 root 334: /* Bit 3 - Centronics as input */
335: if(PSGRegisters[PSG_REG_IO_PORTA]&(1<<3))
336: {
337: /* FIXME: might be needed if we want to emulate sound sampling hardware */
338: }
339:
340: /* handle Falcon specific bits in PORTA of the PSG */
341: if (ConfigureParams.System.nMachineType == MACHINE_FALCON)
342: {
343: /* Bit 4 - DSP reset? */
344: if(PSGRegisters[PSG_REG_IO_PORTA]&(1<<4))
345: {
346: Log_Printf(LOG_DEBUG, "Calling DSP_Reset?\n");
347: #if ENABLE_DSP_EMU
348: if (ConfigureParams.System.nDSPType == DSP_TYPE_EMU) {
349: DSP_Reset();
350: }
351: #endif
352: }
353: /* Bit 6 - Internal Speaker control */
354: if(PSGRegisters[PSG_REG_IO_PORTA]&(1<<6))
355: {
356: /*Log_Printf(LOG_DEBUG, "Falcon: Internal Speaker state\n");*/
357: /* FIXME: add code to handle? (if we want to emulate the speaker at all? */
358: }
359: /* Bit 7 - Reset IDE? */
360: if(PSGRegisters[PSG_REG_IO_PORTA]&(1<<7))
361: {
362: Log_Printf(LOG_DEBUG, "Falcon: Reset IDE subsystem\n");
363: /* FIXME: add code to handle IDE reset */
364: }
365: }
1.1.1.9 root 366:
1.1.1.4 root 367: }
1.1 root 368: }
369:
1.1.1.2 root 370:
371: /*-----------------------------------------------------------------------*/
1.1.1.7 root 372: /**
1.1.1.10 root 373: * Read byte from 0xff8800. Return current content of data register
1.1.1.7 root 374: */
1.1.1.10 root 375: void PSG_ff8800_ReadByte(void)
1.1 root 376: {
1.1.1.10 root 377: M68000_WaitState(1); /* [NP] FIXME not 100% accurate, but gives good results */
378:
379: IoMem[IoAccessCurrentAddress] = PSG_Get_DataRegister();
380:
1.1.1.11 root 381: if (LOG_TRACE_LEVEL(TRACE_PSG_READ))
382: {
383: int FrameCycles, HblCounterVideo, LineCycles;
384: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
385: LOG_TRACE_PRINT("ym read data %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
386: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
387: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
388: }
1.1.1.10 root 389: }
390:
391:
392: /*-----------------------------------------------------------------------*/
393: /**
394: * Read byte from 0xff8801/02/03. Return 0xff.
395: */
396: void PSG_ff880x_ReadByte(void)
397: {
398: M68000_WaitState(1); /* [NP] FIXME not 100% accurate, but gives good results */
1.1.1.4 root 399:
1.1.1.8 root 400: IoMem[IoAccessCurrentAddress] = 0xff;
1.1.1.10 root 401:
1.1.1.11 root 402: if (LOG_TRACE_LEVEL(TRACE_PSG_READ))
403: {
404: int FrameCycles, HblCounterVideo, LineCycles;
405: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
406: LOG_TRACE_PRINT("ym read void %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
407: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
408: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
409: }
1.1 root 410: }
1.1.1.7 root 411:
412:
413:
414: /*-----------------------------------------------------------------------*/
415: /**
1.1.1.10 root 416: * Write byte to 0xff8800. Set content of YM's address register.
1.1.1.7 root 417: */
1.1.1.10 root 418: void PSG_ff8800_WriteByte(void)
1.1.1.7 root 419: {
1.1.1.10 root 420: // M68000_WaitState(4);
421: M68000_WaitState(1); /* [NP] FIXME not 100% accurate, but gives good results */
1.1.1.7 root 422:
1.1.1.11 root 423: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
424: {
425: int FrameCycles, HblCounterVideo, LineCycles;
426: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
427: LOG_TRACE_PRINT("ym write %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
428: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
429: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
430: }
1.1.1.10 root 431:
432: PSG_Set_SelectRegister ( IoMem[IoAccessCurrentAddress] );
433: }
434:
435:
436: /*-----------------------------------------------------------------------*/
437: /**
438: * Write byte to 0xff8801. Set content of YM's address register under conditions.
439: * Address 0xff8801 is a shadow version of 0xff8800, so both addresses can't be written
440: * at the same time by the same instruction. This means only a .B access or
441: * a movep will have a valid effect, other accesses are ignored.
442: */
443: void PSG_ff8801_WriteByte(void)
444: {
445: if ( nIoMemAccessSize == SIZE_BYTE ) /* byte access or movep */
446: {
447: M68000_WaitState(1); /* [NP] FIXME not 100% accurate, but gives good results */
448:
1.1.1.11 root 449: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
450: {
451: int FrameCycles, HblCounterVideo, LineCycles;
452: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
453: LOG_TRACE_PRINT("ym write %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
454: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
455: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
456: }
1.1.1.10 root 457:
458: PSG_Set_SelectRegister ( IoMem[IoAccessCurrentAddress] );
459: }
460:
461: else
462: { /* do nothing, just a trace if needed */
1.1.1.11 root 463: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
464: {
465: int FrameCycles, HblCounterVideo, LineCycles;
466: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
467: LOG_TRACE_PRINT("ym write ignored %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
468: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
469: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
470: }
1.1.1.10 root 471: }
1.1.1.7 root 472: }
473:
474:
1.1.1.10 root 475: /*-----------------------------------------------------------------------*/
476: /**
477: * Write byte to 0xff8802. Set content of YM's data register.
478: */
479: void PSG_ff8802_WriteByte(void)
480: {
481: // M68000_WaitState(4);
482: M68000_WaitState(1); /* [NP] FIXME not 100% accurate, but gives good results */
483:
1.1.1.11 root 484: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
485: {
486: int FrameCycles, HblCounterVideo, LineCycles;
487: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
488: LOG_TRACE_PRINT("ym write %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
489: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
490: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
491: }
1.1.1.10 root 492:
493: PSG_Set_DataRegister ( IoMem[IoAccessCurrentAddress] );
494: }
495:
1.1.1.7 root 496:
497: /*-----------------------------------------------------------------------*/
498: /**
1.1.1.10 root 499: * Write byte to 0xff8803. Set content of YM's data register under conditions.
500: * Address 0xff8803 is a shadow version of 0xff8802, so both addresses can't be written
501: * at the same time by the same instruction. This means only a .B access or
502: * a movep will have a valid effect, other accesses are ignored.
1.1.1.7 root 503: */
1.1.1.10 root 504: void PSG_ff8803_WriteByte(void)
1.1.1.7 root 505: {
1.1.1.10 root 506: if ( nIoMemAccessSize == SIZE_BYTE ) /* byte access or movep */
507: {
508: M68000_WaitState(1); /* [NP] FIXME not 100% accurate, but gives good results */
509:
1.1.1.11 root 510: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
511: {
512: int FrameCycles, HblCounterVideo, LineCycles;
513: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
514: LOG_TRACE_PRINT("ym write %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
515: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
516: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
517: }
1.1.1.10 root 518:
519: PSG_Set_DataRegister ( IoMem[IoAccessCurrentAddress] );
520: }
521:
522: else
523: { /* do nothing, just a trace if needed */
1.1.1.11 root 524: if (LOG_TRACE_LEVEL(TRACE_PSG_WRITE))
525: {
526: int FrameCycles, HblCounterVideo, LineCycles;
527: Video_GetPosition ( &FrameCycles , &HblCounterVideo , &LineCycles );
528: LOG_TRACE_PRINT("ym write ignored %x=0x%x video_cyc=%d %d@%d pc=%x instr_cycle %d\n",
529: IoAccessCurrentAddress, IoMem[IoAccessCurrentAddress],
530: FrameCycles, LineCycles, HblCounterVideo, M68000_GetPC(), CurrentInstrCycles);
531: }
1.1.1.10 root 532: }
1.1.1.7 root 533: }
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