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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * MC68000 emulation generator
5: *
6: * This is a fairly stupid program that generates a lot of case labels that
7: * can be #included in a switch statement.
8: * As an alternative, it can generate functions that handle specific
9: * MC68000 instructions, plus a prototype header file and a function pointer
10: * array to look up the function for an opcode.
11: * Error checking is bad, an illegal table68k file will cause the program to
12: * call abort().
13: * The generated code is sometimes sub-optimal, an optimizing compiler should
14: * take care of this.
15: *
16: * The source for the insn timings is Markt & Technik's Amiga Magazin 8/1992.
17: *
18: * Copyright 1995, 1996, 1997, 1998, 1999, 2000 Bernd Schmidt
1.1.1.2 root 19: *
20: * Adaptation to Hatari and better cpu timings by Thomas Huth
21: *
1.1 root 22: */
23:
24: #include <ctype.h>
1.1.1.3 ! root 25: #include <string.h>
1.1 root 26:
27: #include "sysdeps.h"
28: #include "readcpu.h"
29:
30: #define BOOL_TYPE "int"
31:
32: static FILE *headerfile;
33: static FILE *stblfile;
34:
35: static int using_prefetch;
36: static int using_exception_3;
37: static int cpu_level;
38:
1.1.1.2 root 39: char exactCpuCycles[256]; /* Space to store return string for exact cpu cycles */
40:
41:
1.1 root 42: /* For the current opcode, the next lower level that will have different code.
43: * Initialized to -1 for each opcode. If it remains unchanged, indicates we
44: * are done with that opcode. */
45: static int next_cpu_level;
46:
47: void write_log (const char *s, ...)
48: {
49: fprintf (stderr, "%s", s);
50: }
51:
52: static int *opcode_map;
53: static int *opcode_next_clev;
54: static int *opcode_last_postfix;
55: static unsigned long *counts;
56:
57: static void read_counts (void)
58: {
59: FILE *file;
60: unsigned long opcode, count, total;
61: char name[20];
62: int nr = 0;
63: memset (counts, 0, 65536 * sizeof *counts);
64:
65: file = fopen ("frequent.68k", "r");
66: if (file) {
67: fscanf (file, "Total: %lu\n", &total);
68: while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
69: opcode_next_clev[nr] = 4;
70: opcode_last_postfix[nr] = -1;
71: opcode_map[nr++] = opcode;
72: counts[opcode] = count;
73: }
74: fclose (file);
75: }
76: if (nr == nr_cpuop_funcs)
77: return;
78: for (opcode = 0; opcode < 0x10000; opcode++) {
79: if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
80: && counts[opcode] == 0)
81: {
82: opcode_next_clev[nr] = 4;
83: opcode_last_postfix[nr] = -1;
84: opcode_map[nr++] = opcode;
85: counts[opcode] = count;
86: }
87: }
88: if (nr != nr_cpuop_funcs)
89: abort ();
90: }
91:
92: static char endlabelstr[80];
93: static int endlabelno = 0;
94: static int need_endlabel;
95:
96: static int n_braces = 0;
97: static int m68k_pc_offset = 0;
98: static int insn_n_cycles;
99:
100: static void start_brace (void)
101: {
102: n_braces++;
103: printf ("{");
104: }
105:
106: static void close_brace (void)
107: {
108: assert (n_braces > 0);
109: n_braces--;
110: printf ("}");
111: }
112:
113: static void finish_braces (void)
114: {
115: while (n_braces > 0)
116: close_brace ();
117: }
118:
119: static void pop_braces (int to)
120: {
121: while (n_braces > to)
122: close_brace ();
123: }
124:
125: static int bit_size (int size)
126: {
127: switch (size) {
128: case sz_byte: return 8;
129: case sz_word: return 16;
130: case sz_long: return 32;
131: default: abort ();
132: }
133: return 0;
134: }
135:
136: static const char *bit_mask (int size)
137: {
138: switch (size) {
139: case sz_byte: return "0xff";
140: case sz_word: return "0xffff";
141: case sz_long: return "0xffffffff";
142: default: abort ();
143: }
144: return 0;
145: }
146:
147: static const char *gen_nextilong (void)
148: {
149: static char buffer[80];
150: int r = m68k_pc_offset;
151: m68k_pc_offset += 4;
152:
153: insn_n_cycles += 8;
154:
155: if (using_prefetch)
156: sprintf (buffer, "get_ilong_prefetch(%d)", r);
157: else
158: sprintf (buffer, "get_ilong(%d)", r);
159: return buffer;
160: }
161:
162: static const char *gen_nextiword (void)
163: {
164: static char buffer[80];
165: int r = m68k_pc_offset;
166: m68k_pc_offset += 2;
167:
168: insn_n_cycles += 4;
169:
170: if (using_prefetch)
171: sprintf (buffer, "get_iword_prefetch(%d)", r);
172: else
173: sprintf (buffer, "get_iword(%d)", r);
174: return buffer;
175: }
176:
177: static const char *gen_nextibyte (void)
178: {
179: static char buffer[80];
180: int r = m68k_pc_offset;
181: m68k_pc_offset += 2;
182:
183: insn_n_cycles += 4;
184:
185: if (using_prefetch)
186: sprintf (buffer, "get_ibyte_prefetch(%d)", r);
187: else
188: sprintf (buffer, "get_ibyte(%d)", r);
189: return buffer;
190: }
191:
192: static void fill_prefetch_0 (void)
193: {
194: if (using_prefetch)
195: printf ("fill_prefetch_0 ();\n");
196: }
197:
198: static void fill_prefetch_2 (void)
199: {
200: if (using_prefetch)
201: printf ("fill_prefetch_2 ();\n");
202: }
203:
204: static void sync_m68k_pc (void)
205: {
206: if (m68k_pc_offset == 0)
207: return;
208: printf ("m68k_incpc(%d);\n", m68k_pc_offset);
209: switch (m68k_pc_offset) {
210: case 0:
211: /*fprintf (stderr, "refilling prefetch at 0\n"); */
212: break;
213: case 2:
214: fill_prefetch_2 ();
215: break;
216: default:
217: fill_prefetch_0 ();
218: break;
219: }
220: m68k_pc_offset = 0;
221: }
222:
223: /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
224: * the calling routine handles Apdi and Aipi modes. */
225: static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
226: {
227: start_brace ();
228: switch (mode) {
229: case Dreg:
230: if (movem)
231: abort ();
232: if (getv == 1)
233: switch (size) {
234: case sz_byte:
235: printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
236: break;
237: case sz_word:
238: printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
239: break;
240: case sz_long:
241: printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
242: break;
243: default:
244: abort ();
245: }
246: return;
247: case Areg:
248: if (movem)
249: abort ();
250: if (getv == 1)
251: switch (size) {
252: case sz_word:
253: printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
254: break;
255: case sz_long:
256: printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
257: break;
258: default:
259: abort ();
260: }
261: return;
262: case Aind:
263: printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
264: break;
265: case Aipi:
266: printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
267: break;
268: case Apdi:
269: insn_n_cycles += 2;
270: switch (size) {
271: case sz_byte:
272: if (movem)
273: printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
274: else
275: printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
276: break;
277: case sz_word:
278: printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
279: break;
280: case sz_long:
281: printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
282: break;
283: default:
284: abort ();
285: }
286: break;
287: case Ad16:
288: printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
289: break;
290: case Ad8r:
291: insn_n_cycles += 2;
292: if (cpu_level > 1) {
293: if (next_cpu_level < 1)
294: next_cpu_level = 1;
295: sync_m68k_pc ();
296: start_brace ();
297: /* This would ordinarily be done in gen_nextiword, which we bypass. */
298: insn_n_cycles += 4;
299: printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
300: } else
301: printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
302:
303: break;
304: case PC16:
305: printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
306: printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
307: break;
308: case PC8r:
309: insn_n_cycles += 2;
310: if (cpu_level > 1) {
311: if (next_cpu_level < 1)
312: next_cpu_level = 1;
313: sync_m68k_pc ();
314: start_brace ();
315: /* This would ordinarily be done in gen_nextiword, which we bypass. */
316: insn_n_cycles += 4;
317: printf ("\tuaecptr tmppc = m68k_getpc();\n");
318: printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
319: } else {
320: printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
321: printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
322: }
323:
324: break;
325: case absw:
326: printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
327: break;
328: case absl:
329: printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
330: break;
331: case imm:
332: if (getv != 1)
333: abort ();
334: switch (size) {
335: case sz_byte:
336: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
337: break;
338: case sz_word:
339: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
340: break;
341: case sz_long:
342: printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
343: break;
344: default:
345: abort ();
346: }
347: return;
348: case imm0:
349: if (getv != 1)
350: abort ();
351: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
352: return;
353: case imm1:
354: if (getv != 1)
355: abort ();
356: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
357: return;
358: case imm2:
359: if (getv != 1)
360: abort ();
361: printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
362: return;
363: case immi:
364: if (getv != 1)
365: abort ();
366: printf ("\tuae_u32 %s = %s;\n", name, reg);
367: return;
368: default:
369: abort ();
370: }
371:
372: /* We get here for all non-reg non-immediate addressing modes to
373: * actually fetch the value. */
374:
375: if (using_exception_3 && getv != 0 && size != sz_byte) {
376: printf ("\tif ((%sa & 1) != 0) {\n", name);
377: printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
378: printf ("\t\tlast_op_for_exception_3 = opcode;\n");
379: printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
380: printf ("\t\tException(3, 0);\n");
381: printf ("\t\tgoto %s;\n", endlabelstr);
382: printf ("\t}\n");
383: need_endlabel = 1;
384: start_brace ();
385: }
386:
387: if (getv == 1) {
388: switch (size) {
389: case sz_byte: insn_n_cycles += 4; break;
390: case sz_word: insn_n_cycles += 4; break;
391: case sz_long: insn_n_cycles += 8; break;
392: default: abort ();
393: }
394: start_brace ();
395: switch (size) {
396: case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
397: case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
398: case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
399: default: abort ();
400: }
401: }
402:
403: /* We now might have to fix up the register for pre-dec or post-inc
404: * addressing modes. */
405: if (!movem)
406: switch (mode) {
407: case Aipi:
408: switch (size) {
409: case sz_byte:
410: printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
411: break;
412: case sz_word:
413: printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
414: break;
415: case sz_long:
416: printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
417: break;
418: default:
419: abort ();
420: }
421: break;
422: case Apdi:
423: printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
424: break;
425: default:
426: break;
427: }
428: }
429:
430: static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
431: {
432: switch (mode) {
433: case Dreg:
434: switch (size) {
435: case sz_byte:
436: printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
437: break;
438: case sz_word:
439: printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
440: break;
441: case sz_long:
442: printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
443: break;
444: default:
445: abort ();
446: }
447: break;
448: case Areg:
449: switch (size) {
450: case sz_word:
451: fprintf (stderr, "Foo\n");
452: printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
453: break;
454: case sz_long:
455: printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
456: break;
457: default:
458: abort ();
459: }
460: break;
461: case Aind:
462: case Aipi:
463: case Apdi:
464: case Ad16:
465: case Ad8r:
466: case absw:
467: case absl:
468: case PC16:
469: case PC8r:
470: if (using_prefetch)
471: sync_m68k_pc ();
472: switch (size) {
473: case sz_byte:
474: insn_n_cycles += 4;
475: printf ("\tput_byte(%sa,%s);\n", to, from);
476: break;
477: case sz_word:
478: insn_n_cycles += 4;
479: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
480: abort ();
481: printf ("\tput_word(%sa,%s);\n", to, from);
482: break;
483: case sz_long:
484: insn_n_cycles += 8;
485: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
486: abort ();
487: printf ("\tput_long(%sa,%s);\n", to, from);
488: break;
489: default:
490: abort ();
491: }
492: break;
493: case imm:
494: case imm0:
495: case imm1:
496: case imm2:
497: case immi:
498: abort ();
499: break;
500: default:
501: abort ();
502: }
503: }
504:
1.1.1.2 root 505:
1.1 root 506: static void genmovemel (uae_u16 opcode)
507: {
508: char getcode[100];
1.1.1.3 ! root 509: int bMovemLong = (table68k[opcode].size == sz_long);
! 510: int size = bMovemLong ? 4 : 2;
1.1 root 511:
1.1.1.3 ! root 512: if (bMovemLong) {
1.1 root 513: strcpy (getcode, "get_long(srca)");
514: } else {
515: strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
516: }
517:
518: printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
519: printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1.1.1.2 root 520: printf ("\tretcycles = 0;\n");
1.1.1.3 ! root 521: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
1.1 root 522: start_brace ();
1.1.1.2 root 523: printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s;"
1.1.1.3 ! root 524: " srca += %d; dmask = movem_next[dmask]; retcycles+=%d; }\n",
! 525: getcode, size, (bMovemLong ? 8 : 4));
1.1.1.2 root 526: printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s;"
1.1.1.3 ! root 527: " srca += %d; amask = movem_next[amask]; retcycles+=%d; }\n",
! 528: getcode, size, (bMovemLong ? 8 : 4));
1.1 root 529:
530: if (table68k[opcode].dmode == Aipi)
531: printf ("\tm68k_areg(regs, dstreg) = srca;\n");
1.1.1.2 root 532:
533: /* Better cycles - experimental! (Thothy) */
534: switch(table68k[opcode].dmode)
1.1.1.3 ! root 535: {
1.1.1.2 root 536: case Aind: insn_n_cycles=12; break;
537: case Aipi: insn_n_cycles=12; break;
538: case Ad16: insn_n_cycles=16; break;
539: case Ad8r: insn_n_cycles=18; break;
540: case absw: insn_n_cycles=16; break;
541: case absl: insn_n_cycles=20; break;
542: case PC16: insn_n_cycles=16; break;
543: case PC8r: insn_n_cycles=18; break;
1.1.1.3 ! root 544: }
! 545: sprintf(exactCpuCycles," return (%i+retcycles);", insn_n_cycles);
1.1 root 546: }
547:
548: static void genmovemle (uae_u16 opcode)
549: {
550: char putcode[100];
1.1.1.3 ! root 551: int bMovemLong = (table68k[opcode].size == sz_long);
! 552: int size = bMovemLong ? 4 : 2;
! 553:
! 554: if (bMovemLong) {
1.1 root 555: strcpy (putcode, "put_long(srca,");
556: } else {
557: strcpy (putcode, "put_word(srca,");
558: }
559:
560: printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
1.1.1.3 ! root 561: printf ("\tretcycles = 0;\n");
1.1 root 562: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
563: if (using_prefetch)
564: sync_m68k_pc ();
565:
566: start_brace ();
567: if (table68k[opcode].dmode == Apdi) {
1.1.1.2 root 568: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
569: printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask]));"
1.1.1.3 ! root 570: " amask = movem_next[amask]; retcycles+=%d; }\n",
! 571: size, putcode, (bMovemLong ? 8 : 4));
1.1.1.2 root 572: printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask]));"
1.1.1.3 ! root 573: " dmask = movem_next[dmask]; retcycles+=%d; }\n",
! 574: size, putcode, (bMovemLong ? 8 : 4));
1.1.1.2 root 575: printf ("\tm68k_areg(regs, dstreg) = srca;\n");
1.1 root 576: } else {
1.1.1.2 root 577: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
578: printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d;"
1.1.1.3 ! root 579: " dmask = movem_next[dmask]; retcycles+=%d; }\n",
! 580: putcode, size, (bMovemLong ? 8 : 4));
1.1.1.2 root 581: printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d;"
1.1.1.3 ! root 582: " amask = movem_next[amask]; retcycles+=%d; }\n",
! 583: putcode, size, (bMovemLong ? 8 : 4));
1.1.1.2 root 584: }
585:
586: /* Better cycles - experimental! (Thothy) */
587: switch(table68k[opcode].dmode)
1.1.1.3 ! root 588: {
1.1.1.2 root 589: case Aind: insn_n_cycles=8; break;
590: case Apdi: insn_n_cycles=8; break;
591: case Ad16: insn_n_cycles=12; break;
592: case Ad8r: insn_n_cycles=14; break;
593: case absw: insn_n_cycles=12; break;
594: case absl: insn_n_cycles=16; break;
1.1.1.3 ! root 595: }
! 596: sprintf(exactCpuCycles," return (%i+retcycles);", insn_n_cycles);
1.1 root 597: }
598:
1.1.1.2 root 599:
1.1 root 600: static void duplicate_carry (void)
601: {
602: printf ("\tCOPY_CARRY;\n");
603: }
604:
605: typedef enum
606: {
607: flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn,
608: flag_av, flag_sv
609: }
610: flagtypes;
611:
612: static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
613: {
614: char vstr[100], sstr[100], dstr[100];
615: char usstr[100], udstr[100];
616: char unsstr[100], undstr[100];
617:
618: switch (size) {
619: case sz_byte:
620: strcpy (vstr, "((uae_s8)(");
621: strcpy (usstr, "((uae_u8)(");
622: break;
623: case sz_word:
624: strcpy (vstr, "((uae_s16)(");
625: strcpy (usstr, "((uae_u16)(");
626: break;
627: case sz_long:
628: strcpy (vstr, "((uae_s32)(");
629: strcpy (usstr, "((uae_u32)(");
630: break;
631: default:
632: abort ();
633: }
634: strcpy (unsstr, usstr);
635:
636: strcpy (sstr, vstr);
637: strcpy (dstr, vstr);
638: strcat (vstr, value);
639: strcat (vstr, "))");
640: strcat (dstr, dst);
641: strcat (dstr, "))");
642: strcat (sstr, src);
643: strcat (sstr, "))");
644:
645: strcpy (udstr, usstr);
646: strcat (udstr, dst);
647: strcat (udstr, "))");
648: strcat (usstr, src);
649: strcat (usstr, "))");
650:
651: strcpy (undstr, unsstr);
652: strcat (unsstr, "-");
653: strcat (undstr, "~");
654: strcat (undstr, dst);
655: strcat (undstr, "))");
656: strcat (unsstr, src);
657: strcat (unsstr, "))");
658:
659: switch (type) {
660: case flag_logical_noclobber:
661: case flag_logical:
662: case flag_zn:
663: case flag_av:
664: case flag_sv:
665: case flag_addx:
666: case flag_subx:
667: break;
668:
669: case flag_add:
670: start_brace ();
671: printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
672: break;
673: case flag_sub:
674: case flag_cmp:
675: start_brace ();
676: printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
677: break;
678: }
679:
680: switch (type) {
681: case flag_logical_noclobber:
682: case flag_logical:
683: case flag_zn:
684: break;
685:
686: case flag_add:
687: case flag_sub:
688: case flag_addx:
689: case flag_subx:
690: case flag_cmp:
691: case flag_av:
692: case flag_sv:
693: start_brace ();
694: printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
695: printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
696: printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
697: break;
698: }
699:
700: switch (type) {
701: case flag_logical:
702: printf ("\tCLEAR_CZNV;\n");
703: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
704: printf ("\tSET_NFLG (%s < 0);\n", vstr);
705: break;
706: case flag_logical_noclobber:
707: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
708: printf ("\tSET_NFLG (%s < 0);\n", vstr);
709: break;
710: case flag_av:
711: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
712: break;
713: case flag_sv:
714: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
715: break;
716: case flag_zn:
717: printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
718: printf ("\tSET_NFLG (%s < 0);\n", vstr);
719: break;
720: case flag_add:
721: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
722: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
723: printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
724: duplicate_carry ();
725: printf ("\tSET_NFLG (flgn != 0);\n");
726: break;
727: case flag_sub:
728: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
729: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
730: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
731: duplicate_carry ();
732: printf ("\tSET_NFLG (flgn != 0);\n");
733: break;
734: case flag_addx:
735: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
736: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
737: duplicate_carry ();
738: break;
739: case flag_subx:
740: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
741: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
742: duplicate_carry ();
743: break;
744: case flag_cmp:
745: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
746: printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
747: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
748: printf ("\tSET_NFLG (flgn != 0);\n");
749: break;
750: }
751: }
752:
753: static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
754: {
755: /* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have
756: them in the appropriate m68k.h files and use just one copy of this
757: code here. The API can be changed if necessary. */
758: #ifdef OPTIMIZED_FLAGS
759: switch (type) {
760: case flag_add:
761: case flag_sub:
762: start_brace ();
763: printf ("\tuae_u32 %s;\n", value);
764: break;
765:
766: default:
767: break;
768: }
769:
770: /* At least some of those casts are fairly important! */
771: switch (type) {
772: case flag_logical_noclobber:
773: printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
774: if (strcmp (value, "0") == 0) {
775: printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
776: } else {
777: switch (size) {
778: case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
779: case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
780: case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
781: }
782: printf ("\tIOR_CZNV (oldcznv);\n");
783: }
784: printf ("\t}\n");
785: return;
786: case flag_logical:
787: if (strcmp (value, "0") == 0) {
788: printf ("\tSET_CZNV (FLAGVAL_Z);\n");
789: } else {
790: switch (size) {
791: case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
792: case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
793: case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
794: }
795: }
796: return;
797:
798: case flag_add:
799: switch (size) {
800: case sz_byte: printf ("\toptflag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
801: case sz_word: printf ("\toptflag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
802: case sz_long: printf ("\toptflag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
803: }
804: return;
805:
806: case flag_sub:
807: switch (size) {
808: case sz_byte: printf ("\toptflag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
809: case sz_word: printf ("\toptflag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
810: case sz_long: printf ("\toptflag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
811: }
812: return;
813:
814: case flag_cmp:
815: switch (size) {
816: case sz_byte: printf ("\toptflag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
817: case sz_word: printf ("\toptflag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
818: case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
819: }
820: return;
821:
822: default:
823: break;
824: }
825: #endif
826:
827: genflags_normal (type, size, value, src, dst);
828: }
829:
830: static void force_range_for_rox (const char *var, wordsizes size)
831: {
832: /* Could do a modulo operation here... which one is faster? */
833: switch (size) {
834: case sz_long:
835: printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
836: break;
837: case sz_word:
838: printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
839: printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
840: break;
841: case sz_byte:
842: printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
843: printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
844: printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
845: break;
846: }
847: }
848:
849: static const char *cmask (wordsizes size)
850: {
851: switch (size) {
852: case sz_byte: return "0x80";
853: case sz_word: return "0x8000";
854: case sz_long: return "0x80000000";
855: default: abort ();
856: }
857: }
858:
859: static int source_is_imm1_8 (struct instr *i)
860: {
861: return i->stype == 3;
862: }
863:
1.1.1.2 root 864:
865:
1.1 root 866: static void gen_opcode (unsigned long int opcode)
867: {
1.1.1.2 root 868: #if 0
869: char *amodenames[] = { "Dreg", "Areg", "Aind", "Aipi", "Apdi", "Ad16", "Ad8r",
870: "absw", "absl", "PC16", "PC8r", "imm", "imm0", "imm1", "imm2", "immi", "am_unknown", "am_illg"};
871: #endif
872:
1.1 root 873: struct instr *curi = table68k + opcode;
874: insn_n_cycles = 4;
875:
876: start_brace ();
877: m68k_pc_offset = 2;
1.1.1.2 root 878:
1.1 root 879: switch (curi->plev) {
880: case 0: /* not privileged */
881: break;
882: case 1: /* unprivileged only on 68000 */
883: if (cpu_level == 0)
884: break;
885: if (next_cpu_level < 0)
886: next_cpu_level = 0;
887:
888: /* fall through */
889: case 2: /* priviledged */
890: printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
891: need_endlabel = 1;
892: start_brace ();
893: break;
894: case 3: /* privileged if size == word */
895: if (curi->size == sz_byte)
896: break;
897: printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
898: need_endlabel = 1;
899: start_brace ();
900: break;
901: }
1.1.1.2 root 902:
903: /* Build the opcodes: */
1.1 root 904: switch (curi->mnemo) {
905: case i_OR:
906: case i_AND:
907: case i_EOR:
1.1.1.2 root 908: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
909: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
910: printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
911: genflags (flag_logical, curi->size, "src", "", "");
912: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
913: if(curi->size==sz_long && curi->dmode==Dreg)
914: {
915: insn_n_cycles += 2;
916: if(curi->smode==Dreg || curi->smode==Areg || (curi->smode>=imm && curi->smode<=immi))
917: insn_n_cycles += 2;
918: }
919: #if 0
920: /* Output the CPU cycles: */
921: fprintf(stderr,"MOVE, size %i: ",curi->size);
922: fprintf(stderr," %s ->",amodenames[curi->smode]);
923: fprintf(stderr," %s ",amodenames[curi->dmode]);
924: fprintf(stderr," Cycles: %i\n",insn_n_cycles);
925: #endif
926: break;
1.1 root 927: case i_ORSR:
928: case i_EORSR:
1.1.1.2 root 929: printf ("\tMakeSR();\n");
930: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
931: if (curi->size == sz_byte) {
932: printf ("\tsrc &= 0xFF;\n");
933: }
934: printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
935: printf ("\tMakeFromSR();\n");
936: insn_n_cycles = 20;
937: break;
1.1 root 938: case i_ANDSR:
1.1.1.2 root 939: printf ("\tMakeSR();\n");
940: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
941: if (curi->size == sz_byte) {
942: printf ("\tsrc |= 0xFF00;\n");
943: }
944: printf ("\tregs.sr &= src;\n");
945: printf ("\tMakeFromSR();\n");
946: insn_n_cycles = 20;
947: break;
1.1 root 948: case i_SUB:
949: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
950: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
951: start_brace ();
952: genflags (flag_sub, curi->size, "newv", "src", "dst");
953: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 954: if(curi->size==sz_long && curi->dmode==Dreg)
955: {
956: insn_n_cycles += 2;
957: if(curi->smode==Dreg || curi->smode==Areg || (curi->smode>=imm && curi->smode<=immi))
958: insn_n_cycles += 2;
959: }
1.1 root 960: break;
961: case i_SUBA:
962: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
963: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
964: start_brace ();
965: printf ("\tuae_u32 newv = dst - src;\n");
966: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1.1.1.2 root 967: if(curi->size==sz_long && curi->smode!=Dreg && curi->smode!=Areg && !(curi->smode>=imm && curi->smode<=immi))
968: insn_n_cycles += 2;
969: else
970: insn_n_cycles += 4;
1.1 root 971: break;
972: case i_SUBX:
973: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
974: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
975: start_brace ();
976: printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
977: genflags (flag_subx, curi->size, "newv", "src", "dst");
978: genflags (flag_zn, curi->size, "newv", "", "");
979: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 980: if(curi->smode==Dreg && curi->size==sz_long)
981: insn_n_cycles=8;
982: if(curi->smode==Apdi)
983: {
984: if(curi->size==sz_long)
985: insn_n_cycles=30;
986: else
987: insn_n_cycles=18;
988: }
1.1 root 989: break;
990: case i_SBCD:
991: /* Let's hope this works... */
992: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
993: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
994: start_brace ();
995: printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
996: printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
997: printf ("\tuae_u16 newv;\n");
998: printf ("\tint cflg;\n");
999: printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1000: printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1001: printf ("\tcflg = (newv_hi & 0x1F0) > 0x90;\n");
1002: printf ("\tSET_CFLG (cflg);\n");
1003: duplicate_carry ();
1004: printf ("\tif (cflg) newv -= 0x60;\n");
1005: genflags (flag_zn, curi->size, "newv", "", "");
1006: genflags (flag_sv, curi->size, "newv", "src", "dst");
1007: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1008: if(curi->smode==Dreg) insn_n_cycles=6;
1009: if(curi->smode==Apdi) insn_n_cycles=18;
1.1 root 1010: break;
1011: case i_ADD:
1012: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1013: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1014: start_brace ();
1015: genflags (flag_add, curi->size, "newv", "src", "dst");
1016: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1017: if(curi->size==sz_long && curi->dmode==Dreg)
1018: {
1019: insn_n_cycles += 2;
1020: if(curi->smode==Dreg || curi->smode==Areg || (curi->smode>=imm && curi->smode<=immi))
1021: insn_n_cycles += 2;
1022: }
1.1 root 1023: break;
1024: case i_ADDA:
1025: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1026: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1027: start_brace ();
1028: printf ("\tuae_u32 newv = dst + src;\n");
1029: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1.1.1.2 root 1030: if(curi->size==sz_long && curi->smode!=Dreg && curi->smode!=Areg && !(curi->smode>=imm && curi->smode<=immi))
1031: insn_n_cycles += 2;
1032: else
1033: insn_n_cycles += 4;
1.1 root 1034: break;
1035: case i_ADDX:
1036: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1037: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1038: start_brace ();
1039: printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
1040: genflags (flag_addx, curi->size, "newv", "src", "dst");
1041: genflags (flag_zn, curi->size, "newv", "", "");
1042: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1043: if(curi->smode==Dreg && curi->size==sz_long)
1044: insn_n_cycles=8;
1045: if(curi->smode==Apdi)
1046: {
1047: if(curi->size==sz_long)
1048: insn_n_cycles=30;
1049: else
1050: insn_n_cycles=18;
1051: }
1.1 root 1052: break;
1053: case i_ABCD:
1054: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1055: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1056: start_brace ();
1057: printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
1058: printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
1059: printf ("\tuae_u16 newv;\n");
1060: printf ("\tint cflg;\n");
1061: printf ("\tif (newv_lo > 9) { newv_lo +=6; }\n");
1062: printf ("\tnewv = newv_hi + newv_lo;");
1063: printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
1064: printf ("\tSET_CFLG (cflg);\n");
1065: duplicate_carry ();
1066: printf ("\tif (cflg) newv += 0x60;\n");
1067: genflags (flag_zn, curi->size, "newv", "", "");
1068: genflags (flag_sv, curi->size, "newv", "src", "dst");
1069: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1070: if(curi->smode==Dreg) insn_n_cycles=6;
1071: if(curi->smode==Apdi) insn_n_cycles=18;
1.1 root 1072: break;
1073: case i_NEG:
1074: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1075: start_brace ();
1076: genflags (flag_sub, curi->size, "dst", "src", "0");
1077: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1078: if(curi->size==sz_long && curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1079: break;
1080: case i_NEGX:
1081: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1082: start_brace ();
1083: printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
1084: genflags (flag_subx, curi->size, "newv", "src", "0");
1085: genflags (flag_zn, curi->size, "newv", "", "");
1086: genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1087: if(curi->size==sz_long && curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1088: break;
1089: case i_NBCD:
1090: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1091: start_brace ();
1092: printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1093: printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1094: printf ("\tuae_u16 newv;\n");
1095: printf ("\tint cflg;\n");
1096: printf ("\tif (newv_lo > 9) { newv_lo-=6; newv_hi-=0x10; }\n");
1097: printf ("\tnewv = newv_hi + (newv_lo & 0xF);");
1098: printf ("\tcflg = cflg = (newv_hi & 0x1F0) > 0x90;\n");
1099: printf ("\tSET_CFLG (cflg);\n");
1100: duplicate_carry();
1101: printf ("\tif (cflg) newv -= 0x60;\n");
1102: genflags (flag_zn, curi->size, "newv", "", "");
1103: genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1104: if(curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1105: break;
1106: case i_CLR:
1107: genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1108: genflags (flag_logical, curi->size, "0", "", "");
1109: genastore ("0", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1110: if(curi->size==sz_long)
1.1.1.3 ! root 1111: {
1.1.1.2 root 1112: if(curi->smode==Dreg)
1113: insn_n_cycles += 2;
1114: else
1115: insn_n_cycles += 4;
1.1.1.3 ! root 1116: }
1.1.1.2 root 1117: if(curi->smode!=Dreg)
1118: insn_n_cycles += 4;
1.1 root 1119: break;
1120: case i_NOT:
1121: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1122: start_brace ();
1123: printf ("\tuae_u32 dst = ~src;\n");
1124: genflags (flag_logical, curi->size, "dst", "", "");
1125: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1126: if(curi->size==sz_long && curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1127: break;
1128: case i_TST:
1129: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1130: genflags (flag_logical, curi->size, "src", "", "");
1131: break;
1132: case i_BTST:
1133: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1134: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1135: if (curi->size == sz_byte)
1136: printf ("\tsrc &= 7;\n");
1137: else
1138: printf ("\tsrc &= 31;\n");
1139: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1.1.1.2 root 1140: if(curi->dmode==Dreg) insn_n_cycles += 2;
1.1 root 1141: break;
1142: case i_BCHG:
1143: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1144: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1145: if (curi->size == sz_byte)
1146: printf ("\tsrc &= 7;\n");
1147: else
1148: printf ("\tsrc &= 31;\n");
1149: printf ("\tdst ^= (1 << src);\n");
1150: printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
1151: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1152: if(curi->dmode==Dreg) insn_n_cycles += 4;
1.1 root 1153: break;
1154: case i_BCLR:
1155: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1156: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1157: if (curi->size == sz_byte)
1158: printf ("\tsrc &= 7;\n");
1159: else
1160: printf ("\tsrc &= 31;\n");
1161: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1162: printf ("\tdst &= ~(1 << src);\n");
1163: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1164: if(curi->dmode==Dreg) insn_n_cycles += 6;
1.1 root 1165: break;
1166: case i_BSET:
1167: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1168: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1169: if (curi->size == sz_byte)
1170: printf ("\tsrc &= 7;\n");
1171: else
1172: printf ("\tsrc &= 31;\n");
1173: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1174: printf ("\tdst |= (1 << src);\n");
1175: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1176: if(curi->dmode==Dreg) insn_n_cycles += 4;
1.1 root 1177: break;
1178: case i_CMPM:
1179: case i_CMP:
1180: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1181: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1182: start_brace ();
1183: genflags (flag_cmp, curi->size, "newv", "src", "dst");
1.1.1.2 root 1184: if(curi->size==sz_long && curi->dmode==Dreg)
1185: insn_n_cycles += 2;
1.1 root 1186: break;
1187: case i_CMPA:
1188: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1189: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1190: start_brace ();
1191: genflags (flag_cmp, sz_long, "newv", "src", "dst");
1.1.1.2 root 1192: insn_n_cycles += 2;
1.1 root 1193: break;
1194: /* The next two are coded a little unconventional, but they are doing
1195: * weird things... */
1196: case i_MVPRM:
1197: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1198:
1199: printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1200: if (curi->size == sz_word) {
1201: printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1202: } else {
1203: printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1204: printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1205: }
1.1.1.2 root 1206: if(curi->size==sz_long) insn_n_cycles=24; else insn_n_cycles=16;
1.1 root 1207: break;
1208: case i_MVPMR:
1209: printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1210: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1211: if (curi->size == sz_word) {
1212: printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1213: } else {
1214: printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1215: printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1216: }
1217: genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1218: if(curi->size==sz_long) insn_n_cycles=24; else insn_n_cycles=16;
1.1 root 1219: break;
1220: case i_MOVE:
1221: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1222: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1223: genflags (flag_logical, curi->size, "src", "", "");
1224: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1225: break;
1226: case i_MOVEA:
1227: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1228: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1229: if (curi->size == sz_word) {
1230: printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1231: } else {
1232: printf ("\tuae_u32 val = src;\n");
1233: }
1234: genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1235: break;
1.1.1.2 root 1236: case i_MVSR2: /* Move from SR */
1.1 root 1237: genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1238: printf ("\tMakeSR();\n");
1239: if (curi->size == sz_byte)
1240: genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1241: else
1242: genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1.1.1.2 root 1243: if (curi->smode==Dreg) insn_n_cycles += 2; else insn_n_cycles += 4;
1.1 root 1244: break;
1.1.1.2 root 1245: case i_MV2SR: /* Move to SR */
1.1 root 1246: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1247: if (curi->size == sz_byte)
1248: printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1249: else {
1250: printf ("\tregs.sr = src;\n");
1251: }
1252: printf ("\tMakeFromSR();\n");
1.1.1.2 root 1253: insn_n_cycles += 8;
1.1 root 1254: break;
1255: case i_SWAP:
1256: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1257: start_brace ();
1258: printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1259: genflags (flag_logical, sz_long, "dst", "", "");
1260: genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1261: break;
1262: case i_EXG:
1263: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1264: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1265: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1266: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1267: insn_n_cycles = 6;
1.1 root 1268: break;
1269: case i_EXT:
1270: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1271: start_brace ();
1272: switch (curi->size) {
1273: case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1274: case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1275: case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1276: default: abort ();
1277: }
1278: genflags (flag_logical,
1279: curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1280: genastore ("dst", curi->smode, "srcreg",
1281: curi->size == sz_word ? sz_word : sz_long, "src");
1282: break;
1283: case i_MVMEL:
1284: genmovemel (opcode);
1285: break;
1286: case i_MVMLE:
1287: genmovemle (opcode);
1288: break;
1289: case i_TRAP:
1290: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1291: sync_m68k_pc ();
1292: printf ("\tException(src+32,0);\n");
1293: m68k_pc_offset = 0;
1294: break;
1295: case i_MVR2USP:
1296: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1297: printf ("\tregs.usp = src;\n");
1298: break;
1299: case i_MVUSP2R:
1300: genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1301: genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1302: break;
1303: case i_RESET:
1304: printf ("\tcustomreset();\n");
1.1.1.2 root 1305: insn_n_cycles = 132; /* I am not so sure about this!? - Thothy */
1.1 root 1306: break;
1307: case i_NOP:
1308: break;
1309: case i_STOP:
1310: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1311: printf ("\tregs.sr = src;\n");
1312: printf ("\tMakeFromSR();\n");
1313: printf ("\tm68k_setstopped(1);\n");
1.1.1.2 root 1314: insn_n_cycles = 4;
1.1 root 1315: break;
1316: case i_RTE:
1317: if (cpu_level == 0) {
1318: genamode (Aipi, "7", sz_word, "sr", 1, 0);
1319: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1320: printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1321: fill_prefetch_0 ();
1322: printf ("\tMakeFromSR();\n");
1323: } else {
1324: int old_brace_level = n_braces;
1325: if (next_cpu_level < 0)
1326: next_cpu_level = 0;
1327: printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1328: genamode (Aipi, "7", sz_word, "sr", 1, 0);
1329: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1330: genamode (Aipi, "7", sz_word, "format", 1, 0);
1331: printf ("\tnewsr = sr; newpc = pc;\n");
1332: printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1333: printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1334: printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1335: printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1336: printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1337: printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1338: printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1339: printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1340: printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1341: pop_braces (old_brace_level);
1342: printf ("\tregs.sr = newsr; MakeFromSR();\n");
1343: printf ("\tm68k_setpc_rte(newpc);\n");
1344: fill_prefetch_0 ();
1345: need_endlabel = 1;
1346: }
1347: /* PC is set and prefetch filled. */
1348: m68k_pc_offset = 0;
1.1.1.2 root 1349: insn_n_cycles = 20;
1.1 root 1350: break;
1351: case i_RTD:
1352: printf ("\tcompiler_flush_jsr_stack();\n");
1353: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1354: genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1355: printf ("\tm68k_areg(regs, 7) += offs;\n");
1356: printf ("\tm68k_setpc_rte(pc);\n");
1357: fill_prefetch_0 ();
1358: /* PC is set and prefetch filled. */
1359: m68k_pc_offset = 0;
1360: break;
1361: case i_LINK:
1362: genamode (Apdi, "7", sz_long, "old", 2, 0);
1363: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1364: genastore ("src", Apdi, "7", sz_long, "old");
1365: genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1366: genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1367: printf ("\tm68k_areg(regs, 7) += offs;\n");
1368: break;
1369: case i_UNLK:
1370: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1371: printf ("\tm68k_areg(regs, 7) = src;\n");
1372: genamode (Aipi, "7", sz_long, "old", 1, 0);
1373: genastore ("old", curi->smode, "srcreg", curi->size, "src");
1374: break;
1375: case i_RTS:
1376: printf ("\tm68k_do_rts();\n");
1377: fill_prefetch_0 ();
1378: m68k_pc_offset = 0;
1.1.1.2 root 1379: insn_n_cycles = 16;
1.1 root 1380: break;
1381: case i_TRAPV:
1382: sync_m68k_pc ();
1383: printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1384: need_endlabel = 1;
1385: break;
1386: case i_RTR:
1387: printf ("\tcompiler_flush_jsr_stack();\n");
1388: printf ("\tMakeSR();\n");
1389: genamode (Aipi, "7", sz_word, "sr", 1, 0);
1390: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1391: printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1392: printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1393: fill_prefetch_0 ();
1394: printf ("\tMakeFromSR();\n");
1395: m68k_pc_offset = 0;
1.1.1.2 root 1396: insn_n_cycles = 20;
1.1 root 1397: break;
1398: case i_JSR:
1399: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1400: printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1401: fill_prefetch_0 ();
1402: m68k_pc_offset = 0;
1.1.1.2 root 1403: switch(curi->smode)
1404: {
1405: case Aind: insn_n_cycles=16; break;
1406: case Ad16: insn_n_cycles=18; break;
1407: case Ad8r: insn_n_cycles=22; break;
1408: case absw: insn_n_cycles=18; break;
1409: case absl: insn_n_cycles=20; break;
1410: case PC16: insn_n_cycles=18; break;
1411: case PC8r: insn_n_cycles=22; break;
1412: }
1.1 root 1413: break;
1414: case i_JMP:
1415: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1416: printf ("\tm68k_setpc(srca);\n");
1417: fill_prefetch_0 ();
1418: m68k_pc_offset = 0;
1.1.1.2 root 1419: switch(curi->smode)
1420: {
1421: case Aind: insn_n_cycles=8; break;
1422: case Ad16: insn_n_cycles=10; break;
1423: case Ad8r: insn_n_cycles=14; break;
1424: case absw: insn_n_cycles=10; break;
1425: case absl: insn_n_cycles=12; break;
1426: case PC16: insn_n_cycles=10; break;
1427: case PC8r: insn_n_cycles=14; break;
1428: }
1.1 root 1429: break;
1430: case i_BSR:
1431: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1432: printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1433: if (using_exception_3) {
1434: printf ("\tif (src & 1) {\n");
1435: printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1436: printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1437: printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1438: printf ("\t}\n");
1439: need_endlabel = 1;
1440: }
1441: printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1442: fill_prefetch_0 ();
1443: m68k_pc_offset = 0;
1.1.1.2 root 1444: insn_n_cycles = 18;
1.1 root 1445: break;
1446: case i_Bcc:
1447: if (curi->size == sz_long) {
1448: if (cpu_level < 2) {
1449: printf ("\tm68k_incpc(2);\n");
1450: printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1451: printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1452: printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1453: printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1454: need_endlabel = 1;
1455: } else {
1456: if (next_cpu_level < 1)
1457: next_cpu_level = 1;
1458: }
1459: }
1460: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1461: printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1462: if (using_exception_3) {
1463: printf ("\tif (src & 1) {\n");
1464: printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1465: printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1466: printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1467: printf ("\t}\n");
1468: need_endlabel = 1;
1469: }
1470: #ifdef USE_COMPILER
1471: printf ("\tm68k_setpc_bcc(m68k_getpc() + 2 + (uae_s32)src);\n");
1472: #else
1473: printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1474: #endif
1475: fill_prefetch_0 ();
1.1.1.2 root 1476: printf ("\treturn 10;\n");
1.1 root 1477: printf ("didnt_jump:;\n");
1478: need_endlabel = 1;
1.1.1.2 root 1479: insn_n_cycles = (curi->size == sz_byte) ? 8 : 12;
1.1 root 1480: break;
1481: case i_LEA:
1482: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1483: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1484: genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1485: if(curi->smode==Ad8r || curi->smode==PC8r)
1486: insn_n_cycles += 2;
1.1 root 1487: break;
1488: case i_PEA:
1489: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1490: genamode (Apdi, "7", sz_long, "dst", 2, 0);
1491: genastore ("srca", Apdi, "7", sz_long, "dst");
1.1.1.2 root 1492: switch(curi->smode)
1493: {
1494: case Aind: insn_n_cycles=12; break;
1495: case Ad16: insn_n_cycles=16; break;
1496: case Ad8r: insn_n_cycles=20; break;
1497: case absw: insn_n_cycles=16; break;
1498: case absl: insn_n_cycles=20; break;
1499: case PC16: insn_n_cycles=16; break;
1500: case PC8r: insn_n_cycles=20; break;
1501: }
1.1 root 1502: break;
1503: case i_DBcc:
1504: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1505: genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1506:
1.1.1.2 root 1507: printf ("\tif (!cctrue(%d)) {\n\t", curi->cc);
1.1 root 1508: genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1509:
1510: printf ("\t\tif (src) {\n");
1511: if (using_exception_3) {
1512: printf ("\t\t\tif (offs & 1) {\n");
1513: printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1514: printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1515: printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1516: printf ("\t\t}\n");
1517: need_endlabel = 1;
1518: }
1519: #ifdef USE_COMPILER
1520: printf ("\t\t\tm68k_setpc_bcc(m68k_getpc() + (uae_s32)offs + 2);\n");
1521: #else
1522: printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1523: #endif
1524: fill_prefetch_0 ();
1.1.1.2 root 1525: printf ("\t\t\treturn 10;\n");
1526: printf ("\t\t} else {\n\t\t\t");
1527: {
1528: int tmp_offset = m68k_pc_offset;
1529: sync_m68k_pc(); /* not so nice to call it here... */
1530: m68k_pc_offset = tmp_offset;
1531: }
1532: printf ("\t\t\treturn 14;\n");
1533: printf ("\t\t}\n");
1.1 root 1534: printf ("\t}\n");
1535: insn_n_cycles = 12;
1536: need_endlabel = 1;
1537: break;
1538: case i_Scc:
1539: genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1540: start_brace ();
1541: printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1542: genastore ("val", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1543: if(curi->smode!=Dreg) insn_n_cycles += 4;
1.1 root 1544: break;
1545: case i_DIVU:
1546: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1547: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1548: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1549: sync_m68k_pc ();
1550: /* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends
1551: * on this (actually, it's doing a DIVS). */
1552: printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr);
1553: printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1554: printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1555: /* The N flag appears to be set each time there is an overflow.
1556: * Weird. */
1557: printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1558: genflags (flag_logical, sz_word, "newv", "", "");
1559: printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1560: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1561: printf ("\t}\n");
1562: printf ("\t}\n");
1563: insn_n_cycles += 136;
1564: need_endlabel = 1;
1565: break;
1566: case i_DIVS:
1567: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1568: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1569: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1570: sync_m68k_pc ();
1571: printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1572: printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1573: printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1574: printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1575: printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1576: genflags (flag_logical, sz_word, "newv", "", "");
1577: printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1578: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1579: printf ("\t}\n");
1580: printf ("\t}\n");
1581: insn_n_cycles += 154;
1582: need_endlabel = 1;
1583: break;
1584: case i_MULU:
1585: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1586: genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1587: start_brace ();
1588: printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1589: genflags (flag_logical, sz_long, "newv", "", "");
1590: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1591: insn_n_cycles += 66;
1592: break;
1593: case i_MULS:
1594: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1595: genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1596: start_brace ();
1597: printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1598: genflags (flag_logical, sz_long, "newv", "", "");
1599: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1600: insn_n_cycles += 66;
1601: break;
1602: case i_CHK:
1603: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1604: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1605: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1606: printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1607: printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1608: need_endlabel = 1;
1.1.1.2 root 1609: insn_n_cycles += 6;
1.1 root 1610: break;
1611:
1612: case i_CHK2:
1613: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1614: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1615: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1616: printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1617: switch (curi->size) {
1618: case sz_byte:
1619: printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1620: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1621: break;
1622: case sz_word:
1623: printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1624: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1625: break;
1626: case sz_long:
1627: printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1628: break;
1629: default:
1630: abort ();
1631: }
1632: printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1633: printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1634: printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1635: need_endlabel = 1;
1636: break;
1637:
1638: case i_ASR:
1639: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1640: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1641: start_brace ();
1642: switch (curi->size) {
1643: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1644: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1645: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1646: default: abort ();
1647: }
1648: printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1649: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1650: printf ("\tretcycles = cnt;\n");
1.1 root 1651: printf ("\tCLEAR_CZNV;\n");
1652: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1653: printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1654: printf ("\t\tSET_CFLG (sign);\n");
1655: duplicate_carry ();
1656: if (source_is_imm1_8 (curi))
1657: printf ("\t} else {\n");
1658: else
1659: printf ("\t} else if (cnt > 0) {\n");
1660: printf ("\t\tval >>= cnt - 1;\n");
1661: printf ("\t\tSET_CFLG (val & 1);\n");
1662: duplicate_carry ();
1663: printf ("\t\tval >>= 1;\n");
1664: printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1665: bit_mask (curi->size),
1666: bit_size (curi->size));
1667: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1668: printf ("\t}\n");
1669: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1670: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1671: if(curi->size==sz_long)
1672: strcpy(exactCpuCycles," return (8+retcycles*2);");
1673: else
1674: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1675: break;
1676: case i_ASL:
1677: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1678: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1679: start_brace ();
1680: switch (curi->size) {
1681: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1682: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1683: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1684: default: abort ();
1685: }
1686: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1687: printf ("\tretcycles = cnt;\n");
1.1 root 1688: printf ("\tCLEAR_CZNV;\n");
1689: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1690: printf ("\t\tSET_VFLG (val != 0);\n");
1691: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1692: bit_size (curi->size));
1693: duplicate_carry ();
1694: printf ("\t\tval = 0;\n");
1695: if (source_is_imm1_8 (curi))
1696: printf ("\t} else {\n");
1697: else
1698: printf ("\t} else if (cnt > 0) {\n");
1699: printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1700: bit_mask (curi->size),
1701: bit_size (curi->size) - 1,
1702: bit_mask (curi->size));
1703: printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1704: printf ("\t\tval <<= cnt - 1;\n");
1705: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1706: duplicate_carry ();
1707: printf ("\t\tval <<= 1;\n");
1708: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1709: printf ("\t}\n");
1710: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1711: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1712: if(curi->size==sz_long)
1713: strcpy(exactCpuCycles," return (8+retcycles*2);");
1714: else
1715: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1716: break;
1717: case i_LSR:
1718: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1719: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1720: start_brace ();
1721: switch (curi->size) {
1722: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1723: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1724: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1725: default: abort ();
1726: }
1727: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1728: printf ("\tretcycles = cnt;\n");
1.1 root 1729: printf ("\tCLEAR_CZNV;\n");
1730: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1731: printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1732: bit_size (curi->size), bit_size (curi->size) - 1);
1733: duplicate_carry ();
1734: printf ("\t\tval = 0;\n");
1735: if (source_is_imm1_8 (curi))
1736: printf ("\t} else {\n");
1737: else
1738: printf ("\t} else if (cnt > 0) {\n");
1739: printf ("\t\tval >>= cnt - 1;\n");
1740: printf ("\t\tSET_CFLG (val & 1);\n");
1741: duplicate_carry ();
1742: printf ("\t\tval >>= 1;\n");
1743: printf ("\t}\n");
1744: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1745: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1746: if(curi->size==sz_long)
1747: strcpy(exactCpuCycles," return (8+retcycles*2);");
1748: else
1749: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1750: break;
1751: case i_LSL:
1752: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1753: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1754: start_brace ();
1755: switch (curi->size) {
1756: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1757: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1758: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1759: default: abort ();
1760: }
1761: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1762: printf ("\tretcycles = cnt;\n");
1.1 root 1763: printf ("\tCLEAR_CZNV;\n");
1764: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1765: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1766: bit_size (curi->size));
1767: duplicate_carry ();
1768: printf ("\t\tval = 0;\n");
1769: if (source_is_imm1_8 (curi))
1770: printf ("\t} else {\n");
1771: else
1772: printf ("\t} else if (cnt > 0) {\n");
1773: printf ("\t\tval <<= (cnt - 1);\n");
1774: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1775: duplicate_carry ();
1776: printf ("\t\tval <<= 1;\n");
1777: printf ("\tval &= %s;\n", bit_mask (curi->size));
1778: printf ("\t}\n");
1779: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1780: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1781: if(curi->size==sz_long)
1782: strcpy(exactCpuCycles," return (8+retcycles*2);");
1783: else
1784: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1785: break;
1786: case i_ROL:
1787: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1788: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1789: start_brace ();
1790: switch (curi->size) {
1791: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1792: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1793: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1794: default: abort ();
1795: }
1796: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1797: printf ("\tretcycles = cnt;\n");
1.1 root 1798: printf ("\tCLEAR_CZNV;\n");
1799: if (source_is_imm1_8 (curi))
1800: printf ("{");
1801: else
1802: printf ("\tif (cnt > 0) {\n");
1803: printf ("\tuae_u32 loval;\n");
1804: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1805: printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1806: printf ("\tval <<= cnt;\n");
1807: printf ("\tval |= loval;\n");
1808: printf ("\tval &= %s;\n", bit_mask (curi->size));
1809: printf ("\tSET_CFLG (val & 1);\n");
1810: printf ("}\n");
1811: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1812: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1813: if(curi->size==sz_long)
1814: strcpy(exactCpuCycles," return (8+retcycles*2);");
1815: else
1816: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1817: break;
1818: case i_ROR:
1819: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1820: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1821: start_brace ();
1822: switch (curi->size) {
1823: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1824: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1825: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1826: default: abort ();
1827: }
1828: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1829: printf ("\tretcycles = cnt;\n");
1.1 root 1830: printf ("\tCLEAR_CZNV;\n");
1831: if (source_is_imm1_8 (curi))
1832: printf ("{");
1833: else
1834: printf ("\tif (cnt > 0) {");
1835: printf ("\tuae_u32 hival;\n");
1836: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1837: printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1838: printf ("\tval >>= cnt;\n");
1839: printf ("\tval |= hival;\n");
1840: printf ("\tval &= %s;\n", bit_mask (curi->size));
1841: printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1842: printf ("\t}\n");
1843: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1844: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1845: if(curi->size==sz_long)
1846: strcpy(exactCpuCycles," return (8+retcycles*2);");
1847: else
1848: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1849: break;
1850: case i_ROXL:
1851: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1852: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1853: start_brace ();
1854: switch (curi->size) {
1855: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1856: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1857: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1858: default: abort ();
1859: }
1860: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1861: printf ("\tretcycles = cnt;\n");
1.1 root 1862: printf ("\tCLEAR_CZNV;\n");
1863: if (source_is_imm1_8 (curi))
1864: printf ("{");
1865: else {
1866: force_range_for_rox ("cnt", curi->size);
1867: printf ("\tif (cnt > 0) {\n");
1868: }
1869: printf ("\tcnt--;\n");
1870: printf ("\t{\n\tuae_u32 carry;\n");
1871: printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1872: printf ("\tcarry = loval & 1;\n");
1873: printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1874: printf ("\tSET_XFLG (carry);\n");
1875: printf ("\tval &= %s;\n", bit_mask (curi->size));
1876: printf ("\t} }\n");
1877: printf ("\tSET_CFLG (GET_XFLG);\n");
1878: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1879: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1880: if(curi->size==sz_long)
1881: strcpy(exactCpuCycles," return (8+retcycles*2);");
1882: else
1883: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1884: break;
1885: case i_ROXR:
1886: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1887: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1888: start_brace ();
1889: switch (curi->size) {
1890: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1891: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1892: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1893: default: abort ();
1894: }
1895: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1896: printf ("\tretcycles = cnt;\n");
1.1 root 1897: printf ("\tCLEAR_CZNV;\n");
1898: if (source_is_imm1_8 (curi))
1899: printf ("{");
1900: else {
1901: force_range_for_rox ("cnt", curi->size);
1902: printf ("\tif (cnt > 0) {\n");
1903: }
1904: printf ("\tcnt--;\n");
1905: printf ("\t{\n\tuae_u32 carry;\n");
1906: printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
1907: printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
1908: printf ("\tval >>= cnt;\n");
1909: printf ("\tcarry = val & 1;\n");
1910: printf ("\tval >>= 1;\n");
1911: printf ("\tval |= hival;\n");
1912: printf ("\tSET_XFLG (carry);\n");
1913: printf ("\tval &= %s;\n", bit_mask (curi->size));
1914: printf ("\t} }\n");
1915: printf ("\tSET_CFLG (GET_XFLG);\n");
1916: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1917: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1918: if(curi->size==sz_long)
1919: strcpy(exactCpuCycles," return (8+retcycles*2);");
1920: else
1921: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1922: break;
1923: case i_ASRW:
1924: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1925: start_brace ();
1926: switch (curi->size) {
1927: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1928: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1929: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1930: default: abort ();
1931: }
1932: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1933: printf ("\tuae_u32 cflg = val & 1;\n");
1934: printf ("\tval = (val >> 1) | sign;\n");
1935: genflags (flag_logical, curi->size, "val", "", "");
1936: printf ("\tSET_CFLG (cflg);\n");
1937: duplicate_carry ();
1938: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1939: break;
1940: case i_ASLW:
1941: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1942: start_brace ();
1943: switch (curi->size) {
1944: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1945: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1946: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1947: default: abort ();
1948: }
1949: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1950: printf ("\tuae_u32 sign2;\n");
1951: printf ("\tval <<= 1;\n");
1952: genflags (flag_logical, curi->size, "val", "", "");
1953: printf ("\tsign2 = %s & val;\n", cmask (curi->size));
1954: printf ("\tSET_CFLG (sign != 0);\n");
1955: duplicate_carry ();
1956:
1957: printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
1958: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1959: break;
1960: case i_LSRW:
1961: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1962: start_brace ();
1963: switch (curi->size) {
1964: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1965: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1966: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1967: default: abort ();
1968: }
1969: printf ("\tuae_u32 carry = val & 1;\n");
1970: printf ("\tval >>= 1;\n");
1971: genflags (flag_logical, curi->size, "val", "", "");
1972: printf ("SET_CFLG (carry);\n");
1973: duplicate_carry ();
1974: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1975: break;
1976: case i_LSLW:
1977: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1978: start_brace ();
1979: switch (curi->size) {
1980: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1981: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1982: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1983: default: abort ();
1984: }
1985: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1986: printf ("\tval <<= 1;\n");
1987: genflags (flag_logical, curi->size, "val", "", "");
1988: printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1989: duplicate_carry ();
1990: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1991: break;
1992: case i_ROLW:
1993: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1994: start_brace ();
1995: switch (curi->size) {
1996: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1997: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1998: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1999: default: abort ();
2000: }
2001: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2002: printf ("\tval <<= 1;\n");
2003: printf ("\tif (carry) val |= 1;\n");
2004: genflags (flag_logical, curi->size, "val", "", "");
2005: printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2006: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2007: break;
2008: case i_RORW:
2009: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2010: start_brace ();
2011: switch (curi->size) {
2012: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2013: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2014: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2015: default: abort ();
2016: }
2017: printf ("\tuae_u32 carry = val & 1;\n");
2018: printf ("\tval >>= 1;\n");
2019: printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
2020: genflags (flag_logical, curi->size, "val", "", "");
2021: printf ("SET_CFLG (carry);\n");
2022: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2023: break;
2024: case i_ROXLW:
2025: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2026: start_brace ();
2027: switch (curi->size) {
2028: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2029: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2030: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2031: default: abort ();
2032: }
2033: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2034: printf ("\tval <<= 1;\n");
2035: printf ("\tif (GET_XFLG) val |= 1;\n");
2036: genflags (flag_logical, curi->size, "val", "", "");
2037: printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2038: duplicate_carry ();
2039: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2040: break;
2041: case i_ROXRW:
2042: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2043: start_brace ();
2044: switch (curi->size) {
2045: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2046: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2047: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2048: default: abort ();
2049: }
2050: printf ("\tuae_u32 carry = val & 1;\n");
2051: printf ("\tval >>= 1;\n");
2052: printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
2053: genflags (flag_logical, curi->size, "val", "", "");
2054: printf ("SET_CFLG (carry);\n");
2055: duplicate_carry ();
2056: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2057: break;
2058: case i_MOVEC2:
2059: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2060: start_brace ();
2061: printf ("\tint regno = (src >> 12) & 15;\n");
2062: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2063: printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
2064: break;
2065: case i_MOVE2C:
2066: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2067: start_brace ();
2068: printf ("\tint regno = (src >> 12) & 15;\n");
2069: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2070: printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
2071: break;
2072: case i_CAS:
2073: {
2074: int old_brace_level;
2075: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2076: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2077: start_brace ();
2078: printf ("\tint ru = (src >> 6) & 7;\n");
2079: printf ("\tint rc = src & 7;\n");
2080: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
2081: printf ("\tif (GET_ZFLG)");
2082: old_brace_level = n_braces;
2083: start_brace ();
2084: genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
2085: pop_braces (old_brace_level);
2086: printf ("else");
2087: start_brace ();
2088: printf ("m68k_dreg(regs, rc) = dst;\n");
2089: pop_braces (old_brace_level);
2090: }
2091: break;
2092: case i_CAS2:
2093: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2094: printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
2095: printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
2096: if (curi->size == sz_word) {
2097: int old_brace_level = n_braces;
2098: printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
2099: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2100: printf ("\tif (GET_ZFLG) {\n");
2101: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2102: printf ("\tif (GET_ZFLG) {\n");
2103: printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2104: printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2105: printf ("\t}}\n");
2106: pop_braces (old_brace_level);
2107: printf ("\tif (! GET_ZFLG) {\n");
2108: printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
2109: printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
2110: printf ("\t}\n");
2111: } else {
2112: int old_brace_level = n_braces;
2113: printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
2114: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2115: printf ("\tif (GET_ZFLG) {\n");
2116: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2117: printf ("\tif (GET_ZFLG) {\n");
2118: printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2119: printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2120: printf ("\t}}\n");
2121: pop_braces (old_brace_level);
2122: printf ("\tif (! GET_ZFLG) {\n");
2123: printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
2124: printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
2125: printf ("\t}\n");
2126: }
2127: break;
2128: case i_MOVES: /* ignore DFC and SFC because we have no MMU */
2129: {
2130: int old_brace_level;
2131: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2132: printf ("\tif (extra & 0x800)\n");
2133: old_brace_level = n_braces;
2134: start_brace ();
2135: printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
2136: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
2137: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
2138: pop_braces (old_brace_level);
2139: printf ("else");
2140: start_brace ();
2141: genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
2142: printf ("\tif (extra & 0x8000) {\n");
2143: switch (curi->size) {
2144: case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
2145: case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
2146: case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
2147: default: abort ();
2148: }
2149: printf ("\t} else {\n");
2150: genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
2151: printf ("\t}\n");
2152: pop_braces (old_brace_level);
2153: }
2154: break;
2155: case i_BKPT: /* only needed for hardware emulators */
2156: sync_m68k_pc ();
2157: printf ("\top_illg(opcode);\n");
2158: break;
2159: case i_CALLM: /* not present in 68030 */
2160: sync_m68k_pc ();
2161: printf ("\top_illg(opcode);\n");
2162: break;
2163: case i_RTM: /* not present in 68030 */
2164: sync_m68k_pc ();
2165: printf ("\top_illg(opcode);\n");
2166: break;
2167: case i_TRAPcc:
2168: if (curi->smode != am_unknown && curi->smode != am_illg)
2169: genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2170: printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
2171: need_endlabel = 1;
2172: break;
2173: case i_DIVL:
2174: sync_m68k_pc ();
2175: start_brace ();
2176: printf ("\tuaecptr oldpc = m68k_getpc();\n");
2177: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2178: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2179: sync_m68k_pc ();
2180: printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
2181: break;
2182: case i_MULL:
2183: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2184: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2185: sync_m68k_pc ();
2186: printf ("\tm68k_mull(opcode, dst, extra);\n");
2187: break;
2188: case i_BFTST:
2189: case i_BFEXTU:
2190: case i_BFCHG:
2191: case i_BFEXTS:
2192: case i_BFCLR:
2193: case i_BFFFO:
2194: case i_BFSET:
2195: case i_BFINS:
2196: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2197: genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
2198: start_brace ();
2199: printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
2200: printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
2201: if (curi->dmode == Dreg) {
2202: printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
2203: } else {
2204: printf ("\tuae_u32 tmp,bf0,bf1;\n");
2205: printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
2206: printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
2207: printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2208: }
2209: printf ("\ttmp >>= (32 - width);\n");
2210: printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2211: printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2212: switch (curi->mnemo) {
2213: case i_BFTST:
2214: break;
2215: case i_BFEXTU:
2216: printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2217: break;
2218: case i_BFCHG:
2219: printf ("\ttmp = ~tmp;\n");
2220: break;
2221: case i_BFEXTS:
2222: printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2223: printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2224: break;
2225: case i_BFCLR:
2226: printf ("\ttmp = 0;\n");
2227: break;
2228: case i_BFFFO:
2229: printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2230: printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2231: printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2232: break;
2233: case i_BFSET:
2234: printf ("\ttmp = 0xffffffff;\n");
2235: break;
2236: case i_BFINS:
2237: printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
2238: break;
2239: default:
2240: break;
2241: }
2242: if (curi->mnemo == i_BFCHG
2243: || curi->mnemo == i_BFCLR
2244: || curi->mnemo == i_BFSET
2245: || curi->mnemo == i_BFINS)
2246: {
2247: printf ("\ttmp <<= (32 - width);\n");
2248: if (curi->dmode == Dreg) {
2249: printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2250: printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2251: printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2252: printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2253: printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2254: } else {
2255: printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2256: printf ("\t\t(tmp >> (offset & 7)) |\n");
2257: printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2258: printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2259: printf ("\tput_long(dsta,bf0 );\n");
2260: printf ("\tif (((offset & 7) + width) > 32) {\n");
2261: printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2262: printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2263: printf ("\t\tput_byte(dsta+4,bf1);\n");
2264: printf ("\t}\n");
2265: }
2266: }
2267: break;
2268: case i_PACK:
2269: if (curi->smode == Dreg) {
2270: printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2271: printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2272: } else {
2273: printf ("\tuae_u16 val;\n");
2274: printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2275: printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2276: printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2277: printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2278: printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2279: printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2280: }
2281: break;
2282: case i_UNPK:
2283: if (curi->smode == Dreg) {
2284: printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2285: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2286: printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2287: } else {
2288: printf ("\tuae_u16 val;\n");
2289: printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2290: printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2291: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2292: printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2293: printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2294: printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2295: printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2296: }
2297: break;
2298: case i_TAS:
2299: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2300: genflags (flag_logical, curi->size, "src", "", "");
2301: printf ("\tsrc |= 0x80;\n");
2302: genastore ("src", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 2303: if( curi->smode!=Dreg ) insn_n_cycles += 2;
1.1 root 2304: break;
2305: case i_FPP:
2306: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2307: sync_m68k_pc ();
2308: printf ("\tfpp_opp(opcode,extra);\n");
2309: break;
2310: case i_FDBcc:
2311: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2312: sync_m68k_pc ();
2313: printf ("\tfdbcc_opp(opcode,extra);\n");
2314: break;
2315: case i_FScc:
2316: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2317: sync_m68k_pc ();
2318: printf ("\tfscc_opp(opcode,extra);\n");
2319: break;
2320: case i_FTRAPcc:
2321: sync_m68k_pc ();
2322: start_brace ();
2323: printf ("\tuaecptr oldpc = m68k_getpc();\n");
2324: if (curi->smode != am_unknown && curi->smode != am_illg)
2325: genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2326: sync_m68k_pc ();
2327: printf ("\tftrapcc_opp(opcode,oldpc);\n");
2328: break;
2329: case i_FBcc:
2330: sync_m68k_pc ();
2331: start_brace ();
2332: printf ("\tuaecptr pc = m68k_getpc();\n");
2333: genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2334: sync_m68k_pc ();
2335: printf ("\tfbcc_opp(opcode,pc,extra);\n");
2336: break;
2337: case i_FSAVE:
2338: sync_m68k_pc ();
2339: printf ("\tfsave_opp(opcode);\n");
2340: break;
2341: case i_FRESTORE:
2342: sync_m68k_pc ();
2343: printf ("\tfrestore_opp(opcode);\n");
2344: break;
2345:
2346: case i_CINVL:
2347: case i_CINVP:
2348: case i_CINVA:
2349: case i_CPUSHL:
2350: case i_CPUSHP:
2351: case i_CPUSHA:
2352: break;
2353: case i_MOVE16:
2354: printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2355: printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2356: printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2357: printf ("\tput_long(memd, get_long(mems));\n");
2358: printf ("\tput_long(memd+4, get_long(mems+4));\n");
2359: printf ("\tput_long(memd+8, get_long(mems+8));\n");
2360: printf ("\tput_long(memd+12, get_long(mems+12));\n");
2361: printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2362: printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2363: break;
2364:
2365: case i_MMUOP:
2366: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2367: sync_m68k_pc ();
2368: printf ("\tmmu_op(opcode,extra);\n");
2369: break;
2370: default:
2371: abort ();
2372: break;
2373: }
2374: finish_braces ();
2375: sync_m68k_pc ();
2376: }
2377:
2378: static void generate_includes (FILE * f)
2379: {
2380: fprintf (f, "#include \"sysdeps.h\"\n");
2381: fprintf (f, "#include \"hatari-glue.h\"\n");
2382: fprintf (f, "#include \"maccess.h\"\n");
2383: fprintf (f, "#include \"memory.h\"\n");
2384: fprintf (f, "#include \"newcpu.h\"\n");
2385: fprintf (f, "#include \"compiler.h\"\n");
2386: fprintf (f, "#include \"cputbl.h\"\n");
2387: fprintf (f, "#define CPUFUNC(x) x##_ff\n"
2388: "#ifdef NOFLAGS\n"
2389: "#include \"noflags.h\"\n"
2390: "#endif\n");
2391: }
2392:
2393: static int postfix;
2394:
2395: static void generate_one_opcode (int rp)
2396: {
2397: int i;
2398: uae_u16 smsk, dmsk;
2399: long int opcode = opcode_map[rp];
2400:
1.1.1.2 root 2401: exactCpuCycles[0] = 0; /* Default: not used */
2402:
1.1 root 2403: if (table68k[opcode].mnemo == i_ILLG
2404: || table68k[opcode].clev > cpu_level)
2405: return;
2406:
2407: for (i = 0; lookuptab[i].name[0]; i++) {
2408: if (table68k[opcode].mnemo == lookuptab[i].mnemo)
2409: break;
2410: }
2411:
2412: if (table68k[opcode].handler != -1)
2413: return;
2414:
2415: if (opcode_next_clev[rp] != cpu_level) {
2416: fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2417: opcode, lookuptab[i].name);
2418: return;
2419: }
2420: fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2421: fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix);
2422: fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix);
2423: printf ("unsigned long REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2424:
2425: switch (table68k[opcode].stype) {
2426: case 0: smsk = 7; break;
2427: case 1: smsk = 255; break;
2428: case 2: smsk = 15; break;
2429: case 3: smsk = 7; break;
2430: case 4: smsk = 7; break;
2431: case 5: smsk = 63; break;
2432: default: abort ();
2433: }
2434: dmsk = 7;
2435:
2436: next_cpu_level = -1;
2437: if (table68k[opcode].suse
2438: && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2439: && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2440: && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2441: && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2442: {
2443: if (table68k[opcode].spos == -1) {
2444: if (((int) table68k[opcode].sreg) >= 128)
2445: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2446: else
2447: printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2448: } else {
2449: char source[100];
2450: int pos = table68k[opcode].spos;
2451:
2452: if (pos)
2453: sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2454: else
2455: sprintf (source, "(opcode & %d)", smsk);
2456:
2457: if (table68k[opcode].stype == 3)
2458: printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2459: else if (table68k[opcode].stype == 1)
2460: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2461: else
2462: printf ("\tuae_u32 srcreg = %s;\n", source);
2463: }
2464: }
2465: if (table68k[opcode].duse
2466: /* Yes, the dmode can be imm, in case of LINK or DBcc */
2467: && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2468: && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2469: && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2470: {
2471: if (table68k[opcode].dpos == -1) {
2472: if (((int) table68k[opcode].dreg) >= 128)
2473: printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2474: else
2475: printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2476: } else {
2477: int pos = table68k[opcode].dpos;
2478: #if 0
2479: /* Check that we can do the little endian optimization safely. */
2480: if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2481: abort ();
2482: #endif
2483: if (pos)
2484: printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2485: pos, dmsk);
2486: else
2487: printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2488: }
2489: }
2490: need_endlabel = 0;
2491: endlabelno++;
2492: sprintf (endlabelstr, "endlabel%d", endlabelno);
1.1.1.2 root 2493: if(table68k[opcode].mnemo==i_ASR || table68k[opcode].mnemo==i_ASL || table68k[opcode].mnemo==i_LSR || table68k[opcode].mnemo==i_LSL
2494: || table68k[opcode].mnemo==i_ROL || table68k[opcode].mnemo==i_ROR || table68k[opcode].mnemo==i_ROXL || table68k[opcode].mnemo==i_ROXR
2495: || table68k[opcode].mnemo==i_MVMEL || table68k[opcode].mnemo==i_MVMLE)
2496: printf("\tunsigned int retcycles;\n");
1.1 root 2497: gen_opcode (opcode);
2498: if (need_endlabel)
2499: printf ("%s: ;\n", endlabelstr);
1.1.1.2 root 2500: if( strlen(exactCpuCycles) > 0 )
2501: printf("%s\n",exactCpuCycles);
2502: else
2503: printf ("return %d;\n", insn_n_cycles);
1.1 root 2504: printf ("}\n");
2505: opcode_next_clev[rp] = next_cpu_level;
2506: opcode_last_postfix[rp] = postfix;
2507: }
2508:
2509: static void generate_func (void)
2510: {
2511: int i, j, rp;
2512:
2513: using_prefetch = 0;
2514: using_exception_3 = 0;
2515: for (i = 0; i < 6; i++) {
2516: cpu_level = 4 - i;
2517: if (i == 5) {
2518: cpu_level = 0;
2519: using_prefetch = 1;
2520: using_exception_3 = 1;
2521: for (rp = 0; rp < nr_cpuop_funcs; rp++)
2522: opcode_next_clev[rp] = 0;
2523: }
2524:
2525: postfix = i;
2526: fprintf (stblfile, "struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
2527:
2528: /* sam: this is for people with low memory (eg. me :)) */
2529: printf ("\n"
2530: "#if !defined(PART_1) && !defined(PART_2) && "
2531: "!defined(PART_3) && !defined(PART_4) && "
2532: "!defined(PART_5) && !defined(PART_6) && "
2533: "!defined(PART_7) && !defined(PART_8)"
2534: "\n"
2535: "#define PART_1 1\n"
2536: "#define PART_2 1\n"
2537: "#define PART_3 1\n"
2538: "#define PART_4 1\n"
2539: "#define PART_5 1\n"
2540: "#define PART_6 1\n"
2541: "#define PART_7 1\n"
2542: "#define PART_8 1\n"
2543: "#endif\n\n");
2544:
2545: rp = 0;
2546: for(j=1;j<=8;++j) {
2547: int k = (j*nr_cpuop_funcs)/8;
2548: printf ("#ifdef PART_%d\n",j);
2549: for (; rp < k; rp++)
2550: generate_one_opcode (rp);
2551: printf ("#endif\n\n");
2552: }
2553:
2554: fprintf (stblfile, "{ 0, 0, 0 }};\n");
2555: }
2556:
2557: }
2558:
2559: int main (int argc, char **argv)
2560: {
2561: read_table68k ();
2562: do_merges ();
2563:
2564: opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2565: opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2566: opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2567: counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2568: read_counts ();
2569:
2570: /* It would be a lot nicer to put all in one file (we'd also get rid of
2571: * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2572: * I don't dare to touch the 68k version. */
2573:
2574: headerfile = fopen ("cputbl.h", "wb");
2575: stblfile = fopen ("cpustbl.c", "wb");
2576: freopen ("cpuemu.c", "wb", stdout);
2577:
2578: generate_includes (stdout);
2579: generate_includes (stblfile);
2580:
2581: generate_func ();
2582:
2583: free (table68k);
2584: return 0;
2585: }
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