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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * MC68000 emulation generator
5: *
6: * This is a fairly stupid program that generates a lot of case labels that
7: * can be #included in a switch statement.
8: * As an alternative, it can generate functions that handle specific
9: * MC68000 instructions, plus a prototype header file and a function pointer
10: * array to look up the function for an opcode.
11: * Error checking is bad, an illegal table68k file will cause the program to
12: * call abort().
13: * The generated code is sometimes sub-optimal, an optimizing compiler should
14: * take care of this.
15: *
16: * The source for the insn timings is Markt & Technik's Amiga Magazin 8/1992.
17: *
18: * Copyright 1995, 1996, 1997, 1998, 1999, 2000 Bernd Schmidt
1.1.1.2 root 19: *
20: * Adaptation to Hatari and better cpu timings by Thomas Huth
21: *
1.1.1.4 root 22: * This file is distributed under the GNU Public License, version 2 or at
23: * your option any later version. Read the file gpl.txt for details.
1.1 root 24: */
1.1.1.7 ! root 25: const char GenCpu_rcsid[] = "Hatari $Id: gencpu.c,v 1.12 2006/02/09 22:02:26 eerot Exp $";
1.1 root 26:
27: #include <ctype.h>
1.1.1.3 root 28: #include <string.h>
1.1 root 29:
30: #include "sysdeps.h"
31: #include "readcpu.h"
32:
33: #define BOOL_TYPE "int"
34:
35: static FILE *headerfile;
36: static FILE *stblfile;
37:
38: static int using_prefetch;
39: static int using_exception_3;
40: static int cpu_level;
41:
1.1.1.2 root 42: char exactCpuCycles[256]; /* Space to store return string for exact cpu cycles */
43:
44:
1.1 root 45: /* For the current opcode, the next lower level that will have different code.
46: * Initialized to -1 for each opcode. If it remains unchanged, indicates we
47: * are done with that opcode. */
48: static int next_cpu_level;
49: static int *opcode_map;
50: static int *opcode_next_clev;
51: static int *opcode_last_postfix;
52: static unsigned long *counts;
53:
1.1.1.6 root 54:
1.1 root 55: static void read_counts (void)
56: {
57: FILE *file;
58: unsigned long opcode, count, total;
59: char name[20];
60: int nr = 0;
61: memset (counts, 0, 65536 * sizeof *counts);
62:
63: file = fopen ("frequent.68k", "r");
64: if (file) {
65: fscanf (file, "Total: %lu\n", &total);
66: while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
67: opcode_next_clev[nr] = 4;
68: opcode_last_postfix[nr] = -1;
69: opcode_map[nr++] = opcode;
70: counts[opcode] = count;
71: }
72: fclose (file);
73: }
74: if (nr == nr_cpuop_funcs)
75: return;
76: for (opcode = 0; opcode < 0x10000; opcode++) {
77: if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
78: && counts[opcode] == 0)
79: {
80: opcode_next_clev[nr] = 4;
81: opcode_last_postfix[nr] = -1;
82: opcode_map[nr++] = opcode;
83: counts[opcode] = count;
84: }
85: }
86: if (nr != nr_cpuop_funcs)
87: abort ();
88: }
89:
90: static char endlabelstr[80];
91: static int endlabelno = 0;
92: static int need_endlabel;
93:
94: static int n_braces = 0;
95: static int m68k_pc_offset = 0;
96: static int insn_n_cycles;
97:
98: static void start_brace (void)
99: {
100: n_braces++;
101: printf ("{");
102: }
103:
104: static void close_brace (void)
105: {
106: assert (n_braces > 0);
107: n_braces--;
108: printf ("}");
109: }
110:
111: static void finish_braces (void)
112: {
113: while (n_braces > 0)
114: close_brace ();
115: }
116:
117: static void pop_braces (int to)
118: {
119: while (n_braces > to)
120: close_brace ();
121: }
122:
123: static int bit_size (int size)
124: {
125: switch (size) {
126: case sz_byte: return 8;
127: case sz_word: return 16;
128: case sz_long: return 32;
129: default: abort ();
130: }
131: return 0;
132: }
133:
134: static const char *bit_mask (int size)
135: {
136: switch (size) {
137: case sz_byte: return "0xff";
138: case sz_word: return "0xffff";
139: case sz_long: return "0xffffffff";
140: default: abort ();
141: }
142: return 0;
143: }
144:
145: static const char *gen_nextilong (void)
146: {
147: static char buffer[80];
148: int r = m68k_pc_offset;
149: m68k_pc_offset += 4;
150:
151: insn_n_cycles += 8;
152:
153: if (using_prefetch)
154: sprintf (buffer, "get_ilong_prefetch(%d)", r);
155: else
156: sprintf (buffer, "get_ilong(%d)", r);
157: return buffer;
158: }
159:
160: static const char *gen_nextiword (void)
161: {
162: static char buffer[80];
163: int r = m68k_pc_offset;
164: m68k_pc_offset += 2;
165:
166: insn_n_cycles += 4;
167:
168: if (using_prefetch)
169: sprintf (buffer, "get_iword_prefetch(%d)", r);
170: else
171: sprintf (buffer, "get_iword(%d)", r);
172: return buffer;
173: }
174:
175: static const char *gen_nextibyte (void)
176: {
177: static char buffer[80];
178: int r = m68k_pc_offset;
179: m68k_pc_offset += 2;
180:
181: insn_n_cycles += 4;
182:
183: if (using_prefetch)
184: sprintf (buffer, "get_ibyte_prefetch(%d)", r);
185: else
186: sprintf (buffer, "get_ibyte(%d)", r);
187: return buffer;
188: }
189:
190: static void fill_prefetch_0 (void)
191: {
192: if (using_prefetch)
193: printf ("fill_prefetch_0 ();\n");
194: }
195:
196: static void fill_prefetch_2 (void)
197: {
198: if (using_prefetch)
199: printf ("fill_prefetch_2 ();\n");
200: }
201:
202: static void sync_m68k_pc (void)
203: {
204: if (m68k_pc_offset == 0)
205: return;
206: printf ("m68k_incpc(%d);\n", m68k_pc_offset);
207: switch (m68k_pc_offset) {
208: case 0:
209: /*fprintf (stderr, "refilling prefetch at 0\n"); */
210: break;
211: case 2:
212: fill_prefetch_2 ();
213: break;
214: default:
215: fill_prefetch_0 ();
216: break;
217: }
218: m68k_pc_offset = 0;
219: }
220:
221: /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
1.1.1.4 root 222: * the calling routine handles Apdi and Aipi modes.
223: * gb-- movem == 2 means the same thing but for a MOVE16 instruction */
1.1 root 224: static void genamode (amodes mode, char *reg, wordsizes size, char *name, int getv, int movem)
225: {
226: start_brace ();
227: switch (mode) {
228: case Dreg:
229: if (movem)
230: abort ();
231: if (getv == 1)
232: switch (size) {
233: case sz_byte:
234: printf ("\tuae_s8 %s = m68k_dreg(regs, %s);\n", name, reg);
235: break;
236: case sz_word:
237: printf ("\tuae_s16 %s = m68k_dreg(regs, %s);\n", name, reg);
238: break;
239: case sz_long:
240: printf ("\tuae_s32 %s = m68k_dreg(regs, %s);\n", name, reg);
241: break;
242: default:
243: abort ();
244: }
245: return;
246: case Areg:
247: if (movem)
248: abort ();
249: if (getv == 1)
250: switch (size) {
251: case sz_word:
252: printf ("\tuae_s16 %s = m68k_areg(regs, %s);\n", name, reg);
253: break;
254: case sz_long:
255: printf ("\tuae_s32 %s = m68k_areg(regs, %s);\n", name, reg);
256: break;
257: default:
258: abort ();
259: }
260: return;
261: case Aind:
262: printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
263: break;
264: case Aipi:
265: printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
266: break;
267: case Apdi:
268: insn_n_cycles += 2;
269: switch (size) {
270: case sz_byte:
271: if (movem)
272: printf ("\tuaecptr %sa = m68k_areg(regs, %s);\n", name, reg);
273: else
274: printf ("\tuaecptr %sa = m68k_areg(regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
275: break;
276: case sz_word:
277: printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
278: break;
279: case sz_long:
280: printf ("\tuaecptr %sa = m68k_areg(regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
281: break;
282: default:
283: abort ();
284: }
285: break;
286: case Ad16:
287: printf ("\tuaecptr %sa = m68k_areg(regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword ());
288: break;
289: case Ad8r:
290: insn_n_cycles += 2;
291: if (cpu_level > 1) {
292: if (next_cpu_level < 1)
293: next_cpu_level = 1;
294: sync_m68k_pc ();
295: start_brace ();
296: /* This would ordinarily be done in gen_nextiword, which we bypass. */
297: insn_n_cycles += 4;
298: printf ("\tuaecptr %sa = get_disp_ea_020(m68k_areg(regs, %s), next_iword());\n", name, reg);
299: } else
300: printf ("\tuaecptr %sa = get_disp_ea_000(m68k_areg(regs, %s), %s);\n", name, reg, gen_nextiword ());
301:
302: break;
303: case PC16:
304: printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
305: printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
306: break;
307: case PC8r:
308: insn_n_cycles += 2;
309: if (cpu_level > 1) {
310: if (next_cpu_level < 1)
311: next_cpu_level = 1;
312: sync_m68k_pc ();
313: start_brace ();
314: /* This would ordinarily be done in gen_nextiword, which we bypass. */
315: insn_n_cycles += 4;
316: printf ("\tuaecptr tmppc = m68k_getpc();\n");
317: printf ("\tuaecptr %sa = get_disp_ea_020(tmppc, next_iword());\n", name);
318: } else {
319: printf ("\tuaecptr tmppc = m68k_getpc() + %d;\n", m68k_pc_offset);
320: printf ("\tuaecptr %sa = get_disp_ea_000(tmppc, %s);\n", name, gen_nextiword ());
321: }
322:
323: break;
324: case absw:
325: printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword ());
326: break;
327: case absl:
328: printf ("\tuaecptr %sa = %s;\n", name, gen_nextilong ());
329: break;
330: case imm:
331: if (getv != 1)
332: abort ();
333: switch (size) {
334: case sz_byte:
335: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
336: break;
337: case sz_word:
338: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
339: break;
340: case sz_long:
341: printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
342: break;
343: default:
344: abort ();
345: }
346: return;
347: case imm0:
348: if (getv != 1)
349: abort ();
350: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte ());
351: return;
352: case imm1:
353: if (getv != 1)
354: abort ();
355: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword ());
356: return;
357: case imm2:
358: if (getv != 1)
359: abort ();
360: printf ("\tuae_s32 %s = %s;\n", name, gen_nextilong ());
361: return;
362: case immi:
363: if (getv != 1)
364: abort ();
365: printf ("\tuae_u32 %s = %s;\n", name, reg);
366: return;
367: default:
368: abort ();
369: }
370:
371: /* We get here for all non-reg non-immediate addressing modes to
372: * actually fetch the value. */
373:
374: if (using_exception_3 && getv != 0 && size != sz_byte) {
375: printf ("\tif ((%sa & 1) != 0) {\n", name);
376: printf ("\t\tlast_fault_for_exception_3 = %sa;\n", name);
377: printf ("\t\tlast_op_for_exception_3 = opcode;\n");
378: printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + %d;\n", m68k_pc_offset);
379: printf ("\t\tException(3, 0);\n");
380: printf ("\t\tgoto %s;\n", endlabelstr);
381: printf ("\t}\n");
382: need_endlabel = 1;
383: start_brace ();
384: }
385:
386: if (getv == 1) {
387: switch (size) {
388: case sz_byte: insn_n_cycles += 4; break;
389: case sz_word: insn_n_cycles += 4; break;
390: case sz_long: insn_n_cycles += 8; break;
391: default: abort ();
392: }
393: start_brace ();
394: switch (size) {
395: case sz_byte: printf ("\tuae_s8 %s = get_byte(%sa);\n", name, name); break;
396: case sz_word: printf ("\tuae_s16 %s = get_word(%sa);\n", name, name); break;
397: case sz_long: printf ("\tuae_s32 %s = get_long(%sa);\n", name, name); break;
398: default: abort ();
399: }
400: }
401:
402: /* We now might have to fix up the register for pre-dec or post-inc
403: * addressing modes. */
404: if (!movem)
405: switch (mode) {
406: case Aipi:
407: switch (size) {
408: case sz_byte:
409: printf ("\tm68k_areg(regs, %s) += areg_byteinc[%s];\n", reg, reg);
410: break;
411: case sz_word:
412: printf ("\tm68k_areg(regs, %s) += 2;\n", reg);
413: break;
414: case sz_long:
415: printf ("\tm68k_areg(regs, %s) += 4;\n", reg);
416: break;
417: default:
418: abort ();
419: }
420: break;
421: case Apdi:
422: printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
423: break;
424: default:
425: break;
426: }
427: }
428:
429: static void genastore (char *from, amodes mode, char *reg, wordsizes size, char *to)
430: {
431: switch (mode) {
432: case Dreg:
433: switch (size) {
434: case sz_byte:
435: printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
436: break;
437: case sz_word:
438: printf ("\tm68k_dreg(regs, %s) = (m68k_dreg(regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
439: break;
440: case sz_long:
441: printf ("\tm68k_dreg(regs, %s) = (%s);\n", reg, from);
442: break;
443: default:
444: abort ();
445: }
446: break;
447: case Areg:
448: switch (size) {
449: case sz_word:
450: fprintf (stderr, "Foo\n");
451: printf ("\tm68k_areg(regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
452: break;
453: case sz_long:
454: printf ("\tm68k_areg(regs, %s) = (%s);\n", reg, from);
455: break;
456: default:
457: abort ();
458: }
459: break;
460: case Aind:
461: case Aipi:
462: case Apdi:
463: case Ad16:
464: case Ad8r:
465: case absw:
466: case absl:
467: case PC16:
468: case PC8r:
469: if (using_prefetch)
470: sync_m68k_pc ();
471: switch (size) {
472: case sz_byte:
473: insn_n_cycles += 4;
474: printf ("\tput_byte(%sa,%s);\n", to, from);
475: break;
476: case sz_word:
477: insn_n_cycles += 4;
478: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
479: abort ();
480: printf ("\tput_word(%sa,%s);\n", to, from);
481: break;
482: case sz_long:
483: insn_n_cycles += 8;
484: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
485: abort ();
486: printf ("\tput_long(%sa,%s);\n", to, from);
487: break;
488: default:
489: abort ();
490: }
491: break;
492: case imm:
493: case imm0:
494: case imm1:
495: case imm2:
496: case immi:
497: abort ();
498: break;
499: default:
500: abort ();
501: }
502: }
503:
1.1.1.2 root 504:
1.1 root 505: static void genmovemel (uae_u16 opcode)
506: {
507: char getcode[100];
1.1.1.3 root 508: int bMovemLong = (table68k[opcode].size == sz_long);
509: int size = bMovemLong ? 4 : 2;
1.1 root 510:
1.1.1.3 root 511: if (bMovemLong) {
1.1 root 512: strcpy (getcode, "get_long(srca)");
513: } else {
514: strcpy (getcode, "(uae_s32)(uae_s16)get_word(srca)");
515: }
516:
517: printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
518: printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1.1.1.2 root 519: printf ("\tretcycles = 0;\n");
1.1.1.3 root 520: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
1.1 root 521: start_brace ();
1.1.1.2 root 522: printf ("\twhile (dmask) { m68k_dreg(regs, movem_index1[dmask]) = %s;"
1.1.1.3 root 523: " srca += %d; dmask = movem_next[dmask]; retcycles+=%d; }\n",
524: getcode, size, (bMovemLong ? 8 : 4));
1.1.1.2 root 525: printf ("\twhile (amask) { m68k_areg(regs, movem_index1[amask]) = %s;"
1.1.1.3 root 526: " srca += %d; amask = movem_next[amask]; retcycles+=%d; }\n",
527: getcode, size, (bMovemLong ? 8 : 4));
1.1 root 528:
529: if (table68k[opcode].dmode == Aipi)
530: printf ("\tm68k_areg(regs, dstreg) = srca;\n");
1.1.1.2 root 531:
532: /* Better cycles - experimental! (Thothy) */
533: switch(table68k[opcode].dmode)
1.1.1.3 root 534: {
1.1.1.2 root 535: case Aind: insn_n_cycles=12; break;
536: case Aipi: insn_n_cycles=12; break;
537: case Ad16: insn_n_cycles=16; break;
538: case Ad8r: insn_n_cycles=18; break;
539: case absw: insn_n_cycles=16; break;
540: case absl: insn_n_cycles=20; break;
541: case PC16: insn_n_cycles=16; break;
542: case PC8r: insn_n_cycles=18; break;
1.1.1.3 root 543: }
544: sprintf(exactCpuCycles," return (%i+retcycles);", insn_n_cycles);
1.1 root 545: }
546:
547: static void genmovemle (uae_u16 opcode)
548: {
549: char putcode[100];
1.1.1.3 root 550: int bMovemLong = (table68k[opcode].size == sz_long);
551: int size = bMovemLong ? 4 : 2;
552:
553: if (bMovemLong) {
1.1 root 554: strcpy (putcode, "put_long(srca,");
555: } else {
556: strcpy (putcode, "put_word(srca,");
557: }
558:
559: printf ("\tuae_u16 mask = %s;\n", gen_nextiword ());
1.1.1.3 root 560: printf ("\tretcycles = 0;\n");
1.1 root 561: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
562: if (using_prefetch)
563: sync_m68k_pc ();
564:
565: start_brace ();
566: if (table68k[opcode].dmode == Apdi) {
1.1.1.2 root 567: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
568: printf ("\twhile (amask) { srca -= %d; %s m68k_areg(regs, movem_index2[amask]));"
1.1.1.3 root 569: " amask = movem_next[amask]; retcycles+=%d; }\n",
570: size, putcode, (bMovemLong ? 8 : 4));
1.1.1.2 root 571: printf ("\twhile (dmask) { srca -= %d; %s m68k_dreg(regs, movem_index2[dmask]));"
1.1.1.3 root 572: " dmask = movem_next[dmask]; retcycles+=%d; }\n",
573: size, putcode, (bMovemLong ? 8 : 4));
1.1.1.2 root 574: printf ("\tm68k_areg(regs, dstreg) = srca;\n");
1.1 root 575: } else {
1.1.1.2 root 576: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
577: printf ("\twhile (dmask) { %s m68k_dreg(regs, movem_index1[dmask])); srca += %d;"
1.1.1.3 root 578: " dmask = movem_next[dmask]; retcycles+=%d; }\n",
579: putcode, size, (bMovemLong ? 8 : 4));
1.1.1.2 root 580: printf ("\twhile (amask) { %s m68k_areg(regs, movem_index1[amask])); srca += %d;"
1.1.1.3 root 581: " amask = movem_next[amask]; retcycles+=%d; }\n",
582: putcode, size, (bMovemLong ? 8 : 4));
1.1.1.2 root 583: }
584:
585: /* Better cycles - experimental! (Thothy) */
586: switch(table68k[opcode].dmode)
1.1.1.3 root 587: {
1.1.1.2 root 588: case Aind: insn_n_cycles=8; break;
589: case Apdi: insn_n_cycles=8; break;
590: case Ad16: insn_n_cycles=12; break;
591: case Ad8r: insn_n_cycles=14; break;
592: case absw: insn_n_cycles=12; break;
593: case absl: insn_n_cycles=16; break;
1.1.1.3 root 594: }
595: sprintf(exactCpuCycles," return (%i+retcycles);", insn_n_cycles);
1.1 root 596: }
597:
1.1.1.2 root 598:
1.1 root 599: static void duplicate_carry (void)
600: {
601: printf ("\tCOPY_CARRY;\n");
602: }
603:
604: typedef enum
605: {
606: flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_zn,
607: flag_av, flag_sv
608: }
609: flagtypes;
610:
611: static void genflags_normal (flagtypes type, wordsizes size, char *value, char *src, char *dst)
612: {
613: char vstr[100], sstr[100], dstr[100];
614: char usstr[100], udstr[100];
615: char unsstr[100], undstr[100];
616:
617: switch (size) {
618: case sz_byte:
619: strcpy (vstr, "((uae_s8)(");
620: strcpy (usstr, "((uae_u8)(");
621: break;
622: case sz_word:
623: strcpy (vstr, "((uae_s16)(");
624: strcpy (usstr, "((uae_u16)(");
625: break;
626: case sz_long:
627: strcpy (vstr, "((uae_s32)(");
628: strcpy (usstr, "((uae_u32)(");
629: break;
630: default:
631: abort ();
632: }
633: strcpy (unsstr, usstr);
634:
635: strcpy (sstr, vstr);
636: strcpy (dstr, vstr);
637: strcat (vstr, value);
638: strcat (vstr, "))");
639: strcat (dstr, dst);
640: strcat (dstr, "))");
641: strcat (sstr, src);
642: strcat (sstr, "))");
643:
644: strcpy (udstr, usstr);
645: strcat (udstr, dst);
646: strcat (udstr, "))");
647: strcat (usstr, src);
648: strcat (usstr, "))");
649:
650: strcpy (undstr, unsstr);
651: strcat (unsstr, "-");
652: strcat (undstr, "~");
653: strcat (undstr, dst);
654: strcat (undstr, "))");
655: strcat (unsstr, src);
656: strcat (unsstr, "))");
657:
658: switch (type) {
659: case flag_logical_noclobber:
660: case flag_logical:
661: case flag_zn:
662: case flag_av:
663: case flag_sv:
664: case flag_addx:
665: case flag_subx:
666: break;
667:
668: case flag_add:
669: start_brace ();
670: printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
671: break;
672: case flag_sub:
673: case flag_cmp:
674: start_brace ();
675: printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
676: break;
677: }
678:
679: switch (type) {
680: case flag_logical_noclobber:
681: case flag_logical:
682: case flag_zn:
683: break;
684:
685: case flag_add:
686: case flag_sub:
687: case flag_addx:
688: case flag_subx:
689: case flag_cmp:
690: case flag_av:
691: case flag_sv:
692: start_brace ();
693: printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
694: printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
695: printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
696: break;
697: }
698:
699: switch (type) {
700: case flag_logical:
701: printf ("\tCLEAR_CZNV;\n");
702: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
703: printf ("\tSET_NFLG (%s < 0);\n", vstr);
704: break;
705: case flag_logical_noclobber:
706: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
707: printf ("\tSET_NFLG (%s < 0);\n", vstr);
708: break;
709: case flag_av:
710: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
711: break;
712: case flag_sv:
713: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
714: break;
715: case flag_zn:
716: printf ("\tSET_ZFLG (GET_ZFLG & (%s == 0));\n", vstr);
717: printf ("\tSET_NFLG (%s < 0);\n", vstr);
718: break;
719: case flag_add:
720: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
721: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
722: printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
723: duplicate_carry ();
724: printf ("\tSET_NFLG (flgn != 0);\n");
725: break;
726: case flag_sub:
727: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
728: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
729: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
730: duplicate_carry ();
731: printf ("\tSET_NFLG (flgn != 0);\n");
732: break;
733: case flag_addx:
734: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
735: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
736: duplicate_carry ();
737: break;
738: case flag_subx:
739: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
740: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
741: duplicate_carry ();
742: break;
743: case flag_cmp:
744: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
745: printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
746: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
747: printf ("\tSET_NFLG (flgn != 0);\n");
748: break;
749: }
750: }
751:
752: static void genflags (flagtypes type, wordsizes size, char *value, char *src, char *dst)
753: {
754: /* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have
755: them in the appropriate m68k.h files and use just one copy of this
756: code here. The API can be changed if necessary. */
757: #ifdef OPTIMIZED_FLAGS
758: switch (type) {
759: case flag_add:
760: case flag_sub:
761: start_brace ();
762: printf ("\tuae_u32 %s;\n", value);
763: break;
764:
765: default:
766: break;
767: }
768:
769: /* At least some of those casts are fairly important! */
770: switch (type) {
771: case flag_logical_noclobber:
772: printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
773: if (strcmp (value, "0") == 0) {
774: printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
775: } else {
776: switch (size) {
777: case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
778: case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
779: case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
780: }
781: printf ("\tIOR_CZNV (oldcznv);\n");
782: }
783: printf ("\t}\n");
784: return;
785: case flag_logical:
786: if (strcmp (value, "0") == 0) {
787: printf ("\tSET_CZNV (FLAGVAL_Z);\n");
788: } else {
789: switch (size) {
790: case sz_byte: printf ("\toptflag_testb ((uae_s8)(%s));\n", value); break;
791: case sz_word: printf ("\toptflag_testw ((uae_s16)(%s));\n", value); break;
792: case sz_long: printf ("\toptflag_testl ((uae_s32)(%s));\n", value); break;
793: }
794: }
795: return;
796:
797: case flag_add:
798: switch (size) {
799: case sz_byte: printf ("\toptflag_addb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
800: case sz_word: printf ("\toptflag_addw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
801: case sz_long: printf ("\toptflag_addl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
802: }
803: return;
804:
805: case flag_sub:
806: switch (size) {
807: case sz_byte: printf ("\toptflag_subb (%s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
808: case sz_word: printf ("\toptflag_subw (%s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
809: case sz_long: printf ("\toptflag_subl (%s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
810: }
811: return;
812:
813: case flag_cmp:
814: switch (size) {
815: case sz_byte: printf ("\toptflag_cmpb ((uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
816: case sz_word: printf ("\toptflag_cmpw ((uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
817: case sz_long: printf ("\toptflag_cmpl ((uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
818: }
819: return;
820:
821: default:
822: break;
823: }
824: #endif
825:
826: genflags_normal (type, size, value, src, dst);
827: }
828:
829: static void force_range_for_rox (const char *var, wordsizes size)
830: {
831: /* Could do a modulo operation here... which one is faster? */
832: switch (size) {
833: case sz_long:
834: printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
835: break;
836: case sz_word:
837: printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
838: printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
839: break;
840: case sz_byte:
841: printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
842: printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
843: printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
844: break;
845: }
846: }
847:
848: static const char *cmask (wordsizes size)
849: {
850: switch (size) {
851: case sz_byte: return "0x80";
852: case sz_word: return "0x8000";
853: case sz_long: return "0x80000000";
854: default: abort ();
855: }
856: }
857:
858: static int source_is_imm1_8 (struct instr *i)
859: {
860: return i->stype == 3;
861: }
862:
1.1.1.2 root 863:
864:
1.1 root 865: static void gen_opcode (unsigned long int opcode)
866: {
1.1.1.2 root 867: #if 0
868: char *amodenames[] = { "Dreg", "Areg", "Aind", "Aipi", "Apdi", "Ad16", "Ad8r",
869: "absw", "absl", "PC16", "PC8r", "imm", "imm0", "imm1", "imm2", "immi", "am_unknown", "am_illg"};
870: #endif
871:
1.1 root 872: struct instr *curi = table68k + opcode;
873: insn_n_cycles = 4;
874:
875: start_brace ();
876: m68k_pc_offset = 2;
1.1.1.2 root 877:
1.1 root 878: switch (curi->plev) {
879: case 0: /* not privileged */
880: break;
881: case 1: /* unprivileged only on 68000 */
882: if (cpu_level == 0)
883: break;
884: if (next_cpu_level < 0)
885: next_cpu_level = 0;
886:
887: /* fall through */
888: case 2: /* priviledged */
889: printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
890: need_endlabel = 1;
891: start_brace ();
892: break;
893: case 3: /* privileged if size == word */
894: if (curi->size == sz_byte)
895: break;
896: printf ("if (!regs.s) { Exception(8,0); goto %s; }\n", endlabelstr);
897: need_endlabel = 1;
898: start_brace ();
899: break;
900: }
1.1.1.2 root 901:
902: /* Build the opcodes: */
1.1 root 903: switch (curi->mnemo) {
904: case i_OR:
905: case i_AND:
906: case i_EOR:
1.1.1.2 root 907: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
908: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
909: printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
910: genflags (flag_logical, curi->size, "src", "", "");
911: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
912: if(curi->size==sz_long && curi->dmode==Dreg)
913: {
914: insn_n_cycles += 2;
915: if(curi->smode==Dreg || curi->smode==Areg || (curi->smode>=imm && curi->smode<=immi))
916: insn_n_cycles += 2;
917: }
918: #if 0
919: /* Output the CPU cycles: */
920: fprintf(stderr,"MOVE, size %i: ",curi->size);
921: fprintf(stderr," %s ->",amodenames[curi->smode]);
922: fprintf(stderr," %s ",amodenames[curi->dmode]);
923: fprintf(stderr," Cycles: %i\n",insn_n_cycles);
924: #endif
925: break;
1.1 root 926: case i_ORSR:
927: case i_EORSR:
1.1.1.2 root 928: printf ("\tMakeSR();\n");
929: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
930: if (curi->size == sz_byte) {
931: printf ("\tsrc &= 0xFF;\n");
932: }
933: printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
934: printf ("\tMakeFromSR();\n");
935: insn_n_cycles = 20;
936: break;
1.1 root 937: case i_ANDSR:
1.1.1.2 root 938: printf ("\tMakeSR();\n");
939: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
940: if (curi->size == sz_byte) {
941: printf ("\tsrc |= 0xFF00;\n");
942: }
943: printf ("\tregs.sr &= src;\n");
944: printf ("\tMakeFromSR();\n");
945: insn_n_cycles = 20;
946: break;
1.1 root 947: case i_SUB:
948: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
949: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
950: start_brace ();
951: genflags (flag_sub, curi->size, "newv", "src", "dst");
952: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 953: if(curi->size==sz_long && curi->dmode==Dreg)
954: {
955: insn_n_cycles += 2;
956: if(curi->smode==Dreg || curi->smode==Areg || (curi->smode>=imm && curi->smode<=immi))
957: insn_n_cycles += 2;
958: }
1.1 root 959: break;
960: case i_SUBA:
961: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
962: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
963: start_brace ();
964: printf ("\tuae_u32 newv = dst - src;\n");
965: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1.1.1.2 root 966: if(curi->size==sz_long && curi->smode!=Dreg && curi->smode!=Areg && !(curi->smode>=imm && curi->smode<=immi))
967: insn_n_cycles += 2;
968: else
969: insn_n_cycles += 4;
1.1 root 970: break;
971: case i_SUBX:
972: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
973: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
974: start_brace ();
975: printf ("\tuae_u32 newv = dst - src - (GET_XFLG ? 1 : 0);\n");
976: genflags (flag_subx, curi->size, "newv", "src", "dst");
977: genflags (flag_zn, curi->size, "newv", "", "");
978: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 979: if(curi->smode==Dreg && curi->size==sz_long)
980: insn_n_cycles=8;
981: if(curi->smode==Apdi)
982: {
983: if(curi->size==sz_long)
984: insn_n_cycles=30;
985: else
986: insn_n_cycles=18;
987: }
1.1 root 988: break;
989: case i_SBCD:
990: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
991: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
992: start_brace ();
993: printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
994: printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
1.1.1.4 root 995: printf ("\tuae_u16 newv, tmp_newv;\n");
996: printf ("\tint bcd = 0;\n");
997: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
998: printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
999: printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
1000: printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF);\n");
1.1 root 1001: duplicate_carry ();
1002: genflags (flag_zn, curi->size, "newv", "", "");
1.1.1.4 root 1003: printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
1.1 root 1004: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.4 root 1005: if(curi->smode==Dreg) insn_n_cycles=6;
1006: if(curi->smode==Apdi) insn_n_cycles=18;
1.1 root 1007: break;
1008: case i_ADD:
1009: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1010: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1011: start_brace ();
1012: genflags (flag_add, curi->size, "newv", "src", "dst");
1013: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1014: if(curi->size==sz_long && curi->dmode==Dreg)
1015: {
1016: insn_n_cycles += 2;
1017: if(curi->smode==Dreg || curi->smode==Areg || (curi->smode>=imm && curi->smode<=immi))
1018: insn_n_cycles += 2;
1019: }
1.1 root 1020: break;
1021: case i_ADDA:
1022: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1023: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1024: start_brace ();
1025: printf ("\tuae_u32 newv = dst + src;\n");
1026: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1.1.1.2 root 1027: if(curi->size==sz_long && curi->smode!=Dreg && curi->smode!=Areg && !(curi->smode>=imm && curi->smode<=immi))
1028: insn_n_cycles += 2;
1029: else
1030: insn_n_cycles += 4;
1.1 root 1031: break;
1032: case i_ADDX:
1033: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1034: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1035: start_brace ();
1036: printf ("\tuae_u32 newv = dst + src + (GET_XFLG ? 1 : 0);\n");
1037: genflags (flag_addx, curi->size, "newv", "src", "dst");
1038: genflags (flag_zn, curi->size, "newv", "", "");
1039: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1040: if(curi->smode==Dreg && curi->size==sz_long)
1041: insn_n_cycles=8;
1042: if(curi->smode==Apdi)
1043: {
1044: if(curi->size==sz_long)
1045: insn_n_cycles=30;
1046: else
1047: insn_n_cycles=18;
1048: }
1.1 root 1049: break;
1050: case i_ABCD:
1051: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1052: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1053: start_brace ();
1054: printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0);\n");
1055: printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
1.1.1.4 root 1056: printf ("\tuae_u16 newv, tmp_newv;\n");
1.1 root 1057: printf ("\tint cflg;\n");
1.1.1.4 root 1058: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;");
1059: printf ("\tif (newv_lo > 9) { newv += 6; }\n");
1060: printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
1061: printf ("\tif (cflg) newv += 0x60;\n");
1.1 root 1062: printf ("\tSET_CFLG (cflg);\n");
1063: duplicate_carry ();
1064: genflags (flag_zn, curi->size, "newv", "", "");
1.1.1.4 root 1065: printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
1.1 root 1066: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.4 root 1067: if(curi->smode==Dreg) insn_n_cycles=6;
1068: if(curi->smode==Apdi) insn_n_cycles=18;
1.1 root 1069: break;
1070: case i_NEG:
1071: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1072: start_brace ();
1073: genflags (flag_sub, curi->size, "dst", "src", "0");
1074: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1075: if(curi->size==sz_long && curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1076: break;
1077: case i_NEGX:
1078: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1079: start_brace ();
1080: printf ("\tuae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0);\n");
1081: genflags (flag_subx, curi->size, "newv", "src", "0");
1082: genflags (flag_zn, curi->size, "newv", "", "");
1083: genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1084: if(curi->size==sz_long && curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1085: break;
1086: case i_NBCD:
1087: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1088: start_brace ();
1089: printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0);\n");
1090: printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1091: printf ("\tuae_u16 newv;\n");
1092: printf ("\tint cflg;\n");
1.1.1.4 root 1093: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
1094: printf ("\tnewv = newv_hi + newv_lo;");
1095: printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
1096: printf ("\tif (cflg) newv -= 0x60;\n");
1.1 root 1097: printf ("\tSET_CFLG (cflg);\n");
1098: duplicate_carry();
1099: genflags (flag_zn, curi->size, "newv", "", "");
1100: genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1.1.1.4 root 1101: if(curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1102: break;
1103: case i_CLR:
1104: genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1105: genflags (flag_logical, curi->size, "0", "", "");
1106: genastore ("0", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1107: if(curi->size==sz_long)
1.1.1.3 root 1108: {
1.1.1.2 root 1109: if(curi->smode==Dreg)
1110: insn_n_cycles += 2;
1111: else
1112: insn_n_cycles += 4;
1.1.1.3 root 1113: }
1.1.1.2 root 1114: if(curi->smode!=Dreg)
1115: insn_n_cycles += 4;
1.1 root 1116: break;
1117: case i_NOT:
1118: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1119: start_brace ();
1120: printf ("\tuae_u32 dst = ~src;\n");
1121: genflags (flag_logical, curi->size, "dst", "", "");
1122: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1123: if(curi->size==sz_long && curi->smode==Dreg) insn_n_cycles += 2;
1.1 root 1124: break;
1125: case i_TST:
1126: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1127: genflags (flag_logical, curi->size, "src", "", "");
1128: break;
1129: case i_BTST:
1130: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1131: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1132: if (curi->size == sz_byte)
1133: printf ("\tsrc &= 7;\n");
1134: else
1135: printf ("\tsrc &= 31;\n");
1136: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1.1.1.2 root 1137: if(curi->dmode==Dreg) insn_n_cycles += 2;
1.1 root 1138: break;
1139: case i_BCHG:
1140: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1141: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1142: if (curi->size == sz_byte)
1143: printf ("\tsrc &= 7;\n");
1144: else
1145: printf ("\tsrc &= 31;\n");
1146: printf ("\tdst ^= (1 << src);\n");
1147: printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
1148: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1149: if(curi->dmode==Dreg) insn_n_cycles += 4;
1.1 root 1150: break;
1151: case i_BCLR:
1152: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1153: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1154: if (curi->size == sz_byte)
1155: printf ("\tsrc &= 7;\n");
1156: else
1157: printf ("\tsrc &= 31;\n");
1158: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1159: printf ("\tdst &= ~(1 << src);\n");
1160: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1161: if(curi->dmode==Dreg) insn_n_cycles += 6;
1.1 root 1162: break;
1163: case i_BSET:
1164: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1165: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1166: if (curi->size == sz_byte)
1167: printf ("\tsrc &= 7;\n");
1168: else
1169: printf ("\tsrc &= 31;\n");
1170: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1171: printf ("\tdst |= (1 << src);\n");
1172: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1173: if(curi->dmode==Dreg) insn_n_cycles += 4;
1.1 root 1174: break;
1175: case i_CMPM:
1176: case i_CMP:
1177: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1178: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1179: start_brace ();
1180: genflags (flag_cmp, curi->size, "newv", "src", "dst");
1.1.1.2 root 1181: if(curi->size==sz_long && curi->dmode==Dreg)
1182: insn_n_cycles += 2;
1.1 root 1183: break;
1184: case i_CMPA:
1185: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1186: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1187: start_brace ();
1188: genflags (flag_cmp, sz_long, "newv", "src", "dst");
1.1.1.2 root 1189: insn_n_cycles += 2;
1.1 root 1190: break;
1191: /* The next two are coded a little unconventional, but they are doing
1192: * weird things... */
1193: case i_MVPRM:
1194: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1195:
1196: printf ("\tuaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1197: if (curi->size == sz_word) {
1198: printf ("\tput_byte(memp, src >> 8); put_byte(memp + 2, src);\n");
1199: } else {
1200: printf ("\tput_byte(memp, src >> 24); put_byte(memp + 2, src >> 16);\n");
1201: printf ("\tput_byte(memp + 4, src >> 8); put_byte(memp + 6, src);\n");
1202: }
1.1.1.2 root 1203: if(curi->size==sz_long) insn_n_cycles=24; else insn_n_cycles=16;
1.1 root 1204: break;
1205: case i_MVPMR:
1206: printf ("\tuaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword ());
1207: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1208: if (curi->size == sz_word) {
1209: printf ("\tuae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2);\n");
1210: } else {
1211: printf ("\tuae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16)\n");
1212: printf (" + (get_byte(memp + 4) << 8) + get_byte(memp + 6);\n");
1213: }
1214: genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1215: if(curi->size==sz_long) insn_n_cycles=24; else insn_n_cycles=16;
1.1 root 1216: break;
1217: case i_MOVE:
1218: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1219: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1220: genflags (flag_logical, curi->size, "src", "", "");
1221: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1222: break;
1223: case i_MOVEA:
1224: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1225: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1226: if (curi->size == sz_word) {
1227: printf ("\tuae_u32 val = (uae_s32)(uae_s16)src;\n");
1228: } else {
1229: printf ("\tuae_u32 val = src;\n");
1230: }
1231: genastore ("val", curi->dmode, "dstreg", sz_long, "dst");
1232: break;
1.1.1.2 root 1233: case i_MVSR2: /* Move from SR */
1.1 root 1234: genamode (curi->smode, "srcreg", sz_word, "src", 2, 0);
1235: printf ("\tMakeSR();\n");
1236: if (curi->size == sz_byte)
1237: genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1238: else
1239: genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1.1.1.2 root 1240: if (curi->smode==Dreg) insn_n_cycles += 2; else insn_n_cycles += 4;
1.1 root 1241: break;
1.1.1.2 root 1242: case i_MV2SR: /* Move to SR */
1.1 root 1243: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1244: if (curi->size == sz_byte)
1245: printf ("\tMakeSR();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
1246: else {
1247: printf ("\tregs.sr = src;\n");
1248: }
1249: printf ("\tMakeFromSR();\n");
1.1.1.2 root 1250: insn_n_cycles += 8;
1.1 root 1251: break;
1252: case i_SWAP:
1253: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1254: start_brace ();
1255: printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
1256: genflags (flag_logical, sz_long, "dst", "", "");
1257: genastore ("dst", curi->smode, "srcreg", sz_long, "src");
1258: break;
1259: case i_EXG:
1260: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1261: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1262: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
1263: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.2 root 1264: insn_n_cycles = 6;
1.1 root 1265: break;
1266: case i_EXT:
1267: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1268: start_brace ();
1269: switch (curi->size) {
1270: case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
1271: case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
1272: case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1273: default: abort ();
1274: }
1275: genflags (flag_logical,
1276: curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
1277: genastore ("dst", curi->smode, "srcreg",
1278: curi->size == sz_word ? sz_word : sz_long, "src");
1279: break;
1280: case i_MVMEL:
1281: genmovemel (opcode);
1282: break;
1283: case i_MVMLE:
1284: genmovemle (opcode);
1285: break;
1286: case i_TRAP:
1287: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1288: sync_m68k_pc ();
1289: printf ("\tException(src+32,0);\n");
1290: m68k_pc_offset = 0;
1291: break;
1292: case i_MVR2USP:
1293: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1294: printf ("\tregs.usp = src;\n");
1295: break;
1296: case i_MVUSP2R:
1297: genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1298: genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
1299: break;
1300: case i_RESET:
1301: printf ("\tcustomreset();\n");
1.1.1.2 root 1302: insn_n_cycles = 132; /* I am not so sure about this!? - Thothy */
1.1 root 1303: break;
1304: case i_NOP:
1305: break;
1306: case i_STOP:
1307: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1308: printf ("\tregs.sr = src;\n");
1309: printf ("\tMakeFromSR();\n");
1310: printf ("\tm68k_setstopped(1);\n");
1.1.1.2 root 1311: insn_n_cycles = 4;
1.1 root 1312: break;
1313: case i_RTE:
1314: if (cpu_level == 0) {
1315: genamode (Aipi, "7", sz_word, "sr", 1, 0);
1316: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1317: printf ("\tregs.sr = sr; m68k_setpc_rte(pc);\n");
1318: fill_prefetch_0 ();
1319: printf ("\tMakeFromSR();\n");
1320: } else {
1321: int old_brace_level = n_braces;
1322: if (next_cpu_level < 0)
1323: next_cpu_level = 0;
1324: printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
1325: genamode (Aipi, "7", sz_word, "sr", 1, 0);
1326: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1327: genamode (Aipi, "7", sz_word, "format", 1, 0);
1328: printf ("\tnewsr = sr; newpc = pc;\n");
1329: printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
1330: printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
1331: printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; }\n");
1332: printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; }\n");
1333: printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; }\n");
1334: printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; }\n");
1335: printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; }\n");
1336: printf ("\telse { Exception(14,0); goto %s; }\n", endlabelstr);
1337: printf ("\tregs.sr = newsr; MakeFromSR();\n}\n");
1338: pop_braces (old_brace_level);
1339: printf ("\tregs.sr = newsr; MakeFromSR();\n");
1340: printf ("\tm68k_setpc_rte(newpc);\n");
1341: fill_prefetch_0 ();
1342: need_endlabel = 1;
1343: }
1344: /* PC is set and prefetch filled. */
1345: m68k_pc_offset = 0;
1.1.1.2 root 1346: insn_n_cycles = 20;
1.1 root 1347: break;
1348: case i_RTD:
1349: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1350: genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0);
1351: printf ("\tm68k_areg(regs, 7) += offs;\n");
1352: printf ("\tm68k_setpc_rte(pc);\n");
1353: fill_prefetch_0 ();
1354: /* PC is set and prefetch filled. */
1355: m68k_pc_offset = 0;
1356: break;
1357: case i_LINK:
1358: genamode (Apdi, "7", sz_long, "old", 2, 0);
1359: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0);
1360: genastore ("src", Apdi, "7", sz_long, "old");
1361: genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
1362: genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1363: printf ("\tm68k_areg(regs, 7) += offs;\n");
1364: break;
1365: case i_UNLK:
1366: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1367: printf ("\tm68k_areg(regs, 7) = src;\n");
1368: genamode (Aipi, "7", sz_long, "old", 1, 0);
1369: genastore ("old", curi->smode, "srcreg", curi->size, "src");
1370: break;
1371: case i_RTS:
1372: printf ("\tm68k_do_rts();\n");
1373: fill_prefetch_0 ();
1374: m68k_pc_offset = 0;
1.1.1.2 root 1375: insn_n_cycles = 16;
1.1 root 1376: break;
1377: case i_TRAPV:
1378: sync_m68k_pc ();
1379: printf ("\tif (GET_VFLG) { Exception(7,m68k_getpc()); goto %s; }\n", endlabelstr);
1380: need_endlabel = 1;
1381: break;
1382: case i_RTR:
1383: printf ("\tMakeSR();\n");
1384: genamode (Aipi, "7", sz_word, "sr", 1, 0);
1385: genamode (Aipi, "7", sz_long, "pc", 1, 0);
1386: printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
1387: printf ("\tregs.sr |= sr; m68k_setpc(pc);\n");
1388: fill_prefetch_0 ();
1389: printf ("\tMakeFromSR();\n");
1390: m68k_pc_offset = 0;
1.1.1.2 root 1391: insn_n_cycles = 20;
1.1 root 1392: break;
1393: case i_JSR:
1394: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1395: printf ("\tm68k_do_jsr(m68k_getpc() + %d, srca);\n", m68k_pc_offset);
1396: fill_prefetch_0 ();
1397: m68k_pc_offset = 0;
1.1.1.2 root 1398: switch(curi->smode)
1399: {
1400: case Aind: insn_n_cycles=16; break;
1401: case Ad16: insn_n_cycles=18; break;
1402: case Ad8r: insn_n_cycles=22; break;
1403: case absw: insn_n_cycles=18; break;
1404: case absl: insn_n_cycles=20; break;
1405: case PC16: insn_n_cycles=18; break;
1406: case PC8r: insn_n_cycles=22; break;
1407: }
1.1 root 1408: break;
1409: case i_JMP:
1410: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1411: printf ("\tm68k_setpc(srca);\n");
1412: fill_prefetch_0 ();
1413: m68k_pc_offset = 0;
1.1.1.2 root 1414: switch(curi->smode)
1415: {
1416: case Aind: insn_n_cycles=8; break;
1417: case Ad16: insn_n_cycles=10; break;
1418: case Ad8r: insn_n_cycles=14; break;
1419: case absw: insn_n_cycles=10; break;
1420: case absl: insn_n_cycles=12; break;
1421: case PC16: insn_n_cycles=10; break;
1422: case PC8r: insn_n_cycles=14; break;
1423: }
1.1 root 1424: break;
1425: case i_BSR:
1426: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1427: printf ("\tuae_s32 s = (uae_s32)src + 2;\n");
1428: if (using_exception_3) {
1429: printf ("\tif (src & 1) {\n");
1430: printf ("\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1431: printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + s;\n");
1432: printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1433: printf ("\t}\n");
1434: need_endlabel = 1;
1435: }
1436: printf ("\tm68k_do_bsr(m68k_getpc() + %d, s);\n", m68k_pc_offset);
1437: fill_prefetch_0 ();
1438: m68k_pc_offset = 0;
1.1.1.2 root 1439: insn_n_cycles = 18;
1.1 root 1440: break;
1441: case i_Bcc:
1442: if (curi->size == sz_long) {
1443: if (cpu_level < 2) {
1444: printf ("\tm68k_incpc(2);\n");
1445: printf ("\tif (!cctrue(%d)) goto %s;\n", curi->cc, endlabelstr);
1446: printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1447: printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 1;\n");
1448: printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1449: need_endlabel = 1;
1450: } else {
1451: if (next_cpu_level < 1)
1452: next_cpu_level = 1;
1453: }
1454: }
1455: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1456: printf ("\tif (!cctrue(%d)) goto didnt_jump;\n", curi->cc);
1457: if (using_exception_3) {
1458: printf ("\tif (src & 1) {\n");
1459: printf ("\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1460: printf ("\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src;\n");
1461: printf ("\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1462: printf ("\t}\n");
1463: need_endlabel = 1;
1464: }
1465: printf ("\tm68k_incpc ((uae_s32)src + 2);\n");
1466: fill_prefetch_0 ();
1.1.1.2 root 1467: printf ("\treturn 10;\n");
1.1 root 1468: printf ("didnt_jump:;\n");
1469: need_endlabel = 1;
1.1.1.2 root 1470: insn_n_cycles = (curi->size == sz_byte) ? 8 : 12;
1.1 root 1471: break;
1472: case i_LEA:
1473: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1474: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1475: genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
1.1.1.7 ! root 1476: /* Set correct cycles: According to the M68K User Manual, LEA takes 12
! 1477: * cycles in Ad8r and PC8r mode, but it takes 14 (or 16) cycles on a real ST: */
! 1478: if (curi->smode == Ad8r || curi->smode == PC8r)
! 1479: insn_n_cycles = 14;
1.1 root 1480: break;
1481: case i_PEA:
1482: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
1483: genamode (Apdi, "7", sz_long, "dst", 2, 0);
1484: genastore ("srca", Apdi, "7", sz_long, "dst");
1.1.1.7 ! root 1485: /* Set correct cycles: */
1.1.1.2 root 1486: switch(curi->smode)
1487: {
1488: case Aind: insn_n_cycles=12; break;
1489: case Ad16: insn_n_cycles=16; break;
1.1.1.7 ! root 1490: /* Note: according to the M68K User Manual, PEA takes 20 cycles for
! 1491: * the Ad8r mode, but on a real ST, it takes 22 (or 24) cycles! */
! 1492: case Ad8r: insn_n_cycles=22; break;
1.1.1.2 root 1493: case absw: insn_n_cycles=16; break;
1494: case absl: insn_n_cycles=20; break;
1495: case PC16: insn_n_cycles=16; break;
1.1.1.7 ! root 1496: /* Note: PEA with PC8r takes 20 cycles according to the User Manual,
! 1497: * but it takes 22 (or 24) cycles on a real ST: */
! 1498: case PC8r: insn_n_cycles=22; break;
1.1.1.2 root 1499: }
1.1 root 1500: break;
1501: case i_DBcc:
1502: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1503: genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0);
1504:
1.1.1.2 root 1505: printf ("\tif (!cctrue(%d)) {\n\t", curi->cc);
1.1 root 1506: genastore ("(src-1)", curi->smode, "srcreg", curi->size, "src");
1507:
1508: printf ("\t\tif (src) {\n");
1509: if (using_exception_3) {
1510: printf ("\t\t\tif (offs & 1) {\n");
1511: printf ("\t\t\tlast_addr_for_exception_3 = m68k_getpc() + 2;\n");
1512: printf ("\t\t\tlast_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2;\n");
1513: printf ("\t\t\tlast_op_for_exception_3 = opcode; Exception(3,0); goto %s;\n", endlabelstr);
1514: printf ("\t\t}\n");
1515: need_endlabel = 1;
1516: }
1517: printf ("\t\t\tm68k_incpc((uae_s32)offs + 2);\n");
1518: fill_prefetch_0 ();
1.1.1.2 root 1519: printf ("\t\t\treturn 10;\n");
1520: printf ("\t\t} else {\n\t\t\t");
1521: {
1522: int tmp_offset = m68k_pc_offset;
1523: sync_m68k_pc(); /* not so nice to call it here... */
1524: m68k_pc_offset = tmp_offset;
1525: }
1526: printf ("\t\t\treturn 14;\n");
1527: printf ("\t\t}\n");
1.1 root 1528: printf ("\t}\n");
1529: insn_n_cycles = 12;
1530: need_endlabel = 1;
1531: break;
1532: case i_Scc:
1533: genamode (curi->smode, "srcreg", curi->size, "src", 2, 0);
1534: start_brace ();
1535: printf ("\tint val = cctrue(%d) ? 0xff : 0;\n", curi->cc);
1536: genastore ("val", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 1537: if(curi->smode!=Dreg) insn_n_cycles += 4;
1.1 root 1538: break;
1539: case i_DIVU:
1540: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1541: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1542: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1543: sync_m68k_pc ();
1544: /* Clear V flag when dividing by zero - Alcatraz Odyssey demo depends
1545: * on this (actually, it's doing a DIVS). */
1546: printf ("\tif (src == 0) { SET_VFLG (0); Exception (5, oldpc); goto %s; } else {\n", endlabelstr);
1547: printf ("\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
1548: printf ("\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
1549: /* The N flag appears to be set each time there is an overflow.
1550: * Weird. */
1551: printf ("\tif (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1552: genflags (flag_logical, sz_word, "newv", "", "");
1553: printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1554: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1555: printf ("\t}\n");
1556: printf ("\t}\n");
1557: insn_n_cycles += 136;
1558: need_endlabel = 1;
1559: break;
1560: case i_DIVS:
1561: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1562: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1563: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1564: sync_m68k_pc ();
1565: printf ("\tif (src == 0) { SET_VFLG (0); Exception(5,oldpc); goto %s; } else {\n", endlabelstr);
1566: printf ("\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
1567: printf ("\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1568: printf ("\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else\n\t{\n");
1569: printf ("\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
1570: genflags (flag_logical, sz_word, "newv", "", "");
1571: printf ("\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
1572: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1573: printf ("\t}\n");
1574: printf ("\t}\n");
1575: insn_n_cycles += 154;
1576: need_endlabel = 1;
1577: break;
1578: case i_MULU:
1579: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1580: genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1581: start_brace ();
1582: printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
1583: genflags (flag_logical, sz_long, "newv", "", "");
1584: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1585: insn_n_cycles += 66;
1586: break;
1587: case i_MULS:
1588: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0);
1589: genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1590: start_brace ();
1591: printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
1592: genflags (flag_logical, sz_long, "newv", "", "");
1593: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1594: insn_n_cycles += 66;
1595: break;
1596: case i_CHK:
1597: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1598: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
1599: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
1600: printf ("\tif ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1601: printf ("\telse if (dst > src) { SET_NFLG (0); Exception(6,oldpc); goto %s; }\n", endlabelstr);
1602: need_endlabel = 1;
1.1.1.2 root 1603: insn_n_cycles += 6;
1.1 root 1604: break;
1605:
1606: case i_CHK2:
1607: printf ("\tuaecptr oldpc = m68k_getpc();\n");
1608: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
1609: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
1610: printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
1611: switch (curi->size) {
1612: case sz_byte:
1613: printf ("\tlower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1);\n");
1614: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
1615: break;
1616: case sz_word:
1617: printf ("\tlower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2);\n");
1618: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
1619: break;
1620: case sz_long:
1621: printf ("\tlower=get_long(dsta); upper = get_long(dsta+4);\n");
1622: break;
1623: default:
1624: abort ();
1625: }
1626: printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
1627: printf ("\tSET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1628: printf ("\tif ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc); goto %s; }\n}\n", endlabelstr);
1629: need_endlabel = 1;
1630: break;
1631:
1632: case i_ASR:
1633: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1634: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1635: start_brace ();
1636: switch (curi->size) {
1637: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1638: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1639: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1640: default: abort ();
1641: }
1642: printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
1643: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1644: printf ("\tretcycles = cnt;\n");
1.1 root 1645: printf ("\tCLEAR_CZNV;\n");
1646: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1647: printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
1648: printf ("\t\tSET_CFLG (sign);\n");
1649: duplicate_carry ();
1650: if (source_is_imm1_8 (curi))
1651: printf ("\t} else {\n");
1652: else
1653: printf ("\t} else if (cnt > 0) {\n");
1654: printf ("\t\tval >>= cnt - 1;\n");
1655: printf ("\t\tSET_CFLG (val & 1);\n");
1656: duplicate_carry ();
1657: printf ("\t\tval >>= 1;\n");
1658: printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
1659: bit_mask (curi->size),
1660: bit_size (curi->size));
1661: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1662: printf ("\t}\n");
1663: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1664: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1665: if(curi->size==sz_long)
1666: strcpy(exactCpuCycles," return (8+retcycles*2);");
1667: else
1668: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1669: break;
1670: case i_ASL:
1671: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1672: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1673: start_brace ();
1674: switch (curi->size) {
1675: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1676: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1677: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1678: default: abort ();
1679: }
1680: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1681: printf ("\tretcycles = cnt;\n");
1.1 root 1682: printf ("\tCLEAR_CZNV;\n");
1683: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1684: printf ("\t\tSET_VFLG (val != 0);\n");
1685: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1686: bit_size (curi->size));
1687: duplicate_carry ();
1688: printf ("\t\tval = 0;\n");
1689: if (source_is_imm1_8 (curi))
1690: printf ("\t} else {\n");
1691: else
1692: printf ("\t} else if (cnt > 0) {\n");
1693: printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
1694: bit_mask (curi->size),
1695: bit_size (curi->size) - 1,
1696: bit_mask (curi->size));
1697: printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
1698: printf ("\t\tval <<= cnt - 1;\n");
1699: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1700: duplicate_carry ();
1701: printf ("\t\tval <<= 1;\n");
1702: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
1703: printf ("\t}\n");
1704: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1705: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1706: if(curi->size==sz_long)
1707: strcpy(exactCpuCycles," return (8+retcycles*2);");
1708: else
1709: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1710: break;
1711: case i_LSR:
1712: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1713: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1714: start_brace ();
1715: switch (curi->size) {
1716: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1717: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1718: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1719: default: abort ();
1720: }
1721: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1722: printf ("\tretcycles = cnt;\n");
1.1 root 1723: printf ("\tCLEAR_CZNV;\n");
1724: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1725: printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
1726: bit_size (curi->size), bit_size (curi->size) - 1);
1727: duplicate_carry ();
1728: printf ("\t\tval = 0;\n");
1729: if (source_is_imm1_8 (curi))
1730: printf ("\t} else {\n");
1731: else
1732: printf ("\t} else if (cnt > 0) {\n");
1733: printf ("\t\tval >>= cnt - 1;\n");
1734: printf ("\t\tSET_CFLG (val & 1);\n");
1735: duplicate_carry ();
1736: printf ("\t\tval >>= 1;\n");
1737: printf ("\t}\n");
1738: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1739: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1740: if(curi->size==sz_long)
1741: strcpy(exactCpuCycles," return (8+retcycles*2);");
1742: else
1743: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1744: break;
1745: case i_LSL:
1746: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1747: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1748: start_brace ();
1749: switch (curi->size) {
1750: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1751: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1752: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1753: default: abort ();
1754: }
1755: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1756: printf ("\tretcycles = cnt;\n");
1.1 root 1757: printf ("\tCLEAR_CZNV;\n");
1758: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
1759: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
1760: bit_size (curi->size));
1761: duplicate_carry ();
1762: printf ("\t\tval = 0;\n");
1763: if (source_is_imm1_8 (curi))
1764: printf ("\t} else {\n");
1765: else
1766: printf ("\t} else if (cnt > 0) {\n");
1767: printf ("\t\tval <<= (cnt - 1);\n");
1768: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1769: duplicate_carry ();
1770: printf ("\t\tval <<= 1;\n");
1771: printf ("\tval &= %s;\n", bit_mask (curi->size));
1772: printf ("\t}\n");
1773: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1774: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1775: if(curi->size==sz_long)
1776: strcpy(exactCpuCycles," return (8+retcycles*2);");
1777: else
1778: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1779: break;
1780: case i_ROL:
1781: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1782: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1783: start_brace ();
1784: switch (curi->size) {
1785: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1786: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1787: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1788: default: abort ();
1789: }
1790: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1791: printf ("\tretcycles = cnt;\n");
1.1 root 1792: printf ("\tCLEAR_CZNV;\n");
1793: if (source_is_imm1_8 (curi))
1794: printf ("{");
1795: else
1796: printf ("\tif (cnt > 0) {\n");
1797: printf ("\tuae_u32 loval;\n");
1798: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1799: printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
1800: printf ("\tval <<= cnt;\n");
1801: printf ("\tval |= loval;\n");
1802: printf ("\tval &= %s;\n", bit_mask (curi->size));
1803: printf ("\tSET_CFLG (val & 1);\n");
1804: printf ("}\n");
1805: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1806: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1807: if(curi->size==sz_long)
1808: strcpy(exactCpuCycles," return (8+retcycles*2);");
1809: else
1810: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1811: break;
1812: case i_ROR:
1813: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1814: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1815: start_brace ();
1816: switch (curi->size) {
1817: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1818: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1819: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1820: default: abort ();
1821: }
1822: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1823: printf ("\tretcycles = cnt;\n");
1.1 root 1824: printf ("\tCLEAR_CZNV;\n");
1825: if (source_is_imm1_8 (curi))
1826: printf ("{");
1827: else
1828: printf ("\tif (cnt > 0) {");
1829: printf ("\tuae_u32 hival;\n");
1830: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
1831: printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
1832: printf ("\tval >>= cnt;\n");
1833: printf ("\tval |= hival;\n");
1834: printf ("\tval &= %s;\n", bit_mask (curi->size));
1835: printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
1836: printf ("\t}\n");
1837: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1838: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1839: if(curi->size==sz_long)
1840: strcpy(exactCpuCycles," return (8+retcycles*2);");
1841: else
1842: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1843: break;
1844: case i_ROXL:
1845: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1846: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1847: start_brace ();
1848: switch (curi->size) {
1849: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1850: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1851: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1852: default: abort ();
1853: }
1854: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1855: printf ("\tretcycles = cnt;\n");
1.1 root 1856: printf ("\tCLEAR_CZNV;\n");
1857: if (source_is_imm1_8 (curi))
1858: printf ("{");
1859: else {
1860: force_range_for_rox ("cnt", curi->size);
1861: printf ("\tif (cnt > 0) {\n");
1862: }
1863: printf ("\tcnt--;\n");
1864: printf ("\t{\n\tuae_u32 carry;\n");
1865: printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
1866: printf ("\tcarry = loval & 1;\n");
1867: printf ("\tval = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1);\n");
1868: printf ("\tSET_XFLG (carry);\n");
1869: printf ("\tval &= %s;\n", bit_mask (curi->size));
1870: printf ("\t} }\n");
1871: printf ("\tSET_CFLG (GET_XFLG);\n");
1872: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1873: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1874: if(curi->size==sz_long)
1875: strcpy(exactCpuCycles," return (8+retcycles*2);");
1876: else
1877: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1878: break;
1879: case i_ROXR:
1880: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
1881: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0);
1882: start_brace ();
1883: switch (curi->size) {
1884: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1885: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1886: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1887: default: abort ();
1888: }
1889: printf ("\tcnt &= 63;\n");
1.1.1.2 root 1890: printf ("\tretcycles = cnt;\n");
1.1 root 1891: printf ("\tCLEAR_CZNV;\n");
1892: if (source_is_imm1_8 (curi))
1893: printf ("{");
1894: else {
1895: force_range_for_rox ("cnt", curi->size);
1896: printf ("\tif (cnt > 0) {\n");
1897: }
1898: printf ("\tcnt--;\n");
1899: printf ("\t{\n\tuae_u32 carry;\n");
1900: printf ("\tuae_u32 hival = (val << 1) | GET_XFLG;\n");
1901: printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
1902: printf ("\tval >>= cnt;\n");
1903: printf ("\tcarry = val & 1;\n");
1904: printf ("\tval >>= 1;\n");
1905: printf ("\tval |= hival;\n");
1906: printf ("\tSET_XFLG (carry);\n");
1907: printf ("\tval &= %s;\n", bit_mask (curi->size));
1908: printf ("\t} }\n");
1909: printf ("\tSET_CFLG (GET_XFLG);\n");
1910: genflags (flag_logical_noclobber, curi->size, "val", "", "");
1911: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
1.1.1.2 root 1912: if(curi->size==sz_long)
1913: strcpy(exactCpuCycles," return (8+retcycles*2);");
1914: else
1915: strcpy(exactCpuCycles," return (6+retcycles*2);");
1.1 root 1916: break;
1917: case i_ASRW:
1918: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1919: start_brace ();
1920: switch (curi->size) {
1921: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1922: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1923: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1924: default: abort ();
1925: }
1926: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1927: printf ("\tuae_u32 cflg = val & 1;\n");
1928: printf ("\tval = (val >> 1) | sign;\n");
1929: genflags (flag_logical, curi->size, "val", "", "");
1930: printf ("\tSET_CFLG (cflg);\n");
1931: duplicate_carry ();
1932: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1933: break;
1934: case i_ASLW:
1935: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1936: start_brace ();
1937: switch (curi->size) {
1938: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1939: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1940: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1941: default: abort ();
1942: }
1943: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
1944: printf ("\tuae_u32 sign2;\n");
1945: printf ("\tval <<= 1;\n");
1946: genflags (flag_logical, curi->size, "val", "", "");
1947: printf ("\tsign2 = %s & val;\n", cmask (curi->size));
1948: printf ("\tSET_CFLG (sign != 0);\n");
1949: duplicate_carry ();
1950:
1951: printf ("\tSET_VFLG (GET_VFLG | (sign2 != sign));\n");
1952: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1953: break;
1954: case i_LSRW:
1955: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1956: start_brace ();
1957: switch (curi->size) {
1958: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
1959: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
1960: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1961: default: abort ();
1962: }
1963: printf ("\tuae_u32 carry = val & 1;\n");
1964: printf ("\tval >>= 1;\n");
1965: genflags (flag_logical, curi->size, "val", "", "");
1966: printf ("SET_CFLG (carry);\n");
1967: duplicate_carry ();
1968: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1969: break;
1970: case i_LSLW:
1971: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1972: start_brace ();
1973: switch (curi->size) {
1974: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1975: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1976: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1977: default: abort ();
1978: }
1979: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1980: printf ("\tval <<= 1;\n");
1981: genflags (flag_logical, curi->size, "val", "", "");
1982: printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
1983: duplicate_carry ();
1984: genastore ("val", curi->smode, "srcreg", curi->size, "data");
1985: break;
1986: case i_ROLW:
1987: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
1988: start_brace ();
1989: switch (curi->size) {
1990: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
1991: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
1992: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1993: default: abort ();
1994: }
1995: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
1996: printf ("\tval <<= 1;\n");
1997: printf ("\tif (carry) val |= 1;\n");
1998: genflags (flag_logical, curi->size, "val", "", "");
1999: printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2000: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2001: break;
2002: case i_RORW:
2003: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2004: start_brace ();
2005: switch (curi->size) {
2006: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2007: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2008: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2009: default: abort ();
2010: }
2011: printf ("\tuae_u32 carry = val & 1;\n");
2012: printf ("\tval >>= 1;\n");
2013: printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
2014: genflags (flag_logical, curi->size, "val", "", "");
2015: printf ("SET_CFLG (carry);\n");
2016: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2017: break;
2018: case i_ROXLW:
2019: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2020: start_brace ();
2021: switch (curi->size) {
2022: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2023: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2024: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2025: default: abort ();
2026: }
2027: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
2028: printf ("\tval <<= 1;\n");
2029: printf ("\tif (GET_XFLG) val |= 1;\n");
2030: genflags (flag_logical, curi->size, "val", "", "");
2031: printf ("SET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
2032: duplicate_carry ();
2033: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2034: break;
2035: case i_ROXRW:
2036: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0);
2037: start_brace ();
2038: switch (curi->size) {
2039: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
2040: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
2041: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2042: default: abort ();
2043: }
2044: printf ("\tuae_u32 carry = val & 1;\n");
2045: printf ("\tval >>= 1;\n");
2046: printf ("\tif (GET_XFLG) val |= %s;\n", cmask (curi->size));
2047: genflags (flag_logical, curi->size, "val", "", "");
2048: printf ("SET_CFLG (carry);\n");
2049: duplicate_carry ();
2050: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2051: break;
2052: case i_MOVEC2:
2053: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2054: start_brace ();
2055: printf ("\tint regno = (src >> 12) & 15;\n");
2056: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2057: printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
2058: break;
2059: case i_MOVE2C:
2060: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2061: start_brace ();
2062: printf ("\tint regno = (src >> 12) & 15;\n");
2063: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
2064: printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
2065: break;
2066: case i_CAS:
2067: {
2068: int old_brace_level;
2069: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2070: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2071: start_brace ();
2072: printf ("\tint ru = (src >> 6) & 7;\n");
2073: printf ("\tint rc = src & 7;\n");
2074: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, rc)", "dst");
2075: printf ("\tif (GET_ZFLG)");
2076: old_brace_level = n_braces;
2077: start_brace ();
2078: genastore ("(m68k_dreg(regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
2079: pop_braces (old_brace_level);
2080: printf ("else");
2081: start_brace ();
2082: printf ("m68k_dreg(regs, rc) = dst;\n");
2083: pop_braces (old_brace_level);
2084: }
2085: break;
2086: case i_CAS2:
2087: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2088: printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
2089: printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
2090: if (curi->size == sz_word) {
2091: int old_brace_level = n_braces;
2092: printf ("\tuae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2);\n");
2093: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2094: printf ("\tif (GET_ZFLG) {\n");
2095: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2096: printf ("\tif (GET_ZFLG) {\n");
2097: printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2098: printf ("\tput_word(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2099: printf ("\t}}\n");
2100: pop_braces (old_brace_level);
2101: printf ("\tif (! GET_ZFLG) {\n");
2102: printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
2103: printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
2104: printf ("\t}\n");
2105: } else {
2106: int old_brace_level = n_braces;
2107: printf ("\tuae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2);\n");
2108: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, (extra >> 16) & 7)", "dst1");
2109: printf ("\tif (GET_ZFLG) {\n");
2110: genflags (flag_cmp, curi->size, "newv", "m68k_dreg(regs, extra & 7)", "dst2");
2111: printf ("\tif (GET_ZFLG) {\n");
2112: printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 22) & 7));\n");
2113: printf ("\tput_long(rn1, m68k_dreg(regs, (extra >> 6) & 7));\n");
2114: printf ("\t}}\n");
2115: pop_braces (old_brace_level);
2116: printf ("\tif (! GET_ZFLG) {\n");
2117: printf ("\tm68k_dreg(regs, (extra >> 22) & 7) = dst1;\n");
2118: printf ("\tm68k_dreg(regs, (extra >> 6) & 7) = dst2;\n");
2119: printf ("\t}\n");
2120: }
2121: break;
2122: case i_MOVES: /* ignore DFC and SFC because we have no MMU */
2123: {
2124: int old_brace_level;
2125: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2126: printf ("\tif (extra & 0x800)\n");
2127: old_brace_level = n_braces;
2128: start_brace ();
2129: printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
2130: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0);
2131: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
2132: pop_braces (old_brace_level);
2133: printf ("else");
2134: start_brace ();
2135: genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0);
2136: printf ("\tif (extra & 0x8000) {\n");
2137: switch (curi->size) {
2138: case sz_byte: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
2139: case sz_word: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
2140: case sz_long: printf ("\tm68k_areg(regs, (extra >> 12) & 7) = src;\n"); break;
2141: default: abort ();
2142: }
2143: printf ("\t} else {\n");
2144: genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
2145: printf ("\t}\n");
2146: pop_braces (old_brace_level);
2147: }
2148: break;
2149: case i_BKPT: /* only needed for hardware emulators */
2150: sync_m68k_pc ();
2151: printf ("\top_illg(opcode);\n");
2152: break;
2153: case i_CALLM: /* not present in 68030 */
2154: sync_m68k_pc ();
2155: printf ("\top_illg(opcode);\n");
2156: break;
2157: case i_RTM: /* not present in 68030 */
2158: sync_m68k_pc ();
2159: printf ("\top_illg(opcode);\n");
2160: break;
2161: case i_TRAPcc:
2162: if (curi->smode != am_unknown && curi->smode != am_illg)
2163: genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2164: printf ("\tif (cctrue(%d)) { Exception(7,m68k_getpc()); goto %s; }\n", curi->cc, endlabelstr);
2165: need_endlabel = 1;
2166: break;
2167: case i_DIVL:
2168: sync_m68k_pc ();
2169: start_brace ();
2170: printf ("\tuaecptr oldpc = m68k_getpc();\n");
2171: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2172: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2173: sync_m68k_pc ();
2174: printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
2175: break;
2176: case i_MULL:
2177: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2178: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
2179: sync_m68k_pc ();
2180: printf ("\tm68k_mull(opcode, dst, extra);\n");
2181: break;
2182: case i_BFTST:
2183: case i_BFEXTU:
2184: case i_BFCHG:
2185: case i_BFEXTS:
2186: case i_BFCLR:
2187: case i_BFFFO:
2188: case i_BFSET:
2189: case i_BFINS:
2190: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2191: genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0);
2192: start_brace ();
2193: printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
2194: printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
2195: if (curi->dmode == Dreg) {
2196: printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f);\n");
2197: } else {
2198: printf ("\tuae_u32 tmp,bf0,bf1;\n");
2199: printf ("\tdsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0);\n");
2200: printf ("\tbf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff;\n");
2201: printf ("\ttmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7)));\n");
2202: }
2203: printf ("\ttmp >>= (32 - width);\n");
2204: printf ("\tSET_NFLG (tmp & (1 << (width-1)) ? 1 : 0);\n");
2205: printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
2206: switch (curi->mnemo) {
2207: case i_BFTST:
2208: break;
2209: case i_BFEXTU:
2210: printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2211: break;
2212: case i_BFCHG:
2213: printf ("\ttmp = ~tmp;\n");
2214: break;
2215: case i_BFEXTS:
2216: printf ("\tif (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width);\n");
2217: printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = tmp;\n");
2218: break;
2219: case i_BFCLR:
2220: printf ("\ttmp = 0;\n");
2221: break;
2222: case i_BFFFO:
2223: printf ("\t{ uae_u32 mask = 1 << (width-1);\n");
2224: printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
2225: printf ("\tm68k_dreg(regs, (extra >> 12) & 7) = offset;\n");
2226: break;
2227: case i_BFSET:
2228: printf ("\ttmp = 0xffffffff;\n");
2229: break;
2230: case i_BFINS:
2231: printf ("\ttmp = m68k_dreg(regs, (extra >> 12) & 7);\n");
1.1.1.4 root 2232: printf ("\tSET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0);\n");
2233: printf ("\tSET_ZFLG (tmp == 0);\n");
1.1 root 2234: break;
2235: default:
2236: break;
2237: }
2238: if (curi->mnemo == i_BFCHG
2239: || curi->mnemo == i_BFCLR
2240: || curi->mnemo == i_BFSET
2241: || curi->mnemo == i_BFINS)
2242: {
2243: printf ("\ttmp <<= (32 - width);\n");
2244: if (curi->dmode == Dreg) {
2245: printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 :\n");
2246: printf ("\t\t(0xffffffff << (32 - (offset & 0x1f))))) |\n");
2247: printf ("\t\t(tmp >> (offset & 0x1f)) |\n");
2248: printf ("\t\t(((offset & 0x1f) + width) >= 32 ? 0 :\n");
2249: printf (" (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width))));\n");
2250: } else {
2251: printf ("\tbf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) |\n");
2252: printf ("\t\t(tmp >> (offset & 7)) |\n");
2253: printf ("\t\t(((offset & 7) + width) >= 32 ? 0 :\n");
2254: printf ("\t\t (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width))));\n");
2255: printf ("\tput_long(dsta,bf0 );\n");
2256: printf ("\tif (((offset & 7) + width) > 32) {\n");
2257: printf ("\t\tbf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) |\n");
2258: printf ("\t\t\t(tmp << (8 - (offset & 7)));\n");
2259: printf ("\t\tput_byte(dsta+4,bf1);\n");
2260: printf ("\t}\n");
2261: }
2262: }
2263: break;
2264: case i_PACK:
2265: if (curi->smode == Dreg) {
2266: printf ("\tuae_u16 val = m68k_dreg(regs, srcreg) + %s;\n", gen_nextiword ());
2267: printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
2268: } else {
2269: printf ("\tuae_u16 val;\n");
2270: printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2271: printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2272: printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2273: printf ("\tval = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + %s;\n", gen_nextiword ());
2274: printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2275: printf ("\tput_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n");
2276: }
2277: break;
2278: case i_UNPK:
2279: if (curi->smode == Dreg) {
2280: printf ("\tuae_u16 val = m68k_dreg(regs, srcreg);\n");
2281: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2282: printf ("\tm68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
2283: } else {
2284: printf ("\tuae_u16 val;\n");
2285: printf ("\tm68k_areg(regs, srcreg) -= areg_byteinc[srcreg];\n");
2286: printf ("\tval = (uae_u16)get_byte(m68k_areg(regs, srcreg));\n");
2287: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword ());
2288: printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2289: printf ("\tput_byte(m68k_areg(regs, dstreg),val);\n");
2290: printf ("\tm68k_areg(regs, dstreg) -= areg_byteinc[dstreg];\n");
2291: printf ("\tput_byte(m68k_areg(regs, dstreg),val >> 8);\n");
2292: }
2293: break;
2294: case i_TAS:
2295: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
2296: genflags (flag_logical, curi->size, "src", "", "");
2297: printf ("\tsrc |= 0x80;\n");
2298: genastore ("src", curi->smode, "srcreg", curi->size, "src");
1.1.1.2 root 2299: if( curi->smode!=Dreg ) insn_n_cycles += 2;
1.1 root 2300: break;
2301: case i_FPP:
2302: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2303: sync_m68k_pc ();
2304: printf ("\tfpp_opp(opcode,extra);\n");
2305: break;
2306: case i_FDBcc:
2307: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2308: sync_m68k_pc ();
2309: printf ("\tfdbcc_opp(opcode,extra);\n");
2310: break;
2311: case i_FScc:
2312: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2313: sync_m68k_pc ();
2314: printf ("\tfscc_opp(opcode,extra);\n");
2315: break;
2316: case i_FTRAPcc:
2317: sync_m68k_pc ();
2318: start_brace ();
2319: printf ("\tuaecptr oldpc = m68k_getpc();\n");
2320: if (curi->smode != am_unknown && curi->smode != am_illg)
2321: genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0);
2322: sync_m68k_pc ();
2323: printf ("\tftrapcc_opp(opcode,oldpc);\n");
2324: break;
2325: case i_FBcc:
2326: sync_m68k_pc ();
2327: start_brace ();
2328: printf ("\tuaecptr pc = m68k_getpc();\n");
2329: genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0);
2330: sync_m68k_pc ();
2331: printf ("\tfbcc_opp(opcode,pc,extra);\n");
2332: break;
2333: case i_FSAVE:
2334: sync_m68k_pc ();
2335: printf ("\tfsave_opp(opcode);\n");
2336: break;
2337: case i_FRESTORE:
2338: sync_m68k_pc ();
2339: printf ("\tfrestore_opp(opcode);\n");
2340: break;
2341:
2342: case i_CINVL:
2343: case i_CINVP:
2344: case i_CINVA:
2345: case i_CPUSHL:
2346: case i_CPUSHP:
2347: case i_CPUSHA:
2348: break;
2349: case i_MOVE16:
1.1.1.4 root 2350: if ((opcode & 0xfff8) == 0xf620) {
2351: /* MOVE16 (Ax)+,(Ay)+ */
2352: printf ("\tuaecptr mems = m68k_areg(regs, srcreg) & ~15, memd;\n");
2353: printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword());
2354: printf ("\tmemd = m68k_areg(regs, dstreg) & ~15;\n");
2355: printf ("\tput_long(memd, get_long(mems));\n");
2356: printf ("\tput_long(memd+4, get_long(mems+4));\n");
2357: printf ("\tput_long(memd+8, get_long(mems+8));\n");
2358: printf ("\tput_long(memd+12, get_long(mems+12));\n");
2359: printf ("\tif (srcreg != dstreg)\n");
2360: printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2361: printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2362: } else {
2363: /* Other variants */
2364: genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2);
2365: genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2);
2366: printf ("\tmemsa &= ~15;\n");
2367: printf ("\tmemda &= ~15;\n");
2368: printf ("\tput_long(memda, get_long(memsa));\n");
2369: printf ("\tput_long(memda+4, get_long(memsa+4));\n");
2370: printf ("\tput_long(memda+8, get_long(memsa+8));\n");
2371: printf ("\tput_long(memda+12, get_long(memsa+12));\n");
2372: if ((opcode & 0xfff8) == 0xf600)
2373: printf ("\tm68k_areg(regs, srcreg) += 16;\n");
2374: else if ((opcode & 0xfff8) == 0xf608)
2375: printf ("\tm68k_areg(regs, dstreg) += 16;\n");
2376: }
1.1 root 2377: break;
2378:
2379: case i_MMUOP:
2380: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0);
2381: sync_m68k_pc ();
2382: printf ("\tmmu_op(opcode,extra);\n");
2383: break;
2384: default:
2385: abort ();
2386: break;
2387: }
2388: finish_braces ();
2389: sync_m68k_pc ();
2390: }
2391:
2392: static void generate_includes (FILE * f)
2393: {
2394: fprintf (f, "#include \"sysdeps.h\"\n");
2395: fprintf (f, "#include \"hatari-glue.h\"\n");
2396: fprintf (f, "#include \"maccess.h\"\n");
2397: fprintf (f, "#include \"memory.h\"\n");
2398: fprintf (f, "#include \"newcpu.h\"\n");
2399: fprintf (f, "#include \"cputbl.h\"\n");
2400: fprintf (f, "#define CPUFUNC(x) x##_ff\n"
2401: "#ifdef NOFLAGS\n"
2402: "#include \"noflags.h\"\n"
2403: "#endif\n");
2404: }
2405:
2406: static int postfix;
2407:
2408: static void generate_one_opcode (int rp)
2409: {
2410: int i;
2411: uae_u16 smsk, dmsk;
2412: long int opcode = opcode_map[rp];
2413:
1.1.1.2 root 2414: exactCpuCycles[0] = 0; /* Default: not used */
2415:
1.1 root 2416: if (table68k[opcode].mnemo == i_ILLG
2417: || table68k[opcode].clev > cpu_level)
2418: return;
2419:
2420: for (i = 0; lookuptab[i].name[0]; i++) {
2421: if (table68k[opcode].mnemo == lookuptab[i].mnemo)
2422: break;
2423: }
2424:
2425: if (table68k[opcode].handler != -1)
2426: return;
2427:
2428: if (opcode_next_clev[rp] != cpu_level) {
2429: fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, opcode_last_postfix[rp],
2430: opcode, lookuptab[i].name);
2431: return;
2432: }
2433: fprintf (stblfile, "{ CPUFUNC(op_%lx_%d), 0, %ld }, /* %s */\n", opcode, postfix, opcode, lookuptab[i].name);
2434: fprintf (headerfile, "extern cpuop_func op_%lx_%d_nf;\n", opcode, postfix);
2435: fprintf (headerfile, "extern cpuop_func op_%lx_%d_ff;\n", opcode, postfix);
2436: printf ("unsigned long REGPARAM2 CPUFUNC(op_%lx_%d)(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, lookuptab[i].name);
2437:
2438: switch (table68k[opcode].stype) {
2439: case 0: smsk = 7; break;
2440: case 1: smsk = 255; break;
2441: case 2: smsk = 15; break;
2442: case 3: smsk = 7; break;
2443: case 4: smsk = 7; break;
2444: case 5: smsk = 63; break;
1.1.1.4 root 2445: case 7: smsk = 3; break;
1.1 root 2446: default: abort ();
2447: }
2448: dmsk = 7;
2449:
2450: next_cpu_level = -1;
2451: if (table68k[opcode].suse
2452: && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
2453: && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
2454: && table68k[opcode].smode != absw && table68k[opcode].smode != absl
2455: && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
2456: {
2457: if (table68k[opcode].spos == -1) {
2458: if (((int) table68k[opcode].sreg) >= 128)
2459: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
2460: else
2461: printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
2462: } else {
2463: char source[100];
2464: int pos = table68k[opcode].spos;
2465:
2466: if (pos)
2467: sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
2468: else
2469: sprintf (source, "(opcode & %d)", smsk);
2470:
2471: if (table68k[opcode].stype == 3)
2472: printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
2473: else if (table68k[opcode].stype == 1)
2474: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
2475: else
2476: printf ("\tuae_u32 srcreg = %s;\n", source);
2477: }
2478: }
2479: if (table68k[opcode].duse
2480: /* Yes, the dmode can be imm, in case of LINK or DBcc */
2481: && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
2482: && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
2483: && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
2484: {
2485: if (table68k[opcode].dpos == -1) {
2486: if (((int) table68k[opcode].dreg) >= 128)
2487: printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
2488: else
2489: printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
2490: } else {
2491: int pos = table68k[opcode].dpos;
2492: #if 0
2493: /* Check that we can do the little endian optimization safely. */
2494: if (pos < 8 && (dmsk >> (8 - pos)) != 0)
2495: abort ();
2496: #endif
2497: if (pos)
2498: printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
2499: pos, dmsk);
2500: else
2501: printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
2502: }
2503: }
2504: need_endlabel = 0;
2505: endlabelno++;
2506: sprintf (endlabelstr, "endlabel%d", endlabelno);
1.1.1.2 root 2507: if(table68k[opcode].mnemo==i_ASR || table68k[opcode].mnemo==i_ASL || table68k[opcode].mnemo==i_LSR || table68k[opcode].mnemo==i_LSL
2508: || table68k[opcode].mnemo==i_ROL || table68k[opcode].mnemo==i_ROR || table68k[opcode].mnemo==i_ROXL || table68k[opcode].mnemo==i_ROXR
2509: || table68k[opcode].mnemo==i_MVMEL || table68k[opcode].mnemo==i_MVMLE)
2510: printf("\tunsigned int retcycles;\n");
1.1 root 2511: gen_opcode (opcode);
2512: if (need_endlabel)
2513: printf ("%s: ;\n", endlabelstr);
1.1.1.2 root 2514: if( strlen(exactCpuCycles) > 0 )
2515: printf("%s\n",exactCpuCycles);
2516: else
2517: printf ("return %d;\n", insn_n_cycles);
1.1 root 2518: printf ("}\n");
2519: opcode_next_clev[rp] = next_cpu_level;
2520: opcode_last_postfix[rp] = postfix;
2521: }
2522:
2523: static void generate_func (void)
2524: {
2525: int i, j, rp;
2526:
2527: using_prefetch = 0;
2528: using_exception_3 = 0;
2529: for (i = 0; i < 6; i++) {
2530: cpu_level = 4 - i;
2531: if (i == 5) {
2532: cpu_level = 0;
2533: using_prefetch = 1;
2534: using_exception_3 = 1;
2535: for (rp = 0; rp < nr_cpuop_funcs; rp++)
2536: opcode_next_clev[rp] = 0;
2537: }
2538:
2539: postfix = i;
1.1.1.7 ! root 2540: fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
1.1 root 2541:
2542: /* sam: this is for people with low memory (eg. me :)) */
2543: printf ("\n"
2544: "#if !defined(PART_1) && !defined(PART_2) && "
2545: "!defined(PART_3) && !defined(PART_4) && "
2546: "!defined(PART_5) && !defined(PART_6) && "
2547: "!defined(PART_7) && !defined(PART_8)"
2548: "\n"
2549: "#define PART_1 1\n"
2550: "#define PART_2 1\n"
2551: "#define PART_3 1\n"
2552: "#define PART_4 1\n"
2553: "#define PART_5 1\n"
2554: "#define PART_6 1\n"
2555: "#define PART_7 1\n"
2556: "#define PART_8 1\n"
2557: "#endif\n\n");
2558:
2559: rp = 0;
2560: for(j=1;j<=8;++j) {
2561: int k = (j*nr_cpuop_funcs)/8;
2562: printf ("#ifdef PART_%d\n",j);
2563: for (; rp < k; rp++)
2564: generate_one_opcode (rp);
2565: printf ("#endif\n\n");
2566: }
2567:
2568: fprintf (stblfile, "{ 0, 0, 0 }};\n");
2569: }
2570:
2571: }
2572:
2573: int main (int argc, char **argv)
2574: {
2575: read_table68k ();
2576: do_merges ();
2577:
2578: opcode_map = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2579: opcode_last_postfix = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2580: opcode_next_clev = (int *) malloc (sizeof (int) * nr_cpuop_funcs);
2581: counts = (unsigned long *) malloc (65536 * sizeof (unsigned long));
2582: read_counts ();
2583:
2584: /* It would be a lot nicer to put all in one file (we'd also get rid of
2585: * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
2586: * I don't dare to touch the 68k version. */
2587:
2588: headerfile = fopen ("cputbl.h", "wb");
2589: stblfile = fopen ("cpustbl.c", "wb");
2590: freopen ("cpuemu.c", "wb", stdout);
2591:
2592: generate_includes (stdout);
2593: generate_includes (stblfile);
2594:
2595: generate_func ();
2596:
2597: free (table68k);
2598: return 0;
2599: }
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