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1.1.1.6 root 1: /*
2: Hatari - hatari-glue.c
3:
1.1.1.18 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1.1.6 root 6:
7: This file contains some code to glue the UAE CPU core to the rest of the
8: emulator and Hatari's "illegal" opcodes.
9: */
1.1.1.13 root 10: const char HatariGlue_fileid[] = "Hatari hatari-glue.c : " __DATE__ " " __TIME__;
1.1.1.6 root 11:
1.1 root 12:
13: #include <stdio.h>
14:
1.1.1.15 root 15: #include "main.h"
16: #include "configuration.h"
17: #include "cycInt.h"
18: #include "tos.h"
19: #include "gemdos.h"
1.1.1.18 root 20: #include "natfeats.h"
1.1.1.15 root 21: #include "cart.h"
22: #include "vdi.h"
23: #include "stMemory.h"
24: #include "ikbd.h"
1.1.1.16 root 25: #include "screen.h"
1.1.1.15 root 26: #include "video.h"
1.1.1.17 root 27: #include "psg.h"
1.1.1.18 root 28: #include "mfp.h"
29: #include "fdc.h"
1.1 root 30:
1.1.1.3 root 31: #include "sysdeps.h"
32: #include "maccess.h"
1.1.1.5 root 33: #include "memory.h"
1.1.1.17 root 34: #include "m68000.h"
1.1.1.3 root 35: #include "newcpu.h"
1.1.1.8 root 36: #include "hatari-glue.h"
1.1 root 37:
38:
1.1.1.11 root 39: struct uae_prefs currprefs, changed_prefs;
1.1 root 40:
1.1.1.8 root 41: int pendingInterrupts = 0;
1.1.1.6 root 42:
1.1 root 43:
1.1.1.14 root 44: /**
45: * Reset custom chips
1.1.1.18 root 46: * In case the RESET instruction is called, we must reset all the peripherals
47: * connected to the CPU's reset pin.
1.1.1.14 root 48: */
1.1 root 49: void customreset(void)
50: {
1.1.1.14 root 51: pendingInterrupts = 0;
1.1.1.12 root 52:
1.1.1.18 root 53: /* Reset the IKBD */
54: IKBD_Reset ( false );
1.1.1.13 root 55:
1.1.1.14 root 56: /* Reseting the GLUE video chip should also set freq/res register to 0 */
57: Video_Reset_Glue ();
1.1.1.17 root 58:
59: /* Reset the YM2149 (stop any sound) */
60: PSG_Reset ();
1.1.1.18 root 61:
62: /* Reset the MFP */
63: MFP_Reset ();
64:
65: /* Reset the FDC */
1.1.1.19! root 66: FDC_Reset ( false );
1.1.1.6 root 67: }
68:
69:
1.1.1.14 root 70: /**
71: * Return interrupt number (1 - 7), -1 means no interrupt.
1.1.1.8 root 72: * Note that the interrupt stays pending if it can't be executed yet
1.1.1.14 root 73: * due to the interrupt level field in the SR.
74: */
1.1.1.6 root 75: int intlev(void)
76: {
1.1.1.14 root 77: /* There are only VBL and HBL autovector interrupts in the ST... */
78: assert((pendingInterrupts & ~((1<<4)|(1<<2))) == 0);
1.1.1.8 root 79:
1.1.1.18 root 80: #if 0
1.1.1.14 root 81: if (pendingInterrupts & (1 << 4)) /* VBL interrupt? */
82: {
83: if (regs.intmask < 4)
84: pendingInterrupts &= ~(1 << 4);
85: return 4;
86: }
87: else if (pendingInterrupts & (1 << 2)) /* HBL interrupt? */
88: {
89: if (regs.intmask < 2)
90: pendingInterrupts &= ~(1 << 2);
91: return 2;
92: }
1.1.1.18 root 93: #else
94: if ( pendingInterrupts & (1 << 4) ) /* VBL interrupt ? */
95: return 4;
96: else if ( pendingInterrupts & (1 << 2) ) /* HBL interrupt ? */
97: return 2;
98: #endif
1.1.1.14 root 99:
100: return -1;
1.1 root 101: }
102:
103:
1.1.1.14 root 104: /**
105: * Initialize 680x0 emulation
106: */
1.1 root 107: int Init680x0(void)
108: {
1.1.1.14 root 109: currprefs.cpu_level = changed_prefs.cpu_level = ConfigureParams.System.nCpuLevel;
110: currprefs.cpu_compatible = changed_prefs.cpu_compatible = ConfigureParams.System.bCompatibleCpu;
111: currprefs.address_space_24 = changed_prefs.address_space_24 = true;
1.1 root 112:
1.1.1.14 root 113: init_m68k();
114:
115: return true;
1.1 root 116: }
117:
118:
1.1.1.14 root 119: /**
120: * Deinitialize 680x0 emulation
121: */
1.1 root 122: void Exit680x0(void)
123: {
1.1.1.14 root 124: memory_uninit();
1.1.1.8 root 125:
1.1.1.14 root 126: free(table68k);
127: table68k = NULL;
1.1 root 128: }
129:
130:
1.1.1.14 root 131: /**
132: * Check if the CPU type has been changed
133: */
1.1.1.11 root 134: void check_prefs_changed_cpu(void)
1.1.1.4 root 135: {
1.1.1.14 root 136: if (currprefs.cpu_level != changed_prefs.cpu_level
137: || currprefs.cpu_compatible != changed_prefs.cpu_compatible)
138: {
139: currprefs.cpu_level = changed_prefs.cpu_level;
140: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
141: set_special(SPCFLAG_MODE_CHANGE);
142: build_cpufunctbl ();
143: }
1.1 root 144: }
145:
146:
1.1.1.14 root 147: /**
148: * This function will be called at system init by the cartridge routine
149: * (after gemdos init, before booting floppies).
150: * The GEMDOS vector (#$84) is setup and we also initialize the connected
151: * drive mask and Line-A variables (for an extended VDI resolution) from here.
152: */
1.1.1.7 root 153: unsigned long OpCode_SysInit(uae_u32 opcode)
1.1 root 154: {
1.1.1.14 root 155: /* Add any drives mapped by TOS in the interim */
156: ConnectedDriveMask |= STMemory_ReadLong(0x4c2);
157: /* Initialize the connected drive mask */
158: STMemory_WriteLong(0x4c2, ConnectedDriveMask);
159:
160: if (!bInitGemDOS)
161: {
162: /* Init on boot - see cart.c */
163: GemDOS_Boot();
164:
165: /* Update LineA for extended VDI res
166: * D0: LineA base, A1: Font base
167: */
168: VDI_LineA(regs.regs[0], regs.regs[9]);
169: }
170:
171: m68k_incpc(2);
172: fill_prefetch_0();
173: return 4;
1.1.1.3 root 174: }
175:
1.1.1.5 root 176:
1.1.1.14 root 177: /**
178: * Intercept GEMDOS calls.
179: * Used for GEMDOS HD emulation (see gemdos.c).
180: */
1.1.1.3 root 181: unsigned long OpCode_GemDos(uae_u32 opcode)
182: {
1.1.1.14 root 183: GemDOS_OpCode(); /* handler code in gemdos.c */
1.1.1.3 root 184:
1.1.1.14 root 185: m68k_incpc(2);
186: fill_prefetch_0();
187: return 4;
1.1 root 188: }
189:
1.1.1.5 root 190:
1.1.1.14 root 191: /**
192: * This is called after completion of each VDI call
193: */
1.1.1.5 root 194: unsigned long OpCode_VDI(uae_u32 opcode)
195: {
1.1.1.17 root 196: Uint32 pc = M68000_GetPC();
1.1.1.5 root 197:
1.1.1.17 root 198: /* this is valid only after VDI trap, called from cartridge code */
199: if (VDI_OldPC && pc >= 0xfa0000 && pc < 0xfc0000)
200: {
201: VDI_Complete();
1.1.1.5 root 202:
1.1.1.17 root 203: /* Set PC back to where originated from to continue instruction decoding */
204: m68k_setpc(VDI_OldPC);
205: VDI_OldPC = 0;
206: }
207: else
208: {
209: /* illegal instruction */
210: op_illg(opcode);
211: }
1.1.1.14 root 212: fill_prefetch_0();
213: return 4;
1.1 root 214: }
1.1.1.18 root 215:
216:
217: /**
218: * Emulator Native Features ID opcode interception.
219: */
220: unsigned long OpCode_NatFeat_ID(uae_u32 opcode)
221: {
222: Uint32 stack = Regs[REG_A7] + SIZE_LONG; /* skip return address */
223: Uint16 SR = M68000_GetSR();
224:
225: if (NatFeat_ID(stack, &(Regs[REG_D0]))) {
226: M68000_SetSR(SR);
227: m68k_incpc(2);
228: fill_prefetch_0();
229: }
230: return 4;
231: }
232:
233: /**
234: * Emulator Native Features call opcode interception.
235: */
236: unsigned long OpCode_NatFeat_Call(uae_u32 opcode)
237: {
238: Uint32 stack = Regs[REG_A7] + SIZE_LONG; /* skip return address */
239: Uint16 SR = M68000_GetSR();
240: bool super;
241:
242: super = ((SR & SR_SUPERMODE) == SR_SUPERMODE);
243: if (NatFeat_Call(stack, super, &(Regs[REG_D0]))) {
244: M68000_SetSR(SR);
245: m68k_incpc(2);
246: fill_prefetch_0();
247: }
248: return 4;
249: }
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