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1.1.1.6 root 1: /*
2: Hatari - hatari-glue.c
3:
1.1.1.18 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1.1.6 root 6:
7: This file contains some code to glue the UAE CPU core to the rest of the
8: emulator and Hatari's "illegal" opcodes.
9: */
1.1.1.13 root 10: const char HatariGlue_fileid[] = "Hatari hatari-glue.c : " __DATE__ " " __TIME__;
1.1.1.6 root 11:
1.1 root 12:
13: #include <stdio.h>
14:
1.1.1.15 root 15: #include "main.h"
16: #include "configuration.h"
17: #include "cycInt.h"
18: #include "tos.h"
19: #include "gemdos.h"
1.1.1.18 root 20: #include "natfeats.h"
1.1.1.15 root 21: #include "cart.h"
22: #include "vdi.h"
23: #include "stMemory.h"
24: #include "ikbd.h"
1.1.1.16 root 25: #include "screen.h"
1.1.1.15 root 26: #include "video.h"
1.1.1.17 root 27: #include "psg.h"
1.1.1.18 root 28: #include "mfp.h"
29: #include "fdc.h"
1.1 root 30:
1.1.1.3 root 31: #include "sysdeps.h"
32: #include "maccess.h"
1.1.1.5 root 33: #include "memory.h"
1.1.1.17 root 34: #include "m68000.h"
1.1.1.3 root 35: #include "newcpu.h"
1.1.1.8 root 36: #include "hatari-glue.h"
1.1 root 37:
38:
1.1.1.11 root 39: struct uae_prefs currprefs, changed_prefs;
1.1 root 40:
1.1.1.8 root 41: int pendingInterrupts = 0;
1.1.1.6 root 42:
1.1 root 43:
1.1.1.14 root 44: /**
45: * Reset custom chips
1.1.1.18 root 46: * In case the RESET instruction is called, we must reset all the peripherals
47: * connected to the CPU's reset pin.
1.1.1.14 root 48: */
1.1 root 49: void customreset(void)
50: {
1.1.1.14 root 51: pendingInterrupts = 0;
1.1.1.12 root 52:
1.1.1.18 root 53: /* Reset the IKBD */
54: IKBD_Reset ( false );
1.1.1.13 root 55:
1.1.1.14 root 56: /* Reseting the GLUE video chip should also set freq/res register to 0 */
57: Video_Reset_Glue ();
1.1.1.17 root 58:
59: /* Reset the YM2149 (stop any sound) */
60: PSG_Reset ();
1.1.1.18 root 61:
62: /* Reset the MFP */
63: MFP_Reset ();
64:
65: /* Reset the FDC */
1.1.1.19 root 66: FDC_Reset ( false );
1.1.1.6 root 67: }
68:
69:
1.1.1.14 root 70: /**
71: * Return interrupt number (1 - 7), -1 means no interrupt.
1.1.1.8 root 72: * Note that the interrupt stays pending if it can't be executed yet
1.1.1.14 root 73: * due to the interrupt level field in the SR.
74: */
1.1.1.6 root 75: int intlev(void)
76: {
1.1.1.14 root 77: /* There are only VBL and HBL autovector interrupts in the ST... */
78: assert((pendingInterrupts & ~((1<<4)|(1<<2))) == 0);
1.1.1.8 root 79:
1.1.1.18 root 80: #if 0
1.1.1.14 root 81: if (pendingInterrupts & (1 << 4)) /* VBL interrupt? */
82: {
83: if (regs.intmask < 4)
84: pendingInterrupts &= ~(1 << 4);
85: return 4;
86: }
87: else if (pendingInterrupts & (1 << 2)) /* HBL interrupt? */
88: {
89: if (regs.intmask < 2)
90: pendingInterrupts &= ~(1 << 2);
91: return 2;
92: }
1.1.1.18 root 93: #else
94: if ( pendingInterrupts & (1 << 4) ) /* VBL interrupt ? */
95: return 4;
96: else if ( pendingInterrupts & (1 << 2) ) /* HBL interrupt ? */
97: return 2;
98: #endif
1.1.1.14 root 99:
100: return -1;
1.1 root 101: }
102:
103:
1.1.1.14 root 104: /**
105: * Initialize 680x0 emulation
106: */
1.1 root 107: int Init680x0(void)
108: {
1.1.1.14 root 109: currprefs.cpu_level = changed_prefs.cpu_level = ConfigureParams.System.nCpuLevel;
110: currprefs.cpu_compatible = changed_prefs.cpu_compatible = ConfigureParams.System.bCompatibleCpu;
111: currprefs.address_space_24 = changed_prefs.address_space_24 = true;
1.1 root 112:
1.1.1.14 root 113: init_m68k();
114:
115: return true;
1.1 root 116: }
117:
118:
1.1.1.14 root 119: /**
120: * Deinitialize 680x0 emulation
121: */
1.1 root 122: void Exit680x0(void)
123: {
1.1.1.14 root 124: memory_uninit();
1.1.1.8 root 125:
1.1.1.14 root 126: free(table68k);
127: table68k = NULL;
1.1 root 128: }
129:
130:
1.1.1.14 root 131: /**
1.1.1.20! root 132: * Execute a 'NOP' opcode (increment PC by 2 bytes and take care
! 133: * of prefetch at the CPU level depending on the current CPU mode)
! 134: * This is used to return from Gemdos / Natfeats interception, by ignoring
! 135: * the intercepted opcode and executing a NOP instead once the work has been done.
! 136: */
! 137: static void CpuDoNOP ( void )
! 138: {
! 139: (*cpufunctbl[0X4E71])(0x4E71);
! 140: }
! 141:
! 142:
! 143: /**
1.1.1.14 root 144: * Check if the CPU type has been changed
145: */
1.1.1.11 root 146: void check_prefs_changed_cpu(void)
1.1.1.4 root 147: {
1.1.1.14 root 148: if (currprefs.cpu_level != changed_prefs.cpu_level
149: || currprefs.cpu_compatible != changed_prefs.cpu_compatible)
150: {
151: currprefs.cpu_level = changed_prefs.cpu_level;
152: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
153: set_special(SPCFLAG_MODE_CHANGE);
154: build_cpufunctbl ();
155: }
1.1 root 156: }
157:
158:
1.1.1.14 root 159: /**
160: * This function will be called at system init by the cartridge routine
161: * (after gemdos init, before booting floppies).
162: * The GEMDOS vector (#$84) is setup and we also initialize the connected
163: * drive mask and Line-A variables (for an extended VDI resolution) from here.
164: */
1.1.1.7 root 165: unsigned long OpCode_SysInit(uae_u32 opcode)
1.1 root 166: {
1.1.1.14 root 167: /* Add any drives mapped by TOS in the interim */
168: ConnectedDriveMask |= STMemory_ReadLong(0x4c2);
169: /* Initialize the connected drive mask */
170: STMemory_WriteLong(0x4c2, ConnectedDriveMask);
171:
172: if (!bInitGemDOS)
173: {
174: /* Init on boot - see cart.c */
175: GemDOS_Boot();
176:
177: /* Update LineA for extended VDI res
178: * D0: LineA base, A1: Font base
179: */
180: VDI_LineA(regs.regs[0], regs.regs[9]);
181: }
182:
1.1.1.20! root 183: CpuDoNOP ();
1.1.1.14 root 184: return 4;
1.1.1.3 root 185: }
186:
1.1.1.5 root 187:
1.1.1.14 root 188: /**
189: * Intercept GEMDOS calls.
190: * Used for GEMDOS HD emulation (see gemdos.c).
191: */
1.1.1.3 root 192: unsigned long OpCode_GemDos(uae_u32 opcode)
193: {
1.1.1.14 root 194: GemDOS_OpCode(); /* handler code in gemdos.c */
1.1.1.3 root 195:
1.1.1.20! root 196: CpuDoNOP ();
1.1.1.14 root 197: return 4;
1.1 root 198: }
199:
1.1.1.5 root 200:
1.1.1.14 root 201: /**
202: * This is called after completion of each VDI call
203: */
1.1.1.5 root 204: unsigned long OpCode_VDI(uae_u32 opcode)
205: {
1.1.1.17 root 206: Uint32 pc = M68000_GetPC();
1.1.1.5 root 207:
1.1.1.17 root 208: /* this is valid only after VDI trap, called from cartridge code */
209: if (VDI_OldPC && pc >= 0xfa0000 && pc < 0xfc0000)
210: {
211: VDI_Complete();
1.1.1.5 root 212:
1.1.1.17 root 213: /* Set PC back to where originated from to continue instruction decoding */
214: m68k_setpc(VDI_OldPC);
215: VDI_OldPC = 0;
216: }
217: else
218: {
219: /* illegal instruction */
220: op_illg(opcode);
221: }
1.1.1.14 root 222: fill_prefetch_0();
223: return 4;
1.1 root 224: }
1.1.1.18 root 225:
226:
227: /**
228: * Emulator Native Features ID opcode interception.
229: */
230: unsigned long OpCode_NatFeat_ID(uae_u32 opcode)
231: {
232: Uint32 stack = Regs[REG_A7] + SIZE_LONG; /* skip return address */
233:
234: if (NatFeat_ID(stack, &(Regs[REG_D0]))) {
1.1.1.20! root 235: CpuDoNOP ();
1.1.1.18 root 236: }
237: return 4;
238: }
239:
240: /**
241: * Emulator Native Features call opcode interception.
242: */
243: unsigned long OpCode_NatFeat_Call(uae_u32 opcode)
244: {
245: Uint32 stack = Regs[REG_A7] + SIZE_LONG; /* skip return address */
246: Uint16 SR = M68000_GetSR();
247: bool super;
248:
249: super = ((SR & SR_SUPERMODE) == SR_SUPERMODE);
250: if (NatFeat_Call(stack, super, &(Regs[REG_D0]))) {
1.1.1.20! root 251: CpuDoNOP ();
1.1.1.18 root 252: }
253: return 4;
254: }
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