--- hatari/src/uae-cpu/memory.c	2019/04/09 08:55:52	1.1.1.18
+++ hatari/src/uae-cpu/memory.c	2019/04/09 08:58:19	1.1.1.20
@@ -315,7 +315,8 @@ static uae_u32 SysMem_wget(uaecptr addr)
     addr -= STmem_start & STmem_mask;
     addr &= STmem_mask;
 
-    if(addr < 0x800 && !regs.s)
+    /* Only CPU will trigger bus error if bit S=0, not the blitter */
+    if(addr < 0x800 && !regs.s && BusMode == BUS_MODE_CPU )
     {
       M68000_BusError(addr, BUS_ERROR_READ, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA);
       return 0;
@@ -357,10 +358,17 @@ static void SysMem_wput(uaecptr addr, ua
     addr -= STmem_start & STmem_mask;
     addr &= STmem_mask;
 
+    /* Only CPU will trigger bus error if bit S=0, not the blitter */
     if(addr < 0x8 || (addr < 0x800 && !regs.s))
     {
-      M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA);
-      return;
+      if ( BusMode == BUS_MODE_CPU )
+      {
+	M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA);
+	return;
+      }
+      /* If blitter writes < 0x8 then it should be ignored, else the write should be made */
+      else if ( ( BusMode == BUS_MODE_BLITTER ) && ( addr < 0x8 ) )
+	return;
     }
 
     do_put_mem_word(STmemory + addr, w);
@@ -681,6 +689,21 @@ bool memory_region_bus_error ( uaecptr a
 
 
 /*
+ * Initialize the standard RAM memory banks
+ */
+void memory_map_Standard_RAM ( Uint32 MMU_Bank0_Size , Uint32 MMU_Bank1_Size )
+{
+    map_banks(&SysMem_bank, 0x00, 1);
+    /* Between STRamEnd and 4MB barrier, there is void space: */
+    map_banks(&VoidMem_bank, 0x08, 0x38);
+    /* Space between 4MB barrier and TOS ROM causes a bus error: */
+    map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0);
+    /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */
+    map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
+}
+
+
+/*
  * Initialize the memory banks
  */
 void memory_init(uae_u32 nNewSTMemSize, uae_u32 nNewTTMemSize, uae_u32 nNewRomMemStart)
@@ -743,14 +766,8 @@ void memory_init(uae_u32 nNewSTMemSize,
     BusErrMem_bank.baseaddr = NULL;			/* No real memory allocated for this region */
 
 
-    /* Map the ST system RAM: */
-    map_banks(&SysMem_bank, 0x00, 1);
-    /* Between STRamEnd and 4MB barrier, there is void space: */
-    map_banks(&VoidMem_bank, 0x08, 0x38);
-    /* Space between 4MB barrier and TOS ROM causes a bus error: */
-    map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0);
-    /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */
-    map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
+    /* Map the standard RAM (Max is 4 MB on unmodified STF/STE) */
+    memory_map_Standard_RAM ( MMU_Bank0_Size , MMU_Bank1_Size );
 
 
     /* Handle extra RAM on TT and Falcon starting at 0x1000000 and up to 0x80000000 */