--- hatari/src/uae-cpu/memory.c 2019/04/01 07:11:01 1.1.1.5 +++ hatari/src/uae-cpu/memory.c 2019/04/09 08:55:52 1.1.1.18 @@ -7,37 +7,53 @@ * * Adaptation to Hatari by Thomas Huth * - * This file is distributed under the GNU Public License, version 2 or at - * your option any later version. Read the file gpl.txt for details. + * This file is distributed under the GNU General Public License, version 2 + * or at your option any later version. Read the file gpl.txt for details. */ -static char rcsid[] = "Hatari $Id: memory.c,v 1.1.1.5 2019/04/01 07:11:01 root Exp $"; +const char Memory_fileid[] = "Hatari memory.c : " __DATE__ " " __TIME__; +#include +#include "config.h" #include "sysdeps.h" #include "hatari-glue.h" #include "maccess.h" #include "memory.h" -#include "../includes/main.h" -#include "../includes/tos.h" -#include "../includes/intercept.h" -#include "../includes/reset.h" -#include "../includes/decode.h" -#include "../includes/m68000.h" + +#include "main.h" +#include "tos.h" +#include "ide.h" +#include "ioMem.h" +#include "reset.h" +#include "stMemory.h" +#include "m68000.h" +#include "configuration.h" + #include "newcpu.h" -uae_u32 STmem_size, TTmem_size = 0; -uae_u32 TTmem_mask; +/* Set illegal_mem to 1 for debug output: */ +#define illegal_mem 1 + +static int illegal_count = 50; + +static uae_u32 STmem_size; +uae_u32 TTmem_size = 0; +static uae_u32 TTmem_mask; #define STmem_start 0x00000000 #define ROMmem_start 0x00E00000 +#define IdeMem_start 0x00F00000 #define IOmem_start 0x00FF0000 -#define TTmem_start 0x01000000 +#define TTmem_start 0x01000000 /* TOS 3 and TOS 4 always expect extra RAM at this address */ +#define TTmem_end 0x80000000 /* Max value for end of TT ram, which gives 2047 MB */ +#define IdeMem_size 65536 #define IOmem_size 65536 #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */ #define STmem_mask 0x00ffffff #define ROMmem_mask 0x00ffffff +#define IdeMem_mask (IdeMem_size - 1) #define IOmem_mask (IOmem_size - 1) @@ -80,17 +96,20 @@ static int STmem_check (uaecptr addr, ua static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM; -/* A dummy bank that only contains zeros */ +static void print_illegal_counted(const char *txt, uaecptr addr) +{ + if (!illegal_mem || illegal_count <= 0) + return; + + write_log("%s at %08lx\n", txt, (long)addr); + if (--illegal_count == 0) + write_log("Suppressing further messages about illegal memory accesses.\n"); +} + -static uae_u32 dummy_lget (uaecptr) REGPARAM; -static uae_u32 dummy_wget (uaecptr) REGPARAM; -static uae_u32 dummy_bget (uaecptr) REGPARAM; -static void dummy_lput (uaecptr, uae_u32) REGPARAM; -static void dummy_wput (uaecptr, uae_u32) REGPARAM; -static void dummy_bput (uaecptr, uae_u32) REGPARAM; -static int dummy_check (uaecptr addr, uae_u32 size) REGPARAM; +/* A dummy bank that only contains zeros */ -uae_u32 REGPARAM2 dummy_lget (uaecptr addr) +static uae_u32 dummy_lget(uaecptr addr) { if (illegal_mem) write_log ("Illegal lget at %08lx\n", (long)addr); @@ -98,7 +117,7 @@ uae_u32 REGPARAM2 dummy_lget (uaecptr ad return 0; } -uae_u32 REGPARAM2 dummy_wget (uaecptr addr) +static uae_u32 dummy_wget(uaecptr addr) { if (illegal_mem) write_log ("Illegal wget at %08lx\n", (long)addr); @@ -106,7 +125,7 @@ uae_u32 REGPARAM2 dummy_wget (uaecptr ad return 0; } -uae_u32 REGPARAM2 dummy_bget (uaecptr addr) +static uae_u32 dummy_bget(uaecptr addr) { if (illegal_mem) write_log ("Illegal bget at %08lx\n", (long)addr); @@ -114,33 +133,30 @@ uae_u32 REGPARAM2 dummy_bget (uaecptr ad return 0; } -void REGPARAM2 dummy_lput (uaecptr addr, uae_u32 l) +static void dummy_lput(uaecptr addr, uae_u32 l) { if (illegal_mem) write_log ("Illegal lput at %08lx\n", (long)addr); } -void REGPARAM2 dummy_wput (uaecptr addr, uae_u32 w) +static void dummy_wput(uaecptr addr, uae_u32 w) { if (illegal_mem) write_log ("Illegal wput at %08lx\n", (long)addr); } -void REGPARAM2 dummy_bput (uaecptr addr, uae_u32 b) +static void dummy_bput(uaecptr addr, uae_u32 b) { if (illegal_mem) write_log ("Illegal bput at %08lx\n", (long)addr); } -int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size) +static int dummy_check(uaecptr addr, uae_u32 size) { - if (illegal_mem) - write_log ("Illegal check at %08lx\n", (long)addr); - return 0; } -uae_u8 REGPARAM2 *dummy_xlate (uaecptr addr) +static uae_u8 *dummy_xlate(uaecptr addr) { write_log("Your Atari program just did something terribly stupid:" " dummy_xlate($%x)\n", addr); @@ -151,66 +167,57 @@ uae_u8 REGPARAM2 *dummy_xlate (uaecptr a /* **** This memory bank only generates bus errors **** */ -uae_u32 REGPARAM2 BusErrMem_lget(uaecptr addr) +static uae_u32 BusErrMem_lget(uaecptr addr) { - if (illegal_mem) - write_log ("Bus error lget at %08lx\n", (long)addr); + print_illegal_counted("Bus error lget", addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_READ, BUS_ERROR_SIZE_LONG, BUS_ERROR_ACCESS_DATA); return 0; } -uae_u32 REGPARAM2 BusErrMem_wget(uaecptr addr) +static uae_u32 BusErrMem_wget(uaecptr addr) { - if (illegal_mem) - write_log ("Bus error wget at %08lx\n", (long)addr); + print_illegal_counted("Bus error wget", addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_READ, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA); return 0; } -uae_u32 REGPARAM2 BusErrMem_bget(uaecptr addr) +static uae_u32 BusErrMem_bget(uaecptr addr) { - if (illegal_mem) - write_log ("Bus error bget at %08lx\n", (long)addr); + print_illegal_counted("Bus error bget", addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_READ, BUS_ERROR_SIZE_BYTE, BUS_ERROR_ACCESS_DATA); return 0; } -void REGPARAM2 BusErrMem_lput(uaecptr addr, uae_u32 l) +static void BusErrMem_lput(uaecptr addr, uae_u32 l) { - if (illegal_mem) - write_log ("Bus error lput at %08lx\n", (long)addr); + print_illegal_counted("Bus error lput", addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_LONG, BUS_ERROR_ACCESS_DATA); } -void REGPARAM2 BusErrMem_wput(uaecptr addr, uae_u32 w) +static void BusErrMem_wput(uaecptr addr, uae_u32 w) { - if (illegal_mem) - write_log ("Bus error wput at %08lx\n", (long)addr); + print_illegal_counted("Bus error wput", addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA); } -void REGPARAM2 BusErrMem_bput(uaecptr addr, uae_u32 b) +static void BusErrMem_bput(uaecptr addr, uae_u32 b) { - if (illegal_mem) - write_log ("Bus error bput at %08lx\n", (long)addr); + print_illegal_counted("Bus error bput", addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_BYTE, BUS_ERROR_ACCESS_DATA); } -int REGPARAM2 BusErrMem_check(uaecptr addr, uae_u32 size) +static int BusErrMem_check(uaecptr addr, uae_u32 size) { - if (illegal_mem) - write_log ("Bus error check at %08lx\n", (long)addr); - return 0; } -uae_u8 REGPARAM2 *BusErrMem_xlate (uaecptr addr) +static uae_u8 *BusErrMem_xlate (uaecptr addr) { write_log("Your Atari program just did something terribly stupid:" " BusErrMem_xlate($%x)\n", addr); @@ -222,70 +229,59 @@ uae_u8 REGPARAM2 *BusErrMem_xlate (uaecp /* **** ST RAM memory **** */ -uae_u8 *STmemory; +/*static uae_u8 *STmemory;*/ +#define STmemory STRam -uae_u32 REGPARAM2 STmem_lget (uaecptr addr) +static uae_u32 STmem_lget(uaecptr addr) { - uae_u32 *m; - addr -= STmem_start & STmem_mask; addr &= STmem_mask; - m = (uae_u32 *)(STmemory + addr); - return do_get_mem_long (m); + return do_get_mem_long(STmemory + addr); } -uae_u32 REGPARAM2 STmem_wget (uaecptr addr) +static uae_u32 STmem_wget(uaecptr addr) { - uae_u16 *m; - addr -= STmem_start & STmem_mask; addr &= STmem_mask; - m = (uae_u16 *)(STmemory + addr); - return do_get_mem_word (m); + return do_get_mem_word(STmemory + addr); } -uae_u32 REGPARAM2 STmem_bget (uaecptr addr) +static uae_u32 STmem_bget(uaecptr addr) { addr -= STmem_start & STmem_mask; addr &= STmem_mask; return STmemory[addr]; } -void REGPARAM2 STmem_lput (uaecptr addr, uae_u32 l) +static void STmem_lput(uaecptr addr, uae_u32 l) { - uae_u32 *m; - addr -= STmem_start & STmem_mask; addr &= STmem_mask; - m = (uae_u32 *)(STmemory + addr); - do_put_mem_long (m, l); + do_put_mem_long(STmemory + addr, l); } -void REGPARAM2 STmem_wput (uaecptr addr, uae_u32 w) +static void STmem_wput(uaecptr addr, uae_u32 w) { - uae_u16 *m; - addr -= STmem_start & STmem_mask; addr &= STmem_mask; - m = (uae_u16 *)(STmemory + addr); - do_put_mem_word (m, w); + do_put_mem_word(STmemory + addr, w); } -void REGPARAM2 STmem_bput (uaecptr addr, uae_u32 b) +static void STmem_bput(uaecptr addr, uae_u32 b) { addr -= STmem_start & STmem_mask; addr &= STmem_mask; STmemory[addr] = b; } -int REGPARAM2 STmem_check (uaecptr addr, uae_u32 size) +static int STmem_check(uaecptr addr, uae_u32 size) { addr -= STmem_start & STmem_mask; addr &= STmem_mask; return (addr + size) <= STmem_size; } -uae_u8 REGPARAM2 *STmem_xlate (uaecptr addr) +static uae_u8 *STmem_xlate(uaecptr addr) { addr -= STmem_start & STmem_mask; addr &= STmem_mask; @@ -300,93 +296,87 @@ uae_u8 REGPARAM2 *STmem_xlate (uaecptr a * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write * protected! */ -uae_u32 REGPARAM2 SysMem_lget(uaecptr addr) +static uae_u32 SysMem_lget(uaecptr addr) { - uae_u32 *m; + addr -= STmem_start & STmem_mask; + addr &= STmem_mask; if(addr < 0x800 && !regs.s) { - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_READ, BUS_ERROR_SIZE_LONG, BUS_ERROR_ACCESS_DATA); return 0; } - addr -= STmem_start & STmem_mask; - addr &= STmem_mask; - m = (uae_u32 *)(STmemory + addr); - return do_get_mem_long (m); + return do_get_mem_long(STmemory + addr); } -uae_u32 REGPARAM2 SysMem_wget(uaecptr addr) +static uae_u32 SysMem_wget(uaecptr addr) { - uae_u16 *m; + addr -= STmem_start & STmem_mask; + addr &= STmem_mask; if(addr < 0x800 && !regs.s) { - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_READ, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA); return 0; } - addr -= STmem_start & STmem_mask; - addr &= STmem_mask; - m = (uae_u16 *)(STmemory + addr); - return do_get_mem_word (m); + return do_get_mem_word(STmemory + addr); } -uae_u32 REGPARAM2 SysMem_bget(uaecptr addr) +static uae_u32 SysMem_bget(uaecptr addr) { + addr -= STmem_start & STmem_mask; + addr &= STmem_mask; + if(addr < 0x800 && !regs.s) { - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_READ, BUS_ERROR_SIZE_BYTE, BUS_ERROR_ACCESS_DATA); return 0; } - addr -= STmem_start & STmem_mask; - addr &= STmem_mask; return STmemory[addr]; } -void REGPARAM2 SysMem_lput(uaecptr addr, uae_u32 l) +static void SysMem_lput(uaecptr addr, uae_u32 l) { - uae_u32 *m; + addr -= STmem_start & STmem_mask; + addr &= STmem_mask; if(addr < 0x8 || (addr < 0x800 && !regs.s)) { - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_LONG, BUS_ERROR_ACCESS_DATA); return; } - addr -= STmem_start & STmem_mask; - addr &= STmem_mask; - m = (uae_u32 *)(STmemory + addr); - do_put_mem_long (m, l); + do_put_mem_long(STmemory + addr, l); } -void REGPARAM2 SysMem_wput(uaecptr addr, uae_u32 w) +static void SysMem_wput(uaecptr addr, uae_u32 w) { - uae_u16 *m; + addr -= STmem_start & STmem_mask; + addr &= STmem_mask; if(addr < 0x8 || (addr < 0x800 && !regs.s)) { - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA); return; } - addr -= STmem_start & STmem_mask; - addr &= STmem_mask; - m = (uae_u16 *)(STmemory + addr); - do_put_mem_word (m, w); + do_put_mem_word(STmemory + addr, w); } -void REGPARAM2 SysMem_bput(uaecptr addr, uae_u32 b) +static void SysMem_bput(uaecptr addr, uae_u32 b) { + addr -= STmem_start & STmem_mask; + addr &= STmem_mask; + if(addr < 0x8 || (addr < 0x800 && !regs.s)) { - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_BYTE, BUS_ERROR_ACCESS_DATA); return; } - addr -= STmem_start & STmem_mask; - addr &= STmem_mask; STmemory[addr] = b; } @@ -395,44 +385,45 @@ void REGPARAM2 SysMem_bput(uaecptr addr, * **** Void memory **** * Between the ST-RAM end and the 4 MB barrier, there is a void memory space: * Reading always returns the same value and writing does nothing at all. + * [NP] : this is not correct, reading does not always return 0, when there's + * no memory, it will return the latest data that was read on the bus. + * In many cases, this will return the word that was just read in the 68000's + * prefetch register to decode the next opcode (tested on a real STF) */ -uae_u32 REGPARAM2 VoidMem_lget(uaecptr addr) +static uae_u32 VoidMem_lget(uaecptr addr) { return 0; } -uae_u32 REGPARAM2 VoidMem_wget(uaecptr addr) +static uae_u32 VoidMem_wget(uaecptr addr) { return 0; } -uae_u32 REGPARAM2 VoidMem_bget(uaecptr addr) +static uae_u32 VoidMem_bget(uaecptr addr) { return 0; } -void REGPARAM2 VoidMem_lput(uaecptr addr, uae_u32 l) +static void VoidMem_lput(uaecptr addr, uae_u32 l) { } -void REGPARAM2 VoidMem_wput(uaecptr addr, uae_u32 w) +static void VoidMem_wput(uaecptr addr, uae_u32 w) { } -void REGPARAM2 VoidMem_bput (uaecptr addr, uae_u32 b) +static void VoidMem_bput (uaecptr addr, uae_u32 b) { } -int REGPARAM2 VoidMem_check(uaecptr addr, uae_u32 size) +static int VoidMem_check(uaecptr addr, uae_u32 size) { - if (illegal_mem) - write_log ("Void memory check at %08lx\n", (long)addr); - return 0; } -uae_u8 REGPARAM2 *VoidMem_xlate (uaecptr addr) +static uae_u8 *VoidMem_xlate (uaecptr addr) { write_log("Your Atari program just did something terribly stupid:" " VoidMem_xlate($%x)\n", addr); @@ -441,77 +432,60 @@ uae_u8 REGPARAM2 *VoidMem_xlate (uaecptr } -/* **** TT fast memory (not yet supported) **** */ - -static uae_u8 *TTmemory; +/* **** TT fast memory **** */ -static uae_u32 TTmem_lget (uaecptr) REGPARAM; -static uae_u32 TTmem_wget (uaecptr) REGPARAM; -static uae_u32 TTmem_bget (uaecptr) REGPARAM; -static void TTmem_lput (uaecptr, uae_u32) REGPARAM; -static void TTmem_wput (uaecptr, uae_u32) REGPARAM; -static void TTmem_bput (uaecptr, uae_u32) REGPARAM; -static int TTmem_check (uaecptr addr, uae_u32 size) REGPARAM; -static uae_u8 *TTmem_xlate (uaecptr addr) REGPARAM; +uae_u8 *TTmemory; -uae_u32 REGPARAM2 TTmem_lget (uaecptr addr) +static uae_u32 TTmem_lget(uaecptr addr) { - uae_u32 *m; addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; - m = (uae_u32 *)(TTmemory + addr); - return do_get_mem_long (m); + return do_get_mem_long(TTmemory + addr); } -uae_u32 REGPARAM2 TTmem_wget (uaecptr addr) +static uae_u32 TTmem_wget(uaecptr addr) { - uae_u16 *m; addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; - m = (uae_u16 *)(TTmemory + addr); - return do_get_mem_word (m); + return do_get_mem_word(TTmemory + addr); } -uae_u32 REGPARAM2 TTmem_bget (uaecptr addr) +static uae_u32 TTmem_bget(uaecptr addr) { addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; return TTmemory[addr]; } -void REGPARAM2 TTmem_lput (uaecptr addr, uae_u32 l) +static void TTmem_lput(uaecptr addr, uae_u32 l) { - uae_u32 *m; addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; - m = (uae_u32 *)(TTmemory + addr); - do_put_mem_long (m, l); + do_put_mem_long(TTmemory + addr, l); } -void REGPARAM2 TTmem_wput (uaecptr addr, uae_u32 w) +static void TTmem_wput(uaecptr addr, uae_u32 w) { - uae_u16 *m; addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; - m = (uae_u16 *)(TTmemory + addr); - do_put_mem_word (m, w); + do_put_mem_word(TTmemory + addr, w); } -void REGPARAM2 TTmem_bput (uaecptr addr, uae_u32 b) +static void TTmem_bput(uaecptr addr, uae_u32 b) { addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; TTmemory[addr] = b; } -int REGPARAM2 TTmem_check (uaecptr addr, uae_u32 size) +static int TTmem_check(uaecptr addr, uae_u32 size) { addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; return (addr + size) <= TTmem_size; } -uae_u8 REGPARAM2 *TTmem_xlate(uaecptr addr) +static uae_u8 *TTmem_xlate(uaecptr addr) { addr -= TTmem_start & TTmem_mask; addr &= TTmem_mask; @@ -523,72 +497,56 @@ uae_u8 REGPARAM2 *TTmem_xlate(uaecptr ad uae_u8 *ROMmemory; -static uae_u32 ROMmem_lget (uaecptr) REGPARAM; -static uae_u32 ROMmem_wget (uaecptr) REGPARAM; -static uae_u32 ROMmem_bget (uaecptr) REGPARAM; -static void ROMmem_lput (uaecptr, uae_u32) REGPARAM; -static void ROMmem_wput (uaecptr, uae_u32) REGPARAM; -static void ROMmem_bput (uaecptr, uae_u32) REGPARAM; -static int ROMmem_check (uaecptr addr, uae_u32 size) REGPARAM; -static uae_u8 *ROMmem_xlate (uaecptr addr) REGPARAM; - -uae_u32 REGPARAM2 ROMmem_lget (uaecptr addr) +static uae_u32 ROMmem_lget(uaecptr addr) { - uae_u32 *m; addr -= ROMmem_start & ROMmem_mask; addr &= ROMmem_mask; - m = (uae_u32 *)(ROMmemory + addr); - return do_get_mem_long (m); + return do_get_mem_long(ROMmemory + addr); } -uae_u32 REGPARAM2 ROMmem_wget (uaecptr addr) +static uae_u32 ROMmem_wget(uaecptr addr) { - uae_u16 *m; addr -= ROMmem_start & ROMmem_mask; addr &= ROMmem_mask; - m = (uae_u16 *)(ROMmemory + addr); - return do_get_mem_word (m); + return do_get_mem_word(ROMmemory + addr); } -uae_u32 REGPARAM2 ROMmem_bget (uaecptr addr) +static uae_u32 ROMmem_bget(uaecptr addr) { addr -= ROMmem_start & ROMmem_mask; addr &= ROMmem_mask; return ROMmemory[addr]; } -void REGPARAM2 ROMmem_lput (uaecptr addr, uae_u32 b) +static void ROMmem_lput(uaecptr addr, uae_u32 b) { - if (illegal_mem) - write_log ("Illegal ROMmem lput at %08lx\n", (long)addr); + print_illegal_counted("Illegal ROMmem lput", (long)addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_LONG, BUS_ERROR_ACCESS_DATA); } -void REGPARAM2 ROMmem_wput (uaecptr addr, uae_u32 b) +static void ROMmem_wput(uaecptr addr, uae_u32 b) { - if (illegal_mem) - write_log ("Illegal ROMmem wput at %08lx\n", (long)addr); + print_illegal_counted("Illegal ROMmem wput", (long)addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_WORD, BUS_ERROR_ACCESS_DATA); } -void REGPARAM2 ROMmem_bput (uaecptr addr, uae_u32 b) +static void ROMmem_bput(uaecptr addr, uae_u32 b) { - if (illegal_mem) - write_log ("Illegal ROMmem bput at %08lx\n", (long)addr); + print_illegal_counted("Illegal ROMmem bput", (long)addr); - M68000_BusError(addr); + M68000_BusError(addr, BUS_ERROR_WRITE, BUS_ERROR_SIZE_BYTE, BUS_ERROR_ACCESS_DATA); } -int REGPARAM2 ROMmem_check (uaecptr addr, uae_u32 size) +static int ROMmem_check(uaecptr addr, uae_u32 size) { addr -= ROMmem_start & ROMmem_mask; addr &= ROMmem_mask; return (addr + size) <= ROMmem_size; } -uae_u8 REGPARAM2 *ROMmem_xlate (uaecptr addr) +static uae_u8 *ROMmem_xlate(uaecptr addr) { addr -= ROMmem_start & ROMmem_mask; addr &= ROMmem_mask; @@ -596,22 +554,39 @@ uae_u8 REGPARAM2 *ROMmem_xlate (uaecptr } +/* IDE controller IO memory */ +/* see also ide.c */ + +static uae_u8 *IdeMemory; + +static int IdeMem_check(uaecptr addr, uae_u32 size) +{ + addr -= IdeMem_start; + addr &= IdeMem_mask; + return (addr + size) <= IdeMem_size; +} + +static uae_u8 *IdeMem_xlate(uaecptr addr) +{ + addr -= IdeMem_start; + addr &= IdeMem_mask; + return IdeMemory + addr; +} + + /* Hardware IO memory */ -/* see also intercept.c */ +/* see also ioMem.c */ uae_u8 *IOmemory; -static int IOmem_check (uaecptr addr, uae_u32 size) REGPARAM; -static uae_u8 *IOmem_xlate (uaecptr addr) REGPARAM; - -int REGPARAM2 IOmem_check (uaecptr addr, uae_u32 size) +static int IOmem_check(uaecptr addr, uae_u32 size) { addr -= IOmem_start; addr &= IOmem_mask; return (addr + size) <= IOmem_size; } -uae_u8 REGPARAM2 *IOmem_xlate (uaecptr addr) +static uae_u8 *IOmem_xlate(uaecptr addr) { addr -= IOmem_start; addr &= IOmem_mask; @@ -622,57 +597,69 @@ uae_u8 REGPARAM2 *IOmem_xlate (uaecptr a /* **** Address banks **** */ -addrbank dummy_bank = { +static addrbank dummy_bank = +{ dummy_lget, dummy_wget, dummy_bget, dummy_lput, dummy_wput, dummy_bput, - dummy_xlate, dummy_check + dummy_xlate, dummy_check, NULL, ABFLAG_NONE }; -addrbank BusErrMem_bank = { +static addrbank BusErrMem_bank = +{ BusErrMem_lget, BusErrMem_wget, BusErrMem_bget, BusErrMem_lput, BusErrMem_wput, BusErrMem_bput, - BusErrMem_xlate, BusErrMem_check + BusErrMem_xlate, BusErrMem_check, NULL, ABFLAG_NONE }; -addrbank STmem_bank = { +static addrbank STmem_bank = +{ STmem_lget, STmem_wget, STmem_bget, STmem_lput, STmem_wput, STmem_bput, - STmem_xlate, STmem_check + STmem_xlate, STmem_check, NULL, ABFLAG_RAM }; -addrbank SysMem_bank = { +static addrbank SysMem_bank = +{ SysMem_lget, SysMem_wget, SysMem_bget, SysMem_lput, SysMem_wput, SysMem_bput, - STmem_xlate, STmem_check + STmem_xlate, STmem_check, NULL, ABFLAG_RAM }; -addrbank VoidMem_bank = { +static addrbank VoidMem_bank = +{ VoidMem_lget, VoidMem_wget, VoidMem_bget, VoidMem_lput, VoidMem_wput, VoidMem_bput, - VoidMem_xlate, VoidMem_check + VoidMem_xlate, VoidMem_check , NULL, ABFLAG_NONE }; -addrbank TTmem_bank = { +static addrbank TTmem_bank = +{ TTmem_lget, TTmem_wget, TTmem_bget, TTmem_lput, TTmem_wput, TTmem_bput, - TTmem_xlate, TTmem_check + TTmem_xlate, TTmem_check, NULL, ABFLAG_RAM }; -addrbank ROMmem_bank = { +static addrbank ROMmem_bank = +{ ROMmem_lget, ROMmem_wget, ROMmem_bget, ROMmem_lput, ROMmem_wput, ROMmem_bput, - ROMmem_xlate, ROMmem_check + ROMmem_xlate, ROMmem_check, NULL, ABFLAG_ROM }; -addrbank IOmem_bank = { - Intercept_ReadLong, Intercept_ReadWord, Intercept_ReadByte, - Intercept_WriteLong, Intercept_WriteWord, Intercept_WriteByte, - IOmem_xlate, IOmem_check +static addrbank IdeMem_bank = +{ + Ide_Mem_lget, Ide_Mem_wget, Ide_Mem_bget, + Ide_Mem_lput, Ide_Mem_wput, Ide_Mem_bput, + IdeMem_xlate, IdeMem_check, NULL, ABFLAG_IO }; +static addrbank IOmem_bank = +{ + IoMem_lget, IoMem_wget, IoMem_bget, + IoMem_lput, IoMem_wput, IoMem_bput, + IOmem_xlate, IOmem_check, NULL, ABFLAG_IO +}; -char *address_space, *good_address_map; -int good_address_fd; static void init_mem_banks (void) @@ -684,56 +671,128 @@ static void init_mem_banks (void) /* + * Check if an address points to a memory region that causes bus error + * Returns true if region gives bus error + */ +bool memory_region_bus_error ( uaecptr addr ) +{ + return mem_banks[bankindex(addr)] == &BusErrMem_bank; +} + + +/* * Initialize the memory banks */ -void memory_init(uae_u32 f_STMemSize, uae_u32 f_TTMemSize, uae_u32 f_RomMemStart) +void memory_init(uae_u32 nNewSTMemSize, uae_u32 nNewTTMemSize, uae_u32 nNewRomMemStart) { - STmem_size = (f_STMemSize + 65535) & 0xFFFF0000; - TTmem_size = (f_TTMemSize + 65535) & 0xFFFF0000; + STmem_size = (nNewSTMemSize + 65535) & 0xFFFF0000; + TTmem_size = (nNewTTMemSize + 65535) & 0xFFFF0000; /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n", - STmem_size, TTmem_size, f_RomMemStart);*/ + STmem_size, TTmem_size, nNewRomMemStart);*/ - STmemory = STRam; - ROMmemory = STRam + ROMmem_start; - IOmemory = STRam + IOmem_start; -/* - while (! STmemory && STmem_size > 512*1024) { +#if ENABLE_SMALL_MEM + + /* Allocate memory for ROM areas, IDE and IO memory space (0xE00000 - 0xFFFFFF) */ + ROMmemory = malloc(2*1024*1024); + if (!ROMmemory) { + fprintf(stderr, "Out of memory (ROM/IO mem)!\n"); + SDL_Quit(); + exit(1); + } + IdeMemory = ROMmemory + 0x100000; + IOmemory = ROMmemory + 0x1f0000; + + /* Allocate memory for normal ST RAM */ + STmemory = malloc(STmem_size); + while (!STmemory && STmem_size > 512*1024) { STmem_size >>= 1; STmemory = (uae_u8 *)malloc (STmem_size); if (STmemory) - fprintf (stderr, "Reducing STmem size to %dkb\n", STmem_size >> 10); + write_log ("Reducing STmem size to %dkb\n", STmem_size >> 10); } - if (! STmemory) { + if (!STmemory) { write_log ("virtual memory exhausted (STmemory)!\n"); - abort (); + SDL_Quit(); + exit(1); } -*/ + +#else + + /* STmemory points to the 16 MiB STRam array, we just have to set up + * the remaining pointers here: */ + ROMmemory = STRam + ROMmem_start; + IdeMemory = STRam + IdeMem_start; + IOmemory = STRam + IOmem_start; + +#endif init_mem_banks(); - /* Map the ST RAM: */ + /* Set the infos about memory pointers for each mem bank, used for direct memory access in stMemory.c */ + STmem_bank.baseaddr = STmemory; + STmem_bank.mask = STmem_mask; + STmem_bank.start = STmem_start; + + SysMem_bank.baseaddr = STmemory; + SysMem_bank.mask = STmem_mask; + SysMem_bank.start = STmem_start; + + dummy_bank.baseaddr = NULL; /* No real memory allocated for this region */ + VoidMem_bank.baseaddr = NULL; /* No real memory allocated for this region */ + BusErrMem_bank.baseaddr = NULL; /* No real memory allocated for this region */ + + + /* Map the ST system RAM: */ map_banks(&SysMem_bank, 0x00, 1); - map_banks(&VoidMem_bank, 0x08, 0x38); /* Between STRamEnd and 4MB barrier, there is void space! */ + /* Between STRamEnd and 4MB barrier, there is void space: */ + map_banks(&VoidMem_bank, 0x08, 0x38); + /* Space between 4MB barrier and TOS ROM causes a bus error: */ + map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0); + /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */ map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1); - /* TT memory isn't really supported yet */ - if (TTmem_size > 0) - TTmemory = (uae_u8 *)malloc (TTmem_size); - if (TTmemory != 0) - map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16); - else - TTmem_size = 0; - TTmem_mask = TTmem_size - 1; + + /* Handle extra RAM on TT and Falcon starting at 0x1000000 and up to 0x80000000 */ + /* This requires the CPU to use 32 bit addressing */ + /* NOTE : code backported from cpu/memory.c, but as bAddressSpace24 is always true with old */ + /* UAE's core, TT RAM is not supported at the moment */ + TTmemory = NULL; + if ( ConfigureParams.System.bAddressSpace24 == false ) + { + /* If there's no extra RAM on a TT, region 0x01000000 - 0x80000000 (2047 MB) must return bus errors */ + if ( ConfigureParams.System.nMachineType == MACHINE_TT ) + map_banks ( &BusErrMem_bank, TTmem_start >> 16, ( TTmem_end - TTmem_start ) >> 16 ); + + if ( TTmem_size > 0 ) + { + TTmemory = (uae_u8 *)malloc ( TTmem_size ); + + if ( TTmemory != NULL ) + { + map_banks ( &TTmem_bank, TTmem_start >> 16, TTmem_size >> 16 ); + TTmem_mask = 0xffffffff; + TTmem_bank.baseaddr = TTmemory; + TTmem_bank.mask = TTmem_mask; + TTmem_bank.start = TTmem_start; + } + else + { + write_log ("can't allocate %d MB for TT RAM\n" , TTmem_size / ( 1024*1024 ) ); + TTmem_size = 0; + } + } + } + /* ROM memory: */ /* Depending on which ROM version we are using, the other ROM region is illegal! */ - if(f_RomMemStart == 0xFC0000) + if(nNewRomMemStart == 0xFC0000) { map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3); map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10); } - else if(f_RomMemStart == 0xE00000) + else if(nNewRomMemStart == 0xE00000) { map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10); map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3); @@ -745,13 +804,26 @@ void memory_init(uae_u32 f_STMemSize, ua /* Cartridge memory: */ map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2); + ROMmem_bank.baseaddr = ROMmemory; + ROMmem_bank.mask = ROMmem_mask; + ROMmem_bank.start = ROMmem_start; /* IO memory: */ map_banks(&IOmem_bank, IOmem_start>>16, 0x1); + IOmem_bank.baseaddr = IOmemory; + IOmem_bank.mask = IOmem_mask; + IOmem_bank.start = IOmem_start; + + /* IDE controller memory region: */ + map_banks(&IdeMem_bank, IdeMem_start >> 16, 0x1); /* IDE controller on the Falcon */ + IdeMem_bank.baseaddr = IdeMemory; + IdeMem_bank.mask = IdeMem_mask; + IdeMem_bank.start = IdeMem_start ; /* Illegal memory regions cause a bus error on the ST: */ - map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0); /* Space between 4MB barrier and TOS ROM */ - map_banks(&BusErrMem_bank, 0xF00000 >> 16, 0xA); /* IDE controler on the Falcon */ + map_banks(&BusErrMem_bank, 0xF10000 >> 16, 0x9); + + illegal_count = 50; } @@ -761,11 +833,24 @@ void memory_init(uae_u32 f_STMemSize, ua void memory_uninit (void) { /* Here, we free allocated memory from memory_init */ - if(TTmem_size > 0) - { - free(TTmemory); - TTmemory = NULL; + if (TTmem_size > 0) { + free(TTmemory); + TTmemory = NULL; } + +#if ENABLE_SMALL_MEM + + if (STmemory) { + free(STmemory); + STmemory = NULL; + } + + if (ROMmemory) { + free(ROMmemory); + ROMmemory = NULL; + } + +#endif /* ENABLE_SMALL_MEM */ } @@ -780,7 +865,7 @@ void map_banks (addrbank *bank, int star return; } /* Some ROMs apparently require a 24 bit address space... */ - if (address_space_24) + if (currprefs.address_space_24) endhioffs = 0x10000; for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100) for (bnr = start; bnr < start+size; bnr++)