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1.1 root 1: /*
1.1.1.4 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * Memory management
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
1.1.1.4 root 9: *
10: * This file is distributed under the GNU Public License, version 2 or at
11: * your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.10! root 13: const char Memory_rcsid[] = "Hatari $Id: memory.c,v 1.24 2007/12/30 20:02:04 thothy Exp $";
1.1 root 14:
1.1.1.10! root 15: #include "config.h"
1.1 root 16: #include "sysdeps.h"
17: #include "hatari-glue.h"
18: #include "maccess.h"
19: #include "memory.h"
1.1.1.4 root 20: #include "../includes/main.h"
1.1 root 21: #include "../includes/tos.h"
1.1.1.10! root 22: #include "../includes/ide.h"
1.1.1.7 root 23: #include "../includes/ioMem.h"
1.1.1.3 root 24: #include "../includes/reset.h"
1.1.1.6 root 25: #include "../includes/stMemory.h"
1.1.1.5 root 26: #include "../includes/m68000.h"
27: #include "newcpu.h"
1.1 root 28:
29:
1.1.1.10! root 30: /* Set illegal_mem to 1 for debug output: */
! 31: #define illegal_mem 1
! 32:
! 33:
1.1.1.6 root 34: static uae_u32 STmem_size, TTmem_size = 0;
35: static uae_u32 TTmem_mask;
1.1 root 36:
1.1.1.5 root 37: #define STmem_start 0x00000000
38: #define ROMmem_start 0x00E00000
1.1.1.10! root 39: #define IdeMem_start 0x00F00000
1.1.1.5 root 40: #define IOmem_start 0x00FF0000
41: #define TTmem_start 0x01000000
1.1 root 42:
1.1.1.10! root 43: #define IdeMem_size 65536
1.1.1.5 root 44: #define IOmem_size 65536
45: #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */
1.1 root 46:
1.1.1.5 root 47: #define STmem_mask 0x00ffffff
48: #define ROMmem_mask 0x00ffffff
1.1.1.10! root 49: #define IdeMem_mask (IdeMem_size - 1)
1.1.1.5 root 50: #define IOmem_mask (IOmem_size - 1)
1.1 root 51:
52:
53: #ifdef SAVE_MEMORY_BANKS
54: addrbank *mem_banks[65536];
55: #else
56: addrbank mem_banks[65536];
57: #endif
58:
59: #ifdef NO_INLINE_MEMORY_ACCESS
60: __inline__ uae_u32 longget (uaecptr addr)
61: {
62: return call_mem_get_func (get_mem_bank (addr).lget, addr);
63: }
64: __inline__ uae_u32 wordget (uaecptr addr)
65: {
66: return call_mem_get_func (get_mem_bank (addr).wget, addr);
67: }
68: __inline__ uae_u32 byteget (uaecptr addr)
69: {
70: return call_mem_get_func (get_mem_bank (addr).bget, addr);
71: }
72: __inline__ void longput (uaecptr addr, uae_u32 l)
73: {
74: call_mem_put_func (get_mem_bank (addr).lput, addr, l);
75: }
76: __inline__ void wordput (uaecptr addr, uae_u32 w)
77: {
78: call_mem_put_func (get_mem_bank (addr).wput, addr, w);
79: }
80: __inline__ void byteput (uaecptr addr, uae_u32 b)
81: {
82: call_mem_put_func (get_mem_bank (addr).bput, addr, b);
83: }
84: #endif
85:
86:
1.1.1.5 root 87: /* Some prototypes: */
88: static int STmem_check (uaecptr addr, uae_u32 size) REGPARAM;
89: static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM;
90:
91:
1.1 root 92: /* A dummy bank that only contains zeros */
93:
1.1.1.6 root 94: static uae_u32 dummy_lget(uaecptr addr)
1.1 root 95: {
96: if (illegal_mem)
1.1.1.3 root 97: write_log ("Illegal lget at %08lx\n", (long)addr);
1.1 root 98:
99: return 0;
100: }
101:
1.1.1.6 root 102: static uae_u32 dummy_wget(uaecptr addr)
1.1 root 103: {
104: if (illegal_mem)
1.1.1.3 root 105: write_log ("Illegal wget at %08lx\n", (long)addr);
1.1 root 106:
107: return 0;
108: }
109:
1.1.1.6 root 110: static uae_u32 dummy_bget(uaecptr addr)
1.1 root 111: {
112: if (illegal_mem)
1.1.1.3 root 113: write_log ("Illegal bget at %08lx\n", (long)addr);
1.1 root 114:
115: return 0;
116: }
117:
1.1.1.6 root 118: static void dummy_lput(uaecptr addr, uae_u32 l)
1.1 root 119: {
120: if (illegal_mem)
1.1.1.3 root 121: write_log ("Illegal lput at %08lx\n", (long)addr);
1.1 root 122: }
1.1.1.5 root 123:
1.1.1.6 root 124: static void dummy_wput(uaecptr addr, uae_u32 w)
1.1 root 125: {
126: if (illegal_mem)
1.1.1.3 root 127: write_log ("Illegal wput at %08lx\n", (long)addr);
1.1 root 128: }
1.1.1.5 root 129:
1.1.1.6 root 130: static void dummy_bput(uaecptr addr, uae_u32 b)
1.1 root 131: {
132: if (illegal_mem)
1.1.1.3 root 133: write_log ("Illegal bput at %08lx\n", (long)addr);
1.1 root 134: }
135:
1.1.1.6 root 136: static int dummy_check(uaecptr addr, uae_u32 size)
1.1 root 137: {
138: if (illegal_mem)
1.1.1.3 root 139: write_log ("Illegal check at %08lx\n", (long)addr);
1.1 root 140:
141: return 0;
142: }
143:
1.1.1.6 root 144: static uae_u8 *dummy_xlate(uaecptr addr)
1.1.1.5 root 145: {
146: write_log("Your Atari program just did something terribly stupid:"
147: " dummy_xlate($%x)\n", addr);
148: /*Reset_Warm();*/
149: return STmem_xlate(addr); /* So we don't crash. */
150: }
1.1 root 151:
152:
1.1.1.5 root 153: /* **** This memory bank only generates bus errors **** */
1.1 root 154:
1.1.1.6 root 155: static uae_u32 BusErrMem_lget(uaecptr addr)
1.1.1.5 root 156: {
157: if (illegal_mem)
158: write_log ("Bus error lget at %08lx\n", (long)addr);
159:
1.1.1.6 root 160: M68000_BusError(addr, 1);
1.1.1.5 root 161: return 0;
162: }
163:
1.1.1.6 root 164: static uae_u32 BusErrMem_wget(uaecptr addr)
1.1.1.5 root 165: {
166: if (illegal_mem)
167: write_log ("Bus error wget at %08lx\n", (long)addr);
168:
1.1.1.6 root 169: M68000_BusError(addr, 1);
1.1.1.5 root 170: return 0;
171: }
172:
1.1.1.6 root 173: static uae_u32 BusErrMem_bget(uaecptr addr)
1.1.1.5 root 174: {
175: if (illegal_mem)
176: write_log ("Bus error bget at %08lx\n", (long)addr);
177:
1.1.1.6 root 178: M68000_BusError(addr, 1);
1.1.1.5 root 179: return 0;
180: }
181:
1.1.1.6 root 182: static void BusErrMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 183: {
184: if (illegal_mem)
185: write_log ("Bus error lput at %08lx\n", (long)addr);
186:
1.1.1.6 root 187: M68000_BusError(addr, 0);
1.1.1.5 root 188: }
189:
1.1.1.6 root 190: static void BusErrMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 191: {
192: if (illegal_mem)
193: write_log ("Bus error wput at %08lx\n", (long)addr);
194:
1.1.1.6 root 195: M68000_BusError(addr, 0);
1.1.1.5 root 196: }
197:
1.1.1.6 root 198: static void BusErrMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 199: {
200: if (illegal_mem)
201: write_log ("Bus error bput at %08lx\n", (long)addr);
202:
1.1.1.6 root 203: M68000_BusError(addr, 0);
1.1.1.5 root 204: }
205:
1.1.1.6 root 206: static int BusErrMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 207: {
208: if (illegal_mem)
209: write_log ("Bus error check at %08lx\n", (long)addr);
210:
211: return 0;
212: }
213:
1.1.1.6 root 214: static uae_u8 *BusErrMem_xlate (uaecptr addr)
1.1.1.5 root 215: {
216: write_log("Your Atari program just did something terribly stupid:"
217: " BusErrMem_xlate($%x)\n", addr);
218:
219: /*M68000_BusError(addr);*/
220: return STmem_xlate(addr); /* So we don't crash. */
221: }
222:
223:
224: /* **** ST RAM memory **** */
225:
1.1.1.9 root 226: /*static uae_u8 *STmemory;*/
227: #define STmemory STRam
1.1 root 228:
1.1.1.6 root 229: static uae_u32 STmem_lget(uaecptr addr)
1.1 root 230: {
231: addr -= STmem_start & STmem_mask;
232: addr &= STmem_mask;
1.1.1.7 root 233: return do_get_mem_long(STmemory + addr);
1.1 root 234: }
235:
1.1.1.6 root 236: static uae_u32 STmem_wget(uaecptr addr)
1.1 root 237: {
238: addr -= STmem_start & STmem_mask;
239: addr &= STmem_mask;
1.1.1.7 root 240: return do_get_mem_word(STmemory + addr);
1.1 root 241: }
242:
1.1.1.6 root 243: static uae_u32 STmem_bget(uaecptr addr)
1.1 root 244: {
245: addr -= STmem_start & STmem_mask;
246: addr &= STmem_mask;
247: return STmemory[addr];
248: }
249:
1.1.1.6 root 250: static void STmem_lput(uaecptr addr, uae_u32 l)
1.1 root 251: {
252: addr -= STmem_start & STmem_mask;
253: addr &= STmem_mask;
1.1.1.7 root 254: do_put_mem_long(STmemory + addr, l);
1.1 root 255: }
256:
1.1.1.6 root 257: static void STmem_wput(uaecptr addr, uae_u32 w)
1.1 root 258: {
259: addr -= STmem_start & STmem_mask;
260: addr &= STmem_mask;
1.1.1.7 root 261: do_put_mem_word(STmemory + addr, w);
1.1 root 262: }
263:
1.1.1.6 root 264: static void STmem_bput(uaecptr addr, uae_u32 b)
1.1 root 265: {
266: addr -= STmem_start & STmem_mask;
267: addr &= STmem_mask;
268: STmemory[addr] = b;
269: }
270:
1.1.1.6 root 271: static int STmem_check(uaecptr addr, uae_u32 size)
1.1 root 272: {
273: addr -= STmem_start & STmem_mask;
274: addr &= STmem_mask;
1.1.1.5 root 275: return (addr + size) <= STmem_size;
1.1 root 276: }
277:
1.1.1.6 root 278: static uae_u8 *STmem_xlate(uaecptr addr)
1.1 root 279: {
280: addr -= STmem_start & STmem_mask;
281: addr &= STmem_mask;
282: return STmemory + addr;
283: }
284:
285:
1.1.1.5 root 286: /*
287: * **** ST RAM system memory ****
288: * We need a separate mem bank for this region since the first 0x800 bytes on
289: * the ST can only be accessed in supervisor mode. Note that the very first
290: * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write
291: * protected!
292: */
1.1.1.6 root 293: static uae_u32 SysMem_lget(uaecptr addr)
1.1.1.5 root 294: {
295: if(addr < 0x800 && !regs.s)
296: {
1.1.1.6 root 297: M68000_BusError(addr, 1);
1.1.1.5 root 298: return 0;
299: }
300:
301: addr -= STmem_start & STmem_mask;
302: addr &= STmem_mask;
1.1.1.7 root 303:
304: return do_get_mem_long(STmemory + addr);
1.1.1.5 root 305: }
306:
1.1.1.6 root 307: static uae_u32 SysMem_wget(uaecptr addr)
1.1.1.5 root 308: {
309: if(addr < 0x800 && !regs.s)
310: {
1.1.1.6 root 311: M68000_BusError(addr, 1);
1.1.1.5 root 312: return 0;
313: }
314:
315: addr -= STmem_start & STmem_mask;
316: addr &= STmem_mask;
1.1.1.7 root 317:
318: return do_get_mem_word(STmemory + addr);
1.1.1.5 root 319: }
320:
1.1.1.6 root 321: static uae_u32 SysMem_bget(uaecptr addr)
1.1.1.5 root 322: {
323: if(addr < 0x800 && !regs.s)
324: {
1.1.1.6 root 325: M68000_BusError(addr, 1);
1.1.1.5 root 326: return 0;
327: }
328:
329: addr -= STmem_start & STmem_mask;
330: addr &= STmem_mask;
331: return STmemory[addr];
332: }
333:
1.1.1.6 root 334: static void SysMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 335: {
336: if(addr < 0x8 || (addr < 0x800 && !regs.s))
337: {
1.1.1.6 root 338: M68000_BusError(addr, 0);
1.1.1.5 root 339: return;
340: }
341:
342: addr -= STmem_start & STmem_mask;
343: addr &= STmem_mask;
1.1.1.7 root 344:
345: do_put_mem_long(STmemory + addr, l);
1.1.1.5 root 346: }
347:
1.1.1.6 root 348: static void SysMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 349: {
350: if(addr < 0x8 || (addr < 0x800 && !regs.s))
351: {
1.1.1.6 root 352: M68000_BusError(addr, 0);
1.1.1.5 root 353: return;
354: }
355:
356: addr -= STmem_start & STmem_mask;
357: addr &= STmem_mask;
1.1.1.7 root 358:
359: do_put_mem_word(STmemory + addr, w);
1.1.1.5 root 360: }
361:
1.1.1.6 root 362: static void SysMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 363: {
364: if(addr < 0x8 || (addr < 0x800 && !regs.s))
365: {
1.1.1.6 root 366: M68000_BusError(addr, 0);
1.1.1.5 root 367: return;
368: }
369:
370: addr -= STmem_start & STmem_mask;
371: addr &= STmem_mask;
372: STmemory[addr] = b;
373: }
374:
375:
376: /*
377: * **** Void memory ****
378: * Between the ST-RAM end and the 4 MB barrier, there is a void memory space:
379: * Reading always returns the same value and writing does nothing at all.
380: */
381:
1.1.1.6 root 382: static uae_u32 VoidMem_lget(uaecptr addr)
1.1.1.5 root 383: {
384: return 0;
385: }
386:
1.1.1.6 root 387: static uae_u32 VoidMem_wget(uaecptr addr)
1.1.1.5 root 388: {
389: return 0;
390: }
391:
1.1.1.6 root 392: static uae_u32 VoidMem_bget(uaecptr addr)
1.1.1.5 root 393: {
394: return 0;
395: }
396:
1.1.1.6 root 397: static void VoidMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 398: {
399: }
400:
1.1.1.6 root 401: static void VoidMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 402: {
403: }
404:
1.1.1.6 root 405: static void VoidMem_bput (uaecptr addr, uae_u32 b)
1.1.1.5 root 406: {
407: }
408:
1.1.1.6 root 409: static int VoidMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 410: {
411: if (illegal_mem)
412: write_log ("Void memory check at %08lx\n", (long)addr);
413:
414: return 0;
415: }
416:
1.1.1.6 root 417: static uae_u8 *VoidMem_xlate (uaecptr addr)
1.1.1.5 root 418: {
419: write_log("Your Atari program just did something terribly stupid:"
420: " VoidMem_xlate($%x)\n", addr);
421:
422: return STmem_xlate(addr); /* So we don't crash. */
423: }
424:
425:
426: /* **** TT fast memory (not yet supported) **** */
1.1 root 427:
428: static uae_u8 *TTmemory;
429:
1.1.1.6 root 430: static uae_u32 TTmem_lget(uaecptr addr)
1.1 root 431: {
432: addr -= TTmem_start & TTmem_mask;
433: addr &= TTmem_mask;
1.1.1.7 root 434: return do_get_mem_long(TTmemory + addr);
1.1 root 435: }
436:
1.1.1.6 root 437: static uae_u32 TTmem_wget(uaecptr addr)
1.1 root 438: {
439: addr -= TTmem_start & TTmem_mask;
440: addr &= TTmem_mask;
1.1.1.7 root 441: return do_get_mem_word(TTmemory + addr);
1.1 root 442: }
443:
1.1.1.6 root 444: static uae_u32 TTmem_bget(uaecptr addr)
1.1 root 445: {
446: addr -= TTmem_start & TTmem_mask;
447: addr &= TTmem_mask;
448: return TTmemory[addr];
449: }
450:
1.1.1.6 root 451: static void TTmem_lput(uaecptr addr, uae_u32 l)
1.1 root 452: {
453: addr -= TTmem_start & TTmem_mask;
454: addr &= TTmem_mask;
1.1.1.7 root 455: do_put_mem_long(TTmemory + addr, l);
1.1 root 456: }
457:
1.1.1.6 root 458: static void TTmem_wput(uaecptr addr, uae_u32 w)
1.1 root 459: {
460: addr -= TTmem_start & TTmem_mask;
461: addr &= TTmem_mask;
1.1.1.7 root 462: do_put_mem_word(TTmemory + addr, w);
1.1 root 463: }
464:
1.1.1.6 root 465: static void TTmem_bput(uaecptr addr, uae_u32 b)
1.1 root 466: {
467: addr -= TTmem_start & TTmem_mask;
468: addr &= TTmem_mask;
469: TTmemory[addr] = b;
470: }
471:
1.1.1.6 root 472: static int TTmem_check(uaecptr addr, uae_u32 size)
1.1 root 473: {
474: addr -= TTmem_start & TTmem_mask;
475: addr &= TTmem_mask;
1.1.1.5 root 476: return (addr + size) <= TTmem_size;
1.1 root 477: }
478:
1.1.1.6 root 479: static uae_u8 *TTmem_xlate(uaecptr addr)
1.1 root 480: {
481: addr -= TTmem_start & TTmem_mask;
482: addr &= TTmem_mask;
483: return TTmemory + addr;
484: }
485:
1.1.1.5 root 486:
487: /* **** ROM memory **** */
1.1 root 488:
1.1.1.10! root 489: uae_u8 *ROMmemory;
1.1 root 490:
1.1.1.6 root 491: static uae_u32 ROMmem_lget(uaecptr addr)
1.1 root 492: {
493: addr -= ROMmem_start & ROMmem_mask;
494: addr &= ROMmem_mask;
1.1.1.7 root 495: return do_get_mem_long(ROMmemory + addr);
1.1 root 496: }
497:
1.1.1.6 root 498: static uae_u32 ROMmem_wget(uaecptr addr)
1.1 root 499: {
500: addr -= ROMmem_start & ROMmem_mask;
501: addr &= ROMmem_mask;
1.1.1.7 root 502: return do_get_mem_word(ROMmemory + addr);
1.1 root 503: }
504:
1.1.1.6 root 505: static uae_u32 ROMmem_bget(uaecptr addr)
1.1 root 506: {
507: addr -= ROMmem_start & ROMmem_mask;
508: addr &= ROMmem_mask;
509: return ROMmemory[addr];
510: }
511:
1.1.1.6 root 512: static void ROMmem_lput(uaecptr addr, uae_u32 b)
1.1 root 513: {
514: if (illegal_mem)
1.1.1.3 root 515: write_log ("Illegal ROMmem lput at %08lx\n", (long)addr);
1.1.1.5 root 516:
1.1.1.6 root 517: M68000_BusError(addr, 0);
1.1 root 518: }
519:
1.1.1.6 root 520: static void ROMmem_wput(uaecptr addr, uae_u32 b)
1.1 root 521: {
522: if (illegal_mem)
1.1.1.3 root 523: write_log ("Illegal ROMmem wput at %08lx\n", (long)addr);
1.1.1.5 root 524:
1.1.1.6 root 525: M68000_BusError(addr, 0);
1.1 root 526: }
527:
1.1.1.6 root 528: static void ROMmem_bput(uaecptr addr, uae_u32 b)
1.1 root 529: {
530: if (illegal_mem)
1.1.1.5 root 531: write_log ("Illegal ROMmem bput at %08lx\n", (long)addr);
532:
1.1.1.6 root 533: M68000_BusError(addr, 0);
1.1 root 534: }
535:
1.1.1.6 root 536: static int ROMmem_check(uaecptr addr, uae_u32 size)
1.1 root 537: {
538: addr -= ROMmem_start & ROMmem_mask;
539: addr &= ROMmem_mask;
540: return (addr + size) <= ROMmem_size;
541: }
542:
1.1.1.6 root 543: static uae_u8 *ROMmem_xlate(uaecptr addr)
1.1 root 544: {
545: addr -= ROMmem_start & ROMmem_mask;
546: addr &= ROMmem_mask;
547: return ROMmemory + addr;
548: }
549:
550:
1.1.1.10! root 551: /* IDE controller IO memory */
! 552: /* see also ide.c */
! 553:
! 554: static uae_u8 *IdeMemory;
! 555:
! 556: static int IdeMem_check(uaecptr addr, uae_u32 size)
! 557: {
! 558: addr -= IdeMem_start;
! 559: addr &= IdeMem_mask;
! 560: return (addr + size) <= IdeMem_size;
! 561: }
! 562:
! 563: static uae_u8 *IdeMem_xlate(uaecptr addr)
! 564: {
! 565: addr -= IdeMem_start;
! 566: addr &= IdeMem_mask;
! 567: return IdeMemory + addr;
! 568: }
! 569:
! 570:
1.1 root 571: /* Hardware IO memory */
1.1.1.10! root 572: /* see also ioMem.c */
1.1 root 573:
1.1.1.10! root 574: uae_u8 *IOmemory;
1.1 root 575:
1.1.1.6 root 576: static int IOmem_check(uaecptr addr, uae_u32 size)
1.1 root 577: {
1.1.1.5 root 578: addr -= IOmem_start;
1.1 root 579: addr &= IOmem_mask;
580: return (addr + size) <= IOmem_size;
581: }
582:
1.1.1.6 root 583: static uae_u8 *IOmem_xlate(uaecptr addr)
1.1 root 584: {
1.1.1.5 root 585: addr -= IOmem_start;
1.1 root 586: addr &= IOmem_mask;
587: return IOmemory + addr;
588: }
589:
590:
591:
1.1.1.5 root 592: /* **** Address banks **** */
1.1 root 593:
1.1.1.6 root 594: static addrbank dummy_bank =
595: {
1.1 root 596: dummy_lget, dummy_wget, dummy_bget,
597: dummy_lput, dummy_wput, dummy_bput,
1.1.1.5 root 598: dummy_xlate, dummy_check
599: };
600:
1.1.1.6 root 601: static addrbank BusErrMem_bank =
602: {
1.1.1.5 root 603: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget,
604: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput,
605: BusErrMem_xlate, BusErrMem_check
1.1 root 606: };
607:
1.1.1.6 root 608: static addrbank STmem_bank =
609: {
1.1 root 610: STmem_lget, STmem_wget, STmem_bget,
611: STmem_lput, STmem_wput, STmem_bput,
612: STmem_xlate, STmem_check
613: };
614:
1.1.1.6 root 615: static addrbank SysMem_bank =
616: {
1.1.1.5 root 617: SysMem_lget, SysMem_wget, SysMem_bget,
618: SysMem_lput, SysMem_wput, SysMem_bput,
619: STmem_xlate, STmem_check
620: };
621:
1.1.1.6 root 622: static addrbank VoidMem_bank =
623: {
1.1.1.5 root 624: VoidMem_lget, VoidMem_wget, VoidMem_bget,
625: VoidMem_lput, VoidMem_wput, VoidMem_bput,
626: VoidMem_xlate, VoidMem_check
627: };
628:
1.1.1.6 root 629: static addrbank TTmem_bank =
630: {
1.1 root 631: TTmem_lget, TTmem_wget, TTmem_bget,
632: TTmem_lput, TTmem_wput, TTmem_bput,
633: TTmem_xlate, TTmem_check
634: };
635:
1.1.1.6 root 636: static addrbank ROMmem_bank =
637: {
1.1 root 638: ROMmem_lget, ROMmem_wget, ROMmem_bget,
639: ROMmem_lput, ROMmem_wput, ROMmem_bput,
640: ROMmem_xlate, ROMmem_check
641: };
642:
1.1.1.10! root 643: static addrbank IdeMem_bank =
! 644: {
! 645: Ide_Mem_lget, Ide_Mem_wget, Ide_Mem_bget,
! 646: Ide_Mem_lput, Ide_Mem_wput, Ide_Mem_bput,
! 647: IdeMem_xlate, IdeMem_check
! 648: };
! 649:
1.1.1.6 root 650: static addrbank IOmem_bank =
651: {
1.1.1.7 root 652: IoMem_lget, IoMem_wget, IoMem_bget,
653: IoMem_lput, IoMem_wput, IoMem_bput,
1.1 root 654: IOmem_xlate, IOmem_check
655: };
656:
657:
1.1.1.5 root 658:
1.1 root 659: static void init_mem_banks (void)
660: {
661: int i;
662: for (i = 0; i < 65536; i++)
663: put_mem_bank (i<<16, &dummy_bank);
664: }
665:
666:
667: /*
1.1.1.5 root 668: * Initialize the memory banks
669: */
1.1.1.8 root 670: void memory_init(uae_u32 nNewSTMemSize, uae_u32 nNewTTMemSize, uae_u32 nNewRomMemStart)
1.1.1.5 root 671: {
1.1.1.8 root 672: STmem_size = (nNewSTMemSize + 65535) & 0xFFFF0000;
673: TTmem_size = (nNewTTMemSize + 65535) & 0xFFFF0000;
1.1.1.5 root 674:
675: /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n",
1.1.1.8 root 676: STmem_size, TTmem_size, nNewRomMemStart);*/
1.1.1.5 root 677:
1.1.1.10! root 678: #if ENABLE_SMALL_MEM
1.1.1.9 root 679:
1.1.1.10! root 680: /* Allocate memory for ROM areas and IO memory space (0xE00000 - 0xFFFFFF) */
! 681: ROMmemory = malloc(2*1024*1024);
! 682: if (!ROMmemory) {
! 683: fprintf(stderr, "Out of memory (ROM/IO mem)!\n");
! 684: exit(1);
! 685: }
! 686: IdeMemory = ROMmemory + 0x100000;
! 687: IOmemory = ROMmemory + 0x1f0000;
! 688:
! 689: /* Allocate memory for normal ST RAM */
! 690: STmemory = malloc(STmem_size);
! 691: while (!STmemory && STmem_size > 512*1024) {
1.1.1.5 root 692: STmem_size >>= 1;
693: STmemory = (uae_u8 *)malloc (STmem_size);
1.1 root 694: if (STmemory)
1.1.1.10! root 695: write_log ("Reducing STmem size to %dkb\n", STmem_size >> 10);
1.1 root 696: }
1.1.1.10! root 697: if (!STmemory) {
1.1 root 698: write_log ("virtual memory exhausted (STmemory)!\n");
1.1.1.10! root 699: exit(1);
1.1 root 700: }
1.1.1.10! root 701:
! 702: #else
! 703:
! 704: /* STmemory points to the 16 MiB STRam array, we just have to set up
! 705: * the remaining pointers here: */
! 706: ROMmemory = STRam + ROMmem_start;
! 707: IdeMemory = STRam + IdeMem_start;
! 708: IOmemory = STRam + IOmem_start;
! 709:
! 710: #endif
1.1 root 711:
1.1.1.5 root 712: init_mem_banks();
1.1 root 713:
1.1.1.8 root 714: /* Map the ST system RAM: */
1.1.1.5 root 715: map_banks(&SysMem_bank, 0x00, 1);
1.1.1.8 root 716: /* Between STRamEnd and 4MB barrier, there is void space: */
717: map_banks(&VoidMem_bank, 0x08, 0x38);
718: /* Space between 4MB barrier and TOS ROM causes a bus error: */
719: map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0);
720: /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */
1.1.1.5 root 721: map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
722:
723: /* TT memory isn't really supported yet */
724: if (TTmem_size > 0)
725: TTmemory = (uae_u8 *)malloc (TTmem_size);
1.1 root 726: if (TTmemory != 0)
1.1.1.5 root 727: map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16);
728: else
729: TTmem_size = 0;
730: TTmem_mask = TTmem_size - 1;
731:
732: /* ROM memory: */
733: /* Depending on which ROM version we are using, the other ROM region is illegal! */
1.1.1.8 root 734: if(nNewRomMemStart == 0xFC0000)
1.1.1.5 root 735: {
736: map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3);
737: map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10);
738: }
1.1.1.8 root 739: else if(nNewRomMemStart == 0xE00000)
1.1.1.5 root 740: {
741: map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10);
742: map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3);
743: }
1.1 root 744: else
1.1.1.5 root 745: {
746: write_log("Illegal ROM memory start!\n");
747: }
1.1 root 748:
1.1.1.5 root 749: /* Cartridge memory: */
750: map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2);
1.1 root 751:
1.1.1.5 root 752: /* IO memory: */
753: map_banks(&IOmem_bank, IOmem_start>>16, 0x1);
1.1 root 754:
1.1.1.10! root 755: /* IDE controller memory region: */
! 756: map_banks(&IdeMem_bank, IdeMem_start >> 16, 0x1); /* IDE controller on the Falcon */
! 757:
1.1.1.5 root 758: /* Illegal memory regions cause a bus error on the ST: */
1.1.1.10! root 759: map_banks(&BusErrMem_bank, 0xF10000 >> 16, 0x9);
1.1 root 760: }
761:
1.1.1.5 root 762:
763: /*
764: * Uninitialize the memory banks.
765: */
766: void memory_uninit (void)
767: {
768: /* Here, we free allocated memory from memory_init */
1.1.1.10! root 769: if (TTmem_size > 0) {
! 770: free(TTmemory);
! 771: TTmemory = NULL;
! 772: }
! 773:
! 774: #if ENABLE_SMALL_MEM
! 775:
! 776: if (STmemory) {
! 777: free(STmemory);
! 778: STmemory = NULL;
! 779: }
! 780:
! 781: if (ROMmemory) {
! 782: free(ROMmemory);
! 783: ROMmemory = NULL;
1.1.1.5 root 784: }
1.1.1.10! root 785:
! 786: #endif /* ENABLE_SMALL_MEM */
1.1.1.5 root 787: }
788:
789:
1.1 root 790: void map_banks (addrbank *bank, int start, int size)
791: {
792: int bnr;
793: unsigned long int hioffs = 0, endhioffs = 0x100;
794:
795: if (start >= 0x100) {
796: for (bnr = start; bnr < start + size; bnr++)
797: put_mem_bank (bnr << 16, bank);
798: return;
799: }
800: /* Some ROMs apparently require a 24 bit address space... */
1.1.1.10! root 801: if (currprefs.address_space_24)
1.1 root 802: endhioffs = 0x10000;
803: for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100)
804: for (bnr = start; bnr < start+size; bnr++)
805: put_mem_bank ((bnr + hioffs) << 16, bank);
806: }
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