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1.1 root 1: /*
1.1.1.4 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * Memory management
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
1.1.1.4 root 9: *
10: * This file is distributed under the GNU Public License, version 2 or at
11: * your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.13! root 13: const char Memory_fileid[] = "Hatari memory.c : " __DATE__ " " __TIME__;
1.1 root 14:
1.1.1.10 root 15: #include "config.h"
1.1 root 16: #include "sysdeps.h"
17: #include "hatari-glue.h"
18: #include "maccess.h"
19: #include "memory.h"
1.1.1.4 root 20: #include "../includes/main.h"
1.1 root 21: #include "../includes/tos.h"
1.1.1.10 root 22: #include "../includes/ide.h"
1.1.1.7 root 23: #include "../includes/ioMem.h"
1.1.1.3 root 24: #include "../includes/reset.h"
1.1.1.6 root 25: #include "../includes/stMemory.h"
1.1.1.5 root 26: #include "../includes/m68000.h"
27: #include "newcpu.h"
1.1 root 28:
29:
1.1.1.10 root 30: /* Set illegal_mem to 1 for debug output: */
31: #define illegal_mem 1
32:
33:
1.1.1.6 root 34: static uae_u32 STmem_size, TTmem_size = 0;
35: static uae_u32 TTmem_mask;
1.1 root 36:
1.1.1.5 root 37: #define STmem_start 0x00000000
38: #define ROMmem_start 0x00E00000
1.1.1.10 root 39: #define IdeMem_start 0x00F00000
1.1.1.5 root 40: #define IOmem_start 0x00FF0000
41: #define TTmem_start 0x01000000
1.1 root 42:
1.1.1.10 root 43: #define IdeMem_size 65536
1.1.1.5 root 44: #define IOmem_size 65536
45: #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */
1.1 root 46:
1.1.1.5 root 47: #define STmem_mask 0x00ffffff
48: #define ROMmem_mask 0x00ffffff
1.1.1.10 root 49: #define IdeMem_mask (IdeMem_size - 1)
1.1.1.5 root 50: #define IOmem_mask (IOmem_size - 1)
1.1 root 51:
52:
53: #ifdef SAVE_MEMORY_BANKS
54: addrbank *mem_banks[65536];
55: #else
56: addrbank mem_banks[65536];
57: #endif
58:
59: #ifdef NO_INLINE_MEMORY_ACCESS
60: __inline__ uae_u32 longget (uaecptr addr)
61: {
62: return call_mem_get_func (get_mem_bank (addr).lget, addr);
63: }
64: __inline__ uae_u32 wordget (uaecptr addr)
65: {
66: return call_mem_get_func (get_mem_bank (addr).wget, addr);
67: }
68: __inline__ uae_u32 byteget (uaecptr addr)
69: {
70: return call_mem_get_func (get_mem_bank (addr).bget, addr);
71: }
72: __inline__ void longput (uaecptr addr, uae_u32 l)
73: {
74: call_mem_put_func (get_mem_bank (addr).lput, addr, l);
75: }
76: __inline__ void wordput (uaecptr addr, uae_u32 w)
77: {
78: call_mem_put_func (get_mem_bank (addr).wput, addr, w);
79: }
80: __inline__ void byteput (uaecptr addr, uae_u32 b)
81: {
82: call_mem_put_func (get_mem_bank (addr).bput, addr, b);
83: }
84: #endif
85:
86:
1.1.1.5 root 87: /* Some prototypes: */
1.1.1.11 root 88: extern void SDL_Quit(void);
1.1.1.5 root 89: static int STmem_check (uaecptr addr, uae_u32 size) REGPARAM;
90: static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM;
91:
92:
1.1 root 93: /* A dummy bank that only contains zeros */
94:
1.1.1.6 root 95: static uae_u32 dummy_lget(uaecptr addr)
1.1 root 96: {
97: if (illegal_mem)
1.1.1.3 root 98: write_log ("Illegal lget at %08lx\n", (long)addr);
1.1 root 99:
100: return 0;
101: }
102:
1.1.1.6 root 103: static uae_u32 dummy_wget(uaecptr addr)
1.1 root 104: {
105: if (illegal_mem)
1.1.1.3 root 106: write_log ("Illegal wget at %08lx\n", (long)addr);
1.1 root 107:
108: return 0;
109: }
110:
1.1.1.6 root 111: static uae_u32 dummy_bget(uaecptr addr)
1.1 root 112: {
113: if (illegal_mem)
1.1.1.3 root 114: write_log ("Illegal bget at %08lx\n", (long)addr);
1.1 root 115:
116: return 0;
117: }
118:
1.1.1.6 root 119: static void dummy_lput(uaecptr addr, uae_u32 l)
1.1 root 120: {
121: if (illegal_mem)
1.1.1.3 root 122: write_log ("Illegal lput at %08lx\n", (long)addr);
1.1 root 123: }
1.1.1.5 root 124:
1.1.1.6 root 125: static void dummy_wput(uaecptr addr, uae_u32 w)
1.1 root 126: {
127: if (illegal_mem)
1.1.1.3 root 128: write_log ("Illegal wput at %08lx\n", (long)addr);
1.1 root 129: }
1.1.1.5 root 130:
1.1.1.6 root 131: static void dummy_bput(uaecptr addr, uae_u32 b)
1.1 root 132: {
133: if (illegal_mem)
1.1.1.3 root 134: write_log ("Illegal bput at %08lx\n", (long)addr);
1.1 root 135: }
136:
1.1.1.6 root 137: static int dummy_check(uaecptr addr, uae_u32 size)
1.1 root 138: {
139: if (illegal_mem)
1.1.1.3 root 140: write_log ("Illegal check at %08lx\n", (long)addr);
1.1 root 141:
142: return 0;
143: }
144:
1.1.1.6 root 145: static uae_u8 *dummy_xlate(uaecptr addr)
1.1.1.5 root 146: {
147: write_log("Your Atari program just did something terribly stupid:"
148: " dummy_xlate($%x)\n", addr);
149: /*Reset_Warm();*/
150: return STmem_xlate(addr); /* So we don't crash. */
151: }
1.1 root 152:
153:
1.1.1.5 root 154: /* **** This memory bank only generates bus errors **** */
1.1 root 155:
1.1.1.6 root 156: static uae_u32 BusErrMem_lget(uaecptr addr)
1.1.1.5 root 157: {
158: if (illegal_mem)
159: write_log ("Bus error lget at %08lx\n", (long)addr);
160:
1.1.1.6 root 161: M68000_BusError(addr, 1);
1.1.1.5 root 162: return 0;
163: }
164:
1.1.1.6 root 165: static uae_u32 BusErrMem_wget(uaecptr addr)
1.1.1.5 root 166: {
167: if (illegal_mem)
168: write_log ("Bus error wget at %08lx\n", (long)addr);
169:
1.1.1.6 root 170: M68000_BusError(addr, 1);
1.1.1.5 root 171: return 0;
172: }
173:
1.1.1.6 root 174: static uae_u32 BusErrMem_bget(uaecptr addr)
1.1.1.5 root 175: {
176: if (illegal_mem)
177: write_log ("Bus error bget at %08lx\n", (long)addr);
178:
1.1.1.6 root 179: M68000_BusError(addr, 1);
1.1.1.5 root 180: return 0;
181: }
182:
1.1.1.6 root 183: static void BusErrMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 184: {
185: if (illegal_mem)
186: write_log ("Bus error lput at %08lx\n", (long)addr);
187:
1.1.1.6 root 188: M68000_BusError(addr, 0);
1.1.1.5 root 189: }
190:
1.1.1.6 root 191: static void BusErrMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 192: {
193: if (illegal_mem)
194: write_log ("Bus error wput at %08lx\n", (long)addr);
195:
1.1.1.6 root 196: M68000_BusError(addr, 0);
1.1.1.5 root 197: }
198:
1.1.1.6 root 199: static void BusErrMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 200: {
201: if (illegal_mem)
202: write_log ("Bus error bput at %08lx\n", (long)addr);
203:
1.1.1.6 root 204: M68000_BusError(addr, 0);
1.1.1.5 root 205: }
206:
1.1.1.6 root 207: static int BusErrMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 208: {
209: if (illegal_mem)
210: write_log ("Bus error check at %08lx\n", (long)addr);
211:
212: return 0;
213: }
214:
1.1.1.6 root 215: static uae_u8 *BusErrMem_xlate (uaecptr addr)
1.1.1.5 root 216: {
217: write_log("Your Atari program just did something terribly stupid:"
218: " BusErrMem_xlate($%x)\n", addr);
219:
220: /*M68000_BusError(addr);*/
221: return STmem_xlate(addr); /* So we don't crash. */
222: }
223:
224:
225: /* **** ST RAM memory **** */
226:
1.1.1.9 root 227: /*static uae_u8 *STmemory;*/
228: #define STmemory STRam
1.1 root 229:
1.1.1.6 root 230: static uae_u32 STmem_lget(uaecptr addr)
1.1 root 231: {
232: addr -= STmem_start & STmem_mask;
233: addr &= STmem_mask;
1.1.1.7 root 234: return do_get_mem_long(STmemory + addr);
1.1 root 235: }
236:
1.1.1.6 root 237: static uae_u32 STmem_wget(uaecptr addr)
1.1 root 238: {
239: addr -= STmem_start & STmem_mask;
240: addr &= STmem_mask;
1.1.1.7 root 241: return do_get_mem_word(STmemory + addr);
1.1 root 242: }
243:
1.1.1.6 root 244: static uae_u32 STmem_bget(uaecptr addr)
1.1 root 245: {
246: addr -= STmem_start & STmem_mask;
247: addr &= STmem_mask;
248: return STmemory[addr];
249: }
250:
1.1.1.6 root 251: static void STmem_lput(uaecptr addr, uae_u32 l)
1.1 root 252: {
253: addr -= STmem_start & STmem_mask;
254: addr &= STmem_mask;
1.1.1.7 root 255: do_put_mem_long(STmemory + addr, l);
1.1 root 256: }
257:
1.1.1.6 root 258: static void STmem_wput(uaecptr addr, uae_u32 w)
1.1 root 259: {
260: addr -= STmem_start & STmem_mask;
261: addr &= STmem_mask;
1.1.1.7 root 262: do_put_mem_word(STmemory + addr, w);
1.1 root 263: }
264:
1.1.1.6 root 265: static void STmem_bput(uaecptr addr, uae_u32 b)
1.1 root 266: {
267: addr -= STmem_start & STmem_mask;
268: addr &= STmem_mask;
269: STmemory[addr] = b;
270: }
271:
1.1.1.6 root 272: static int STmem_check(uaecptr addr, uae_u32 size)
1.1 root 273: {
274: addr -= STmem_start & STmem_mask;
275: addr &= STmem_mask;
1.1.1.5 root 276: return (addr + size) <= STmem_size;
1.1 root 277: }
278:
1.1.1.6 root 279: static uae_u8 *STmem_xlate(uaecptr addr)
1.1 root 280: {
281: addr -= STmem_start & STmem_mask;
282: addr &= STmem_mask;
283: return STmemory + addr;
284: }
285:
286:
1.1.1.5 root 287: /*
288: * **** ST RAM system memory ****
289: * We need a separate mem bank for this region since the first 0x800 bytes on
290: * the ST can only be accessed in supervisor mode. Note that the very first
291: * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write
292: * protected!
293: */
1.1.1.6 root 294: static uae_u32 SysMem_lget(uaecptr addr)
1.1.1.5 root 295: {
296: if(addr < 0x800 && !regs.s)
297: {
1.1.1.6 root 298: M68000_BusError(addr, 1);
1.1.1.5 root 299: return 0;
300: }
301:
302: addr -= STmem_start & STmem_mask;
303: addr &= STmem_mask;
1.1.1.7 root 304:
305: return do_get_mem_long(STmemory + addr);
1.1.1.5 root 306: }
307:
1.1.1.6 root 308: static uae_u32 SysMem_wget(uaecptr addr)
1.1.1.5 root 309: {
310: if(addr < 0x800 && !regs.s)
311: {
1.1.1.6 root 312: M68000_BusError(addr, 1);
1.1.1.5 root 313: return 0;
314: }
315:
316: addr -= STmem_start & STmem_mask;
317: addr &= STmem_mask;
1.1.1.7 root 318:
319: return do_get_mem_word(STmemory + addr);
1.1.1.5 root 320: }
321:
1.1.1.6 root 322: static uae_u32 SysMem_bget(uaecptr addr)
1.1.1.5 root 323: {
324: if(addr < 0x800 && !regs.s)
325: {
1.1.1.6 root 326: M68000_BusError(addr, 1);
1.1.1.5 root 327: return 0;
328: }
329:
330: addr -= STmem_start & STmem_mask;
331: addr &= STmem_mask;
332: return STmemory[addr];
333: }
334:
1.1.1.6 root 335: static void SysMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 336: {
337: if(addr < 0x8 || (addr < 0x800 && !regs.s))
338: {
1.1.1.6 root 339: M68000_BusError(addr, 0);
1.1.1.5 root 340: return;
341: }
342:
343: addr -= STmem_start & STmem_mask;
344: addr &= STmem_mask;
1.1.1.7 root 345:
346: do_put_mem_long(STmemory + addr, l);
1.1.1.5 root 347: }
348:
1.1.1.6 root 349: static void SysMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 350: {
351: if(addr < 0x8 || (addr < 0x800 && !regs.s))
352: {
1.1.1.6 root 353: M68000_BusError(addr, 0);
1.1.1.5 root 354: return;
355: }
356:
357: addr -= STmem_start & STmem_mask;
358: addr &= STmem_mask;
1.1.1.7 root 359:
360: do_put_mem_word(STmemory + addr, w);
1.1.1.5 root 361: }
362:
1.1.1.6 root 363: static void SysMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 364: {
365: if(addr < 0x8 || (addr < 0x800 && !regs.s))
366: {
1.1.1.6 root 367: M68000_BusError(addr, 0);
1.1.1.5 root 368: return;
369: }
370:
371: addr -= STmem_start & STmem_mask;
372: addr &= STmem_mask;
373: STmemory[addr] = b;
374: }
375:
376:
377: /*
378: * **** Void memory ****
379: * Between the ST-RAM end and the 4 MB barrier, there is a void memory space:
380: * Reading always returns the same value and writing does nothing at all.
381: */
382:
1.1.1.6 root 383: static uae_u32 VoidMem_lget(uaecptr addr)
1.1.1.5 root 384: {
385: return 0;
386: }
387:
1.1.1.6 root 388: static uae_u32 VoidMem_wget(uaecptr addr)
1.1.1.5 root 389: {
390: return 0;
391: }
392:
1.1.1.6 root 393: static uae_u32 VoidMem_bget(uaecptr addr)
1.1.1.5 root 394: {
395: return 0;
396: }
397:
1.1.1.6 root 398: static void VoidMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 399: {
400: }
401:
1.1.1.6 root 402: static void VoidMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 403: {
404: }
405:
1.1.1.6 root 406: static void VoidMem_bput (uaecptr addr, uae_u32 b)
1.1.1.5 root 407: {
408: }
409:
1.1.1.6 root 410: static int VoidMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 411: {
412: if (illegal_mem)
413: write_log ("Void memory check at %08lx\n", (long)addr);
414:
415: return 0;
416: }
417:
1.1.1.6 root 418: static uae_u8 *VoidMem_xlate (uaecptr addr)
1.1.1.5 root 419: {
420: write_log("Your Atari program just did something terribly stupid:"
421: " VoidMem_xlate($%x)\n", addr);
422:
423: return STmem_xlate(addr); /* So we don't crash. */
424: }
425:
426:
427: /* **** TT fast memory (not yet supported) **** */
1.1 root 428:
429: static uae_u8 *TTmemory;
430:
1.1.1.6 root 431: static uae_u32 TTmem_lget(uaecptr addr)
1.1 root 432: {
433: addr -= TTmem_start & TTmem_mask;
434: addr &= TTmem_mask;
1.1.1.7 root 435: return do_get_mem_long(TTmemory + addr);
1.1 root 436: }
437:
1.1.1.6 root 438: static uae_u32 TTmem_wget(uaecptr addr)
1.1 root 439: {
440: addr -= TTmem_start & TTmem_mask;
441: addr &= TTmem_mask;
1.1.1.7 root 442: return do_get_mem_word(TTmemory + addr);
1.1 root 443: }
444:
1.1.1.6 root 445: static uae_u32 TTmem_bget(uaecptr addr)
1.1 root 446: {
447: addr -= TTmem_start & TTmem_mask;
448: addr &= TTmem_mask;
449: return TTmemory[addr];
450: }
451:
1.1.1.6 root 452: static void TTmem_lput(uaecptr addr, uae_u32 l)
1.1 root 453: {
454: addr -= TTmem_start & TTmem_mask;
455: addr &= TTmem_mask;
1.1.1.7 root 456: do_put_mem_long(TTmemory + addr, l);
1.1 root 457: }
458:
1.1.1.6 root 459: static void TTmem_wput(uaecptr addr, uae_u32 w)
1.1 root 460: {
461: addr -= TTmem_start & TTmem_mask;
462: addr &= TTmem_mask;
1.1.1.7 root 463: do_put_mem_word(TTmemory + addr, w);
1.1 root 464: }
465:
1.1.1.6 root 466: static void TTmem_bput(uaecptr addr, uae_u32 b)
1.1 root 467: {
468: addr -= TTmem_start & TTmem_mask;
469: addr &= TTmem_mask;
470: TTmemory[addr] = b;
471: }
472:
1.1.1.6 root 473: static int TTmem_check(uaecptr addr, uae_u32 size)
1.1 root 474: {
475: addr -= TTmem_start & TTmem_mask;
476: addr &= TTmem_mask;
1.1.1.5 root 477: return (addr + size) <= TTmem_size;
1.1 root 478: }
479:
1.1.1.6 root 480: static uae_u8 *TTmem_xlate(uaecptr addr)
1.1 root 481: {
482: addr -= TTmem_start & TTmem_mask;
483: addr &= TTmem_mask;
484: return TTmemory + addr;
485: }
486:
1.1.1.5 root 487:
488: /* **** ROM memory **** */
1.1 root 489:
1.1.1.10 root 490: uae_u8 *ROMmemory;
1.1 root 491:
1.1.1.6 root 492: static uae_u32 ROMmem_lget(uaecptr addr)
1.1 root 493: {
494: addr -= ROMmem_start & ROMmem_mask;
495: addr &= ROMmem_mask;
1.1.1.7 root 496: return do_get_mem_long(ROMmemory + addr);
1.1 root 497: }
498:
1.1.1.6 root 499: static uae_u32 ROMmem_wget(uaecptr addr)
1.1 root 500: {
501: addr -= ROMmem_start & ROMmem_mask;
502: addr &= ROMmem_mask;
1.1.1.7 root 503: return do_get_mem_word(ROMmemory + addr);
1.1 root 504: }
505:
1.1.1.6 root 506: static uae_u32 ROMmem_bget(uaecptr addr)
1.1 root 507: {
508: addr -= ROMmem_start & ROMmem_mask;
509: addr &= ROMmem_mask;
510: return ROMmemory[addr];
511: }
512:
1.1.1.6 root 513: static void ROMmem_lput(uaecptr addr, uae_u32 b)
1.1 root 514: {
515: if (illegal_mem)
1.1.1.3 root 516: write_log ("Illegal ROMmem lput at %08lx\n", (long)addr);
1.1.1.5 root 517:
1.1.1.6 root 518: M68000_BusError(addr, 0);
1.1 root 519: }
520:
1.1.1.6 root 521: static void ROMmem_wput(uaecptr addr, uae_u32 b)
1.1 root 522: {
523: if (illegal_mem)
1.1.1.3 root 524: write_log ("Illegal ROMmem wput at %08lx\n", (long)addr);
1.1.1.5 root 525:
1.1.1.6 root 526: M68000_BusError(addr, 0);
1.1 root 527: }
528:
1.1.1.6 root 529: static void ROMmem_bput(uaecptr addr, uae_u32 b)
1.1 root 530: {
531: if (illegal_mem)
1.1.1.5 root 532: write_log ("Illegal ROMmem bput at %08lx\n", (long)addr);
533:
1.1.1.6 root 534: M68000_BusError(addr, 0);
1.1 root 535: }
536:
1.1.1.6 root 537: static int ROMmem_check(uaecptr addr, uae_u32 size)
1.1 root 538: {
539: addr -= ROMmem_start & ROMmem_mask;
540: addr &= ROMmem_mask;
541: return (addr + size) <= ROMmem_size;
542: }
543:
1.1.1.6 root 544: static uae_u8 *ROMmem_xlate(uaecptr addr)
1.1 root 545: {
546: addr -= ROMmem_start & ROMmem_mask;
547: addr &= ROMmem_mask;
548: return ROMmemory + addr;
549: }
550:
551:
1.1.1.10 root 552: /* IDE controller IO memory */
553: /* see also ide.c */
554:
555: static uae_u8 *IdeMemory;
556:
557: static int IdeMem_check(uaecptr addr, uae_u32 size)
558: {
559: addr -= IdeMem_start;
560: addr &= IdeMem_mask;
561: return (addr + size) <= IdeMem_size;
562: }
563:
564: static uae_u8 *IdeMem_xlate(uaecptr addr)
565: {
566: addr -= IdeMem_start;
567: addr &= IdeMem_mask;
568: return IdeMemory + addr;
569: }
570:
571:
1.1 root 572: /* Hardware IO memory */
1.1.1.10 root 573: /* see also ioMem.c */
1.1 root 574:
1.1.1.10 root 575: uae_u8 *IOmemory;
1.1 root 576:
1.1.1.6 root 577: static int IOmem_check(uaecptr addr, uae_u32 size)
1.1 root 578: {
1.1.1.5 root 579: addr -= IOmem_start;
1.1 root 580: addr &= IOmem_mask;
581: return (addr + size) <= IOmem_size;
582: }
583:
1.1.1.6 root 584: static uae_u8 *IOmem_xlate(uaecptr addr)
1.1 root 585: {
1.1.1.5 root 586: addr -= IOmem_start;
1.1 root 587: addr &= IOmem_mask;
588: return IOmemory + addr;
589: }
590:
591:
592:
1.1.1.5 root 593: /* **** Address banks **** */
1.1 root 594:
1.1.1.6 root 595: static addrbank dummy_bank =
596: {
1.1 root 597: dummy_lget, dummy_wget, dummy_bget,
598: dummy_lput, dummy_wput, dummy_bput,
1.1.1.5 root 599: dummy_xlate, dummy_check
600: };
601:
1.1.1.6 root 602: static addrbank BusErrMem_bank =
603: {
1.1.1.5 root 604: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget,
605: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput,
606: BusErrMem_xlate, BusErrMem_check
1.1 root 607: };
608:
1.1.1.6 root 609: static addrbank STmem_bank =
610: {
1.1 root 611: STmem_lget, STmem_wget, STmem_bget,
612: STmem_lput, STmem_wput, STmem_bput,
613: STmem_xlate, STmem_check
614: };
615:
1.1.1.6 root 616: static addrbank SysMem_bank =
617: {
1.1.1.5 root 618: SysMem_lget, SysMem_wget, SysMem_bget,
619: SysMem_lput, SysMem_wput, SysMem_bput,
620: STmem_xlate, STmem_check
621: };
622:
1.1.1.6 root 623: static addrbank VoidMem_bank =
624: {
1.1.1.5 root 625: VoidMem_lget, VoidMem_wget, VoidMem_bget,
626: VoidMem_lput, VoidMem_wput, VoidMem_bput,
627: VoidMem_xlate, VoidMem_check
628: };
629:
1.1.1.6 root 630: static addrbank TTmem_bank =
631: {
1.1 root 632: TTmem_lget, TTmem_wget, TTmem_bget,
633: TTmem_lput, TTmem_wput, TTmem_bput,
634: TTmem_xlate, TTmem_check
635: };
636:
1.1.1.6 root 637: static addrbank ROMmem_bank =
638: {
1.1 root 639: ROMmem_lget, ROMmem_wget, ROMmem_bget,
640: ROMmem_lput, ROMmem_wput, ROMmem_bput,
641: ROMmem_xlate, ROMmem_check
642: };
643:
1.1.1.10 root 644: static addrbank IdeMem_bank =
645: {
646: Ide_Mem_lget, Ide_Mem_wget, Ide_Mem_bget,
647: Ide_Mem_lput, Ide_Mem_wput, Ide_Mem_bput,
648: IdeMem_xlate, IdeMem_check
649: };
650:
1.1.1.6 root 651: static addrbank IOmem_bank =
652: {
1.1.1.7 root 653: IoMem_lget, IoMem_wget, IoMem_bget,
654: IoMem_lput, IoMem_wput, IoMem_bput,
1.1 root 655: IOmem_xlate, IOmem_check
656: };
657:
658:
1.1.1.5 root 659:
1.1 root 660: static void init_mem_banks (void)
661: {
662: int i;
663: for (i = 0; i < 65536; i++)
664: put_mem_bank (i<<16, &dummy_bank);
665: }
666:
667:
668: /*
1.1.1.5 root 669: * Initialize the memory banks
670: */
1.1.1.8 root 671: void memory_init(uae_u32 nNewSTMemSize, uae_u32 nNewTTMemSize, uae_u32 nNewRomMemStart)
1.1.1.5 root 672: {
1.1.1.8 root 673: STmem_size = (nNewSTMemSize + 65535) & 0xFFFF0000;
674: TTmem_size = (nNewTTMemSize + 65535) & 0xFFFF0000;
1.1.1.5 root 675:
676: /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n",
1.1.1.8 root 677: STmem_size, TTmem_size, nNewRomMemStart);*/
1.1.1.5 root 678:
1.1.1.10 root 679: #if ENABLE_SMALL_MEM
1.1.1.9 root 680:
1.1.1.10 root 681: /* Allocate memory for ROM areas and IO memory space (0xE00000 - 0xFFFFFF) */
682: ROMmemory = malloc(2*1024*1024);
683: if (!ROMmemory) {
684: fprintf(stderr, "Out of memory (ROM/IO mem)!\n");
1.1.1.11 root 685: SDL_Quit();
1.1.1.10 root 686: exit(1);
687: }
688: IdeMemory = ROMmemory + 0x100000;
689: IOmemory = ROMmemory + 0x1f0000;
690:
691: /* Allocate memory for normal ST RAM */
692: STmemory = malloc(STmem_size);
693: while (!STmemory && STmem_size > 512*1024) {
1.1.1.5 root 694: STmem_size >>= 1;
695: STmemory = (uae_u8 *)malloc (STmem_size);
1.1 root 696: if (STmemory)
1.1.1.10 root 697: write_log ("Reducing STmem size to %dkb\n", STmem_size >> 10);
1.1 root 698: }
1.1.1.10 root 699: if (!STmemory) {
1.1 root 700: write_log ("virtual memory exhausted (STmemory)!\n");
1.1.1.11 root 701: SDL_Quit();
1.1.1.10 root 702: exit(1);
1.1 root 703: }
1.1.1.10 root 704:
705: #else
706:
707: /* STmemory points to the 16 MiB STRam array, we just have to set up
708: * the remaining pointers here: */
709: ROMmemory = STRam + ROMmem_start;
710: IdeMemory = STRam + IdeMem_start;
711: IOmemory = STRam + IOmem_start;
712:
713: #endif
1.1 root 714:
1.1.1.5 root 715: init_mem_banks();
1.1 root 716:
1.1.1.8 root 717: /* Map the ST system RAM: */
1.1.1.5 root 718: map_banks(&SysMem_bank, 0x00, 1);
1.1.1.8 root 719: /* Between STRamEnd and 4MB barrier, there is void space: */
720: map_banks(&VoidMem_bank, 0x08, 0x38);
721: /* Space between 4MB barrier and TOS ROM causes a bus error: */
722: map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0);
723: /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */
1.1.1.5 root 724: map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
725:
726: /* TT memory isn't really supported yet */
727: if (TTmem_size > 0)
728: TTmemory = (uae_u8 *)malloc (TTmem_size);
1.1 root 729: if (TTmemory != 0)
1.1.1.5 root 730: map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16);
731: else
732: TTmem_size = 0;
733: TTmem_mask = TTmem_size - 1;
734:
735: /* ROM memory: */
736: /* Depending on which ROM version we are using, the other ROM region is illegal! */
1.1.1.8 root 737: if(nNewRomMemStart == 0xFC0000)
1.1.1.5 root 738: {
739: map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3);
740: map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10);
741: }
1.1.1.8 root 742: else if(nNewRomMemStart == 0xE00000)
1.1.1.5 root 743: {
744: map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10);
745: map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3);
746: }
1.1 root 747: else
1.1.1.5 root 748: {
749: write_log("Illegal ROM memory start!\n");
750: }
1.1 root 751:
1.1.1.5 root 752: /* Cartridge memory: */
753: map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2);
1.1 root 754:
1.1.1.5 root 755: /* IO memory: */
756: map_banks(&IOmem_bank, IOmem_start>>16, 0x1);
1.1 root 757:
1.1.1.10 root 758: /* IDE controller memory region: */
759: map_banks(&IdeMem_bank, IdeMem_start >> 16, 0x1); /* IDE controller on the Falcon */
760:
1.1.1.5 root 761: /* Illegal memory regions cause a bus error on the ST: */
1.1.1.10 root 762: map_banks(&BusErrMem_bank, 0xF10000 >> 16, 0x9);
1.1 root 763: }
764:
1.1.1.5 root 765:
766: /*
767: * Uninitialize the memory banks.
768: */
769: void memory_uninit (void)
770: {
771: /* Here, we free allocated memory from memory_init */
1.1.1.10 root 772: if (TTmem_size > 0) {
773: free(TTmemory);
774: TTmemory = NULL;
775: }
776:
777: #if ENABLE_SMALL_MEM
778:
779: if (STmemory) {
780: free(STmemory);
781: STmemory = NULL;
782: }
783:
784: if (ROMmemory) {
785: free(ROMmemory);
786: ROMmemory = NULL;
1.1.1.5 root 787: }
1.1.1.10 root 788:
789: #endif /* ENABLE_SMALL_MEM */
1.1.1.5 root 790: }
791:
792:
1.1 root 793: void map_banks (addrbank *bank, int start, int size)
794: {
795: int bnr;
796: unsigned long int hioffs = 0, endhioffs = 0x100;
797:
798: if (start >= 0x100) {
799: for (bnr = start; bnr < start + size; bnr++)
800: put_mem_bank (bnr << 16, bank);
801: return;
802: }
803: /* Some ROMs apparently require a 24 bit address space... */
1.1.1.10 root 804: if (currprefs.address_space_24)
1.1 root 805: endhioffs = 0x10000;
806: for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100)
807: for (bnr = start; bnr < start+size; bnr++)
808: put_mem_bank ((bnr + hioffs) << 16, bank);
809: }
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