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1.1 root 1: /*
1.1.1.4 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * Memory management
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
1.1.1.4 root 9: *
10: * This file is distributed under the GNU Public License, version 2 or at
11: * your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.13 root 13: const char Memory_fileid[] = "Hatari memory.c : " __DATE__ " " __TIME__;
1.1 root 14:
1.1.1.10 root 15: #include "config.h"
1.1 root 16: #include "sysdeps.h"
17: #include "hatari-glue.h"
18: #include "maccess.h"
19: #include "memory.h"
1.1.1.14! root 20:
! 21: #include "main.h"
! 22: #include "tos.h"
! 23: #include "ide.h"
! 24: #include "ioMem.h"
! 25: #include "reset.h"
! 26: #include "stMemory.h"
! 27: #include "m68000.h"
! 28:
1.1.1.5 root 29: #include "newcpu.h"
1.1 root 30:
31:
1.1.1.10 root 32: /* Set illegal_mem to 1 for debug output: */
33: #define illegal_mem 1
34:
35:
1.1.1.6 root 36: static uae_u32 STmem_size, TTmem_size = 0;
37: static uae_u32 TTmem_mask;
1.1 root 38:
1.1.1.5 root 39: #define STmem_start 0x00000000
40: #define ROMmem_start 0x00E00000
1.1.1.10 root 41: #define IdeMem_start 0x00F00000
1.1.1.5 root 42: #define IOmem_start 0x00FF0000
43: #define TTmem_start 0x01000000
1.1 root 44:
1.1.1.10 root 45: #define IdeMem_size 65536
1.1.1.5 root 46: #define IOmem_size 65536
47: #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */
1.1 root 48:
1.1.1.5 root 49: #define STmem_mask 0x00ffffff
50: #define ROMmem_mask 0x00ffffff
1.1.1.10 root 51: #define IdeMem_mask (IdeMem_size - 1)
1.1.1.5 root 52: #define IOmem_mask (IOmem_size - 1)
1.1 root 53:
54:
55: #ifdef SAVE_MEMORY_BANKS
56: addrbank *mem_banks[65536];
57: #else
58: addrbank mem_banks[65536];
59: #endif
60:
61: #ifdef NO_INLINE_MEMORY_ACCESS
62: __inline__ uae_u32 longget (uaecptr addr)
63: {
64: return call_mem_get_func (get_mem_bank (addr).lget, addr);
65: }
66: __inline__ uae_u32 wordget (uaecptr addr)
67: {
68: return call_mem_get_func (get_mem_bank (addr).wget, addr);
69: }
70: __inline__ uae_u32 byteget (uaecptr addr)
71: {
72: return call_mem_get_func (get_mem_bank (addr).bget, addr);
73: }
74: __inline__ void longput (uaecptr addr, uae_u32 l)
75: {
76: call_mem_put_func (get_mem_bank (addr).lput, addr, l);
77: }
78: __inline__ void wordput (uaecptr addr, uae_u32 w)
79: {
80: call_mem_put_func (get_mem_bank (addr).wput, addr, w);
81: }
82: __inline__ void byteput (uaecptr addr, uae_u32 b)
83: {
84: call_mem_put_func (get_mem_bank (addr).bput, addr, b);
85: }
86: #endif
87:
88:
1.1.1.5 root 89: /* Some prototypes: */
1.1.1.11 root 90: extern void SDL_Quit(void);
1.1.1.5 root 91: static int STmem_check (uaecptr addr, uae_u32 size) REGPARAM;
92: static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM;
93:
94:
1.1 root 95: /* A dummy bank that only contains zeros */
96:
1.1.1.6 root 97: static uae_u32 dummy_lget(uaecptr addr)
1.1 root 98: {
99: if (illegal_mem)
1.1.1.3 root 100: write_log ("Illegal lget at %08lx\n", (long)addr);
1.1 root 101:
102: return 0;
103: }
104:
1.1.1.6 root 105: static uae_u32 dummy_wget(uaecptr addr)
1.1 root 106: {
107: if (illegal_mem)
1.1.1.3 root 108: write_log ("Illegal wget at %08lx\n", (long)addr);
1.1 root 109:
110: return 0;
111: }
112:
1.1.1.6 root 113: static uae_u32 dummy_bget(uaecptr addr)
1.1 root 114: {
115: if (illegal_mem)
1.1.1.3 root 116: write_log ("Illegal bget at %08lx\n", (long)addr);
1.1 root 117:
118: return 0;
119: }
120:
1.1.1.6 root 121: static void dummy_lput(uaecptr addr, uae_u32 l)
1.1 root 122: {
123: if (illegal_mem)
1.1.1.3 root 124: write_log ("Illegal lput at %08lx\n", (long)addr);
1.1 root 125: }
1.1.1.5 root 126:
1.1.1.6 root 127: static void dummy_wput(uaecptr addr, uae_u32 w)
1.1 root 128: {
129: if (illegal_mem)
1.1.1.3 root 130: write_log ("Illegal wput at %08lx\n", (long)addr);
1.1 root 131: }
1.1.1.5 root 132:
1.1.1.6 root 133: static void dummy_bput(uaecptr addr, uae_u32 b)
1.1 root 134: {
135: if (illegal_mem)
1.1.1.3 root 136: write_log ("Illegal bput at %08lx\n", (long)addr);
1.1 root 137: }
138:
1.1.1.6 root 139: static int dummy_check(uaecptr addr, uae_u32 size)
1.1 root 140: {
141: if (illegal_mem)
1.1.1.3 root 142: write_log ("Illegal check at %08lx\n", (long)addr);
1.1 root 143:
144: return 0;
145: }
146:
1.1.1.6 root 147: static uae_u8 *dummy_xlate(uaecptr addr)
1.1.1.5 root 148: {
149: write_log("Your Atari program just did something terribly stupid:"
150: " dummy_xlate($%x)\n", addr);
151: /*Reset_Warm();*/
152: return STmem_xlate(addr); /* So we don't crash. */
153: }
1.1 root 154:
155:
1.1.1.5 root 156: /* **** This memory bank only generates bus errors **** */
1.1 root 157:
1.1.1.6 root 158: static uae_u32 BusErrMem_lget(uaecptr addr)
1.1.1.5 root 159: {
160: if (illegal_mem)
161: write_log ("Bus error lget at %08lx\n", (long)addr);
162:
1.1.1.6 root 163: M68000_BusError(addr, 1);
1.1.1.5 root 164: return 0;
165: }
166:
1.1.1.6 root 167: static uae_u32 BusErrMem_wget(uaecptr addr)
1.1.1.5 root 168: {
169: if (illegal_mem)
170: write_log ("Bus error wget at %08lx\n", (long)addr);
171:
1.1.1.6 root 172: M68000_BusError(addr, 1);
1.1.1.5 root 173: return 0;
174: }
175:
1.1.1.6 root 176: static uae_u32 BusErrMem_bget(uaecptr addr)
1.1.1.5 root 177: {
178: if (illegal_mem)
179: write_log ("Bus error bget at %08lx\n", (long)addr);
180:
1.1.1.6 root 181: M68000_BusError(addr, 1);
1.1.1.5 root 182: return 0;
183: }
184:
1.1.1.6 root 185: static void BusErrMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 186: {
187: if (illegal_mem)
188: write_log ("Bus error lput at %08lx\n", (long)addr);
189:
1.1.1.6 root 190: M68000_BusError(addr, 0);
1.1.1.5 root 191: }
192:
1.1.1.6 root 193: static void BusErrMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 194: {
195: if (illegal_mem)
196: write_log ("Bus error wput at %08lx\n", (long)addr);
197:
1.1.1.6 root 198: M68000_BusError(addr, 0);
1.1.1.5 root 199: }
200:
1.1.1.6 root 201: static void BusErrMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 202: {
203: if (illegal_mem)
204: write_log ("Bus error bput at %08lx\n", (long)addr);
205:
1.1.1.6 root 206: M68000_BusError(addr, 0);
1.1.1.5 root 207: }
208:
1.1.1.6 root 209: static int BusErrMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 210: {
211: if (illegal_mem)
212: write_log ("Bus error check at %08lx\n", (long)addr);
213:
214: return 0;
215: }
216:
1.1.1.6 root 217: static uae_u8 *BusErrMem_xlate (uaecptr addr)
1.1.1.5 root 218: {
219: write_log("Your Atari program just did something terribly stupid:"
220: " BusErrMem_xlate($%x)\n", addr);
221:
222: /*M68000_BusError(addr);*/
223: return STmem_xlate(addr); /* So we don't crash. */
224: }
225:
226:
227: /* **** ST RAM memory **** */
228:
1.1.1.9 root 229: /*static uae_u8 *STmemory;*/
230: #define STmemory STRam
1.1 root 231:
1.1.1.6 root 232: static uae_u32 STmem_lget(uaecptr addr)
1.1 root 233: {
234: addr -= STmem_start & STmem_mask;
235: addr &= STmem_mask;
1.1.1.7 root 236: return do_get_mem_long(STmemory + addr);
1.1 root 237: }
238:
1.1.1.6 root 239: static uae_u32 STmem_wget(uaecptr addr)
1.1 root 240: {
241: addr -= STmem_start & STmem_mask;
242: addr &= STmem_mask;
1.1.1.7 root 243: return do_get_mem_word(STmemory + addr);
1.1 root 244: }
245:
1.1.1.6 root 246: static uae_u32 STmem_bget(uaecptr addr)
1.1 root 247: {
248: addr -= STmem_start & STmem_mask;
249: addr &= STmem_mask;
250: return STmemory[addr];
251: }
252:
1.1.1.6 root 253: static void STmem_lput(uaecptr addr, uae_u32 l)
1.1 root 254: {
255: addr -= STmem_start & STmem_mask;
256: addr &= STmem_mask;
1.1.1.7 root 257: do_put_mem_long(STmemory + addr, l);
1.1 root 258: }
259:
1.1.1.6 root 260: static void STmem_wput(uaecptr addr, uae_u32 w)
1.1 root 261: {
262: addr -= STmem_start & STmem_mask;
263: addr &= STmem_mask;
1.1.1.7 root 264: do_put_mem_word(STmemory + addr, w);
1.1 root 265: }
266:
1.1.1.6 root 267: static void STmem_bput(uaecptr addr, uae_u32 b)
1.1 root 268: {
269: addr -= STmem_start & STmem_mask;
270: addr &= STmem_mask;
271: STmemory[addr] = b;
272: }
273:
1.1.1.6 root 274: static int STmem_check(uaecptr addr, uae_u32 size)
1.1 root 275: {
276: addr -= STmem_start & STmem_mask;
277: addr &= STmem_mask;
1.1.1.5 root 278: return (addr + size) <= STmem_size;
1.1 root 279: }
280:
1.1.1.6 root 281: static uae_u8 *STmem_xlate(uaecptr addr)
1.1 root 282: {
283: addr -= STmem_start & STmem_mask;
284: addr &= STmem_mask;
285: return STmemory + addr;
286: }
287:
288:
1.1.1.5 root 289: /*
290: * **** ST RAM system memory ****
291: * We need a separate mem bank for this region since the first 0x800 bytes on
292: * the ST can only be accessed in supervisor mode. Note that the very first
293: * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write
294: * protected!
295: */
1.1.1.6 root 296: static uae_u32 SysMem_lget(uaecptr addr)
1.1.1.5 root 297: {
298: if(addr < 0x800 && !regs.s)
299: {
1.1.1.6 root 300: M68000_BusError(addr, 1);
1.1.1.5 root 301: return 0;
302: }
303:
304: addr -= STmem_start & STmem_mask;
305: addr &= STmem_mask;
1.1.1.7 root 306:
307: return do_get_mem_long(STmemory + addr);
1.1.1.5 root 308: }
309:
1.1.1.6 root 310: static uae_u32 SysMem_wget(uaecptr addr)
1.1.1.5 root 311: {
312: if(addr < 0x800 && !regs.s)
313: {
1.1.1.6 root 314: M68000_BusError(addr, 1);
1.1.1.5 root 315: return 0;
316: }
317:
318: addr -= STmem_start & STmem_mask;
319: addr &= STmem_mask;
1.1.1.7 root 320:
321: return do_get_mem_word(STmemory + addr);
1.1.1.5 root 322: }
323:
1.1.1.6 root 324: static uae_u32 SysMem_bget(uaecptr addr)
1.1.1.5 root 325: {
326: if(addr < 0x800 && !regs.s)
327: {
1.1.1.6 root 328: M68000_BusError(addr, 1);
1.1.1.5 root 329: return 0;
330: }
331:
332: addr -= STmem_start & STmem_mask;
333: addr &= STmem_mask;
334: return STmemory[addr];
335: }
336:
1.1.1.6 root 337: static void SysMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 338: {
339: if(addr < 0x8 || (addr < 0x800 && !regs.s))
340: {
1.1.1.6 root 341: M68000_BusError(addr, 0);
1.1.1.5 root 342: return;
343: }
344:
345: addr -= STmem_start & STmem_mask;
346: addr &= STmem_mask;
1.1.1.7 root 347:
348: do_put_mem_long(STmemory + addr, l);
1.1.1.5 root 349: }
350:
1.1.1.6 root 351: static void SysMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 352: {
353: if(addr < 0x8 || (addr < 0x800 && !regs.s))
354: {
1.1.1.6 root 355: M68000_BusError(addr, 0);
1.1.1.5 root 356: return;
357: }
358:
359: addr -= STmem_start & STmem_mask;
360: addr &= STmem_mask;
1.1.1.7 root 361:
362: do_put_mem_word(STmemory + addr, w);
1.1.1.5 root 363: }
364:
1.1.1.6 root 365: static void SysMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 366: {
367: if(addr < 0x8 || (addr < 0x800 && !regs.s))
368: {
1.1.1.6 root 369: M68000_BusError(addr, 0);
1.1.1.5 root 370: return;
371: }
372:
373: addr -= STmem_start & STmem_mask;
374: addr &= STmem_mask;
375: STmemory[addr] = b;
376: }
377:
378:
379: /*
380: * **** Void memory ****
381: * Between the ST-RAM end and the 4 MB barrier, there is a void memory space:
382: * Reading always returns the same value and writing does nothing at all.
383: */
384:
1.1.1.6 root 385: static uae_u32 VoidMem_lget(uaecptr addr)
1.1.1.5 root 386: {
387: return 0;
388: }
389:
1.1.1.6 root 390: static uae_u32 VoidMem_wget(uaecptr addr)
1.1.1.5 root 391: {
392: return 0;
393: }
394:
1.1.1.6 root 395: static uae_u32 VoidMem_bget(uaecptr addr)
1.1.1.5 root 396: {
397: return 0;
398: }
399:
1.1.1.6 root 400: static void VoidMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 401: {
402: }
403:
1.1.1.6 root 404: static void VoidMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 405: {
406: }
407:
1.1.1.6 root 408: static void VoidMem_bput (uaecptr addr, uae_u32 b)
1.1.1.5 root 409: {
410: }
411:
1.1.1.6 root 412: static int VoidMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 413: {
414: if (illegal_mem)
415: write_log ("Void memory check at %08lx\n", (long)addr);
416:
417: return 0;
418: }
419:
1.1.1.6 root 420: static uae_u8 *VoidMem_xlate (uaecptr addr)
1.1.1.5 root 421: {
422: write_log("Your Atari program just did something terribly stupid:"
423: " VoidMem_xlate($%x)\n", addr);
424:
425: return STmem_xlate(addr); /* So we don't crash. */
426: }
427:
428:
429: /* **** TT fast memory (not yet supported) **** */
1.1 root 430:
431: static uae_u8 *TTmemory;
432:
1.1.1.6 root 433: static uae_u32 TTmem_lget(uaecptr addr)
1.1 root 434: {
435: addr -= TTmem_start & TTmem_mask;
436: addr &= TTmem_mask;
1.1.1.7 root 437: return do_get_mem_long(TTmemory + addr);
1.1 root 438: }
439:
1.1.1.6 root 440: static uae_u32 TTmem_wget(uaecptr addr)
1.1 root 441: {
442: addr -= TTmem_start & TTmem_mask;
443: addr &= TTmem_mask;
1.1.1.7 root 444: return do_get_mem_word(TTmemory + addr);
1.1 root 445: }
446:
1.1.1.6 root 447: static uae_u32 TTmem_bget(uaecptr addr)
1.1 root 448: {
449: addr -= TTmem_start & TTmem_mask;
450: addr &= TTmem_mask;
451: return TTmemory[addr];
452: }
453:
1.1.1.6 root 454: static void TTmem_lput(uaecptr addr, uae_u32 l)
1.1 root 455: {
456: addr -= TTmem_start & TTmem_mask;
457: addr &= TTmem_mask;
1.1.1.7 root 458: do_put_mem_long(TTmemory + addr, l);
1.1 root 459: }
460:
1.1.1.6 root 461: static void TTmem_wput(uaecptr addr, uae_u32 w)
1.1 root 462: {
463: addr -= TTmem_start & TTmem_mask;
464: addr &= TTmem_mask;
1.1.1.7 root 465: do_put_mem_word(TTmemory + addr, w);
1.1 root 466: }
467:
1.1.1.6 root 468: static void TTmem_bput(uaecptr addr, uae_u32 b)
1.1 root 469: {
470: addr -= TTmem_start & TTmem_mask;
471: addr &= TTmem_mask;
472: TTmemory[addr] = b;
473: }
474:
1.1.1.6 root 475: static int TTmem_check(uaecptr addr, uae_u32 size)
1.1 root 476: {
477: addr -= TTmem_start & TTmem_mask;
478: addr &= TTmem_mask;
1.1.1.5 root 479: return (addr + size) <= TTmem_size;
1.1 root 480: }
481:
1.1.1.6 root 482: static uae_u8 *TTmem_xlate(uaecptr addr)
1.1 root 483: {
484: addr -= TTmem_start & TTmem_mask;
485: addr &= TTmem_mask;
486: return TTmemory + addr;
487: }
488:
1.1.1.5 root 489:
490: /* **** ROM memory **** */
1.1 root 491:
1.1.1.10 root 492: uae_u8 *ROMmemory;
1.1 root 493:
1.1.1.6 root 494: static uae_u32 ROMmem_lget(uaecptr addr)
1.1 root 495: {
496: addr -= ROMmem_start & ROMmem_mask;
497: addr &= ROMmem_mask;
1.1.1.7 root 498: return do_get_mem_long(ROMmemory + addr);
1.1 root 499: }
500:
1.1.1.6 root 501: static uae_u32 ROMmem_wget(uaecptr addr)
1.1 root 502: {
503: addr -= ROMmem_start & ROMmem_mask;
504: addr &= ROMmem_mask;
1.1.1.7 root 505: return do_get_mem_word(ROMmemory + addr);
1.1 root 506: }
507:
1.1.1.6 root 508: static uae_u32 ROMmem_bget(uaecptr addr)
1.1 root 509: {
510: addr -= ROMmem_start & ROMmem_mask;
511: addr &= ROMmem_mask;
512: return ROMmemory[addr];
513: }
514:
1.1.1.6 root 515: static void ROMmem_lput(uaecptr addr, uae_u32 b)
1.1 root 516: {
517: if (illegal_mem)
1.1.1.3 root 518: write_log ("Illegal ROMmem lput at %08lx\n", (long)addr);
1.1.1.5 root 519:
1.1.1.6 root 520: M68000_BusError(addr, 0);
1.1 root 521: }
522:
1.1.1.6 root 523: static void ROMmem_wput(uaecptr addr, uae_u32 b)
1.1 root 524: {
525: if (illegal_mem)
1.1.1.3 root 526: write_log ("Illegal ROMmem wput at %08lx\n", (long)addr);
1.1.1.5 root 527:
1.1.1.6 root 528: M68000_BusError(addr, 0);
1.1 root 529: }
530:
1.1.1.6 root 531: static void ROMmem_bput(uaecptr addr, uae_u32 b)
1.1 root 532: {
533: if (illegal_mem)
1.1.1.5 root 534: write_log ("Illegal ROMmem bput at %08lx\n", (long)addr);
535:
1.1.1.6 root 536: M68000_BusError(addr, 0);
1.1 root 537: }
538:
1.1.1.6 root 539: static int ROMmem_check(uaecptr addr, uae_u32 size)
1.1 root 540: {
541: addr -= ROMmem_start & ROMmem_mask;
542: addr &= ROMmem_mask;
543: return (addr + size) <= ROMmem_size;
544: }
545:
1.1.1.6 root 546: static uae_u8 *ROMmem_xlate(uaecptr addr)
1.1 root 547: {
548: addr -= ROMmem_start & ROMmem_mask;
549: addr &= ROMmem_mask;
550: return ROMmemory + addr;
551: }
552:
553:
1.1.1.10 root 554: /* IDE controller IO memory */
555: /* see also ide.c */
556:
557: static uae_u8 *IdeMemory;
558:
559: static int IdeMem_check(uaecptr addr, uae_u32 size)
560: {
561: addr -= IdeMem_start;
562: addr &= IdeMem_mask;
563: return (addr + size) <= IdeMem_size;
564: }
565:
566: static uae_u8 *IdeMem_xlate(uaecptr addr)
567: {
568: addr -= IdeMem_start;
569: addr &= IdeMem_mask;
570: return IdeMemory + addr;
571: }
572:
573:
1.1 root 574: /* Hardware IO memory */
1.1.1.10 root 575: /* see also ioMem.c */
1.1 root 576:
1.1.1.10 root 577: uae_u8 *IOmemory;
1.1 root 578:
1.1.1.6 root 579: static int IOmem_check(uaecptr addr, uae_u32 size)
1.1 root 580: {
1.1.1.5 root 581: addr -= IOmem_start;
1.1 root 582: addr &= IOmem_mask;
583: return (addr + size) <= IOmem_size;
584: }
585:
1.1.1.6 root 586: static uae_u8 *IOmem_xlate(uaecptr addr)
1.1 root 587: {
1.1.1.5 root 588: addr -= IOmem_start;
1.1 root 589: addr &= IOmem_mask;
590: return IOmemory + addr;
591: }
592:
593:
594:
1.1.1.5 root 595: /* **** Address banks **** */
1.1 root 596:
1.1.1.6 root 597: static addrbank dummy_bank =
598: {
1.1 root 599: dummy_lget, dummy_wget, dummy_bget,
600: dummy_lput, dummy_wput, dummy_bput,
1.1.1.5 root 601: dummy_xlate, dummy_check
602: };
603:
1.1.1.6 root 604: static addrbank BusErrMem_bank =
605: {
1.1.1.5 root 606: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget,
607: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput,
608: BusErrMem_xlate, BusErrMem_check
1.1 root 609: };
610:
1.1.1.6 root 611: static addrbank STmem_bank =
612: {
1.1 root 613: STmem_lget, STmem_wget, STmem_bget,
614: STmem_lput, STmem_wput, STmem_bput,
615: STmem_xlate, STmem_check
616: };
617:
1.1.1.6 root 618: static addrbank SysMem_bank =
619: {
1.1.1.5 root 620: SysMem_lget, SysMem_wget, SysMem_bget,
621: SysMem_lput, SysMem_wput, SysMem_bput,
622: STmem_xlate, STmem_check
623: };
624:
1.1.1.6 root 625: static addrbank VoidMem_bank =
626: {
1.1.1.5 root 627: VoidMem_lget, VoidMem_wget, VoidMem_bget,
628: VoidMem_lput, VoidMem_wput, VoidMem_bput,
629: VoidMem_xlate, VoidMem_check
630: };
631:
1.1.1.6 root 632: static addrbank TTmem_bank =
633: {
1.1 root 634: TTmem_lget, TTmem_wget, TTmem_bget,
635: TTmem_lput, TTmem_wput, TTmem_bput,
636: TTmem_xlate, TTmem_check
637: };
638:
1.1.1.6 root 639: static addrbank ROMmem_bank =
640: {
1.1 root 641: ROMmem_lget, ROMmem_wget, ROMmem_bget,
642: ROMmem_lput, ROMmem_wput, ROMmem_bput,
643: ROMmem_xlate, ROMmem_check
644: };
645:
1.1.1.10 root 646: static addrbank IdeMem_bank =
647: {
648: Ide_Mem_lget, Ide_Mem_wget, Ide_Mem_bget,
649: Ide_Mem_lput, Ide_Mem_wput, Ide_Mem_bput,
650: IdeMem_xlate, IdeMem_check
651: };
652:
1.1.1.6 root 653: static addrbank IOmem_bank =
654: {
1.1.1.7 root 655: IoMem_lget, IoMem_wget, IoMem_bget,
656: IoMem_lput, IoMem_wput, IoMem_bput,
1.1 root 657: IOmem_xlate, IOmem_check
658: };
659:
660:
1.1.1.5 root 661:
1.1 root 662: static void init_mem_banks (void)
663: {
664: int i;
665: for (i = 0; i < 65536; i++)
666: put_mem_bank (i<<16, &dummy_bank);
667: }
668:
669:
670: /*
1.1.1.5 root 671: * Initialize the memory banks
672: */
1.1.1.8 root 673: void memory_init(uae_u32 nNewSTMemSize, uae_u32 nNewTTMemSize, uae_u32 nNewRomMemStart)
1.1.1.5 root 674: {
1.1.1.8 root 675: STmem_size = (nNewSTMemSize + 65535) & 0xFFFF0000;
676: TTmem_size = (nNewTTMemSize + 65535) & 0xFFFF0000;
1.1.1.5 root 677:
678: /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n",
1.1.1.8 root 679: STmem_size, TTmem_size, nNewRomMemStart);*/
1.1.1.5 root 680:
1.1.1.10 root 681: #if ENABLE_SMALL_MEM
1.1.1.9 root 682:
1.1.1.10 root 683: /* Allocate memory for ROM areas and IO memory space (0xE00000 - 0xFFFFFF) */
684: ROMmemory = malloc(2*1024*1024);
685: if (!ROMmemory) {
686: fprintf(stderr, "Out of memory (ROM/IO mem)!\n");
1.1.1.11 root 687: SDL_Quit();
1.1.1.10 root 688: exit(1);
689: }
690: IdeMemory = ROMmemory + 0x100000;
691: IOmemory = ROMmemory + 0x1f0000;
692:
693: /* Allocate memory for normal ST RAM */
694: STmemory = malloc(STmem_size);
695: while (!STmemory && STmem_size > 512*1024) {
1.1.1.5 root 696: STmem_size >>= 1;
697: STmemory = (uae_u8 *)malloc (STmem_size);
1.1 root 698: if (STmemory)
1.1.1.10 root 699: write_log ("Reducing STmem size to %dkb\n", STmem_size >> 10);
1.1 root 700: }
1.1.1.10 root 701: if (!STmemory) {
1.1 root 702: write_log ("virtual memory exhausted (STmemory)!\n");
1.1.1.11 root 703: SDL_Quit();
1.1.1.10 root 704: exit(1);
1.1 root 705: }
1.1.1.10 root 706:
707: #else
708:
709: /* STmemory points to the 16 MiB STRam array, we just have to set up
710: * the remaining pointers here: */
711: ROMmemory = STRam + ROMmem_start;
712: IdeMemory = STRam + IdeMem_start;
713: IOmemory = STRam + IOmem_start;
714:
715: #endif
1.1 root 716:
1.1.1.5 root 717: init_mem_banks();
1.1 root 718:
1.1.1.8 root 719: /* Map the ST system RAM: */
1.1.1.5 root 720: map_banks(&SysMem_bank, 0x00, 1);
1.1.1.8 root 721: /* Between STRamEnd and 4MB barrier, there is void space: */
722: map_banks(&VoidMem_bank, 0x08, 0x38);
723: /* Space between 4MB barrier and TOS ROM causes a bus error: */
724: map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0);
725: /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */
1.1.1.5 root 726: map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
727:
728: /* TT memory isn't really supported yet */
729: if (TTmem_size > 0)
730: TTmemory = (uae_u8 *)malloc (TTmem_size);
1.1 root 731: if (TTmemory != 0)
1.1.1.5 root 732: map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16);
733: else
734: TTmem_size = 0;
735: TTmem_mask = TTmem_size - 1;
736:
737: /* ROM memory: */
738: /* Depending on which ROM version we are using, the other ROM region is illegal! */
1.1.1.8 root 739: if(nNewRomMemStart == 0xFC0000)
1.1.1.5 root 740: {
741: map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3);
742: map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10);
743: }
1.1.1.8 root 744: else if(nNewRomMemStart == 0xE00000)
1.1.1.5 root 745: {
746: map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10);
747: map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3);
748: }
1.1 root 749: else
1.1.1.5 root 750: {
751: write_log("Illegal ROM memory start!\n");
752: }
1.1 root 753:
1.1.1.5 root 754: /* Cartridge memory: */
755: map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2);
1.1 root 756:
1.1.1.5 root 757: /* IO memory: */
758: map_banks(&IOmem_bank, IOmem_start>>16, 0x1);
1.1 root 759:
1.1.1.10 root 760: /* IDE controller memory region: */
761: map_banks(&IdeMem_bank, IdeMem_start >> 16, 0x1); /* IDE controller on the Falcon */
762:
1.1.1.5 root 763: /* Illegal memory regions cause a bus error on the ST: */
1.1.1.10 root 764: map_banks(&BusErrMem_bank, 0xF10000 >> 16, 0x9);
1.1 root 765: }
766:
1.1.1.5 root 767:
768: /*
769: * Uninitialize the memory banks.
770: */
771: void memory_uninit (void)
772: {
773: /* Here, we free allocated memory from memory_init */
1.1.1.10 root 774: if (TTmem_size > 0) {
775: free(TTmemory);
776: TTmemory = NULL;
777: }
778:
779: #if ENABLE_SMALL_MEM
780:
781: if (STmemory) {
782: free(STmemory);
783: STmemory = NULL;
784: }
785:
786: if (ROMmemory) {
787: free(ROMmemory);
788: ROMmemory = NULL;
1.1.1.5 root 789: }
1.1.1.10 root 790:
791: #endif /* ENABLE_SMALL_MEM */
1.1.1.5 root 792: }
793:
794:
1.1 root 795: void map_banks (addrbank *bank, int start, int size)
796: {
797: int bnr;
798: unsigned long int hioffs = 0, endhioffs = 0x100;
799:
800: if (start >= 0x100) {
801: for (bnr = start; bnr < start + size; bnr++)
802: put_mem_bank (bnr << 16, bank);
803: return;
804: }
805: /* Some ROMs apparently require a 24 bit address space... */
1.1.1.10 root 806: if (currprefs.address_space_24)
1.1 root 807: endhioffs = 0x10000;
808: for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100)
809: for (bnr = start; bnr < start+size; bnr++)
810: put_mem_bank ((bnr + hioffs) << 16, bank);
811: }
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