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1.1 root 1: /*
1.1.1.4 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * Memory management
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
1.1.1.4 root 9: *
1.1.1.16 root 10: * This file is distributed under the GNU General Public License, version 2
11: * or at your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.13 root 13: const char Memory_fileid[] = "Hatari memory.c : " __DATE__ " " __TIME__;
1.1 root 14:
1.1.1.17! root 15: #include <SDL.h>
1.1.1.10 root 16: #include "config.h"
1.1 root 17: #include "sysdeps.h"
18: #include "hatari-glue.h"
19: #include "maccess.h"
20: #include "memory.h"
1.1.1.14 root 21:
22: #include "main.h"
23: #include "tos.h"
24: #include "ide.h"
25: #include "ioMem.h"
26: #include "reset.h"
27: #include "stMemory.h"
28: #include "m68000.h"
29:
1.1.1.5 root 30: #include "newcpu.h"
1.1 root 31:
32:
1.1.1.10 root 33: /* Set illegal_mem to 1 for debug output: */
34: #define illegal_mem 1
35:
1.1.1.17! root 36: static int illegal_count = 50;
1.1.1.10 root 37:
1.1.1.6 root 38: static uae_u32 STmem_size, TTmem_size = 0;
39: static uae_u32 TTmem_mask;
1.1 root 40:
1.1.1.5 root 41: #define STmem_start 0x00000000
42: #define ROMmem_start 0x00E00000
1.1.1.10 root 43: #define IdeMem_start 0x00F00000
1.1.1.5 root 44: #define IOmem_start 0x00FF0000
45: #define TTmem_start 0x01000000
1.1 root 46:
1.1.1.10 root 47: #define IdeMem_size 65536
1.1.1.5 root 48: #define IOmem_size 65536
49: #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */
1.1 root 50:
1.1.1.5 root 51: #define STmem_mask 0x00ffffff
52: #define ROMmem_mask 0x00ffffff
1.1.1.10 root 53: #define IdeMem_mask (IdeMem_size - 1)
1.1.1.5 root 54: #define IOmem_mask (IOmem_size - 1)
1.1 root 55:
56:
57: #ifdef SAVE_MEMORY_BANKS
58: addrbank *mem_banks[65536];
59: #else
60: addrbank mem_banks[65536];
61: #endif
62:
63: #ifdef NO_INLINE_MEMORY_ACCESS
64: __inline__ uae_u32 longget (uaecptr addr)
65: {
66: return call_mem_get_func (get_mem_bank (addr).lget, addr);
67: }
68: __inline__ uae_u32 wordget (uaecptr addr)
69: {
70: return call_mem_get_func (get_mem_bank (addr).wget, addr);
71: }
72: __inline__ uae_u32 byteget (uaecptr addr)
73: {
74: return call_mem_get_func (get_mem_bank (addr).bget, addr);
75: }
76: __inline__ void longput (uaecptr addr, uae_u32 l)
77: {
78: call_mem_put_func (get_mem_bank (addr).lput, addr, l);
79: }
80: __inline__ void wordput (uaecptr addr, uae_u32 w)
81: {
82: call_mem_put_func (get_mem_bank (addr).wput, addr, w);
83: }
84: __inline__ void byteput (uaecptr addr, uae_u32 b)
85: {
86: call_mem_put_func (get_mem_bank (addr).bput, addr, b);
87: }
88: #endif
89:
90:
1.1.1.5 root 91: /* Some prototypes: */
92: static int STmem_check (uaecptr addr, uae_u32 size) REGPARAM;
93: static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM;
94:
95:
1.1.1.17! root 96: static void print_illegal_counted(const char *txt, uaecptr addr)
! 97: {
! 98: if (!illegal_mem || illegal_count <= 0)
! 99: return;
! 100:
! 101: write_log("%s at %08lx\n", txt, (long)addr);
! 102: if (--illegal_count == 0)
! 103: write_log("Suppressing further messages about illegal memory accesses.\n");
! 104: }
! 105:
! 106:
1.1 root 107: /* A dummy bank that only contains zeros */
108:
1.1.1.6 root 109: static uae_u32 dummy_lget(uaecptr addr)
1.1 root 110: {
111: if (illegal_mem)
1.1.1.3 root 112: write_log ("Illegal lget at %08lx\n", (long)addr);
1.1 root 113:
114: return 0;
115: }
116:
1.1.1.6 root 117: static uae_u32 dummy_wget(uaecptr addr)
1.1 root 118: {
119: if (illegal_mem)
1.1.1.3 root 120: write_log ("Illegal wget at %08lx\n", (long)addr);
1.1 root 121:
122: return 0;
123: }
124:
1.1.1.6 root 125: static uae_u32 dummy_bget(uaecptr addr)
1.1 root 126: {
127: if (illegal_mem)
1.1.1.3 root 128: write_log ("Illegal bget at %08lx\n", (long)addr);
1.1 root 129:
130: return 0;
131: }
132:
1.1.1.6 root 133: static void dummy_lput(uaecptr addr, uae_u32 l)
1.1 root 134: {
135: if (illegal_mem)
1.1.1.3 root 136: write_log ("Illegal lput at %08lx\n", (long)addr);
1.1 root 137: }
1.1.1.5 root 138:
1.1.1.6 root 139: static void dummy_wput(uaecptr addr, uae_u32 w)
1.1 root 140: {
141: if (illegal_mem)
1.1.1.3 root 142: write_log ("Illegal wput at %08lx\n", (long)addr);
1.1 root 143: }
1.1.1.5 root 144:
1.1.1.6 root 145: static void dummy_bput(uaecptr addr, uae_u32 b)
1.1 root 146: {
147: if (illegal_mem)
1.1.1.3 root 148: write_log ("Illegal bput at %08lx\n", (long)addr);
1.1 root 149: }
150:
1.1.1.6 root 151: static int dummy_check(uaecptr addr, uae_u32 size)
1.1 root 152: {
153: if (illegal_mem)
1.1.1.3 root 154: write_log ("Illegal check at %08lx\n", (long)addr);
1.1 root 155:
156: return 0;
157: }
158:
1.1.1.6 root 159: static uae_u8 *dummy_xlate(uaecptr addr)
1.1.1.5 root 160: {
161: write_log("Your Atari program just did something terribly stupid:"
162: " dummy_xlate($%x)\n", addr);
163: /*Reset_Warm();*/
164: return STmem_xlate(addr); /* So we don't crash. */
165: }
1.1 root 166:
167:
1.1.1.5 root 168: /* **** This memory bank only generates bus errors **** */
1.1 root 169:
1.1.1.6 root 170: static uae_u32 BusErrMem_lget(uaecptr addr)
1.1.1.5 root 171: {
1.1.1.17! root 172: print_illegal_counted("Bus error lget", addr);
1.1.1.5 root 173:
1.1.1.15 root 174: M68000_BusError(addr, BUS_ERROR_READ);
1.1.1.5 root 175: return 0;
176: }
177:
1.1.1.6 root 178: static uae_u32 BusErrMem_wget(uaecptr addr)
1.1.1.5 root 179: {
1.1.1.17! root 180: print_illegal_counted("Bus error wget", addr);
1.1.1.5 root 181:
1.1.1.15 root 182: M68000_BusError(addr, BUS_ERROR_READ);
1.1.1.5 root 183: return 0;
184: }
185:
1.1.1.6 root 186: static uae_u32 BusErrMem_bget(uaecptr addr)
1.1.1.5 root 187: {
1.1.1.17! root 188: print_illegal_counted("Bus error bget", addr);
1.1.1.5 root 189:
1.1.1.15 root 190: M68000_BusError(addr, BUS_ERROR_READ);
1.1.1.5 root 191: return 0;
192: }
193:
1.1.1.6 root 194: static void BusErrMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 195: {
1.1.1.17! root 196: print_illegal_counted("Bus error lput", addr);
1.1.1.5 root 197:
1.1.1.15 root 198: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1.1.5 root 199: }
200:
1.1.1.6 root 201: static void BusErrMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 202: {
1.1.1.17! root 203: print_illegal_counted("Bus error wput", addr);
1.1.1.5 root 204:
1.1.1.15 root 205: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1.1.5 root 206: }
207:
1.1.1.6 root 208: static void BusErrMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 209: {
1.1.1.17! root 210: print_illegal_counted("Bus error bput", addr);
1.1.1.5 root 211:
1.1.1.15 root 212: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1.1.5 root 213: }
214:
1.1.1.6 root 215: static int BusErrMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 216: {
217: if (illegal_mem)
218: write_log ("Bus error check at %08lx\n", (long)addr);
219:
220: return 0;
221: }
222:
1.1.1.6 root 223: static uae_u8 *BusErrMem_xlate (uaecptr addr)
1.1.1.5 root 224: {
225: write_log("Your Atari program just did something terribly stupid:"
226: " BusErrMem_xlate($%x)\n", addr);
227:
228: /*M68000_BusError(addr);*/
229: return STmem_xlate(addr); /* So we don't crash. */
230: }
231:
232:
233: /* **** ST RAM memory **** */
234:
1.1.1.9 root 235: /*static uae_u8 *STmemory;*/
236: #define STmemory STRam
1.1 root 237:
1.1.1.6 root 238: static uae_u32 STmem_lget(uaecptr addr)
1.1 root 239: {
240: addr -= STmem_start & STmem_mask;
241: addr &= STmem_mask;
1.1.1.7 root 242: return do_get_mem_long(STmemory + addr);
1.1 root 243: }
244:
1.1.1.6 root 245: static uae_u32 STmem_wget(uaecptr addr)
1.1 root 246: {
247: addr -= STmem_start & STmem_mask;
248: addr &= STmem_mask;
1.1.1.7 root 249: return do_get_mem_word(STmemory + addr);
1.1 root 250: }
251:
1.1.1.6 root 252: static uae_u32 STmem_bget(uaecptr addr)
1.1 root 253: {
254: addr -= STmem_start & STmem_mask;
255: addr &= STmem_mask;
256: return STmemory[addr];
257: }
258:
1.1.1.6 root 259: static void STmem_lput(uaecptr addr, uae_u32 l)
1.1 root 260: {
261: addr -= STmem_start & STmem_mask;
262: addr &= STmem_mask;
1.1.1.7 root 263: do_put_mem_long(STmemory + addr, l);
1.1 root 264: }
265:
1.1.1.6 root 266: static void STmem_wput(uaecptr addr, uae_u32 w)
1.1 root 267: {
268: addr -= STmem_start & STmem_mask;
269: addr &= STmem_mask;
1.1.1.7 root 270: do_put_mem_word(STmemory + addr, w);
1.1 root 271: }
272:
1.1.1.6 root 273: static void STmem_bput(uaecptr addr, uae_u32 b)
1.1 root 274: {
275: addr -= STmem_start & STmem_mask;
276: addr &= STmem_mask;
277: STmemory[addr] = b;
278: }
279:
1.1.1.6 root 280: static int STmem_check(uaecptr addr, uae_u32 size)
1.1 root 281: {
282: addr -= STmem_start & STmem_mask;
283: addr &= STmem_mask;
1.1.1.5 root 284: return (addr + size) <= STmem_size;
1.1 root 285: }
286:
1.1.1.6 root 287: static uae_u8 *STmem_xlate(uaecptr addr)
1.1 root 288: {
289: addr -= STmem_start & STmem_mask;
290: addr &= STmem_mask;
291: return STmemory + addr;
292: }
293:
294:
1.1.1.5 root 295: /*
296: * **** ST RAM system memory ****
297: * We need a separate mem bank for this region since the first 0x800 bytes on
298: * the ST can only be accessed in supervisor mode. Note that the very first
299: * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write
300: * protected!
301: */
1.1.1.6 root 302: static uae_u32 SysMem_lget(uaecptr addr)
1.1.1.5 root 303: {
304: if(addr < 0x800 && !regs.s)
305: {
1.1.1.15 root 306: M68000_BusError(addr, BUS_ERROR_READ);
1.1.1.5 root 307: return 0;
308: }
309:
310: addr -= STmem_start & STmem_mask;
311: addr &= STmem_mask;
1.1.1.7 root 312:
313: return do_get_mem_long(STmemory + addr);
1.1.1.5 root 314: }
315:
1.1.1.6 root 316: static uae_u32 SysMem_wget(uaecptr addr)
1.1.1.5 root 317: {
318: if(addr < 0x800 && !regs.s)
319: {
1.1.1.15 root 320: M68000_BusError(addr, BUS_ERROR_READ);
1.1.1.5 root 321: return 0;
322: }
323:
324: addr -= STmem_start & STmem_mask;
325: addr &= STmem_mask;
1.1.1.7 root 326:
327: return do_get_mem_word(STmemory + addr);
1.1.1.5 root 328: }
329:
1.1.1.6 root 330: static uae_u32 SysMem_bget(uaecptr addr)
1.1.1.5 root 331: {
332: if(addr < 0x800 && !regs.s)
333: {
1.1.1.15 root 334: M68000_BusError(addr, BUS_ERROR_READ);
1.1.1.5 root 335: return 0;
336: }
337:
338: addr -= STmem_start & STmem_mask;
339: addr &= STmem_mask;
340: return STmemory[addr];
341: }
342:
1.1.1.6 root 343: static void SysMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 344: {
345: if(addr < 0x8 || (addr < 0x800 && !regs.s))
346: {
1.1.1.15 root 347: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1.1.5 root 348: return;
349: }
350:
351: addr -= STmem_start & STmem_mask;
352: addr &= STmem_mask;
1.1.1.7 root 353:
354: do_put_mem_long(STmemory + addr, l);
1.1.1.5 root 355: }
356:
1.1.1.6 root 357: static void SysMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 358: {
359: if(addr < 0x8 || (addr < 0x800 && !regs.s))
360: {
1.1.1.15 root 361: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1.1.5 root 362: return;
363: }
364:
365: addr -= STmem_start & STmem_mask;
366: addr &= STmem_mask;
1.1.1.7 root 367:
368: do_put_mem_word(STmemory + addr, w);
1.1.1.5 root 369: }
370:
1.1.1.6 root 371: static void SysMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 372: {
373: if(addr < 0x8 || (addr < 0x800 && !regs.s))
374: {
1.1.1.15 root 375: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1.1.5 root 376: return;
377: }
378:
379: addr -= STmem_start & STmem_mask;
380: addr &= STmem_mask;
381: STmemory[addr] = b;
382: }
383:
384:
385: /*
386: * **** Void memory ****
387: * Between the ST-RAM end and the 4 MB barrier, there is a void memory space:
388: * Reading always returns the same value and writing does nothing at all.
1.1.1.17! root 389: * [NP] : this is not correct, reading does not always return 0, when there's
! 390: * no memory, it will return the latest data that was read on the bus.
! 391: * In many cases, this will return the word that was just read in the 68000's
! 392: * prefetch register to decode the next opcode (tested on a real STF)
1.1.1.5 root 393: */
394:
1.1.1.6 root 395: static uae_u32 VoidMem_lget(uaecptr addr)
1.1.1.5 root 396: {
397: return 0;
398: }
399:
1.1.1.6 root 400: static uae_u32 VoidMem_wget(uaecptr addr)
1.1.1.5 root 401: {
402: return 0;
403: }
404:
1.1.1.6 root 405: static uae_u32 VoidMem_bget(uaecptr addr)
1.1.1.5 root 406: {
407: return 0;
408: }
409:
1.1.1.6 root 410: static void VoidMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 411: {
412: }
413:
1.1.1.6 root 414: static void VoidMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 415: {
416: }
417:
1.1.1.6 root 418: static void VoidMem_bput (uaecptr addr, uae_u32 b)
1.1.1.5 root 419: {
420: }
421:
1.1.1.6 root 422: static int VoidMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 423: {
424: if (illegal_mem)
425: write_log ("Void memory check at %08lx\n", (long)addr);
426:
427: return 0;
428: }
429:
1.1.1.6 root 430: static uae_u8 *VoidMem_xlate (uaecptr addr)
1.1.1.5 root 431: {
432: write_log("Your Atari program just did something terribly stupid:"
433: " VoidMem_xlate($%x)\n", addr);
434:
435: return STmem_xlate(addr); /* So we don't crash. */
436: }
437:
438:
439: /* **** TT fast memory (not yet supported) **** */
1.1 root 440:
441: static uae_u8 *TTmemory;
442:
1.1.1.6 root 443: static uae_u32 TTmem_lget(uaecptr addr)
1.1 root 444: {
445: addr -= TTmem_start & TTmem_mask;
446: addr &= TTmem_mask;
1.1.1.7 root 447: return do_get_mem_long(TTmemory + addr);
1.1 root 448: }
449:
1.1.1.6 root 450: static uae_u32 TTmem_wget(uaecptr addr)
1.1 root 451: {
452: addr -= TTmem_start & TTmem_mask;
453: addr &= TTmem_mask;
1.1.1.7 root 454: return do_get_mem_word(TTmemory + addr);
1.1 root 455: }
456:
1.1.1.6 root 457: static uae_u32 TTmem_bget(uaecptr addr)
1.1 root 458: {
459: addr -= TTmem_start & TTmem_mask;
460: addr &= TTmem_mask;
461: return TTmemory[addr];
462: }
463:
1.1.1.6 root 464: static void TTmem_lput(uaecptr addr, uae_u32 l)
1.1 root 465: {
466: addr -= TTmem_start & TTmem_mask;
467: addr &= TTmem_mask;
1.1.1.7 root 468: do_put_mem_long(TTmemory + addr, l);
1.1 root 469: }
470:
1.1.1.6 root 471: static void TTmem_wput(uaecptr addr, uae_u32 w)
1.1 root 472: {
473: addr -= TTmem_start & TTmem_mask;
474: addr &= TTmem_mask;
1.1.1.7 root 475: do_put_mem_word(TTmemory + addr, w);
1.1 root 476: }
477:
1.1.1.6 root 478: static void TTmem_bput(uaecptr addr, uae_u32 b)
1.1 root 479: {
480: addr -= TTmem_start & TTmem_mask;
481: addr &= TTmem_mask;
482: TTmemory[addr] = b;
483: }
484:
1.1.1.6 root 485: static int TTmem_check(uaecptr addr, uae_u32 size)
1.1 root 486: {
487: addr -= TTmem_start & TTmem_mask;
488: addr &= TTmem_mask;
1.1.1.5 root 489: return (addr + size) <= TTmem_size;
1.1 root 490: }
491:
1.1.1.6 root 492: static uae_u8 *TTmem_xlate(uaecptr addr)
1.1 root 493: {
494: addr -= TTmem_start & TTmem_mask;
495: addr &= TTmem_mask;
496: return TTmemory + addr;
497: }
498:
1.1.1.5 root 499:
500: /* **** ROM memory **** */
1.1 root 501:
1.1.1.10 root 502: uae_u8 *ROMmemory;
1.1 root 503:
1.1.1.6 root 504: static uae_u32 ROMmem_lget(uaecptr addr)
1.1 root 505: {
506: addr -= ROMmem_start & ROMmem_mask;
507: addr &= ROMmem_mask;
1.1.1.7 root 508: return do_get_mem_long(ROMmemory + addr);
1.1 root 509: }
510:
1.1.1.6 root 511: static uae_u32 ROMmem_wget(uaecptr addr)
1.1 root 512: {
513: addr -= ROMmem_start & ROMmem_mask;
514: addr &= ROMmem_mask;
1.1.1.7 root 515: return do_get_mem_word(ROMmemory + addr);
1.1 root 516: }
517:
1.1.1.6 root 518: static uae_u32 ROMmem_bget(uaecptr addr)
1.1 root 519: {
520: addr -= ROMmem_start & ROMmem_mask;
521: addr &= ROMmem_mask;
522: return ROMmemory[addr];
523: }
524:
1.1.1.6 root 525: static void ROMmem_lput(uaecptr addr, uae_u32 b)
1.1 root 526: {
1.1.1.17! root 527: print_illegal_counted("Illegal ROMmem lput", (long)addr);
1.1.1.5 root 528:
1.1.1.15 root 529: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1 root 530: }
531:
1.1.1.6 root 532: static void ROMmem_wput(uaecptr addr, uae_u32 b)
1.1 root 533: {
1.1.1.17! root 534: print_illegal_counted("Illegal ROMmem wput", (long)addr);
1.1.1.5 root 535:
1.1.1.15 root 536: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1 root 537: }
538:
1.1.1.6 root 539: static void ROMmem_bput(uaecptr addr, uae_u32 b)
1.1 root 540: {
1.1.1.17! root 541: print_illegal_counted("Illegal ROMmem bput", (long)addr);
1.1.1.5 root 542:
1.1.1.15 root 543: M68000_BusError(addr, BUS_ERROR_WRITE);
1.1 root 544: }
545:
1.1.1.6 root 546: static int ROMmem_check(uaecptr addr, uae_u32 size)
1.1 root 547: {
548: addr -= ROMmem_start & ROMmem_mask;
549: addr &= ROMmem_mask;
550: return (addr + size) <= ROMmem_size;
551: }
552:
1.1.1.6 root 553: static uae_u8 *ROMmem_xlate(uaecptr addr)
1.1 root 554: {
555: addr -= ROMmem_start & ROMmem_mask;
556: addr &= ROMmem_mask;
557: return ROMmemory + addr;
558: }
559:
560:
1.1.1.10 root 561: /* IDE controller IO memory */
562: /* see also ide.c */
563:
564: static uae_u8 *IdeMemory;
565:
566: static int IdeMem_check(uaecptr addr, uae_u32 size)
567: {
568: addr -= IdeMem_start;
569: addr &= IdeMem_mask;
570: return (addr + size) <= IdeMem_size;
571: }
572:
573: static uae_u8 *IdeMem_xlate(uaecptr addr)
574: {
575: addr -= IdeMem_start;
576: addr &= IdeMem_mask;
577: return IdeMemory + addr;
578: }
579:
580:
1.1 root 581: /* Hardware IO memory */
1.1.1.10 root 582: /* see also ioMem.c */
1.1 root 583:
1.1.1.10 root 584: uae_u8 *IOmemory;
1.1 root 585:
1.1.1.6 root 586: static int IOmem_check(uaecptr addr, uae_u32 size)
1.1 root 587: {
1.1.1.5 root 588: addr -= IOmem_start;
1.1 root 589: addr &= IOmem_mask;
590: return (addr + size) <= IOmem_size;
591: }
592:
1.1.1.6 root 593: static uae_u8 *IOmem_xlate(uaecptr addr)
1.1 root 594: {
1.1.1.5 root 595: addr -= IOmem_start;
1.1 root 596: addr &= IOmem_mask;
597: return IOmemory + addr;
598: }
599:
600:
601:
1.1.1.5 root 602: /* **** Address banks **** */
1.1 root 603:
1.1.1.6 root 604: static addrbank dummy_bank =
605: {
1.1 root 606: dummy_lget, dummy_wget, dummy_bget,
607: dummy_lput, dummy_wput, dummy_bput,
1.1.1.5 root 608: dummy_xlate, dummy_check
609: };
610:
1.1.1.6 root 611: static addrbank BusErrMem_bank =
612: {
1.1.1.5 root 613: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget,
614: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput,
615: BusErrMem_xlate, BusErrMem_check
1.1 root 616: };
617:
1.1.1.6 root 618: static addrbank STmem_bank =
619: {
1.1 root 620: STmem_lget, STmem_wget, STmem_bget,
621: STmem_lput, STmem_wput, STmem_bput,
622: STmem_xlate, STmem_check
623: };
624:
1.1.1.6 root 625: static addrbank SysMem_bank =
626: {
1.1.1.5 root 627: SysMem_lget, SysMem_wget, SysMem_bget,
628: SysMem_lput, SysMem_wput, SysMem_bput,
629: STmem_xlate, STmem_check
630: };
631:
1.1.1.6 root 632: static addrbank VoidMem_bank =
633: {
1.1.1.5 root 634: VoidMem_lget, VoidMem_wget, VoidMem_bget,
635: VoidMem_lput, VoidMem_wput, VoidMem_bput,
636: VoidMem_xlate, VoidMem_check
637: };
638:
1.1.1.6 root 639: static addrbank TTmem_bank =
640: {
1.1 root 641: TTmem_lget, TTmem_wget, TTmem_bget,
642: TTmem_lput, TTmem_wput, TTmem_bput,
643: TTmem_xlate, TTmem_check
644: };
645:
1.1.1.6 root 646: static addrbank ROMmem_bank =
647: {
1.1 root 648: ROMmem_lget, ROMmem_wget, ROMmem_bget,
649: ROMmem_lput, ROMmem_wput, ROMmem_bput,
650: ROMmem_xlate, ROMmem_check
651: };
652:
1.1.1.10 root 653: static addrbank IdeMem_bank =
654: {
655: Ide_Mem_lget, Ide_Mem_wget, Ide_Mem_bget,
656: Ide_Mem_lput, Ide_Mem_wput, Ide_Mem_bput,
657: IdeMem_xlate, IdeMem_check
658: };
659:
1.1.1.6 root 660: static addrbank IOmem_bank =
661: {
1.1.1.7 root 662: IoMem_lget, IoMem_wget, IoMem_bget,
663: IoMem_lput, IoMem_wput, IoMem_bput,
1.1 root 664: IOmem_xlate, IOmem_check
665: };
666:
667:
1.1.1.5 root 668:
1.1 root 669: static void init_mem_banks (void)
670: {
671: int i;
672: for (i = 0; i < 65536; i++)
673: put_mem_bank (i<<16, &dummy_bank);
674: }
675:
676:
677: /*
1.1.1.5 root 678: * Initialize the memory banks
679: */
1.1.1.8 root 680: void memory_init(uae_u32 nNewSTMemSize, uae_u32 nNewTTMemSize, uae_u32 nNewRomMemStart)
1.1.1.5 root 681: {
1.1.1.8 root 682: STmem_size = (nNewSTMemSize + 65535) & 0xFFFF0000;
683: TTmem_size = (nNewTTMemSize + 65535) & 0xFFFF0000;
1.1.1.5 root 684:
685: /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n",
1.1.1.8 root 686: STmem_size, TTmem_size, nNewRomMemStart);*/
1.1.1.5 root 687:
1.1.1.10 root 688: #if ENABLE_SMALL_MEM
1.1.1.9 root 689:
1.1.1.10 root 690: /* Allocate memory for ROM areas and IO memory space (0xE00000 - 0xFFFFFF) */
691: ROMmemory = malloc(2*1024*1024);
692: if (!ROMmemory) {
693: fprintf(stderr, "Out of memory (ROM/IO mem)!\n");
1.1.1.11 root 694: SDL_Quit();
1.1.1.10 root 695: exit(1);
696: }
697: IdeMemory = ROMmemory + 0x100000;
698: IOmemory = ROMmemory + 0x1f0000;
699:
700: /* Allocate memory for normal ST RAM */
701: STmemory = malloc(STmem_size);
702: while (!STmemory && STmem_size > 512*1024) {
1.1.1.5 root 703: STmem_size >>= 1;
704: STmemory = (uae_u8 *)malloc (STmem_size);
1.1 root 705: if (STmemory)
1.1.1.10 root 706: write_log ("Reducing STmem size to %dkb\n", STmem_size >> 10);
1.1 root 707: }
1.1.1.10 root 708: if (!STmemory) {
1.1 root 709: write_log ("virtual memory exhausted (STmemory)!\n");
1.1.1.11 root 710: SDL_Quit();
1.1.1.10 root 711: exit(1);
1.1 root 712: }
1.1.1.10 root 713:
714: #else
715:
716: /* STmemory points to the 16 MiB STRam array, we just have to set up
717: * the remaining pointers here: */
718: ROMmemory = STRam + ROMmem_start;
719: IdeMemory = STRam + IdeMem_start;
720: IOmemory = STRam + IOmem_start;
721:
722: #endif
1.1 root 723:
1.1.1.5 root 724: init_mem_banks();
1.1 root 725:
1.1.1.8 root 726: /* Map the ST system RAM: */
1.1.1.5 root 727: map_banks(&SysMem_bank, 0x00, 1);
1.1.1.8 root 728: /* Between STRamEnd and 4MB barrier, there is void space: */
729: map_banks(&VoidMem_bank, 0x08, 0x38);
730: /* Space between 4MB barrier and TOS ROM causes a bus error: */
731: map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0);
732: /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */
1.1.1.5 root 733: map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
734:
735: /* TT memory isn't really supported yet */
736: if (TTmem_size > 0)
737: TTmemory = (uae_u8 *)malloc (TTmem_size);
1.1 root 738: if (TTmemory != 0)
1.1.1.5 root 739: map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16);
740: else
741: TTmem_size = 0;
742: TTmem_mask = TTmem_size - 1;
743:
744: /* ROM memory: */
745: /* Depending on which ROM version we are using, the other ROM region is illegal! */
1.1.1.8 root 746: if(nNewRomMemStart == 0xFC0000)
1.1.1.5 root 747: {
748: map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3);
749: map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10);
750: }
1.1.1.8 root 751: else if(nNewRomMemStart == 0xE00000)
1.1.1.5 root 752: {
753: map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10);
754: map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3);
755: }
1.1 root 756: else
1.1.1.5 root 757: {
758: write_log("Illegal ROM memory start!\n");
759: }
1.1 root 760:
1.1.1.5 root 761: /* Cartridge memory: */
762: map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2);
1.1 root 763:
1.1.1.5 root 764: /* IO memory: */
765: map_banks(&IOmem_bank, IOmem_start>>16, 0x1);
1.1 root 766:
1.1.1.10 root 767: /* IDE controller memory region: */
768: map_banks(&IdeMem_bank, IdeMem_start >> 16, 0x1); /* IDE controller on the Falcon */
769:
1.1.1.5 root 770: /* Illegal memory regions cause a bus error on the ST: */
1.1.1.10 root 771: map_banks(&BusErrMem_bank, 0xF10000 >> 16, 0x9);
1.1.1.17! root 772:
! 773: illegal_count = 50;
1.1 root 774: }
775:
1.1.1.5 root 776:
777: /*
778: * Uninitialize the memory banks.
779: */
780: void memory_uninit (void)
781: {
782: /* Here, we free allocated memory from memory_init */
1.1.1.10 root 783: if (TTmem_size > 0) {
784: free(TTmemory);
785: TTmemory = NULL;
786: }
787:
788: #if ENABLE_SMALL_MEM
789:
790: if (STmemory) {
791: free(STmemory);
792: STmemory = NULL;
793: }
794:
795: if (ROMmemory) {
796: free(ROMmemory);
797: ROMmemory = NULL;
1.1.1.5 root 798: }
1.1.1.10 root 799:
800: #endif /* ENABLE_SMALL_MEM */
1.1.1.5 root 801: }
802:
803:
1.1 root 804: void map_banks (addrbank *bank, int start, int size)
805: {
806: int bnr;
807: unsigned long int hioffs = 0, endhioffs = 0x100;
808:
809: if (start >= 0x100) {
810: for (bnr = start; bnr < start + size; bnr++)
811: put_mem_bank (bnr << 16, bank);
812: return;
813: }
814: /* Some ROMs apparently require a 24 bit address space... */
1.1.1.10 root 815: if (currprefs.address_space_24)
1.1 root 816: endhioffs = 0x10000;
817: for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100)
818: for (bnr = start; bnr < start+size; bnr++)
819: put_mem_bank ((bnr + hioffs) << 16, bank);
820: }
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