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1.1 root 1: /*
1.1.1.4 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * Memory management
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
1.1.1.4 root 9: *
10: * This file is distributed under the GNU Public License, version 2 or at
11: * your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.6 ! root 13: char Memory_rcsid[] = "Hatari $Id: memory.c,v 1.15 2004/04/23 15:34:00 thothy Exp $";
1.1 root 14:
15: #include "sysdeps.h"
16: #include "hatari-glue.h"
17: #include "maccess.h"
18: #include "memory.h"
1.1.1.4 root 19: #include "../includes/main.h"
1.1 root 20: #include "../includes/tos.h"
1.1.1.3 root 21: #include "../includes/intercept.h"
22: #include "../includes/reset.h"
1.1.1.6 ! root 23: #include "../includes/stMemory.h"
1.1.1.5 root 24: #include "../includes/m68000.h"
25: #include "newcpu.h"
1.1 root 26:
27:
1.1.1.6 ! root 28: static uae_u32 STmem_size, TTmem_size = 0;
! 29: static uae_u32 TTmem_mask;
1.1 root 30:
1.1.1.5 root 31: #define STmem_start 0x00000000
32: #define ROMmem_start 0x00E00000
33: #define IOmem_start 0x00FF0000
34: #define TTmem_start 0x01000000
1.1 root 35:
1.1.1.5 root 36: #define IOmem_size 65536
37: #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */
1.1 root 38:
1.1.1.5 root 39: #define STmem_mask 0x00ffffff
40: #define ROMmem_mask 0x00ffffff
41: #define IOmem_mask (IOmem_size - 1)
1.1 root 42:
43:
44: #ifdef SAVE_MEMORY_BANKS
45: addrbank *mem_banks[65536];
46: #else
47: addrbank mem_banks[65536];
48: #endif
49:
50: #ifdef NO_INLINE_MEMORY_ACCESS
51: __inline__ uae_u32 longget (uaecptr addr)
52: {
53: return call_mem_get_func (get_mem_bank (addr).lget, addr);
54: }
55: __inline__ uae_u32 wordget (uaecptr addr)
56: {
57: return call_mem_get_func (get_mem_bank (addr).wget, addr);
58: }
59: __inline__ uae_u32 byteget (uaecptr addr)
60: {
61: return call_mem_get_func (get_mem_bank (addr).bget, addr);
62: }
63: __inline__ void longput (uaecptr addr, uae_u32 l)
64: {
65: call_mem_put_func (get_mem_bank (addr).lput, addr, l);
66: }
67: __inline__ void wordput (uaecptr addr, uae_u32 w)
68: {
69: call_mem_put_func (get_mem_bank (addr).wput, addr, w);
70: }
71: __inline__ void byteput (uaecptr addr, uae_u32 b)
72: {
73: call_mem_put_func (get_mem_bank (addr).bput, addr, b);
74: }
75: #endif
76:
77:
1.1.1.5 root 78: /* Some prototypes: */
79: static int STmem_check (uaecptr addr, uae_u32 size) REGPARAM;
80: static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM;
81:
82:
1.1 root 83: /* A dummy bank that only contains zeros */
84:
1.1.1.6 ! root 85: static uae_u32 dummy_lget(uaecptr addr)
1.1 root 86: {
87: if (illegal_mem)
1.1.1.3 root 88: write_log ("Illegal lget at %08lx\n", (long)addr);
1.1 root 89:
90: return 0;
91: }
92:
1.1.1.6 ! root 93: static uae_u32 dummy_wget(uaecptr addr)
1.1 root 94: {
95: if (illegal_mem)
1.1.1.3 root 96: write_log ("Illegal wget at %08lx\n", (long)addr);
1.1 root 97:
98: return 0;
99: }
100:
1.1.1.6 ! root 101: static uae_u32 dummy_bget(uaecptr addr)
1.1 root 102: {
103: if (illegal_mem)
1.1.1.3 root 104: write_log ("Illegal bget at %08lx\n", (long)addr);
1.1 root 105:
106: return 0;
107: }
108:
1.1.1.6 ! root 109: static void dummy_lput(uaecptr addr, uae_u32 l)
1.1 root 110: {
111: if (illegal_mem)
1.1.1.3 root 112: write_log ("Illegal lput at %08lx\n", (long)addr);
1.1 root 113: }
1.1.1.5 root 114:
1.1.1.6 ! root 115: static void dummy_wput(uaecptr addr, uae_u32 w)
1.1 root 116: {
117: if (illegal_mem)
1.1.1.3 root 118: write_log ("Illegal wput at %08lx\n", (long)addr);
1.1 root 119: }
1.1.1.5 root 120:
1.1.1.6 ! root 121: static void dummy_bput(uaecptr addr, uae_u32 b)
1.1 root 122: {
123: if (illegal_mem)
1.1.1.3 root 124: write_log ("Illegal bput at %08lx\n", (long)addr);
1.1 root 125: }
126:
1.1.1.6 ! root 127: static int dummy_check(uaecptr addr, uae_u32 size)
1.1 root 128: {
129: if (illegal_mem)
1.1.1.3 root 130: write_log ("Illegal check at %08lx\n", (long)addr);
1.1 root 131:
132: return 0;
133: }
134:
1.1.1.6 ! root 135: static uae_u8 *dummy_xlate(uaecptr addr)
1.1.1.5 root 136: {
137: write_log("Your Atari program just did something terribly stupid:"
138: " dummy_xlate($%x)\n", addr);
139: /*Reset_Warm();*/
140: return STmem_xlate(addr); /* So we don't crash. */
141: }
1.1 root 142:
143:
1.1.1.5 root 144: /* **** This memory bank only generates bus errors **** */
1.1 root 145:
1.1.1.6 ! root 146: static uae_u32 BusErrMem_lget(uaecptr addr)
1.1.1.5 root 147: {
148: if (illegal_mem)
149: write_log ("Bus error lget at %08lx\n", (long)addr);
150:
1.1.1.6 ! root 151: M68000_BusError(addr, 1);
1.1.1.5 root 152: return 0;
153: }
154:
1.1.1.6 ! root 155: static uae_u32 BusErrMem_wget(uaecptr addr)
1.1.1.5 root 156: {
157: if (illegal_mem)
158: write_log ("Bus error wget at %08lx\n", (long)addr);
159:
1.1.1.6 ! root 160: M68000_BusError(addr, 1);
1.1.1.5 root 161: return 0;
162: }
163:
1.1.1.6 ! root 164: static uae_u32 BusErrMem_bget(uaecptr addr)
1.1.1.5 root 165: {
166: if (illegal_mem)
167: write_log ("Bus error bget at %08lx\n", (long)addr);
168:
1.1.1.6 ! root 169: M68000_BusError(addr, 1);
1.1.1.5 root 170: return 0;
171: }
172:
1.1.1.6 ! root 173: static void BusErrMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 174: {
175: if (illegal_mem)
176: write_log ("Bus error lput at %08lx\n", (long)addr);
177:
1.1.1.6 ! root 178: M68000_BusError(addr, 0);
1.1.1.5 root 179: }
180:
1.1.1.6 ! root 181: static void BusErrMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 182: {
183: if (illegal_mem)
184: write_log ("Bus error wput at %08lx\n", (long)addr);
185:
1.1.1.6 ! root 186: M68000_BusError(addr, 0);
1.1.1.5 root 187: }
188:
1.1.1.6 ! root 189: static void BusErrMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 190: {
191: if (illegal_mem)
192: write_log ("Bus error bput at %08lx\n", (long)addr);
193:
1.1.1.6 ! root 194: M68000_BusError(addr, 0);
1.1.1.5 root 195: }
196:
1.1.1.6 ! root 197: static int BusErrMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 198: {
199: if (illegal_mem)
200: write_log ("Bus error check at %08lx\n", (long)addr);
201:
202: return 0;
203: }
204:
1.1.1.6 ! root 205: static uae_u8 *BusErrMem_xlate (uaecptr addr)
1.1.1.5 root 206: {
207: write_log("Your Atari program just did something terribly stupid:"
208: " BusErrMem_xlate($%x)\n", addr);
209:
210: /*M68000_BusError(addr);*/
211: return STmem_xlate(addr); /* So we don't crash. */
212: }
213:
214:
215: /* **** ST RAM memory **** */
216:
1.1.1.6 ! root 217: static uae_u8 *STmemory;
1.1 root 218:
1.1.1.6 ! root 219: static uae_u32 STmem_lget(uaecptr addr)
1.1 root 220: {
221: uae_u32 *m;
222:
223: addr -= STmem_start & STmem_mask;
224: addr &= STmem_mask;
225: m = (uae_u32 *)(STmemory + addr);
226: return do_get_mem_long (m);
227: }
228:
1.1.1.6 ! root 229: static uae_u32 STmem_wget(uaecptr addr)
1.1 root 230: {
231: uae_u16 *m;
232:
233: addr -= STmem_start & STmem_mask;
234: addr &= STmem_mask;
235: m = (uae_u16 *)(STmemory + addr);
236: return do_get_mem_word (m);
237: }
238:
1.1.1.6 ! root 239: static uae_u32 STmem_bget(uaecptr addr)
1.1 root 240: {
241: addr -= STmem_start & STmem_mask;
242: addr &= STmem_mask;
243: return STmemory[addr];
244: }
245:
1.1.1.6 ! root 246: static void STmem_lput(uaecptr addr, uae_u32 l)
1.1 root 247: {
248: uae_u32 *m;
249:
250: addr -= STmem_start & STmem_mask;
251: addr &= STmem_mask;
252: m = (uae_u32 *)(STmemory + addr);
253: do_put_mem_long (m, l);
254: }
255:
1.1.1.6 ! root 256: static void STmem_wput(uaecptr addr, uae_u32 w)
1.1 root 257: {
258: uae_u16 *m;
259:
260: addr -= STmem_start & STmem_mask;
261: addr &= STmem_mask;
262: m = (uae_u16 *)(STmemory + addr);
263: do_put_mem_word (m, w);
264: }
265:
1.1.1.6 ! root 266: static void STmem_bput(uaecptr addr, uae_u32 b)
1.1 root 267: {
268: addr -= STmem_start & STmem_mask;
269: addr &= STmem_mask;
270: STmemory[addr] = b;
271: }
272:
1.1.1.6 ! root 273: static int STmem_check(uaecptr addr, uae_u32 size)
1.1 root 274: {
275: addr -= STmem_start & STmem_mask;
276: addr &= STmem_mask;
1.1.1.5 root 277: return (addr + size) <= STmem_size;
1.1 root 278: }
279:
1.1.1.6 ! root 280: static uae_u8 *STmem_xlate(uaecptr addr)
1.1 root 281: {
282: addr -= STmem_start & STmem_mask;
283: addr &= STmem_mask;
284: return STmemory + addr;
285: }
286:
287:
1.1.1.5 root 288: /*
289: * **** ST RAM system memory ****
290: * We need a separate mem bank for this region since the first 0x800 bytes on
291: * the ST can only be accessed in supervisor mode. Note that the very first
292: * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write
293: * protected!
294: */
1.1.1.6 ! root 295: static uae_u32 SysMem_lget(uaecptr addr)
1.1.1.5 root 296: {
297: uae_u32 *m;
298:
299: if(addr < 0x800 && !regs.s)
300: {
1.1.1.6 ! root 301: M68000_BusError(addr, 1);
1.1.1.5 root 302: return 0;
303: }
304:
305: addr -= STmem_start & STmem_mask;
306: addr &= STmem_mask;
307: m = (uae_u32 *)(STmemory + addr);
308: return do_get_mem_long (m);
309: }
310:
1.1.1.6 ! root 311: static uae_u32 SysMem_wget(uaecptr addr)
1.1.1.5 root 312: {
313: uae_u16 *m;
314:
315: if(addr < 0x800 && !regs.s)
316: {
1.1.1.6 ! root 317: M68000_BusError(addr, 1);
1.1.1.5 root 318: return 0;
319: }
320:
321: addr -= STmem_start & STmem_mask;
322: addr &= STmem_mask;
323: m = (uae_u16 *)(STmemory + addr);
324: return do_get_mem_word (m);
325: }
326:
1.1.1.6 ! root 327: static uae_u32 SysMem_bget(uaecptr addr)
1.1.1.5 root 328: {
329: if(addr < 0x800 && !regs.s)
330: {
1.1.1.6 ! root 331: M68000_BusError(addr, 1);
1.1.1.5 root 332: return 0;
333: }
334:
335: addr -= STmem_start & STmem_mask;
336: addr &= STmem_mask;
337: return STmemory[addr];
338: }
339:
1.1.1.6 ! root 340: static void SysMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 341: {
342: uae_u32 *m;
343:
344: if(addr < 0x8 || (addr < 0x800 && !regs.s))
345: {
1.1.1.6 ! root 346: M68000_BusError(addr, 0);
1.1.1.5 root 347: return;
348: }
349:
350: addr -= STmem_start & STmem_mask;
351: addr &= STmem_mask;
352: m = (uae_u32 *)(STmemory + addr);
353: do_put_mem_long (m, l);
354: }
355:
1.1.1.6 ! root 356: static void SysMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 357: {
358: uae_u16 *m;
359:
360: if(addr < 0x8 || (addr < 0x800 && !regs.s))
361: {
1.1.1.6 ! root 362: M68000_BusError(addr, 0);
1.1.1.5 root 363: return;
364: }
365:
366: addr -= STmem_start & STmem_mask;
367: addr &= STmem_mask;
368: m = (uae_u16 *)(STmemory + addr);
369: do_put_mem_word (m, w);
370: }
371:
1.1.1.6 ! root 372: static void SysMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 373: {
374: if(addr < 0x8 || (addr < 0x800 && !regs.s))
375: {
1.1.1.6 ! root 376: M68000_BusError(addr, 0);
1.1.1.5 root 377: return;
378: }
379:
380: addr -= STmem_start & STmem_mask;
381: addr &= STmem_mask;
382: STmemory[addr] = b;
383: }
384:
385:
386: /*
387: * **** Void memory ****
388: * Between the ST-RAM end and the 4 MB barrier, there is a void memory space:
389: * Reading always returns the same value and writing does nothing at all.
390: */
391:
1.1.1.6 ! root 392: static uae_u32 VoidMem_lget(uaecptr addr)
1.1.1.5 root 393: {
394: return 0;
395: }
396:
1.1.1.6 ! root 397: static uae_u32 VoidMem_wget(uaecptr addr)
1.1.1.5 root 398: {
399: return 0;
400: }
401:
1.1.1.6 ! root 402: static uae_u32 VoidMem_bget(uaecptr addr)
1.1.1.5 root 403: {
404: return 0;
405: }
406:
1.1.1.6 ! root 407: static void VoidMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 408: {
409: }
410:
1.1.1.6 ! root 411: static void VoidMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 412: {
413: }
414:
1.1.1.6 ! root 415: static void VoidMem_bput (uaecptr addr, uae_u32 b)
1.1.1.5 root 416: {
417: }
418:
1.1.1.6 ! root 419: static int VoidMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 420: {
421: if (illegal_mem)
422: write_log ("Void memory check at %08lx\n", (long)addr);
423:
424: return 0;
425: }
426:
1.1.1.6 ! root 427: static uae_u8 *VoidMem_xlate (uaecptr addr)
1.1.1.5 root 428: {
429: write_log("Your Atari program just did something terribly stupid:"
430: " VoidMem_xlate($%x)\n", addr);
431:
432: return STmem_xlate(addr); /* So we don't crash. */
433: }
434:
435:
436: /* **** TT fast memory (not yet supported) **** */
1.1 root 437:
438: static uae_u8 *TTmemory;
439:
1.1.1.6 ! root 440: static uae_u32 TTmem_lget(uaecptr addr)
1.1 root 441: {
442: uae_u32 *m;
443: addr -= TTmem_start & TTmem_mask;
444: addr &= TTmem_mask;
445: m = (uae_u32 *)(TTmemory + addr);
446: return do_get_mem_long (m);
447: }
448:
1.1.1.6 ! root 449: static uae_u32 TTmem_wget(uaecptr addr)
1.1 root 450: {
451: uae_u16 *m;
452: addr -= TTmem_start & TTmem_mask;
453: addr &= TTmem_mask;
454: m = (uae_u16 *)(TTmemory + addr);
455: return do_get_mem_word (m);
456: }
457:
1.1.1.6 ! root 458: static uae_u32 TTmem_bget(uaecptr addr)
1.1 root 459: {
460: addr -= TTmem_start & TTmem_mask;
461: addr &= TTmem_mask;
462: return TTmemory[addr];
463: }
464:
1.1.1.6 ! root 465: static void TTmem_lput(uaecptr addr, uae_u32 l)
1.1 root 466: {
467: uae_u32 *m;
468: addr -= TTmem_start & TTmem_mask;
469: addr &= TTmem_mask;
470: m = (uae_u32 *)(TTmemory + addr);
471: do_put_mem_long (m, l);
472: }
473:
1.1.1.6 ! root 474: static void TTmem_wput(uaecptr addr, uae_u32 w)
1.1 root 475: {
476: uae_u16 *m;
477: addr -= TTmem_start & TTmem_mask;
478: addr &= TTmem_mask;
479: m = (uae_u16 *)(TTmemory + addr);
480: do_put_mem_word (m, w);
481: }
482:
1.1.1.6 ! root 483: static void TTmem_bput(uaecptr addr, uae_u32 b)
1.1 root 484: {
485: addr -= TTmem_start & TTmem_mask;
486: addr &= TTmem_mask;
487: TTmemory[addr] = b;
488: }
489:
1.1.1.6 ! root 490: static int TTmem_check(uaecptr addr, uae_u32 size)
1.1 root 491: {
492: addr -= TTmem_start & TTmem_mask;
493: addr &= TTmem_mask;
1.1.1.5 root 494: return (addr + size) <= TTmem_size;
1.1 root 495: }
496:
1.1.1.6 ! root 497: static uae_u8 *TTmem_xlate(uaecptr addr)
1.1 root 498: {
499: addr -= TTmem_start & TTmem_mask;
500: addr &= TTmem_mask;
501: return TTmemory + addr;
502: }
503:
1.1.1.5 root 504:
505: /* **** ROM memory **** */
1.1 root 506:
1.1.1.6 ! root 507: static uae_u8 *ROMmemory;
1.1 root 508:
1.1.1.6 ! root 509: static uae_u32 ROMmem_lget(uaecptr addr)
1.1 root 510: {
511: uae_u32 *m;
512: addr -= ROMmem_start & ROMmem_mask;
513: addr &= ROMmem_mask;
514: m = (uae_u32 *)(ROMmemory + addr);
515: return do_get_mem_long (m);
516: }
517:
1.1.1.6 ! root 518: static uae_u32 ROMmem_wget(uaecptr addr)
1.1 root 519: {
520: uae_u16 *m;
521: addr -= ROMmem_start & ROMmem_mask;
522: addr &= ROMmem_mask;
523: m = (uae_u16 *)(ROMmemory + addr);
524: return do_get_mem_word (m);
525: }
526:
1.1.1.6 ! root 527: static uae_u32 ROMmem_bget(uaecptr addr)
1.1 root 528: {
529: addr -= ROMmem_start & ROMmem_mask;
530: addr &= ROMmem_mask;
531: return ROMmemory[addr];
532: }
533:
1.1.1.6 ! root 534: static void ROMmem_lput(uaecptr addr, uae_u32 b)
1.1 root 535: {
536: if (illegal_mem)
1.1.1.3 root 537: write_log ("Illegal ROMmem lput at %08lx\n", (long)addr);
1.1.1.5 root 538:
1.1.1.6 ! root 539: M68000_BusError(addr, 0);
1.1 root 540: }
541:
1.1.1.6 ! root 542: static void ROMmem_wput(uaecptr addr, uae_u32 b)
1.1 root 543: {
544: if (illegal_mem)
1.1.1.3 root 545: write_log ("Illegal ROMmem wput at %08lx\n", (long)addr);
1.1.1.5 root 546:
1.1.1.6 ! root 547: M68000_BusError(addr, 0);
1.1 root 548: }
549:
1.1.1.6 ! root 550: static void ROMmem_bput(uaecptr addr, uae_u32 b)
1.1 root 551: {
552: if (illegal_mem)
1.1.1.5 root 553: write_log ("Illegal ROMmem bput at %08lx\n", (long)addr);
554:
1.1.1.6 ! root 555: M68000_BusError(addr, 0);
1.1 root 556: }
557:
1.1.1.6 ! root 558: static int ROMmem_check(uaecptr addr, uae_u32 size)
1.1 root 559: {
560: addr -= ROMmem_start & ROMmem_mask;
561: addr &= ROMmem_mask;
562: return (addr + size) <= ROMmem_size;
563: }
564:
1.1.1.6 ! root 565: static uae_u8 *ROMmem_xlate(uaecptr addr)
1.1 root 566: {
567: addr -= ROMmem_start & ROMmem_mask;
568: addr &= ROMmem_mask;
569: return ROMmemory + addr;
570: }
571:
572:
573: /* Hardware IO memory */
574: /* see also intercept.c */
575:
1.1.1.6 ! root 576: static uae_u8 *IOmemory;
1.1 root 577:
1.1.1.6 ! root 578: static int IOmem_check(uaecptr addr, uae_u32 size)
1.1 root 579: {
1.1.1.5 root 580: addr -= IOmem_start;
1.1 root 581: addr &= IOmem_mask;
582: return (addr + size) <= IOmem_size;
583: }
584:
1.1.1.6 ! root 585: static uae_u8 *IOmem_xlate(uaecptr addr)
1.1 root 586: {
1.1.1.5 root 587: addr -= IOmem_start;
1.1 root 588: addr &= IOmem_mask;
589: return IOmemory + addr;
590: }
591:
592:
593:
1.1.1.5 root 594: /* **** Address banks **** */
1.1 root 595:
1.1.1.6 ! root 596: static addrbank dummy_bank =
! 597: {
1.1 root 598: dummy_lget, dummy_wget, dummy_bget,
599: dummy_lput, dummy_wput, dummy_bput,
1.1.1.5 root 600: dummy_xlate, dummy_check
601: };
602:
1.1.1.6 ! root 603: static addrbank BusErrMem_bank =
! 604: {
1.1.1.5 root 605: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget,
606: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput,
607: BusErrMem_xlate, BusErrMem_check
1.1 root 608: };
609:
1.1.1.6 ! root 610: static addrbank STmem_bank =
! 611: {
1.1 root 612: STmem_lget, STmem_wget, STmem_bget,
613: STmem_lput, STmem_wput, STmem_bput,
614: STmem_xlate, STmem_check
615: };
616:
1.1.1.6 ! root 617: static addrbank SysMem_bank =
! 618: {
1.1.1.5 root 619: SysMem_lget, SysMem_wget, SysMem_bget,
620: SysMem_lput, SysMem_wput, SysMem_bput,
621: STmem_xlate, STmem_check
622: };
623:
1.1.1.6 ! root 624: static addrbank VoidMem_bank =
! 625: {
1.1.1.5 root 626: VoidMem_lget, VoidMem_wget, VoidMem_bget,
627: VoidMem_lput, VoidMem_wput, VoidMem_bput,
628: VoidMem_xlate, VoidMem_check
629: };
630:
1.1.1.6 ! root 631: static addrbank TTmem_bank =
! 632: {
1.1 root 633: TTmem_lget, TTmem_wget, TTmem_bget,
634: TTmem_lput, TTmem_wput, TTmem_bput,
635: TTmem_xlate, TTmem_check
636: };
637:
1.1.1.6 ! root 638: static addrbank ROMmem_bank =
! 639: {
1.1 root 640: ROMmem_lget, ROMmem_wget, ROMmem_bget,
641: ROMmem_lput, ROMmem_wput, ROMmem_bput,
642: ROMmem_xlate, ROMmem_check
643: };
644:
1.1.1.6 ! root 645: static addrbank IOmem_bank =
! 646: {
1.1 root 647: Intercept_ReadLong, Intercept_ReadWord, Intercept_ReadByte,
648: Intercept_WriteLong, Intercept_WriteWord, Intercept_WriteByte,
649: IOmem_xlate, IOmem_check
650: };
651:
652:
1.1.1.5 root 653:
1.1 root 654: static void init_mem_banks (void)
655: {
656: int i;
657: for (i = 0; i < 65536; i++)
658: put_mem_bank (i<<16, &dummy_bank);
659: }
660:
661:
662: /*
1.1.1.5 root 663: * Initialize the memory banks
664: */
665: void memory_init(uae_u32 f_STMemSize, uae_u32 f_TTMemSize, uae_u32 f_RomMemStart)
666: {
667: STmem_size = (f_STMemSize + 65535) & 0xFFFF0000;
668: TTmem_size = (f_TTMemSize + 65535) & 0xFFFF0000;
669:
670: /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n",
671: STmem_size, TTmem_size, f_RomMemStart);*/
672:
673: STmemory = STRam;
674: ROMmemory = STRam + ROMmem_start;
675: IOmemory = STRam + IOmem_start;
676: /*
677: while (! STmemory && STmem_size > 512*1024) {
678: STmem_size >>= 1;
679: STmemory = (uae_u8 *)malloc (STmem_size);
1.1 root 680: if (STmemory)
1.1.1.5 root 681: fprintf (stderr, "Reducing STmem size to %dkb\n", STmem_size >> 10);
1.1 root 682: }
683: if (! STmemory) {
684: write_log ("virtual memory exhausted (STmemory)!\n");
685: abort ();
686: }
687: */
688:
1.1.1.5 root 689: init_mem_banks();
1.1 root 690:
1.1.1.5 root 691: /* Map the ST RAM: */
692: map_banks(&SysMem_bank, 0x00, 1);
693: map_banks(&VoidMem_bank, 0x08, 0x38); /* Between STRamEnd and 4MB barrier, there is void space! */
694: map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
695:
696: /* TT memory isn't really supported yet */
697: if (TTmem_size > 0)
698: TTmemory = (uae_u8 *)malloc (TTmem_size);
1.1 root 699: if (TTmemory != 0)
1.1.1.5 root 700: map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16);
701: else
702: TTmem_size = 0;
703: TTmem_mask = TTmem_size - 1;
704:
705: /* ROM memory: */
706: /* Depending on which ROM version we are using, the other ROM region is illegal! */
707: if(f_RomMemStart == 0xFC0000)
708: {
709: map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3);
710: map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10);
711: }
712: else if(f_RomMemStart == 0xE00000)
713: {
714: map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10);
715: map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3);
716: }
1.1 root 717: else
1.1.1.5 root 718: {
719: write_log("Illegal ROM memory start!\n");
720: }
1.1 root 721:
1.1.1.5 root 722: /* Cartridge memory: */
723: map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2);
1.1 root 724:
1.1.1.5 root 725: /* IO memory: */
726: map_banks(&IOmem_bank, IOmem_start>>16, 0x1);
1.1 root 727:
1.1.1.5 root 728: /* Illegal memory regions cause a bus error on the ST: */
729: map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0); /* Space between 4MB barrier and TOS ROM */
730: map_banks(&BusErrMem_bank, 0xF00000 >> 16, 0xA); /* IDE controler on the Falcon */
1.1 root 731: }
732:
1.1.1.5 root 733:
734: /*
735: * Uninitialize the memory banks.
736: */
737: void memory_uninit (void)
738: {
739: /* Here, we free allocated memory from memory_init */
740: if(TTmem_size > 0)
741: {
742: free(TTmemory);
743: TTmemory = NULL;
744: }
745: }
746:
747:
1.1 root 748: void map_banks (addrbank *bank, int start, int size)
749: {
750: int bnr;
751: unsigned long int hioffs = 0, endhioffs = 0x100;
752:
753: if (start >= 0x100) {
754: for (bnr = start; bnr < start + size; bnr++)
755: put_mem_bank (bnr << 16, bank);
756: return;
757: }
758: /* Some ROMs apparently require a 24 bit address space... */
759: if (address_space_24)
760: endhioffs = 0x10000;
761: for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100)
762: for (bnr = start; bnr < start+size; bnr++)
763: put_mem_bank ((bnr + hioffs) << 16, bank);
764: }
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