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1.1 root 1: /*
1.1.1.4 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * Memory management
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
1.1.1.4 root 9: *
10: * This file is distributed under the GNU Public License, version 2 or at
11: * your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.7 ! root 13: char Memory_rcsid[] = "Hatari $Id: memory.c,v 1.17 2005/03/11 10:10:38 thothy Exp $";
1.1 root 14:
15: #include "sysdeps.h"
16: #include "hatari-glue.h"
17: #include "maccess.h"
18: #include "memory.h"
1.1.1.4 root 19: #include "../includes/main.h"
1.1 root 20: #include "../includes/tos.h"
1.1.1.7 ! root 21: #include "../includes/ioMem.h"
1.1.1.3 root 22: #include "../includes/reset.h"
1.1.1.6 root 23: #include "../includes/stMemory.h"
1.1.1.5 root 24: #include "../includes/m68000.h"
25: #include "newcpu.h"
1.1 root 26:
27:
1.1.1.6 root 28: static uae_u32 STmem_size, TTmem_size = 0;
29: static uae_u32 TTmem_mask;
1.1 root 30:
1.1.1.5 root 31: #define STmem_start 0x00000000
32: #define ROMmem_start 0x00E00000
33: #define IOmem_start 0x00FF0000
34: #define TTmem_start 0x01000000
1.1 root 35:
1.1.1.5 root 36: #define IOmem_size 65536
37: #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */
1.1 root 38:
1.1.1.5 root 39: #define STmem_mask 0x00ffffff
40: #define ROMmem_mask 0x00ffffff
41: #define IOmem_mask (IOmem_size - 1)
1.1 root 42:
43:
44: #ifdef SAVE_MEMORY_BANKS
45: addrbank *mem_banks[65536];
46: #else
47: addrbank mem_banks[65536];
48: #endif
49:
50: #ifdef NO_INLINE_MEMORY_ACCESS
51: __inline__ uae_u32 longget (uaecptr addr)
52: {
53: return call_mem_get_func (get_mem_bank (addr).lget, addr);
54: }
55: __inline__ uae_u32 wordget (uaecptr addr)
56: {
57: return call_mem_get_func (get_mem_bank (addr).wget, addr);
58: }
59: __inline__ uae_u32 byteget (uaecptr addr)
60: {
61: return call_mem_get_func (get_mem_bank (addr).bget, addr);
62: }
63: __inline__ void longput (uaecptr addr, uae_u32 l)
64: {
65: call_mem_put_func (get_mem_bank (addr).lput, addr, l);
66: }
67: __inline__ void wordput (uaecptr addr, uae_u32 w)
68: {
69: call_mem_put_func (get_mem_bank (addr).wput, addr, w);
70: }
71: __inline__ void byteput (uaecptr addr, uae_u32 b)
72: {
73: call_mem_put_func (get_mem_bank (addr).bput, addr, b);
74: }
75: #endif
76:
77:
1.1.1.5 root 78: /* Some prototypes: */
79: static int STmem_check (uaecptr addr, uae_u32 size) REGPARAM;
80: static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM;
81:
82:
1.1 root 83: /* A dummy bank that only contains zeros */
84:
1.1.1.6 root 85: static uae_u32 dummy_lget(uaecptr addr)
1.1 root 86: {
87: if (illegal_mem)
1.1.1.3 root 88: write_log ("Illegal lget at %08lx\n", (long)addr);
1.1 root 89:
90: return 0;
91: }
92:
1.1.1.6 root 93: static uae_u32 dummy_wget(uaecptr addr)
1.1 root 94: {
95: if (illegal_mem)
1.1.1.3 root 96: write_log ("Illegal wget at %08lx\n", (long)addr);
1.1 root 97:
98: return 0;
99: }
100:
1.1.1.6 root 101: static uae_u32 dummy_bget(uaecptr addr)
1.1 root 102: {
103: if (illegal_mem)
1.1.1.3 root 104: write_log ("Illegal bget at %08lx\n", (long)addr);
1.1 root 105:
106: return 0;
107: }
108:
1.1.1.6 root 109: static void dummy_lput(uaecptr addr, uae_u32 l)
1.1 root 110: {
111: if (illegal_mem)
1.1.1.3 root 112: write_log ("Illegal lput at %08lx\n", (long)addr);
1.1 root 113: }
1.1.1.5 root 114:
1.1.1.6 root 115: static void dummy_wput(uaecptr addr, uae_u32 w)
1.1 root 116: {
117: if (illegal_mem)
1.1.1.3 root 118: write_log ("Illegal wput at %08lx\n", (long)addr);
1.1 root 119: }
1.1.1.5 root 120:
1.1.1.6 root 121: static void dummy_bput(uaecptr addr, uae_u32 b)
1.1 root 122: {
123: if (illegal_mem)
1.1.1.3 root 124: write_log ("Illegal bput at %08lx\n", (long)addr);
1.1 root 125: }
126:
1.1.1.6 root 127: static int dummy_check(uaecptr addr, uae_u32 size)
1.1 root 128: {
129: if (illegal_mem)
1.1.1.3 root 130: write_log ("Illegal check at %08lx\n", (long)addr);
1.1 root 131:
132: return 0;
133: }
134:
1.1.1.6 root 135: static uae_u8 *dummy_xlate(uaecptr addr)
1.1.1.5 root 136: {
137: write_log("Your Atari program just did something terribly stupid:"
138: " dummy_xlate($%x)\n", addr);
139: /*Reset_Warm();*/
140: return STmem_xlate(addr); /* So we don't crash. */
141: }
1.1 root 142:
143:
1.1.1.5 root 144: /* **** This memory bank only generates bus errors **** */
1.1 root 145:
1.1.1.6 root 146: static uae_u32 BusErrMem_lget(uaecptr addr)
1.1.1.5 root 147: {
148: if (illegal_mem)
149: write_log ("Bus error lget at %08lx\n", (long)addr);
150:
1.1.1.6 root 151: M68000_BusError(addr, 1);
1.1.1.5 root 152: return 0;
153: }
154:
1.1.1.6 root 155: static uae_u32 BusErrMem_wget(uaecptr addr)
1.1.1.5 root 156: {
157: if (illegal_mem)
158: write_log ("Bus error wget at %08lx\n", (long)addr);
159:
1.1.1.6 root 160: M68000_BusError(addr, 1);
1.1.1.5 root 161: return 0;
162: }
163:
1.1.1.6 root 164: static uae_u32 BusErrMem_bget(uaecptr addr)
1.1.1.5 root 165: {
166: if (illegal_mem)
167: write_log ("Bus error bget at %08lx\n", (long)addr);
168:
1.1.1.6 root 169: M68000_BusError(addr, 1);
1.1.1.5 root 170: return 0;
171: }
172:
1.1.1.6 root 173: static void BusErrMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 174: {
175: if (illegal_mem)
176: write_log ("Bus error lput at %08lx\n", (long)addr);
177:
1.1.1.6 root 178: M68000_BusError(addr, 0);
1.1.1.5 root 179: }
180:
1.1.1.6 root 181: static void BusErrMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 182: {
183: if (illegal_mem)
184: write_log ("Bus error wput at %08lx\n", (long)addr);
185:
1.1.1.6 root 186: M68000_BusError(addr, 0);
1.1.1.5 root 187: }
188:
1.1.1.6 root 189: static void BusErrMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 190: {
191: if (illegal_mem)
192: write_log ("Bus error bput at %08lx\n", (long)addr);
193:
1.1.1.6 root 194: M68000_BusError(addr, 0);
1.1.1.5 root 195: }
196:
1.1.1.6 root 197: static int BusErrMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 198: {
199: if (illegal_mem)
200: write_log ("Bus error check at %08lx\n", (long)addr);
201:
202: return 0;
203: }
204:
1.1.1.6 root 205: static uae_u8 *BusErrMem_xlate (uaecptr addr)
1.1.1.5 root 206: {
207: write_log("Your Atari program just did something terribly stupid:"
208: " BusErrMem_xlate($%x)\n", addr);
209:
210: /*M68000_BusError(addr);*/
211: return STmem_xlate(addr); /* So we don't crash. */
212: }
213:
214:
215: /* **** ST RAM memory **** */
216:
1.1.1.6 root 217: static uae_u8 *STmemory;
1.1 root 218:
1.1.1.6 root 219: static uae_u32 STmem_lget(uaecptr addr)
1.1 root 220: {
221: addr -= STmem_start & STmem_mask;
222: addr &= STmem_mask;
1.1.1.7 ! root 223: return do_get_mem_long(STmemory + addr);
1.1 root 224: }
225:
1.1.1.6 root 226: static uae_u32 STmem_wget(uaecptr addr)
1.1 root 227: {
228: addr -= STmem_start & STmem_mask;
229: addr &= STmem_mask;
1.1.1.7 ! root 230: return do_get_mem_word(STmemory + addr);
1.1 root 231: }
232:
1.1.1.6 root 233: static uae_u32 STmem_bget(uaecptr addr)
1.1 root 234: {
235: addr -= STmem_start & STmem_mask;
236: addr &= STmem_mask;
237: return STmemory[addr];
238: }
239:
1.1.1.6 root 240: static void STmem_lput(uaecptr addr, uae_u32 l)
1.1 root 241: {
242: addr -= STmem_start & STmem_mask;
243: addr &= STmem_mask;
1.1.1.7 ! root 244: do_put_mem_long(STmemory + addr, l);
1.1 root 245: }
246:
1.1.1.6 root 247: static void STmem_wput(uaecptr addr, uae_u32 w)
1.1 root 248: {
249: addr -= STmem_start & STmem_mask;
250: addr &= STmem_mask;
1.1.1.7 ! root 251: do_put_mem_word(STmemory + addr, w);
1.1 root 252: }
253:
1.1.1.6 root 254: static void STmem_bput(uaecptr addr, uae_u32 b)
1.1 root 255: {
256: addr -= STmem_start & STmem_mask;
257: addr &= STmem_mask;
258: STmemory[addr] = b;
259: }
260:
1.1.1.6 root 261: static int STmem_check(uaecptr addr, uae_u32 size)
1.1 root 262: {
263: addr -= STmem_start & STmem_mask;
264: addr &= STmem_mask;
1.1.1.5 root 265: return (addr + size) <= STmem_size;
1.1 root 266: }
267:
1.1.1.6 root 268: static uae_u8 *STmem_xlate(uaecptr addr)
1.1 root 269: {
270: addr -= STmem_start & STmem_mask;
271: addr &= STmem_mask;
272: return STmemory + addr;
273: }
274:
275:
1.1.1.5 root 276: /*
277: * **** ST RAM system memory ****
278: * We need a separate mem bank for this region since the first 0x800 bytes on
279: * the ST can only be accessed in supervisor mode. Note that the very first
280: * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write
281: * protected!
282: */
1.1.1.6 root 283: static uae_u32 SysMem_lget(uaecptr addr)
1.1.1.5 root 284: {
285: if(addr < 0x800 && !regs.s)
286: {
1.1.1.6 root 287: M68000_BusError(addr, 1);
1.1.1.5 root 288: return 0;
289: }
290:
291: addr -= STmem_start & STmem_mask;
292: addr &= STmem_mask;
1.1.1.7 ! root 293:
! 294: return do_get_mem_long(STmemory + addr);
1.1.1.5 root 295: }
296:
1.1.1.6 root 297: static uae_u32 SysMem_wget(uaecptr addr)
1.1.1.5 root 298: {
299: if(addr < 0x800 && !regs.s)
300: {
1.1.1.6 root 301: M68000_BusError(addr, 1);
1.1.1.5 root 302: return 0;
303: }
304:
305: addr -= STmem_start & STmem_mask;
306: addr &= STmem_mask;
1.1.1.7 ! root 307:
! 308: return do_get_mem_word(STmemory + addr);
1.1.1.5 root 309: }
310:
1.1.1.6 root 311: static uae_u32 SysMem_bget(uaecptr addr)
1.1.1.5 root 312: {
313: if(addr < 0x800 && !regs.s)
314: {
1.1.1.6 root 315: M68000_BusError(addr, 1);
1.1.1.5 root 316: return 0;
317: }
318:
319: addr -= STmem_start & STmem_mask;
320: addr &= STmem_mask;
321: return STmemory[addr];
322: }
323:
1.1.1.6 root 324: static void SysMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 325: {
326: if(addr < 0x8 || (addr < 0x800 && !regs.s))
327: {
1.1.1.6 root 328: M68000_BusError(addr, 0);
1.1.1.5 root 329: return;
330: }
331:
332: addr -= STmem_start & STmem_mask;
333: addr &= STmem_mask;
1.1.1.7 ! root 334:
! 335: do_put_mem_long(STmemory + addr, l);
1.1.1.5 root 336: }
337:
1.1.1.6 root 338: static void SysMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 339: {
340: if(addr < 0x8 || (addr < 0x800 && !regs.s))
341: {
1.1.1.6 root 342: M68000_BusError(addr, 0);
1.1.1.5 root 343: return;
344: }
345:
346: addr -= STmem_start & STmem_mask;
347: addr &= STmem_mask;
1.1.1.7 ! root 348:
! 349: do_put_mem_word(STmemory + addr, w);
1.1.1.5 root 350: }
351:
1.1.1.6 root 352: static void SysMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 353: {
354: if(addr < 0x8 || (addr < 0x800 && !regs.s))
355: {
1.1.1.6 root 356: M68000_BusError(addr, 0);
1.1.1.5 root 357: return;
358: }
359:
360: addr -= STmem_start & STmem_mask;
361: addr &= STmem_mask;
362: STmemory[addr] = b;
363: }
364:
365:
366: /*
367: * **** Void memory ****
368: * Between the ST-RAM end and the 4 MB barrier, there is a void memory space:
369: * Reading always returns the same value and writing does nothing at all.
370: */
371:
1.1.1.6 root 372: static uae_u32 VoidMem_lget(uaecptr addr)
1.1.1.5 root 373: {
374: return 0;
375: }
376:
1.1.1.6 root 377: static uae_u32 VoidMem_wget(uaecptr addr)
1.1.1.5 root 378: {
379: return 0;
380: }
381:
1.1.1.6 root 382: static uae_u32 VoidMem_bget(uaecptr addr)
1.1.1.5 root 383: {
384: return 0;
385: }
386:
1.1.1.6 root 387: static void VoidMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 388: {
389: }
390:
1.1.1.6 root 391: static void VoidMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 392: {
393: }
394:
1.1.1.6 root 395: static void VoidMem_bput (uaecptr addr, uae_u32 b)
1.1.1.5 root 396: {
397: }
398:
1.1.1.6 root 399: static int VoidMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 400: {
401: if (illegal_mem)
402: write_log ("Void memory check at %08lx\n", (long)addr);
403:
404: return 0;
405: }
406:
1.1.1.6 root 407: static uae_u8 *VoidMem_xlate (uaecptr addr)
1.1.1.5 root 408: {
409: write_log("Your Atari program just did something terribly stupid:"
410: " VoidMem_xlate($%x)\n", addr);
411:
412: return STmem_xlate(addr); /* So we don't crash. */
413: }
414:
415:
416: /* **** TT fast memory (not yet supported) **** */
1.1 root 417:
418: static uae_u8 *TTmemory;
419:
1.1.1.6 root 420: static uae_u32 TTmem_lget(uaecptr addr)
1.1 root 421: {
422: addr -= TTmem_start & TTmem_mask;
423: addr &= TTmem_mask;
1.1.1.7 ! root 424: return do_get_mem_long(TTmemory + addr);
1.1 root 425: }
426:
1.1.1.6 root 427: static uae_u32 TTmem_wget(uaecptr addr)
1.1 root 428: {
429: addr -= TTmem_start & TTmem_mask;
430: addr &= TTmem_mask;
1.1.1.7 ! root 431: return do_get_mem_word(TTmemory + addr);
1.1 root 432: }
433:
1.1.1.6 root 434: static uae_u32 TTmem_bget(uaecptr addr)
1.1 root 435: {
436: addr -= TTmem_start & TTmem_mask;
437: addr &= TTmem_mask;
438: return TTmemory[addr];
439: }
440:
1.1.1.6 root 441: static void TTmem_lput(uaecptr addr, uae_u32 l)
1.1 root 442: {
443: addr -= TTmem_start & TTmem_mask;
444: addr &= TTmem_mask;
1.1.1.7 ! root 445: do_put_mem_long(TTmemory + addr, l);
1.1 root 446: }
447:
1.1.1.6 root 448: static void TTmem_wput(uaecptr addr, uae_u32 w)
1.1 root 449: {
450: addr -= TTmem_start & TTmem_mask;
451: addr &= TTmem_mask;
1.1.1.7 ! root 452: do_put_mem_word(TTmemory + addr, w);
1.1 root 453: }
454:
1.1.1.6 root 455: static void TTmem_bput(uaecptr addr, uae_u32 b)
1.1 root 456: {
457: addr -= TTmem_start & TTmem_mask;
458: addr &= TTmem_mask;
459: TTmemory[addr] = b;
460: }
461:
1.1.1.6 root 462: static int TTmem_check(uaecptr addr, uae_u32 size)
1.1 root 463: {
464: addr -= TTmem_start & TTmem_mask;
465: addr &= TTmem_mask;
1.1.1.5 root 466: return (addr + size) <= TTmem_size;
1.1 root 467: }
468:
1.1.1.6 root 469: static uae_u8 *TTmem_xlate(uaecptr addr)
1.1 root 470: {
471: addr -= TTmem_start & TTmem_mask;
472: addr &= TTmem_mask;
473: return TTmemory + addr;
474: }
475:
1.1.1.5 root 476:
477: /* **** ROM memory **** */
1.1 root 478:
1.1.1.6 root 479: static uae_u8 *ROMmemory;
1.1 root 480:
1.1.1.6 root 481: static uae_u32 ROMmem_lget(uaecptr addr)
1.1 root 482: {
483: addr -= ROMmem_start & ROMmem_mask;
484: addr &= ROMmem_mask;
1.1.1.7 ! root 485: return do_get_mem_long(ROMmemory + addr);
1.1 root 486: }
487:
1.1.1.6 root 488: static uae_u32 ROMmem_wget(uaecptr addr)
1.1 root 489: {
490: addr -= ROMmem_start & ROMmem_mask;
491: addr &= ROMmem_mask;
1.1.1.7 ! root 492: return do_get_mem_word(ROMmemory + addr);
1.1 root 493: }
494:
1.1.1.6 root 495: static uae_u32 ROMmem_bget(uaecptr addr)
1.1 root 496: {
497: addr -= ROMmem_start & ROMmem_mask;
498: addr &= ROMmem_mask;
499: return ROMmemory[addr];
500: }
501:
1.1.1.6 root 502: static void ROMmem_lput(uaecptr addr, uae_u32 b)
1.1 root 503: {
504: if (illegal_mem)
1.1.1.3 root 505: write_log ("Illegal ROMmem lput at %08lx\n", (long)addr);
1.1.1.5 root 506:
1.1.1.6 root 507: M68000_BusError(addr, 0);
1.1 root 508: }
509:
1.1.1.6 root 510: static void ROMmem_wput(uaecptr addr, uae_u32 b)
1.1 root 511: {
512: if (illegal_mem)
1.1.1.3 root 513: write_log ("Illegal ROMmem wput at %08lx\n", (long)addr);
1.1.1.5 root 514:
1.1.1.6 root 515: M68000_BusError(addr, 0);
1.1 root 516: }
517:
1.1.1.6 root 518: static void ROMmem_bput(uaecptr addr, uae_u32 b)
1.1 root 519: {
520: if (illegal_mem)
1.1.1.5 root 521: write_log ("Illegal ROMmem bput at %08lx\n", (long)addr);
522:
1.1.1.6 root 523: M68000_BusError(addr, 0);
1.1 root 524: }
525:
1.1.1.6 root 526: static int ROMmem_check(uaecptr addr, uae_u32 size)
1.1 root 527: {
528: addr -= ROMmem_start & ROMmem_mask;
529: addr &= ROMmem_mask;
530: return (addr + size) <= ROMmem_size;
531: }
532:
1.1.1.6 root 533: static uae_u8 *ROMmem_xlate(uaecptr addr)
1.1 root 534: {
535: addr -= ROMmem_start & ROMmem_mask;
536: addr &= ROMmem_mask;
537: return ROMmemory + addr;
538: }
539:
540:
541: /* Hardware IO memory */
542: /* see also intercept.c */
543:
1.1.1.6 root 544: static uae_u8 *IOmemory;
1.1 root 545:
1.1.1.6 root 546: static int IOmem_check(uaecptr addr, uae_u32 size)
1.1 root 547: {
1.1.1.5 root 548: addr -= IOmem_start;
1.1 root 549: addr &= IOmem_mask;
550: return (addr + size) <= IOmem_size;
551: }
552:
1.1.1.6 root 553: static uae_u8 *IOmem_xlate(uaecptr addr)
1.1 root 554: {
1.1.1.5 root 555: addr -= IOmem_start;
1.1 root 556: addr &= IOmem_mask;
557: return IOmemory + addr;
558: }
559:
560:
561:
1.1.1.5 root 562: /* **** Address banks **** */
1.1 root 563:
1.1.1.6 root 564: static addrbank dummy_bank =
565: {
1.1 root 566: dummy_lget, dummy_wget, dummy_bget,
567: dummy_lput, dummy_wput, dummy_bput,
1.1.1.5 root 568: dummy_xlate, dummy_check
569: };
570:
1.1.1.6 root 571: static addrbank BusErrMem_bank =
572: {
1.1.1.5 root 573: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget,
574: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput,
575: BusErrMem_xlate, BusErrMem_check
1.1 root 576: };
577:
1.1.1.6 root 578: static addrbank STmem_bank =
579: {
1.1 root 580: STmem_lget, STmem_wget, STmem_bget,
581: STmem_lput, STmem_wput, STmem_bput,
582: STmem_xlate, STmem_check
583: };
584:
1.1.1.6 root 585: static addrbank SysMem_bank =
586: {
1.1.1.5 root 587: SysMem_lget, SysMem_wget, SysMem_bget,
588: SysMem_lput, SysMem_wput, SysMem_bput,
589: STmem_xlate, STmem_check
590: };
591:
1.1.1.6 root 592: static addrbank VoidMem_bank =
593: {
1.1.1.5 root 594: VoidMem_lget, VoidMem_wget, VoidMem_bget,
595: VoidMem_lput, VoidMem_wput, VoidMem_bput,
596: VoidMem_xlate, VoidMem_check
597: };
598:
1.1.1.6 root 599: static addrbank TTmem_bank =
600: {
1.1 root 601: TTmem_lget, TTmem_wget, TTmem_bget,
602: TTmem_lput, TTmem_wput, TTmem_bput,
603: TTmem_xlate, TTmem_check
604: };
605:
1.1.1.6 root 606: static addrbank ROMmem_bank =
607: {
1.1 root 608: ROMmem_lget, ROMmem_wget, ROMmem_bget,
609: ROMmem_lput, ROMmem_wput, ROMmem_bput,
610: ROMmem_xlate, ROMmem_check
611: };
612:
1.1.1.6 root 613: static addrbank IOmem_bank =
614: {
1.1.1.7 ! root 615: IoMem_lget, IoMem_wget, IoMem_bget,
! 616: IoMem_lput, IoMem_wput, IoMem_bput,
1.1 root 617: IOmem_xlate, IOmem_check
618: };
619:
620:
1.1.1.5 root 621:
1.1 root 622: static void init_mem_banks (void)
623: {
624: int i;
625: for (i = 0; i < 65536; i++)
626: put_mem_bank (i<<16, &dummy_bank);
627: }
628:
629:
630: /*
1.1.1.5 root 631: * Initialize the memory banks
632: */
633: void memory_init(uae_u32 f_STMemSize, uae_u32 f_TTMemSize, uae_u32 f_RomMemStart)
634: {
635: STmem_size = (f_STMemSize + 65535) & 0xFFFF0000;
636: TTmem_size = (f_TTMemSize + 65535) & 0xFFFF0000;
637:
638: /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n",
639: STmem_size, TTmem_size, f_RomMemStart);*/
640:
641: STmemory = STRam;
642: ROMmemory = STRam + ROMmem_start;
643: IOmemory = STRam + IOmem_start;
644: /*
645: while (! STmemory && STmem_size > 512*1024) {
646: STmem_size >>= 1;
647: STmemory = (uae_u8 *)malloc (STmem_size);
1.1 root 648: if (STmemory)
1.1.1.5 root 649: fprintf (stderr, "Reducing STmem size to %dkb\n", STmem_size >> 10);
1.1 root 650: }
651: if (! STmemory) {
652: write_log ("virtual memory exhausted (STmemory)!\n");
653: abort ();
654: }
655: */
656:
1.1.1.5 root 657: init_mem_banks();
1.1 root 658:
1.1.1.5 root 659: /* Map the ST RAM: */
660: map_banks(&SysMem_bank, 0x00, 1);
661: map_banks(&VoidMem_bank, 0x08, 0x38); /* Between STRamEnd and 4MB barrier, there is void space! */
662: map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
663:
664: /* TT memory isn't really supported yet */
665: if (TTmem_size > 0)
666: TTmemory = (uae_u8 *)malloc (TTmem_size);
1.1 root 667: if (TTmemory != 0)
1.1.1.5 root 668: map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16);
669: else
670: TTmem_size = 0;
671: TTmem_mask = TTmem_size - 1;
672:
673: /* ROM memory: */
674: /* Depending on which ROM version we are using, the other ROM region is illegal! */
675: if(f_RomMemStart == 0xFC0000)
676: {
677: map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3);
678: map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10);
679: }
680: else if(f_RomMemStart == 0xE00000)
681: {
682: map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10);
683: map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3);
684: }
1.1 root 685: else
1.1.1.5 root 686: {
687: write_log("Illegal ROM memory start!\n");
688: }
1.1 root 689:
1.1.1.5 root 690: /* Cartridge memory: */
691: map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2);
1.1 root 692:
1.1.1.5 root 693: /* IO memory: */
694: map_banks(&IOmem_bank, IOmem_start>>16, 0x1);
1.1 root 695:
1.1.1.5 root 696: /* Illegal memory regions cause a bus error on the ST: */
697: map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0); /* Space between 4MB barrier and TOS ROM */
698: map_banks(&BusErrMem_bank, 0xF00000 >> 16, 0xA); /* IDE controler on the Falcon */
1.1 root 699: }
700:
1.1.1.5 root 701:
702: /*
703: * Uninitialize the memory banks.
704: */
705: void memory_uninit (void)
706: {
707: /* Here, we free allocated memory from memory_init */
708: if(TTmem_size > 0)
709: {
710: free(TTmemory);
711: TTmemory = NULL;
712: }
713: }
714:
715:
1.1 root 716: void map_banks (addrbank *bank, int start, int size)
717: {
718: int bnr;
719: unsigned long int hioffs = 0, endhioffs = 0x100;
720:
721: if (start >= 0x100) {
722: for (bnr = start; bnr < start + size; bnr++)
723: put_mem_bank (bnr << 16, bank);
724: return;
725: }
726: /* Some ROMs apparently require a 24 bit address space... */
727: if (address_space_24)
728: endhioffs = 0x10000;
729: for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100)
730: for (bnr = start; bnr < start+size; bnr++)
731: put_mem_bank ((bnr + hioffs) << 16, bank);
732: }
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