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1.1 root 1: /*
1.1.1.4 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * Memory management
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
1.1.1.4 root 9: *
10: * This file is distributed under the GNU Public License, version 2 or at
11: * your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.9 ! root 13: const char Memory_rcsid[] = "Hatari $Id: memory.c,v 1.21 2006/02/21 21:45:32 thothy Exp $";
1.1 root 14:
15: #include "sysdeps.h"
16: #include "hatari-glue.h"
17: #include "maccess.h"
18: #include "memory.h"
1.1.1.4 root 19: #include "../includes/main.h"
1.1 root 20: #include "../includes/tos.h"
1.1.1.7 root 21: #include "../includes/ioMem.h"
1.1.1.3 root 22: #include "../includes/reset.h"
1.1.1.6 root 23: #include "../includes/stMemory.h"
1.1.1.5 root 24: #include "../includes/m68000.h"
25: #include "newcpu.h"
1.1 root 26:
27:
1.1.1.6 root 28: static uae_u32 STmem_size, TTmem_size = 0;
29: static uae_u32 TTmem_mask;
1.1 root 30:
1.1.1.5 root 31: #define STmem_start 0x00000000
32: #define ROMmem_start 0x00E00000
33: #define IOmem_start 0x00FF0000
34: #define TTmem_start 0x01000000
1.1 root 35:
1.1.1.5 root 36: #define IOmem_size 65536
37: #define ROMmem_size (0x00FF0000 - 0x00E00000) /* So we cover both possible ROM regions + cartridge */
1.1 root 38:
1.1.1.5 root 39: #define STmem_mask 0x00ffffff
40: #define ROMmem_mask 0x00ffffff
41: #define IOmem_mask (IOmem_size - 1)
1.1 root 42:
43:
44: #ifdef SAVE_MEMORY_BANKS
45: addrbank *mem_banks[65536];
46: #else
47: addrbank mem_banks[65536];
48: #endif
49:
50: #ifdef NO_INLINE_MEMORY_ACCESS
51: __inline__ uae_u32 longget (uaecptr addr)
52: {
53: return call_mem_get_func (get_mem_bank (addr).lget, addr);
54: }
55: __inline__ uae_u32 wordget (uaecptr addr)
56: {
57: return call_mem_get_func (get_mem_bank (addr).wget, addr);
58: }
59: __inline__ uae_u32 byteget (uaecptr addr)
60: {
61: return call_mem_get_func (get_mem_bank (addr).bget, addr);
62: }
63: __inline__ void longput (uaecptr addr, uae_u32 l)
64: {
65: call_mem_put_func (get_mem_bank (addr).lput, addr, l);
66: }
67: __inline__ void wordput (uaecptr addr, uae_u32 w)
68: {
69: call_mem_put_func (get_mem_bank (addr).wput, addr, w);
70: }
71: __inline__ void byteput (uaecptr addr, uae_u32 b)
72: {
73: call_mem_put_func (get_mem_bank (addr).bput, addr, b);
74: }
75: #endif
76:
77:
1.1.1.5 root 78: /* Some prototypes: */
79: static int STmem_check (uaecptr addr, uae_u32 size) REGPARAM;
80: static uae_u8 *STmem_xlate (uaecptr addr) REGPARAM;
81:
82:
1.1 root 83: /* A dummy bank that only contains zeros */
84:
1.1.1.6 root 85: static uae_u32 dummy_lget(uaecptr addr)
1.1 root 86: {
87: if (illegal_mem)
1.1.1.3 root 88: write_log ("Illegal lget at %08lx\n", (long)addr);
1.1 root 89:
90: return 0;
91: }
92:
1.1.1.6 root 93: static uae_u32 dummy_wget(uaecptr addr)
1.1 root 94: {
95: if (illegal_mem)
1.1.1.3 root 96: write_log ("Illegal wget at %08lx\n", (long)addr);
1.1 root 97:
98: return 0;
99: }
100:
1.1.1.6 root 101: static uae_u32 dummy_bget(uaecptr addr)
1.1 root 102: {
103: if (illegal_mem)
1.1.1.3 root 104: write_log ("Illegal bget at %08lx\n", (long)addr);
1.1 root 105:
106: return 0;
107: }
108:
1.1.1.6 root 109: static void dummy_lput(uaecptr addr, uae_u32 l)
1.1 root 110: {
111: if (illegal_mem)
1.1.1.3 root 112: write_log ("Illegal lput at %08lx\n", (long)addr);
1.1 root 113: }
1.1.1.5 root 114:
1.1.1.6 root 115: static void dummy_wput(uaecptr addr, uae_u32 w)
1.1 root 116: {
117: if (illegal_mem)
1.1.1.3 root 118: write_log ("Illegal wput at %08lx\n", (long)addr);
1.1 root 119: }
1.1.1.5 root 120:
1.1.1.6 root 121: static void dummy_bput(uaecptr addr, uae_u32 b)
1.1 root 122: {
123: if (illegal_mem)
1.1.1.3 root 124: write_log ("Illegal bput at %08lx\n", (long)addr);
1.1 root 125: }
126:
1.1.1.6 root 127: static int dummy_check(uaecptr addr, uae_u32 size)
1.1 root 128: {
129: if (illegal_mem)
1.1.1.3 root 130: write_log ("Illegal check at %08lx\n", (long)addr);
1.1 root 131:
132: return 0;
133: }
134:
1.1.1.6 root 135: static uae_u8 *dummy_xlate(uaecptr addr)
1.1.1.5 root 136: {
137: write_log("Your Atari program just did something terribly stupid:"
138: " dummy_xlate($%x)\n", addr);
139: /*Reset_Warm();*/
140: return STmem_xlate(addr); /* So we don't crash. */
141: }
1.1 root 142:
143:
1.1.1.5 root 144: /* **** This memory bank only generates bus errors **** */
1.1 root 145:
1.1.1.6 root 146: static uae_u32 BusErrMem_lget(uaecptr addr)
1.1.1.5 root 147: {
148: if (illegal_mem)
149: write_log ("Bus error lget at %08lx\n", (long)addr);
150:
1.1.1.6 root 151: M68000_BusError(addr, 1);
1.1.1.5 root 152: return 0;
153: }
154:
1.1.1.6 root 155: static uae_u32 BusErrMem_wget(uaecptr addr)
1.1.1.5 root 156: {
157: if (illegal_mem)
158: write_log ("Bus error wget at %08lx\n", (long)addr);
159:
1.1.1.6 root 160: M68000_BusError(addr, 1);
1.1.1.5 root 161: return 0;
162: }
163:
1.1.1.6 root 164: static uae_u32 BusErrMem_bget(uaecptr addr)
1.1.1.5 root 165: {
166: if (illegal_mem)
167: write_log ("Bus error bget at %08lx\n", (long)addr);
168:
1.1.1.6 root 169: M68000_BusError(addr, 1);
1.1.1.5 root 170: return 0;
171: }
172:
1.1.1.6 root 173: static void BusErrMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 174: {
175: if (illegal_mem)
176: write_log ("Bus error lput at %08lx\n", (long)addr);
177:
1.1.1.6 root 178: M68000_BusError(addr, 0);
1.1.1.5 root 179: }
180:
1.1.1.6 root 181: static void BusErrMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 182: {
183: if (illegal_mem)
184: write_log ("Bus error wput at %08lx\n", (long)addr);
185:
1.1.1.6 root 186: M68000_BusError(addr, 0);
1.1.1.5 root 187: }
188:
1.1.1.6 root 189: static void BusErrMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 190: {
191: if (illegal_mem)
192: write_log ("Bus error bput at %08lx\n", (long)addr);
193:
1.1.1.6 root 194: M68000_BusError(addr, 0);
1.1.1.5 root 195: }
196:
1.1.1.6 root 197: static int BusErrMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 198: {
199: if (illegal_mem)
200: write_log ("Bus error check at %08lx\n", (long)addr);
201:
202: return 0;
203: }
204:
1.1.1.6 root 205: static uae_u8 *BusErrMem_xlate (uaecptr addr)
1.1.1.5 root 206: {
207: write_log("Your Atari program just did something terribly stupid:"
208: " BusErrMem_xlate($%x)\n", addr);
209:
210: /*M68000_BusError(addr);*/
211: return STmem_xlate(addr); /* So we don't crash. */
212: }
213:
214:
215: /* **** ST RAM memory **** */
216:
1.1.1.9 ! root 217: /*static uae_u8 *STmemory;*/
! 218: #define STmemory STRam
1.1 root 219:
1.1.1.6 root 220: static uae_u32 STmem_lget(uaecptr addr)
1.1 root 221: {
222: addr -= STmem_start & STmem_mask;
223: addr &= STmem_mask;
1.1.1.7 root 224: return do_get_mem_long(STmemory + addr);
1.1 root 225: }
226:
1.1.1.6 root 227: static uae_u32 STmem_wget(uaecptr addr)
1.1 root 228: {
229: addr -= STmem_start & STmem_mask;
230: addr &= STmem_mask;
1.1.1.7 root 231: return do_get_mem_word(STmemory + addr);
1.1 root 232: }
233:
1.1.1.6 root 234: static uae_u32 STmem_bget(uaecptr addr)
1.1 root 235: {
236: addr -= STmem_start & STmem_mask;
237: addr &= STmem_mask;
238: return STmemory[addr];
239: }
240:
1.1.1.6 root 241: static void STmem_lput(uaecptr addr, uae_u32 l)
1.1 root 242: {
243: addr -= STmem_start & STmem_mask;
244: addr &= STmem_mask;
1.1.1.7 root 245: do_put_mem_long(STmemory + addr, l);
1.1 root 246: }
247:
1.1.1.6 root 248: static void STmem_wput(uaecptr addr, uae_u32 w)
1.1 root 249: {
250: addr -= STmem_start & STmem_mask;
251: addr &= STmem_mask;
1.1.1.7 root 252: do_put_mem_word(STmemory + addr, w);
1.1 root 253: }
254:
1.1.1.6 root 255: static void STmem_bput(uaecptr addr, uae_u32 b)
1.1 root 256: {
257: addr -= STmem_start & STmem_mask;
258: addr &= STmem_mask;
259: STmemory[addr] = b;
260: }
261:
1.1.1.6 root 262: static int STmem_check(uaecptr addr, uae_u32 size)
1.1 root 263: {
264: addr -= STmem_start & STmem_mask;
265: addr &= STmem_mask;
1.1.1.5 root 266: return (addr + size) <= STmem_size;
1.1 root 267: }
268:
1.1.1.6 root 269: static uae_u8 *STmem_xlate(uaecptr addr)
1.1 root 270: {
271: addr -= STmem_start & STmem_mask;
272: addr &= STmem_mask;
273: return STmemory + addr;
274: }
275:
276:
1.1.1.5 root 277: /*
278: * **** ST RAM system memory ****
279: * We need a separate mem bank for this region since the first 0x800 bytes on
280: * the ST can only be accessed in supervisor mode. Note that the very first
281: * 8 bytes of the ST memory are also a mirror of the TOS ROM, so they are write
282: * protected!
283: */
1.1.1.6 root 284: static uae_u32 SysMem_lget(uaecptr addr)
1.1.1.5 root 285: {
286: if(addr < 0x800 && !regs.s)
287: {
1.1.1.6 root 288: M68000_BusError(addr, 1);
1.1.1.5 root 289: return 0;
290: }
291:
292: addr -= STmem_start & STmem_mask;
293: addr &= STmem_mask;
1.1.1.7 root 294:
295: return do_get_mem_long(STmemory + addr);
1.1.1.5 root 296: }
297:
1.1.1.6 root 298: static uae_u32 SysMem_wget(uaecptr addr)
1.1.1.5 root 299: {
300: if(addr < 0x800 && !regs.s)
301: {
1.1.1.6 root 302: M68000_BusError(addr, 1);
1.1.1.5 root 303: return 0;
304: }
305:
306: addr -= STmem_start & STmem_mask;
307: addr &= STmem_mask;
1.1.1.7 root 308:
309: return do_get_mem_word(STmemory + addr);
1.1.1.5 root 310: }
311:
1.1.1.6 root 312: static uae_u32 SysMem_bget(uaecptr addr)
1.1.1.5 root 313: {
314: if(addr < 0x800 && !regs.s)
315: {
1.1.1.6 root 316: M68000_BusError(addr, 1);
1.1.1.5 root 317: return 0;
318: }
319:
320: addr -= STmem_start & STmem_mask;
321: addr &= STmem_mask;
322: return STmemory[addr];
323: }
324:
1.1.1.6 root 325: static void SysMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 326: {
327: if(addr < 0x8 || (addr < 0x800 && !regs.s))
328: {
1.1.1.6 root 329: M68000_BusError(addr, 0);
1.1.1.5 root 330: return;
331: }
332:
333: addr -= STmem_start & STmem_mask;
334: addr &= STmem_mask;
1.1.1.7 root 335:
336: do_put_mem_long(STmemory + addr, l);
1.1.1.5 root 337: }
338:
1.1.1.6 root 339: static void SysMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 340: {
341: if(addr < 0x8 || (addr < 0x800 && !regs.s))
342: {
1.1.1.6 root 343: M68000_BusError(addr, 0);
1.1.1.5 root 344: return;
345: }
346:
347: addr -= STmem_start & STmem_mask;
348: addr &= STmem_mask;
1.1.1.7 root 349:
350: do_put_mem_word(STmemory + addr, w);
1.1.1.5 root 351: }
352:
1.1.1.6 root 353: static void SysMem_bput(uaecptr addr, uae_u32 b)
1.1.1.5 root 354: {
355: if(addr < 0x8 || (addr < 0x800 && !regs.s))
356: {
1.1.1.6 root 357: M68000_BusError(addr, 0);
1.1.1.5 root 358: return;
359: }
360:
361: addr -= STmem_start & STmem_mask;
362: addr &= STmem_mask;
363: STmemory[addr] = b;
364: }
365:
366:
367: /*
368: * **** Void memory ****
369: * Between the ST-RAM end and the 4 MB barrier, there is a void memory space:
370: * Reading always returns the same value and writing does nothing at all.
371: */
372:
1.1.1.6 root 373: static uae_u32 VoidMem_lget(uaecptr addr)
1.1.1.5 root 374: {
375: return 0;
376: }
377:
1.1.1.6 root 378: static uae_u32 VoidMem_wget(uaecptr addr)
1.1.1.5 root 379: {
380: return 0;
381: }
382:
1.1.1.6 root 383: static uae_u32 VoidMem_bget(uaecptr addr)
1.1.1.5 root 384: {
385: return 0;
386: }
387:
1.1.1.6 root 388: static void VoidMem_lput(uaecptr addr, uae_u32 l)
1.1.1.5 root 389: {
390: }
391:
1.1.1.6 root 392: static void VoidMem_wput(uaecptr addr, uae_u32 w)
1.1.1.5 root 393: {
394: }
395:
1.1.1.6 root 396: static void VoidMem_bput (uaecptr addr, uae_u32 b)
1.1.1.5 root 397: {
398: }
399:
1.1.1.6 root 400: static int VoidMem_check(uaecptr addr, uae_u32 size)
1.1.1.5 root 401: {
402: if (illegal_mem)
403: write_log ("Void memory check at %08lx\n", (long)addr);
404:
405: return 0;
406: }
407:
1.1.1.6 root 408: static uae_u8 *VoidMem_xlate (uaecptr addr)
1.1.1.5 root 409: {
410: write_log("Your Atari program just did something terribly stupid:"
411: " VoidMem_xlate($%x)\n", addr);
412:
413: return STmem_xlate(addr); /* So we don't crash. */
414: }
415:
416:
417: /* **** TT fast memory (not yet supported) **** */
1.1 root 418:
419: static uae_u8 *TTmemory;
420:
1.1.1.6 root 421: static uae_u32 TTmem_lget(uaecptr addr)
1.1 root 422: {
423: addr -= TTmem_start & TTmem_mask;
424: addr &= TTmem_mask;
1.1.1.7 root 425: return do_get_mem_long(TTmemory + addr);
1.1 root 426: }
427:
1.1.1.6 root 428: static uae_u32 TTmem_wget(uaecptr addr)
1.1 root 429: {
430: addr -= TTmem_start & TTmem_mask;
431: addr &= TTmem_mask;
1.1.1.7 root 432: return do_get_mem_word(TTmemory + addr);
1.1 root 433: }
434:
1.1.1.6 root 435: static uae_u32 TTmem_bget(uaecptr addr)
1.1 root 436: {
437: addr -= TTmem_start & TTmem_mask;
438: addr &= TTmem_mask;
439: return TTmemory[addr];
440: }
441:
1.1.1.6 root 442: static void TTmem_lput(uaecptr addr, uae_u32 l)
1.1 root 443: {
444: addr -= TTmem_start & TTmem_mask;
445: addr &= TTmem_mask;
1.1.1.7 root 446: do_put_mem_long(TTmemory + addr, l);
1.1 root 447: }
448:
1.1.1.6 root 449: static void TTmem_wput(uaecptr addr, uae_u32 w)
1.1 root 450: {
451: addr -= TTmem_start & TTmem_mask;
452: addr &= TTmem_mask;
1.1.1.7 root 453: do_put_mem_word(TTmemory + addr, w);
1.1 root 454: }
455:
1.1.1.6 root 456: static void TTmem_bput(uaecptr addr, uae_u32 b)
1.1 root 457: {
458: addr -= TTmem_start & TTmem_mask;
459: addr &= TTmem_mask;
460: TTmemory[addr] = b;
461: }
462:
1.1.1.6 root 463: static int TTmem_check(uaecptr addr, uae_u32 size)
1.1 root 464: {
465: addr -= TTmem_start & TTmem_mask;
466: addr &= TTmem_mask;
1.1.1.5 root 467: return (addr + size) <= TTmem_size;
1.1 root 468: }
469:
1.1.1.6 root 470: static uae_u8 *TTmem_xlate(uaecptr addr)
1.1 root 471: {
472: addr -= TTmem_start & TTmem_mask;
473: addr &= TTmem_mask;
474: return TTmemory + addr;
475: }
476:
1.1.1.5 root 477:
478: /* **** ROM memory **** */
1.1 root 479:
1.1.1.6 root 480: static uae_u8 *ROMmemory;
1.1 root 481:
1.1.1.6 root 482: static uae_u32 ROMmem_lget(uaecptr addr)
1.1 root 483: {
484: addr -= ROMmem_start & ROMmem_mask;
485: addr &= ROMmem_mask;
1.1.1.7 root 486: return do_get_mem_long(ROMmemory + addr);
1.1 root 487: }
488:
1.1.1.6 root 489: static uae_u32 ROMmem_wget(uaecptr addr)
1.1 root 490: {
491: addr -= ROMmem_start & ROMmem_mask;
492: addr &= ROMmem_mask;
1.1.1.7 root 493: return do_get_mem_word(ROMmemory + addr);
1.1 root 494: }
495:
1.1.1.6 root 496: static uae_u32 ROMmem_bget(uaecptr addr)
1.1 root 497: {
498: addr -= ROMmem_start & ROMmem_mask;
499: addr &= ROMmem_mask;
500: return ROMmemory[addr];
501: }
502:
1.1.1.6 root 503: static void ROMmem_lput(uaecptr addr, uae_u32 b)
1.1 root 504: {
505: if (illegal_mem)
1.1.1.3 root 506: write_log ("Illegal ROMmem lput at %08lx\n", (long)addr);
1.1.1.5 root 507:
1.1.1.6 root 508: M68000_BusError(addr, 0);
1.1 root 509: }
510:
1.1.1.6 root 511: static void ROMmem_wput(uaecptr addr, uae_u32 b)
1.1 root 512: {
513: if (illegal_mem)
1.1.1.3 root 514: write_log ("Illegal ROMmem wput at %08lx\n", (long)addr);
1.1.1.5 root 515:
1.1.1.6 root 516: M68000_BusError(addr, 0);
1.1 root 517: }
518:
1.1.1.6 root 519: static void ROMmem_bput(uaecptr addr, uae_u32 b)
1.1 root 520: {
521: if (illegal_mem)
1.1.1.5 root 522: write_log ("Illegal ROMmem bput at %08lx\n", (long)addr);
523:
1.1.1.6 root 524: M68000_BusError(addr, 0);
1.1 root 525: }
526:
1.1.1.6 root 527: static int ROMmem_check(uaecptr addr, uae_u32 size)
1.1 root 528: {
529: addr -= ROMmem_start & ROMmem_mask;
530: addr &= ROMmem_mask;
531: return (addr + size) <= ROMmem_size;
532: }
533:
1.1.1.6 root 534: static uae_u8 *ROMmem_xlate(uaecptr addr)
1.1 root 535: {
536: addr -= ROMmem_start & ROMmem_mask;
537: addr &= ROMmem_mask;
538: return ROMmemory + addr;
539: }
540:
541:
542: /* Hardware IO memory */
543: /* see also intercept.c */
544:
1.1.1.6 root 545: static uae_u8 *IOmemory;
1.1 root 546:
1.1.1.6 root 547: static int IOmem_check(uaecptr addr, uae_u32 size)
1.1 root 548: {
1.1.1.5 root 549: addr -= IOmem_start;
1.1 root 550: addr &= IOmem_mask;
551: return (addr + size) <= IOmem_size;
552: }
553:
1.1.1.6 root 554: static uae_u8 *IOmem_xlate(uaecptr addr)
1.1 root 555: {
1.1.1.5 root 556: addr -= IOmem_start;
1.1 root 557: addr &= IOmem_mask;
558: return IOmemory + addr;
559: }
560:
561:
562:
1.1.1.5 root 563: /* **** Address banks **** */
1.1 root 564:
1.1.1.6 root 565: static addrbank dummy_bank =
566: {
1.1 root 567: dummy_lget, dummy_wget, dummy_bget,
568: dummy_lput, dummy_wput, dummy_bput,
1.1.1.5 root 569: dummy_xlate, dummy_check
570: };
571:
1.1.1.6 root 572: static addrbank BusErrMem_bank =
573: {
1.1.1.5 root 574: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget,
575: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput,
576: BusErrMem_xlate, BusErrMem_check
1.1 root 577: };
578:
1.1.1.6 root 579: static addrbank STmem_bank =
580: {
1.1 root 581: STmem_lget, STmem_wget, STmem_bget,
582: STmem_lput, STmem_wput, STmem_bput,
583: STmem_xlate, STmem_check
584: };
585:
1.1.1.6 root 586: static addrbank SysMem_bank =
587: {
1.1.1.5 root 588: SysMem_lget, SysMem_wget, SysMem_bget,
589: SysMem_lput, SysMem_wput, SysMem_bput,
590: STmem_xlate, STmem_check
591: };
592:
1.1.1.6 root 593: static addrbank VoidMem_bank =
594: {
1.1.1.5 root 595: VoidMem_lget, VoidMem_wget, VoidMem_bget,
596: VoidMem_lput, VoidMem_wput, VoidMem_bput,
597: VoidMem_xlate, VoidMem_check
598: };
599:
1.1.1.6 root 600: static addrbank TTmem_bank =
601: {
1.1 root 602: TTmem_lget, TTmem_wget, TTmem_bget,
603: TTmem_lput, TTmem_wput, TTmem_bput,
604: TTmem_xlate, TTmem_check
605: };
606:
1.1.1.6 root 607: static addrbank ROMmem_bank =
608: {
1.1 root 609: ROMmem_lget, ROMmem_wget, ROMmem_bget,
610: ROMmem_lput, ROMmem_wput, ROMmem_bput,
611: ROMmem_xlate, ROMmem_check
612: };
613:
1.1.1.6 root 614: static addrbank IOmem_bank =
615: {
1.1.1.7 root 616: IoMem_lget, IoMem_wget, IoMem_bget,
617: IoMem_lput, IoMem_wput, IoMem_bput,
1.1 root 618: IOmem_xlate, IOmem_check
619: };
620:
621:
1.1.1.5 root 622:
1.1 root 623: static void init_mem_banks (void)
624: {
625: int i;
626: for (i = 0; i < 65536; i++)
627: put_mem_bank (i<<16, &dummy_bank);
628: }
629:
630:
631: /*
1.1.1.5 root 632: * Initialize the memory banks
633: */
1.1.1.8 root 634: void memory_init(uae_u32 nNewSTMemSize, uae_u32 nNewTTMemSize, uae_u32 nNewRomMemStart)
1.1.1.5 root 635: {
1.1.1.8 root 636: STmem_size = (nNewSTMemSize + 65535) & 0xFFFF0000;
637: TTmem_size = (nNewTTMemSize + 65535) & 0xFFFF0000;
1.1.1.5 root 638:
639: /*write_log("memory_init: STmem_size=$%x, TTmem_size=$%x, ROM-Start=$%x,\n",
1.1.1.8 root 640: STmem_size, TTmem_size, nNewRomMemStart);*/
1.1.1.5 root 641:
1.1.1.9 ! root 642: /* // STmemory is currently directly defined to STRam for speed reasons!
1.1.1.5 root 643: STmemory = STRam;
1.1.1.9 ! root 644: */
1.1.1.5 root 645: ROMmemory = STRam + ROMmem_start;
646: IOmemory = STRam + IOmem_start;
1.1.1.9 ! root 647:
1.1.1.5 root 648: /*
649: while (! STmemory && STmem_size > 512*1024) {
650: STmem_size >>= 1;
651: STmemory = (uae_u8 *)malloc (STmem_size);
1.1 root 652: if (STmemory)
1.1.1.5 root 653: fprintf (stderr, "Reducing STmem size to %dkb\n", STmem_size >> 10);
1.1 root 654: }
655: if (! STmemory) {
656: write_log ("virtual memory exhausted (STmemory)!\n");
657: abort ();
658: }
659: */
660:
1.1.1.5 root 661: init_mem_banks();
1.1 root 662:
1.1.1.8 root 663: /* Map the ST system RAM: */
1.1.1.5 root 664: map_banks(&SysMem_bank, 0x00, 1);
1.1.1.8 root 665: /* Between STRamEnd and 4MB barrier, there is void space: */
666: map_banks(&VoidMem_bank, 0x08, 0x38);
667: /* Space between 4MB barrier and TOS ROM causes a bus error: */
668: map_banks(&BusErrMem_bank, 0x400000 >> 16, 0xA0);
669: /* Now map main ST RAM, overwriting the void and bus error regions if necessary: */
1.1.1.5 root 670: map_banks(&STmem_bank, 0x01, (STmem_size >> 16) - 1);
671:
672: /* TT memory isn't really supported yet */
673: if (TTmem_size > 0)
674: TTmemory = (uae_u8 *)malloc (TTmem_size);
1.1 root 675: if (TTmemory != 0)
1.1.1.5 root 676: map_banks (&TTmem_bank, TTmem_start >> 16, TTmem_size >> 16);
677: else
678: TTmem_size = 0;
679: TTmem_mask = TTmem_size - 1;
680:
681: /* ROM memory: */
682: /* Depending on which ROM version we are using, the other ROM region is illegal! */
1.1.1.8 root 683: if(nNewRomMemStart == 0xFC0000)
1.1.1.5 root 684: {
685: map_banks(&ROMmem_bank, 0xFC0000 >> 16, 0x3);
686: map_banks(&BusErrMem_bank, 0xE00000 >> 16, 0x10);
687: }
1.1.1.8 root 688: else if(nNewRomMemStart == 0xE00000)
1.1.1.5 root 689: {
690: map_banks(&ROMmem_bank, 0xE00000 >> 16, 0x10);
691: map_banks(&BusErrMem_bank, 0xFC0000 >> 16, 0x3);
692: }
1.1 root 693: else
1.1.1.5 root 694: {
695: write_log("Illegal ROM memory start!\n");
696: }
1.1 root 697:
1.1.1.5 root 698: /* Cartridge memory: */
699: map_banks(&ROMmem_bank, 0xFA0000 >> 16, 0x2);
1.1 root 700:
1.1.1.5 root 701: /* IO memory: */
702: map_banks(&IOmem_bank, IOmem_start>>16, 0x1);
1.1 root 703:
1.1.1.5 root 704: /* Illegal memory regions cause a bus error on the ST: */
1.1.1.8 root 705: map_banks(&BusErrMem_bank, 0xF00000 >> 16, 0xA); /* IDE controller on the Falcon */
1.1 root 706: }
707:
1.1.1.5 root 708:
709: /*
710: * Uninitialize the memory banks.
711: */
712: void memory_uninit (void)
713: {
714: /* Here, we free allocated memory from memory_init */
715: if(TTmem_size > 0)
716: {
717: free(TTmemory);
718: TTmemory = NULL;
719: }
720: }
721:
722:
1.1 root 723: void map_banks (addrbank *bank, int start, int size)
724: {
725: int bnr;
726: unsigned long int hioffs = 0, endhioffs = 0x100;
727:
728: if (start >= 0x100) {
729: for (bnr = start; bnr < start + size; bnr++)
730: put_mem_bank (bnr << 16, bank);
731: return;
732: }
733: /* Some ROMs apparently require a 24 bit address space... */
734: if (address_space_24)
735: endhioffs = 0x10000;
736: for (hioffs = 0; hioffs < endhioffs; hioffs += 0x100)
737: for (bnr = start; bnr < start+size; bnr++)
738: put_mem_bank ((bnr + hioffs) << 16, bank);
739: }
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