--- hatari/src/uae-cpu/newcpu.c 2019/04/01 07:11:01 1.1.1.7 +++ hatari/src/uae-cpu/newcpu.c 2019/04/01 07:12:20 1.1.1.10 @@ -10,26 +10,27 @@ * This file is distributed under the GNU Public License, version 2 or at * your option any later version. Read the file gpl.txt for details. */ -static char rcsid[] = "Hatari $Id: newcpu.c,v 1.1.1.7 2019/04/01 07:11:01 root Exp $"; +char NewCpu_rcsid[] = "Hatari $Id: newcpu.c,v 1.1.1.10 2019/04/01 07:12:20 root Exp $"; #include "sysdeps.h" #include "hatari-glue.h" #include "maccess.h" #include "memory.h" #include "newcpu.h" -#include "events.h" #include "../includes/main.h" +#include "../includes/log.h" #include "../includes/m68000.h" +#include "../includes/mfp.h" #include "../includes/tos.h" #include "../includes/vdi.h" #include "../includes/cart.h" #include "../includes/debugui.h" +#include "../includes/bios.h" +#include "../includes/xbios.h" struct flag_struct regflags; -int lastInstructionCycles; /* how many cycles last instruction took to execute */ - /* Opcode of faulting instruction */ uae_u16 last_op_for_exception_3; /* PC at fault time */ @@ -103,7 +104,6 @@ void dump_counts (void) } #endif -int broken_in; static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM; @@ -125,8 +125,8 @@ void build_cpufunctbl(void) : ! cpu_compatible ? op_smalltbl_4_ff : op_smalltbl_5_ff); - write_log ("Building CPU function table (%d %d %d).\n", - cpu_level, cpu_compatible, address_space_24); + Log_Printf(LOG_DEBUG, "Building CPU function table (%d %d %d).\n", + cpu_level, cpu_compatible, address_space_24); for (opcode = 0; opcode < 65536; opcode++) cpufunctbl[opcode] = op_illg_1; @@ -154,7 +154,6 @@ void build_cpufunctbl(void) /* Hatari's illegal opcodes: */ cpufunctbl[GEMDOS_OPCODE] = OpCode_GemDos; - cpufunctbl[RUNOLDGEMDOS_OPCODE] = OpCode_OldGemDos; cpufunctbl[SYSINIT_OPCODE] = OpCode_SysInit; cpufunctbl[VDI_OPCODE] = OpCode_VDI; } @@ -227,17 +226,21 @@ void init_m68k (void) read_table68k (); do_merges (); - write_log ("%d CPU functions\n", nr_cpuop_funcs); + Log_Printf(LOG_DEBUG, "%d CPU functions\n", nr_cpuop_funcs); build_cpufunctbl (); } -struct regstruct regs, lastint_regs; +/* not used ATM: static struct regstruct regs_backup[16]; static int backup_pointer = 0; -static long int m68kpc_offset; +struct regstruct lastint_regs; int lastint_no; +*/ +struct regstruct regs; +static long int m68kpc_offset; + #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1) #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o)) @@ -415,9 +418,11 @@ uae_s32 ShowEA (FILE *f, int reg, amodes return offset; } + /* The plan is that this will take over the job of exception 3 handling - * the CPU emulation functions will just do a longjmp to m68k_go whenever * they hit an odd address. */ +#if 0 static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val) { uae_u16 dp; @@ -538,6 +543,8 @@ static int verify_ea (int reg, amodes mo last_fault_for_exception_3 = addr; return 0; } +#endif + uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp) { @@ -591,6 +598,8 @@ uae_u32 get_disp_ea_000 (uae_u32 base, u #endif } + +/* Create the Status Register from the flags */ void MakeSR (void) { #if 0 @@ -610,6 +619,8 @@ void MakeSR (void) | GET_CFLG); } + +/* Set up the flags from Status Register */ void MakeFromSR (void) { int oldm = regs.m; @@ -658,7 +669,8 @@ void MakeFromSR (void) } } - set_special (SPCFLAG_INT); + /* Pending interrupts can occur again after a write to the SR: */ + set_special (SPCFLAG_DOINT); if (regs.t1 || regs.t0) set_special (SPCFLAG_TRACE); else @@ -687,8 +699,23 @@ void Exception(int nr, uaecptr oldpc) } } +#if 0 + /* Intercept BIOS or XBIOS trap (Trap #13 or #14) */ + if (nr == 0x2d) + { + /* Intercept BIOS calls */ + if (Bios()) return; + } + else if (nr == 0x2e) + { + /* Intercept XBIOS calls */ + if (XBios()) return; + } +#endif + MakeSR(); + /* Change to supervisor mode if necessary */ if (!regs.s) { regs.usp = m68k_areg(regs, 7); if (cpu_level >= 2) @@ -697,6 +724,8 @@ void Exception(int nr, uaecptr oldpc) m68k_areg(regs, 7) = regs.isp; regs.s = 1; } + + /* Build additional exception stack frame for 68010 and higher */ if (cpu_level > 0) { if (nr == 2 || nr == 3) { int i; @@ -738,32 +767,50 @@ void Exception(int nr, uaecptr oldpc) put_word (m68k_areg(regs, 7), regs.sr); /* 68000 bus/address errors: */ - /* Well these 8 more bytes are not here just for debuging. - It seems adebug expects them to be on the stack when it receives - a bus error... */ if (cpu_level==0 && (nr==2 || nr==3)) { + uae_u16 specialstatus = 0x2001; + /* Special status word emulation isn't perfect yet... :-( */ + if (regs.sr & 0x2000) + specialstatus |= 0x4; m68k_areg(regs, 7) -= 8; if (nr == 3) { /* Address error */ - put_word (m68k_areg(regs, 7), 0); /* FIXME: Add real function code value */ + put_word (m68k_areg(regs, 7), specialstatus); put_long (m68k_areg(regs, 7)+2, last_fault_for_exception_3); put_word (m68k_areg(regs, 7)+6, last_op_for_exception_3); put_long (m68k_areg(regs, 7)+10, last_addr_for_exception_3); - if( bEnableDebug ) { - fprintf(stderr,"Address Error at address $%x, PC=$%x\n",last_fault_for_exception_3,currpc); - DebugUI(); - } - } - else { /* Bus error */ - put_word (m68k_areg(regs, 7), 0); /* FIXME: Add real function code value */ - put_long (m68k_areg(regs, 7)+2, BusAddressLocation); - put_word (m68k_areg(regs, 7)+6, BusErrorOpcode); - if( bEnableDebug && BusAddressLocation!=0xff8a00) { - fprintf(stderr,"Bus Error at address $%x, PC=$%lx\n",BusAddressLocation,(long)currpc); - DebugUI(); - } - } + if (bEnableDebug) { + fprintf(stderr,"Address Error at address $%x, PC=$%x\n",last_fault_for_exception_3,currpc); + DebugUI(); + } + } + else { /* Bus error */ + if (bBusErrorReadWrite) + specialstatus |= 0x10; + put_word (m68k_areg(regs, 7), specialstatus); + put_long (m68k_areg(regs, 7)+2, BusErrorAddress); + put_word (m68k_areg(regs, 7)+6, get_word(BusErrorPC)); /* Opcode */ + /* Check for double bus errors: */ + if (regs.spcflags & SPCFLAG_BUSERROR) { + fprintf(stderr, "Detected double bus error at address $%x, PC=$%lx => CPU halted!\n", + BusErrorAddress, (long)currpc); + unset_special(SPCFLAG_BUSERROR); + if (bEnableDebug) + DebugUI(); + regs.intmask = 7; + m68k_setstopped(TRUE); + return; + } + if (bEnableDebug && BusErrorAddress!=0xff8a00) { + fprintf(stderr,"Bus Error at address $%x, PC=$%lx\n", BusErrorAddress, (long)currpc); + DebugUI(); + } + } } + /* Set PC and flags */ + if (bEnableDebug && get_long (regs.vbr + 4*nr) == 0) { + write_log("Uninitialized exception handler #%i!\n", nr); + } m68k_setpc (get_long (regs.vbr + 4*nr)); fill_prefetch_0 (); regs.t1 = regs.t0 = regs.m = 0; @@ -772,31 +819,30 @@ void Exception(int nr, uaecptr oldpc) /* Handle exception cycles: */ if(nr >= 24 && nr <= 31) { - ADD_CYCLES(44+4, 5, 3); /* Interrupt */ + M68000_AddCycles(44+4); /* Interrupt */ } else if(nr >= 32 && nr <= 47) { - ADD_CYCLES(34, 5, 3); /* Trap */ + M68000_AddCycles(34); /* Trap */ } else switch(nr) { - case 2: ADD_CYCLES(50, 4, 7); break; /* Bus error */ - case 3: ADD_CYCLES(50, 4, 7); break; /* Address error */ - case 4: ADD_CYCLES(34, 4, 3); break; /* Illegal instruction */ - case 5: ADD_CYCLES(38, 4, 3); break; /* Div by zero */ - case 6: ADD_CYCLES(40, 4, 3); break; /* CHK */ - case 7: ADD_CYCLES(34, 5, 3); break; /* TRAPV */ - case 8: ADD_CYCLES(34, 4, 3); break; /* Privilege violation */ - case 9: ADD_CYCLES(34, 4, 3); break; /* Trace */ - case 10: ADD_CYCLES(34, 4, 3); break; /* Line-A - probably wrong */ - case 11: ADD_CYCLES(34, 4, 3); break; /* Line-F - probably wrong */ + case 2: M68000_AddCycles(50); break; /* Bus error */ + case 3: M68000_AddCycles(50); break; /* Address error */ + case 4: M68000_AddCycles(34); break; /* Illegal instruction */ + case 5: M68000_AddCycles(38); break; /* Div by zero */ + case 6: M68000_AddCycles(40); break; /* CHK */ + case 7: M68000_AddCycles(34); break; /* TRAPV */ + case 8: M68000_AddCycles(34); break; /* Privilege violation */ + case 9: M68000_AddCycles(34); break; /* Trace */ + case 10: M68000_AddCycles(34); break; /* Line-A - probably wrong */ + case 11: M68000_AddCycles(34); break; /* Line-F - probably wrong */ default: -#if 0 /* Hatari currently seems to run more instable when adding MFP cycles */ + /* FIXME: Add right cycles value for MFP interrupts and copro exceptions ... */ if(nr < 64) - ADD_CYCLES(0, 0, 0); /* Coprocessor and unassigned exceptions (???) */ + M68000_AddCycles(4); /* Coprocessor and unassigned exceptions (???) */ else - ADD_CYCLES(44+4, 5, 3); /* Must be a MFP interrupt */ -#endif + M68000_AddCycles(24); /* Must be a MFP interrupt */ break; } } @@ -805,8 +851,8 @@ void Exception(int nr, uaecptr oldpc) static void Interrupt(int nr) { assert(nr < 8 && nr >= 0); - lastint_regs = regs; - lastint_no = nr; + /*lastint_regs = regs;*/ + /*lastint_no = nr;*/ Exception(nr+24, 0); regs.intmask = nr; @@ -814,7 +860,8 @@ static void Interrupt(int nr) } -static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp; +uae_u32 reg_caar, reg_cacr; +static uae_u32 itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp; int m68k_move2c (int regno, uae_u32 *regp) @@ -829,7 +876,7 @@ int m68k_move2c (int regno, uae_u32 *reg switch (regno) { case 0: regs.sfc = *regp & 7; break; case 1: regs.dfc = *regp & 7; break; - case 2: cacr = *regp & (cpu_level < 4 ? 0x3 : 0x80008000); break; + case 2: reg_cacr = *regp & (cpu_level < 4 ? 0x3 : 0x80008000); break; case 3: tc = *regp & 0xc000; break; /* Mask out fields that should be zero. */ case 4: itt0 = *regp & 0xffffe364; break; @@ -839,7 +886,7 @@ int m68k_move2c (int regno, uae_u32 *reg case 0x800: regs.usp = *regp; break; case 0x801: regs.vbr = *regp; break; - case 0x802: caar = *regp & 0xfc; break; + case 0x802: reg_caar = *regp & 0xfc; break; case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break; case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break; case 0x805: mmusr = *regp; break; @@ -865,7 +912,7 @@ int m68k_movec2 (int regno, uae_u32 *reg switch (regno) { case 0: *regp = regs.sfc; break; case 1: *regp = regs.dfc; break; - case 2: *regp = cacr; break; + case 2: *regp = reg_cacr; break; case 3: *regp = tc; break; case 4: *regp = itt0; break; case 5: *regp = itt1; break; @@ -873,7 +920,7 @@ int m68k_movec2 (int regno, uae_u32 *reg case 7: *regp = dtt1; break; case 0x800: *regp = regs.usp; break; case 0x801: *regp = regs.vbr; break; - case 0x802: *regp = caar; break; + case 0x802: *regp = reg_caar; break; case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break; case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break; case 0x805: *regp = mmusr; break; @@ -888,12 +935,12 @@ int m68k_movec2 (int regno, uae_u32 *reg } STATIC_INLINE int -div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem) +div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 ndiv, uae_u32 *quot, uae_u32 *rem) { uae_u32 q = 0, cbit = 0; int i; - if (div <= src_hi) { + if (ndiv <= src_hi) { return 1; } for (i = 0 ; i < 32 ; i++) { @@ -902,9 +949,9 @@ div_unsigned(uae_u32 src_hi, uae_u32 src if (src_lo & 0x80000000ul) src_hi++; src_lo <<= 1; q = q << 1; - if (cbit || div <= src_hi) { + if (cbit || ndiv <= src_hi) { q |= 1; - src_hi -= div; + src_hi -= ndiv; } } *quot = q; @@ -1139,9 +1186,6 @@ void m68k_mull (uae_u32 opcode, uae_u32 #endif } -static char* ccnames[] = -{ "T ","F ","HI","LS","CC","CS","NE","EQ", - "VC","VS","PL","MI","GE","LT","GT","LE" }; void m68k_reset (void) { @@ -1165,17 +1209,12 @@ void m68k_reset (void) refill_prefetch (m68k_getpc(), 0); } + unsigned long REGPARAM2 op_illg (uae_u32 opcode) { +#if 0 uaecptr pc = m68k_getpc (); - - if (opcode == 0x4E7B && get_long (0x10) == 0 ) { - write_log ("This program requires a 68020 CPU!\n"); - broken_in = 1; - set_special (SPCFLAG_BRK); - bQuitProgram = 1; - } - +#endif if ((opcode & 0xF000) == 0xF000) { Exception(0xB,0); return 4; @@ -1184,7 +1223,6 @@ unsigned long REGPARAM2 op_illg (uae_u32 Exception(0xA,0); return 4; } - #if 0 write_log ("Illegal instruction: %04x at %08lx\n", opcode, (long)pc); #endif @@ -1192,6 +1230,7 @@ unsigned long REGPARAM2 op_illg (uae_u32 return 4; } + void mmu_op(uae_u32 opcode, uae_u16 extra) { if ((opcode & 0xFE0) == 0x0500) { @@ -1244,26 +1283,42 @@ static void do_trace (void) } +/* + * Handle special flags + */ static int do_specialties (void) { if(regs.spcflags & SPCFLAG_BUSERROR) { /* We can not execute bus errors directly in the memory handler * functions since the PC should point to the address of the next * instruction, so we're executing the bus errors here: */ - unset_special(SPCFLAG_BUSERROR); + unset_special(SPCFLAG_BUSERROR); Exception(2,0); } + if(regs.spcflags & SPCFLAG_EXTRA_CYCLES) { + /* Add some extra cycles to simulate a wait state */ + unset_special(SPCFLAG_EXTRA_CYCLES); + M68000_AddCycles(4); + } + if (regs.spcflags & SPCFLAG_DOTRACE) { Exception (9,last_trace_ad); } + while (regs.spcflags & SPCFLAG_STOP) { - do_cycles (8); - if (regs.intmask>5) { - /* We still have to care about events when IPL==7 ! */ - Main_EventHandler(); - if(bQuitProgram) unset_special(SPCFLAG_STOP); - } + if (regs.intmask > 5) { + /* We still have to care about events when IPL==7 ! */ + Main_EventHandler(); + if (regs.spcflags & SPCFLAG_BRK) return 1; + } + M68000_AddCycles(4); + if (PendingInterruptCount<=0 && PendingInterruptFunction) { + CALL_VAR(PendingInterruptFunction); + } + if (regs.spcflags & SPCFLAG_MFP) { + MFP_CheckPendingInterrupts(); + } if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)) { int intr = intlev (); unset_special (SPCFLAG_INT | SPCFLAG_DOINT); @@ -1274,11 +1329,13 @@ static int do_specialties (void) } } } + if (regs.spcflags & SPCFLAG_TRACE) do_trace (); if (regs.spcflags & SPCFLAG_DOINT) { int intr = intlev (); + /* SPCFLAG_DOINT will be enabled again in MakeFromSR to handle pending interrupts! */ unset_special (SPCFLAG_DOINT); if (intr != -1 && intr > regs.intmask) { Interrupt (intr); @@ -1289,10 +1346,16 @@ static int do_specialties (void) unset_special (SPCFLAG_INT); set_special (SPCFLAG_DOINT); } + + if (regs.spcflags & SPCFLAG_MFP) { /* Check for MFP interrupts */ + MFP_CheckPendingInterrupts(); + } + if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) { - unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE); + unset_special(SPCFLAG_MODE_CHANGE); return 1; } + return 0; } @@ -1305,9 +1368,11 @@ static void m68k_run_1 (void) uae_u8 saved_bytes[20]; uae_u16 *oldpcp; #endif - while(!bQuitProgram) { + + for (;;) { int cycles; uae_u32 opcode = get_iword_prefetch (0); + #ifdef DEBUG_PREFETCH if (get_ilong (0) != do_get_mem_long (®s.prefetch)) { fprintf (stderr, "Prefetch differs from memory.\n"); @@ -1340,7 +1405,10 @@ static void m68k_run_1 (void) } #endif - do_cycles (cycles); + M68000_AddCycles(cycles); + if (PendingInterruptCount<=0 && PendingInterruptFunction) + CALL_VAR(PendingInterruptFunction); + if (regs.spcflags) { if (do_specialties ()) return; @@ -1352,7 +1420,7 @@ static void m68k_run_1 (void) /* Same thing, but don't use prefetch to get opcode. */ static void m68k_run_2 (void) { - while(!bQuitProgram) { + for (;;) { int cycles; uae_u32 opcode = get_iword (0); @@ -1370,7 +1438,10 @@ static void m68k_run_2 (void) cycles = (*cpufunctbl[opcode])(opcode); - do_cycles (cycles); + M68000_AddCycles(cycles); + if (PendingInterruptCount<=0 && PendingInterruptFunction) + CALL_VAR(PendingInterruptFunction); + if (regs.spcflags) { if (do_specialties ()) return; @@ -1379,25 +1450,28 @@ static void m68k_run_2 (void) } -int in_m68k_go = 0; - void m68k_go (int may_quit) { + static int in_m68k_go = 0; + if (in_m68k_go || !may_quit) { write_log ("Bug! m68k_go is not reentrant.\n"); abort (); } in_m68k_go++; - while(!bQuitProgram) { + while (!(regs.spcflags & SPCFLAG_BRK)) { if(cpu_compatible) m68k_run_1(); else m68k_run_2(); } + unset_special(SPCFLAG_BRK); in_m68k_go--; } + +/* static void m68k_verify (uaecptr addr, uaecptr *nextpc) { uae_u32 opcode, val; @@ -1425,9 +1499,15 @@ static void m68k_verify (uaecptr addr, u } } } +*/ + void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt) { + static const char* ccnames[] = + { "T ","F ","HI","LS","CC","CS","NE","EQ", + "VC","VS","PL","MI","GE","LT","GT","LE" }; + uaecptr newpc = 0; m68kpc_offset = addr - m68k_getpc (); while (cnt-- > 0) {