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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
9: *
1.1 root 10: */
11:
12: #include "sysdeps.h"
13: #include "hatari-glue.h"
14: #include "maccess.h"
15: #include "memory.h"
16: #include "newcpu.h"
17: #include "compiler.h"
18: #include "events.h"
19: #include "../includes/tos.h"
20:
21:
22: int quit_program = 0;
23: int debugging = 0;
24: struct flag_struct regflags;
25:
1.1.1.2 root 26: int lastInstructionCycles; /* how many cycles last instruction took to execute */
27:
1.1 root 28: /* Opcode of faulting instruction */
29: uae_u16 last_op_for_exception_3;
30: /* PC at fault time */
31: uaecptr last_addr_for_exception_3;
32: /* Address that generated the exception */
33: uaecptr last_fault_for_exception_3;
34:
35: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
36: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
37:
38: int movem_index1[256];
39: int movem_index2[256];
40: int movem_next[256];
41:
42: int fpp_movem_index1[256];
43: int fpp_movem_index2[256];
44: int fpp_movem_next[256];
45:
46: cpuop_func *cpufunctbl[65536];
47:
48: #define COUNT_INSTRS 0
49:
50: #if COUNT_INSTRS
51: static unsigned long int instrcount[65536];
52: static uae_u16 opcodenums[65536];
53:
54: static int compfn (const void *el1, const void *el2)
55: {
56: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
57: }
58:
59: static char *icountfilename (void)
60: {
61: char *name = getenv ("INSNCOUNT");
62: if (name)
63: return name;
64: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
65: }
66:
67: void dump_counts (void)
68: {
69: FILE *f = fopen (icountfilename (), "w");
70: unsigned long int total;
71: int i;
72:
73: write_log ("Writing instruction count file...\n");
74: for (i = 0; i < 65536; i++) {
75: opcodenums[i] = i;
76: total += instrcount[i];
77: }
78: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
79:
80: fprintf (f, "Total: %lu\n", total);
81: for (i=0; i < 65536; i++) {
82: unsigned long int cnt = instrcount[opcodenums[i]];
83: struct instr *dp;
84: struct mnemolookup *lookup;
85: if (!cnt)
86: break;
87: dp = table68k + opcodenums[i];
88: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
89: ;
90: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
91: }
92: fclose (f);
93: }
94: #else
95: void dump_counts (void)
96: {
97: }
98: #endif
99:
100: int broken_in;
101:
102: static __inline__ unsigned int cft_map (unsigned int f)
103: {
104: #ifndef HAVE_GET_WORD_UNSWAPPED
105: return f;
106: #else
107: return ((f >> 8) & 255) | ((f & 255) << 8);
108: #endif
109: }
110:
111: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
112:
113: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
114: {
115: op_illg (cft_map (opcode));
116: return 4;
117: }
118:
119: static void build_cpufunctbl (void)
120: {
121: int i;
122: unsigned long opcode;
123: struct cputbl *tbl = (cpu_level == 4 ? op_smalltbl_0_ff
124: : cpu_level == 3 ? op_smalltbl_1_ff
125: : cpu_level == 2 ? op_smalltbl_2_ff
126: : cpu_level == 1 ? op_smalltbl_3_ff
127: : ! cpu_compatible ? op_smalltbl_4_ff
128: : op_smalltbl_5_ff);
129:
130: write_log ("Building CPU function table (%d %d %d).\n",
131: cpu_level, cpu_compatible, address_space_24);
132:
133: for (opcode = 0; opcode < 65536; opcode++)
134: cpufunctbl[cft_map(opcode)] = op_illg_1;
135: for (i = 0; tbl[i].handler != NULL; i++) {
136: if (! tbl[i].specific)
137: cpufunctbl[cft_map (tbl[i].opcode)] = tbl[i].handler;
138: }
139: for (opcode = 0; opcode < 65536; opcode++) {
140: cpuop_func *f;
141:
142: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > cpu_level)
143: continue;
144:
145: if (table68k[opcode].handler != -1) {
146: f = cpufunctbl[cft_map (table68k[opcode].handler)];
147: if (f == op_illg_1)
148: abort();
149: cpufunctbl[cft_map(opcode)] = f;
150: }
151: }
152: for (i = 0; tbl[i].handler != NULL; i++) {
153: if (tbl[i].specific)
154: cpufunctbl[cft_map(tbl[i].opcode)] = tbl[i].handler;
155: }
156:
157: /* Hataris illegal opcodes: */
1.1.1.3 ! root 158: cpufunctbl[cft_map(GEMDOS_OPCODE)] = OpCode_GemDos;
! 159: cpufunctbl[cft_map(RUNOLDGEMDOS_OPCODE)] = OpCode_OldGemDos;
1.1 root 160: cpufunctbl[cft_map(CONDRV_OPCODE)] = OpCode_ConnectedDrive;
161: cpufunctbl[cft_map(TIMERD_OPCODE)] = OpCode_TimerD;
162: }
163:
164:
165:
166: /*
167: void check_prefs_changed_cpu (void)
168: {
169: if (currprefs.cpu_level != changed_prefs.cpu_level
170: || currprefs.cpu_compatible != changed_prefs.cpu_compatible) {
171: currprefs.cpu_level = changed_prefs.cpu_level;
172: currprefs.cpu_compatible = changed_prefs.cpu_compatible;
173: build_cpufunctbl ();
174: }
175: if (currprefs.m68k_speed != changed_prefs.m68k_speed) {
176: currprefs.m68k_speed = changed_prefs.m68k_speed;
177: reset_frame_rate_hack ();
178: update_68k_cycles ();
179: }
180: }
181: */
182:
183: void init_m68k (void)
184: {
185: int i;
186:
187: for (i = 0 ; i < 256 ; i++) {
188: int j;
189: for (j = 0 ; j < 8 ; j++) {
190: if (i & (1 << j)) break;
191: }
192: movem_index1[i] = j;
193: movem_index2[i] = 7-j;
194: movem_next[i] = i & (~(1 << j));
195: }
196: for (i = 0 ; i < 256 ; i++) {
197: int j;
198: for (j = 7 ; j >= 0 ; j--) {
199: if (i & (1 << j)) break;
200: }
201: fpp_movem_index1[i] = 7-j;
202: fpp_movem_index2[i] = j;
203: fpp_movem_next[i] = i & (~(1 << j));
204: }
205: #if COUNT_INSTRS
206: {
207: FILE *f = fopen (icountfilename (), "r");
208: memset (instrcount, 0, sizeof instrcount);
209: if (f) {
210: uae_u32 opcode, count, total;
211: char name[20];
212: write_log ("Reading instruction count file...\n");
213: fscanf (f, "Total: %lu\n", &total);
214: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
215: instrcount[opcode] = count;
216: }
217: fclose(f);
218: }
219: }
220: #endif
221: write_log ("Building CPU table for configuration: 68");
222: if (address_space_24 && cpu_level > 1)
223: write_log ("EC");
224: switch (cpu_level) {
225: case 1:
226: write_log ("010");
227: break;
228: case 2:
229: write_log ("020");
230: break;
231: case 3:
232: write_log ("020/881");
233: break;
234: case 4:
235: /* Who is going to miss the MMU anyway...? :-) */
236: write_log ("040");
237: break;
238: default:
239: write_log ("000");
240: break;
241: }
242: if (cpu_compatible)
243: write_log (" (compatible mode)");
244: write_log ("\n");
245:
246: read_table68k ();
247: do_merges ();
248:
249: write_log ("%d CPU functions\n", nr_cpuop_funcs);
250:
251: build_cpufunctbl ();
252: }
253:
254: struct regstruct regs, lastint_regs;
255: static struct regstruct regs_backup[16];
256: static int backup_pointer = 0;
257: static long int m68kpc_offset;
258: int lastint_no;
259:
260: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
261: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
262: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
263:
264: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
265: {
266: uae_u16 dp;
267: uae_s8 disp8;
268: uae_s16 disp16;
269: int r;
270: uae_u32 dispreg;
271: uaecptr addr;
272: uae_s32 offset = 0;
273: char buffer[80];
274:
275: switch (mode){
276: case Dreg:
277: sprintf (buffer,"D%d", reg);
278: break;
279: case Areg:
280: sprintf (buffer,"A%d", reg);
281: break;
282: case Aind:
283: sprintf (buffer,"(A%d)", reg);
284: break;
285: case Aipi:
286: sprintf (buffer,"(A%d)+", reg);
287: break;
288: case Apdi:
289: sprintf (buffer,"-(A%d)", reg);
290: break;
291: case Ad16:
292: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
293: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
294: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
295: (unsigned long)addr);
296: break;
297: case Ad8r:
298: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
299: disp8 = dp & 0xFF;
300: r = (dp & 0x7000) >> 12;
301: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
302: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
303: dispreg <<= (dp >> 9) & 3;
304:
305: if (dp & 0x100) {
306: uae_s32 outer = 0, disp = 0;
307: uae_s32 base = m68k_areg(regs,reg);
308: char name[10];
309: sprintf (name,"A%d, ",reg);
310: if (dp & 0x80) { base = 0; name[0] = 0; }
311: if (dp & 0x40) dispreg = 0;
312: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
313: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
314: base += disp;
315:
316: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
317: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
318:
319: if (!(dp & 4)) base += dispreg;
320: if (dp & 3) base = get_long (base);
321: if (dp & 4) base += dispreg;
322:
323: addr = base + outer;
324: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
325: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
326: 1 << ((dp >> 9) & 3),
327: disp,outer,
328: (unsigned long)addr);
329: } else {
330: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
331: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
332: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
333: 1 << ((dp >> 9) & 3), disp8,
334: (unsigned long)addr);
335: }
336: break;
337: case PC16:
338: addr = m68k_getpc () + m68kpc_offset;
339: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
340: addr += (uae_s16)disp16;
341: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
342: break;
343: case PC8r:
344: addr = m68k_getpc () + m68kpc_offset;
345: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
346: disp8 = dp & 0xFF;
347: r = (dp & 0x7000) >> 12;
348: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
349: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
350: dispreg <<= (dp >> 9) & 3;
351:
352: if (dp & 0x100) {
353: uae_s32 outer = 0,disp = 0;
354: uae_s32 base = addr;
355: char name[10];
356: sprintf (name,"PC, ");
357: if (dp & 0x80) { base = 0; name[0] = 0; }
358: if (dp & 0x40) dispreg = 0;
359: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
360: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
361: base += disp;
362:
363: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
364: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
365:
366: if (!(dp & 4)) base += dispreg;
367: if (dp & 3) base = get_long (base);
368: if (dp & 4) base += dispreg;
369:
370: addr = base + outer;
371: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
372: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
373: 1 << ((dp >> 9) & 3),
374: disp,outer,
375: (unsigned long)addr);
376: } else {
377: addr += (uae_s32)((uae_s8)disp8) + dispreg;
378: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
379: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
380: disp8, (unsigned long)addr);
381: }
382: break;
383: case absw:
384: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
385: m68kpc_offset += 2;
386: break;
387: case absl:
388: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
389: m68kpc_offset += 4;
390: break;
391: case imm:
392: switch (size){
393: case sz_byte:
394: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
395: m68kpc_offset += 2;
396: break;
397: case sz_word:
398: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
399: m68kpc_offset += 2;
400: break;
401: case sz_long:
402: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
403: m68kpc_offset += 4;
404: break;
405: default:
406: break;
407: }
408: break;
409: case imm0:
410: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
411: m68kpc_offset += 2;
412: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
413: break;
414: case imm1:
415: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
416: m68kpc_offset += 2;
417: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
418: break;
419: case imm2:
420: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
421: m68kpc_offset += 4;
422: sprintf (buffer,"#$%08lx", (unsigned long)offset);
423: break;
424: case immi:
425: offset = (uae_s32)(uae_s8)(reg & 0xff);
426: sprintf (buffer,"#$%08lx", (unsigned long)offset);
427: break;
428: default:
429: break;
430: }
431: if (buf == 0)
432: fprintf (f, "%s", buffer);
433: else
434: strcat (buf, buffer);
435: return offset;
436: }
437:
438: /* The plan is that this will take over the job of exception 3 handling -
439: * the CPU emulation functions will just do a longjmp to m68k_go whenever
440: * they hit an odd address. */
441: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
442: {
443: uae_u16 dp;
444: uae_s8 disp8;
445: uae_s16 disp16;
446: int r;
447: uae_u32 dispreg;
448: uaecptr addr;
449: uae_s32 offset = 0;
450:
451: switch (mode){
452: case Dreg:
453: *val = m68k_dreg (regs, reg);
454: return 1;
455: case Areg:
456: *val = m68k_areg (regs, reg);
457: return 1;
458:
459: case Aind:
460: case Aipi:
461: addr = m68k_areg (regs, reg);
462: break;
463: case Apdi:
464: addr = m68k_areg (regs, reg);
465: break;
466: case Ad16:
467: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
468: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
469: break;
470: case Ad8r:
471: addr = m68k_areg (regs, reg);
472: d8r_common:
473: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
474: disp8 = dp & 0xFF;
475: r = (dp & 0x7000) >> 12;
476: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
477: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
478: dispreg <<= (dp >> 9) & 3;
479:
480: if (dp & 0x100) {
481: uae_s32 outer = 0, disp = 0;
482: uae_s32 base = addr;
483: if (dp & 0x80) base = 0;
484: if (dp & 0x40) dispreg = 0;
485: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
486: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
487: base += disp;
488:
489: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
490: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
491:
492: if (!(dp & 4)) base += dispreg;
493: if (dp & 3) base = get_long (base);
494: if (dp & 4) base += dispreg;
495:
496: addr = base + outer;
497: } else {
498: addr += (uae_s32)((uae_s8)disp8) + dispreg;
499: }
500: break;
501: case PC16:
502: addr = m68k_getpc () + m68kpc_offset;
503: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
504: addr += (uae_s16)disp16;
505: break;
506: case PC8r:
507: addr = m68k_getpc () + m68kpc_offset;
508: goto d8r_common;
509: case absw:
510: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
511: m68kpc_offset += 2;
512: break;
513: case absl:
514: addr = get_ilong_1 (m68kpc_offset);
515: m68kpc_offset += 4;
516: break;
517: case imm:
518: switch (size){
519: case sz_byte:
520: *val = get_iword_1 (m68kpc_offset) & 0xff;
521: m68kpc_offset += 2;
522: break;
523: case sz_word:
524: *val = get_iword_1 (m68kpc_offset) & 0xffff;
525: m68kpc_offset += 2;
526: break;
527: case sz_long:
528: *val = get_ilong_1 (m68kpc_offset);
529: m68kpc_offset += 4;
530: break;
531: default:
532: break;
533: }
534: return 1;
535: case imm0:
536: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
537: m68kpc_offset += 2;
538: return 1;
539: case imm1:
540: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
541: m68kpc_offset += 2;
542: return 1;
543: case imm2:
544: *val = get_ilong_1 (m68kpc_offset);
545: m68kpc_offset += 4;
546: return 1;
547: case immi:
548: *val = (uae_s32)(uae_s8)(reg & 0xff);
549: return 1;
550: default:
551: addr = 0;
552: break;
553: }
554: if ((addr & 1) == 0)
555: return 1;
556:
557: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
558: last_fault_for_exception_3 = addr;
559: return 0;
560: }
561:
562: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
563: {
564: int reg = (dp >> 12) & 15;
565: uae_s32 regd = regs.regs[reg];
566: if ((dp & 0x800) == 0)
567: regd = (uae_s32)(uae_s16)regd;
568: regd <<= (dp >> 9) & 3;
569: if (dp & 0x100) {
570: uae_s32 outer = 0;
571: if (dp & 0x80) base = 0;
572: if (dp & 0x40) regd = 0;
573:
574: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
575: if ((dp & 0x30) == 0x30) base += next_ilong();
576:
577: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
578: if ((dp & 0x3) == 0x3) outer = next_ilong();
579:
580: if ((dp & 0x4) == 0) base += regd;
581: if (dp & 0x3) base = get_long (base);
582: if (dp & 0x4) base += regd;
583:
584: return base + outer;
585: } else {
586: return base + (uae_s32)((uae_s8)dp) + regd;
587: }
588: }
589:
590: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
591: {
592: int reg = (dp >> 12) & 15;
593: uae_s32 regd = regs.regs[reg];
594: #if 1
595: if ((dp & 0x800) == 0)
596: regd = (uae_s32)(uae_s16)regd;
597: return base + (uae_s8)dp + regd;
598: #else
599: /* Branch-free code... benchmark this again now that
600: * things are no longer inline. */
601: uae_s32 regd16;
602: uae_u32 mask;
603: mask = ((dp & 0x800) >> 11) - 1;
604: regd16 = (uae_s32)(uae_s16)regd;
605: regd16 &= mask;
606: mask = ~mask;
607: base += (uae_s8)dp;
608: regd &= mask;
609: regd |= regd16;
610: return base + regd;
611: #endif
612: }
613:
614: void MakeSR (void)
615: {
616: #if 0
617: assert((regs.t1 & 1) == regs.t1);
618: assert((regs.t0 & 1) == regs.t0);
619: assert((regs.s & 1) == regs.s);
620: assert((regs.m & 1) == regs.m);
621: assert((XFLG & 1) == XFLG);
622: assert((NFLG & 1) == NFLG);
623: assert((ZFLG & 1) == ZFLG);
624: assert((VFLG & 1) == VFLG);
625: assert((CFLG & 1) == CFLG);
626: #endif
627: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
628: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
629: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
630: | GET_CFLG);
631: }
632:
633: void MakeFromSR (void)
634: {
635: int oldm = regs.m;
636: int olds = regs.s;
637:
638: regs.t1 = (regs.sr >> 15) & 1;
639: regs.t0 = (regs.sr >> 14) & 1;
640: regs.s = (regs.sr >> 13) & 1;
641: regs.m = (regs.sr >> 12) & 1;
642: regs.intmask = (regs.sr >> 8) & 7;
643: SET_XFLG ((regs.sr >> 4) & 1);
644: SET_NFLG ((regs.sr >> 3) & 1);
645: SET_ZFLG ((regs.sr >> 2) & 1);
646: SET_VFLG ((regs.sr >> 1) & 1);
647: SET_CFLG (regs.sr & 1);
648: if (cpu_level >= 2) {
649: if (olds != regs.s) {
650: if (olds) {
651: if (oldm)
652: regs.msp = m68k_areg(regs, 7);
653: else
654: regs.isp = m68k_areg(regs, 7);
655: m68k_areg(regs, 7) = regs.usp;
656: } else {
657: regs.usp = m68k_areg(regs, 7);
658: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
659: }
660: } else if (olds && oldm != regs.m) {
661: if (oldm) {
662: regs.msp = m68k_areg(regs, 7);
663: m68k_areg(regs, 7) = regs.isp;
664: } else {
665: regs.isp = m68k_areg(regs, 7);
666: m68k_areg(regs, 7) = regs.msp;
667: }
668: }
669: } else {
670: if (olds != regs.s) {
671: if (olds) {
672: regs.isp = m68k_areg(regs, 7);
673: m68k_areg(regs, 7) = regs.usp;
674: } else {
675: regs.usp = m68k_areg(regs, 7);
676: m68k_areg(regs, 7) = regs.isp;
677: }
678: }
679: }
680:
681: set_special (SPCFLAG_INT);
682: if (regs.t1 || regs.t0)
683: set_special (SPCFLAG_TRACE);
684: else
685: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
686: }
687:
688: void Exception(int nr, uaecptr oldpc)
689: {
690: uae_u32 currpc = m68k_getpc ();
691:
1.1.1.2 root 692: /*if( nr>=2 && nr<10 ) fprintf(stderr,"Exception (-> %i bombs)!\n",nr);*/
1.1 root 693:
694: compiler_flush_jsr_stack();
695: MakeSR();
696:
697: if (!regs.s) {
698: regs.usp = m68k_areg(regs, 7);
699: if (cpu_level >= 2)
700: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
701: else
702: m68k_areg(regs, 7) = regs.isp;
703: regs.s = 1;
704: }
705: if (cpu_level > 0) {
706: if (nr == 2 || nr == 3) {
707: int i;
708: /* @@@ this is probably wrong (?) */
709: for (i = 0 ; i < 12 ; i++) {
710: m68k_areg(regs, 7) -= 2;
711: put_word (m68k_areg(regs, 7), 0);
712: }
713: m68k_areg(regs, 7) -= 2;
714: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
715: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
716: m68k_areg(regs, 7) -= 4;
717: put_long (m68k_areg(regs, 7), oldpc);
718: m68k_areg(regs, 7) -= 2;
719: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
720: } else if (regs.m && nr >= 24 && nr < 32) {
721: m68k_areg(regs, 7) -= 2;
722: put_word (m68k_areg(regs, 7), nr * 4);
723: m68k_areg(regs, 7) -= 4;
724: put_long (m68k_areg(regs, 7), currpc);
725: m68k_areg(regs, 7) -= 2;
726: put_word (m68k_areg(regs, 7), regs.sr);
727: regs.sr |= (1 << 13);
728: regs.msp = m68k_areg(regs, 7);
729: m68k_areg(regs, 7) = regs.isp;
730: m68k_areg(regs, 7) -= 2;
731: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
732: } else {
733: m68k_areg(regs, 7) -= 2;
734: put_word (m68k_areg(regs, 7), nr * 4);
735: }
736: }
1.1.1.3 ! root 737:
! 738: /* Push PC on stack: */
1.1 root 739: m68k_areg(regs, 7) -= 4;
740: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 ! root 741: /* Push SR on stack: */
1.1 root 742: m68k_areg(regs, 7) -= 2;
743: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 ! root 744:
! 745: /* 68000 bus/address errors: */
! 746: if (cpu_level==0 && (nr==2 || nr==3)) {
! 747: m68k_areg(regs, 7) -= 8;
! 748: if (nr == 3) { /* Address error */
! 749: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
! 750: put_long (m68k_areg(regs, 7)+2, last_fault_for_exception_3);
! 751: put_word (m68k_areg(regs, 7)+6, last_op_for_exception_3);
! 752: put_long (m68k_areg(regs, 7)+10, last_addr_for_exception_3);
! 753: if( bEnableDebug ) {
! 754: fprintf(stderr,"Address Error at address $%x, PC=$%x\n",last_fault_for_exception_3,currpc);
! 755: DebugUI();
! 756: }
! 757: }
! 758: else { /* Bus error */
! 759: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
! 760: put_long (m68k_areg(regs, 7)+2, BusAddressLocation);
! 761: put_word (m68k_areg(regs, 7)+6, get_word(currpc));
! 762: if( bEnableDebug && BusAddressLocation!=0xff8a00) {
! 763: fprintf(stderr,"Bus Error at address $%x, PC=$%x\n",BusAddressLocation,currpc);
! 764: DebugUI();
! 765: }
! 766: }
! 767: }
! 768:
1.1 root 769: m68k_setpc (get_long (regs.vbr + 4*nr));
770: fill_prefetch_0 ();
771: regs.t1 = regs.t0 = regs.m = 0;
772: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
773: }
774:
775: static void Interrupt(int nr)
776: {
777: assert(nr < 8 && nr >= 0);
778: lastint_regs = regs;
779: lastint_no = nr;
780: Exception(nr+24, 0);
781:
782: regs.intmask = nr;
783: set_special (SPCFLAG_INT);
784: }
785:
786: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr;
787:
788: int m68k_move2c (int regno, uae_u32 *regp)
789: {
790: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
791: || (cpu_level < 4 && (regno & 0x7FF) > 2)
792: || (cpu_level == 4 && regno == 0x802))
793: {
794: op_illg (0x4E7B);
795: return 0;
796: } else {
797: switch (regno) {
798: case 0: regs.sfc = *regp & 7; break;
799: case 1: regs.dfc = *regp & 7; break;
800: case 2: cacr = *regp & (cpu_level < 4 ? 0x3 : 0x80008000); break;
801: case 3: tc = *regp & 0xc000; break;
802: /* Mask out fields that should be zero. */
803: case 4: itt0 = *regp & 0xffffe364; break;
804: case 5: itt1 = *regp & 0xffffe364; break;
805: case 6: dtt0 = *regp & 0xffffe364; break;
806: case 7: dtt1 = *regp & 0xffffe364; break;
807:
808: case 0x800: regs.usp = *regp; break;
809: case 0x801: regs.vbr = *regp; break;
810: case 0x802: caar = *regp & 0xfc; break;
811: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
812: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
813: default:
814: op_illg (0x4E7B);
815: return 0;
816: }
817: }
818: return 1;
819: }
820:
821: int m68k_movec2 (int regno, uae_u32 *regp)
822: {
823: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
824: || (cpu_level < 4 && (regno & 0x7FF) > 2)
825: || (cpu_level == 4 && regno == 0x802))
826: {
827: op_illg (0x4E7A);
828: return 0;
829: } else {
830: switch (regno) {
831: case 0: *regp = regs.sfc; break;
832: case 1: *regp = regs.dfc; break;
833: case 2: *regp = cacr; break;
834: case 3: *regp = tc; break;
835: case 4: *regp = itt0; break;
836: case 5: *regp = itt1; break;
837: case 6: *regp = dtt0; break;
838: case 7: *regp = dtt1; break;
839: case 0x800: *regp = regs.usp; break;
840: case 0x801: *regp = regs.vbr; break;
841: case 0x802: *regp = caar; break;
842: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
843: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
844: case 0x805: *regp = mmusr; break;
845: default:
846: op_illg (0x4E7A);
847: return 0;
848: }
849: }
850: return 1;
851: }
852:
853: STATIC_INLINE int
854: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
855: {
856: uae_u32 q = 0, cbit = 0;
857: int i;
858:
859: if (div <= src_hi) {
860: return 1;
861: }
862: for (i = 0 ; i < 32 ; i++) {
863: cbit = src_hi & 0x80000000ul;
864: src_hi <<= 1;
865: if (src_lo & 0x80000000ul) src_hi++;
866: src_lo <<= 1;
867: q = q << 1;
868: if (cbit || div <= src_hi) {
869: q |= 1;
870: src_hi -= div;
871: }
872: }
873: *quot = q;
874: *rem = src_hi;
875: return 0;
876: }
877:
878: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
879: {
880: #if defined(uae_s64)
881: if (src == 0) {
882: Exception (5, oldpc);
883: return;
884: }
885: if (extra & 0x800) {
886: /* signed variant */
887: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
888: uae_s64 quot, rem;
889:
890: if (extra & 0x400) {
891: a &= 0xffffffffu;
892: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
893: }
894: rem = a % (uae_s64)(uae_s32)src;
895: quot = a / (uae_s64)(uae_s32)src;
896: if ((quot & UVAL64(0xffffffff80000000)) != 0
897: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
898: {
899: SET_VFLG (1);
900: SET_NFLG (1);
901: SET_CFLG (0);
902: } else {
903: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
904: SET_VFLG (0);
905: SET_CFLG (0);
906: SET_ZFLG (((uae_s32)quot) == 0);
907: SET_NFLG (((uae_s32)quot) < 0);
908: m68k_dreg(regs, extra & 7) = rem;
909: m68k_dreg(regs, (extra >> 12) & 7) = quot;
910: }
911: } else {
912: /* unsigned */
913: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
914: uae_u64 quot, rem;
915:
916: if (extra & 0x400) {
917: a &= 0xffffffffu;
918: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
919: }
920: rem = a % (uae_u64)src;
921: quot = a / (uae_u64)src;
922: if (quot > 0xffffffffu) {
923: SET_VFLG (1);
924: SET_NFLG (1);
925: SET_CFLG (0);
926: } else {
927: SET_VFLG (0);
928: SET_CFLG (0);
929: SET_ZFLG (((uae_s32)quot) == 0);
930: SET_NFLG (((uae_s32)quot) < 0);
931: m68k_dreg(regs, extra & 7) = rem;
932: m68k_dreg(regs, (extra >> 12) & 7) = quot;
933: }
934: }
935: #else
936: if (src == 0) {
937: Exception (5, oldpc);
938: return;
939: }
940: if (extra & 0x800) {
941: /* signed variant */
942: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
943: uae_s32 hi = lo < 0 ? -1 : 0;
944: uae_s32 save_high;
945: uae_u32 quot, rem;
946: uae_u32 sign;
947:
948: if (extra & 0x400) {
949: hi = (uae_s32)m68k_dreg(regs, extra & 7);
950: }
951: save_high = hi;
952: sign = (hi ^ src);
953: if (hi < 0) {
954: hi = ~hi;
955: lo = -lo;
956: if (lo == 0) hi++;
957: }
958: if ((uae_s32)src < 0) src = -src;
959: if (div_unsigned(hi, lo, src, ", &rem) ||
960: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
961: SET_VFLG (1);
962: SET_NFLG (1);
963: SET_CFLG (0);
964: } else {
965: if (sign & 0x80000000) quot = -quot;
966: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
967: SET_VFLG (0);
968: SET_CFLG (0);
969: SET_ZFLG (((uae_s32)quot) == 0);
970: SET_NFLG (((uae_s32)quot) < 0);
971: m68k_dreg(regs, extra & 7) = rem;
972: m68k_dreg(regs, (extra >> 12) & 7) = quot;
973: }
974: } else {
975: /* unsigned */
976: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
977: uae_u32 hi = 0;
978: uae_u32 quot, rem;
979:
980: if (extra & 0x400) {
981: hi = (uae_u32)m68k_dreg(regs, extra & 7);
982: }
983: if (div_unsigned(hi, lo, src, ", &rem)) {
984: SET_VFLG (1);
985: SET_NFLG (1);
986: SET_CFLG (0);
987: } else {
988: SET_VFLG (0);
989: SET_CFLG (0);
990: SET_ZFLG (((uae_s32)quot) == 0);
991: SET_NFLG (((uae_s32)quot) < 0);
992: m68k_dreg(regs, extra & 7) = rem;
993: m68k_dreg(regs, (extra >> 12) & 7) = quot;
994: }
995: }
996: #endif
997: }
998:
999: STATIC_INLINE void
1000: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1001: {
1002: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
1003: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
1004: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
1005: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
1006: uae_u32 lo;
1007:
1008: lo = r0 + ((r1 << 16) & 0xffff0000ul);
1009: if (lo < r0) r3++;
1010: r0 = lo;
1011: lo = r0 + ((r2 << 16) & 0xffff0000ul);
1012: if (lo < r0) r3++;
1013: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1014: *dst_lo = lo;
1015: *dst_hi = r3;
1016: }
1017:
1018: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1019: {
1020: #if defined(uae_s64)
1021: if (extra & 0x800) {
1022: /* signed variant */
1023: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1024:
1025: a *= (uae_s64)(uae_s32)src;
1026: SET_VFLG (0);
1027: SET_CFLG (0);
1028: SET_ZFLG (a == 0);
1029: SET_NFLG (a < 0);
1030: if (extra & 0x400)
1031: m68k_dreg(regs, extra & 7) = a >> 32;
1032: else if ((a & UVAL64(0xffffffff80000000)) != 0
1033: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1034: {
1035: SET_VFLG (1);
1036: }
1037: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1038: } else {
1039: /* unsigned */
1040: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1041:
1042: a *= (uae_u64)src;
1043: SET_VFLG (0);
1044: SET_CFLG (0);
1045: SET_ZFLG (a == 0);
1046: SET_NFLG (((uae_s64)a) < 0);
1047: if (extra & 0x400)
1048: m68k_dreg(regs, extra & 7) = a >> 32;
1049: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1050: SET_VFLG (1);
1051: }
1052: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1053: }
1054: #else
1055: if (extra & 0x800) {
1056: /* signed variant */
1057: uae_s32 src1,src2;
1058: uae_u32 dst_lo,dst_hi;
1059: uae_u32 sign;
1060:
1061: src1 = (uae_s32)src;
1062: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1063: sign = (src1 ^ src2);
1064: if (src1 < 0) src1 = -src1;
1065: if (src2 < 0) src2 = -src2;
1066: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1067: if (sign & 0x80000000) {
1068: dst_hi = ~dst_hi;
1069: dst_lo = -dst_lo;
1070: if (dst_lo == 0) dst_hi++;
1071: }
1072: SET_VFLG (0);
1073: SET_CFLG (0);
1074: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1075: SET_NFLG (((uae_s32)dst_hi) < 0);
1076: if (extra & 0x400)
1077: m68k_dreg(regs, extra & 7) = dst_hi;
1078: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1079: && ((dst_hi & 0xffffffff) != 0xffffffff
1080: || (dst_lo & 0x80000000) != 0x80000000))
1081: {
1082: SET_VFLG (1);
1083: }
1084: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1085: } else {
1086: /* unsigned */
1087: uae_u32 dst_lo,dst_hi;
1088:
1089: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1090:
1091: SET_VFLG (0);
1092: SET_CFLG (0);
1093: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1094: SET_NFLG (((uae_s32)dst_hi) < 0);
1095: if (extra & 0x400)
1096: m68k_dreg(regs, extra & 7) = dst_hi;
1097: else if (dst_hi != 0) {
1098: SET_VFLG (1);
1099: }
1100: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1101: }
1102: #endif
1103: }
1104: static char* ccnames[] =
1105: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1106: "VC","VS","PL","MI","GE","LT","GT","LE" };
1107:
1108: void m68k_reset (void)
1109: {
1110: m68k_areg (regs, 7) = get_long (ROMmem_start);
1111: m68k_setpc (get_long (ROMmem_start+4));
1112: fill_prefetch_0 ();
1113: regs.s = 1;
1114: regs.m = 0;
1115: regs.stopped = 0;
1116: regs.t1 = 0;
1117: regs.t0 = 0;
1118: SET_ZFLG (0);
1119: SET_XFLG (0);
1120: SET_CFLG (0);
1121: SET_VFLG (0);
1122: SET_NFLG (0);
1123: regs.spcflags = 0;
1124: regs.intmask = 7;
1125: regs.vbr = regs.sfc = regs.dfc = 0;
1126: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1127: }
1128:
1129: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1130: {
1131: uaecptr pc = m68k_getpc ();
1132: /*
1133: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1134: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1135: m68k_incpc (2);
1136: fill_prefetch_0 ();
1137: return 4;
1138: }
1139: */
1140: compiler_flush_jsr_stack ();
1141: if (opcode == 0x4E7B && get_long (0x10) == 0 )
1142: {
1143: write_log ("This program requires a 68020 CPU!\n");
1144: broken_in = 1;
1145: set_special (SPCFLAG_BRK);
1146: quit_program = 1;
1147: }
1148: /*
1149: if (opcode == 0xFF0D) {
1150: if ((pc & 0xF80000) == 0xF80000) {
1151: // This is from the dummy Kickstart replacement
1152: uae_u16 arg = get_iword (2);
1153: m68k_incpc (4);
1154: ersatz_perform (arg);
1155: fill_prefetch_0 ();
1156: return 4;
1157: } else if ((pc & 0xF80000) == 0xF00000) {
1158: // User-mode STOP replacement
1159: m68k_setstopped (1);
1160: return 4;
1161: }
1162: }
1163: */
1164: /*
1165: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1166: // Calltrap.
1167: m68k_incpc(2);
1168: call_calltrap (opcode & 0xFFF);
1169: fill_prefetch_0 ();
1170: return 4;
1171: }
1172: */
1173: if ((opcode & 0xF000) == 0xF000)
1174: {
1175: Exception(0xB,0);
1176: return 4;
1177: }
1178: if ((opcode & 0xF000) == 0xA000)
1179: {
1180: /*
1181: if ((pc & 0xF80000) == 0xF00000) {
1182: // Calltrap.
1183: call_calltrap (opcode & 0xFFF);
1184: }
1185: */
1186: Exception(0xA,0);
1187: return 4;
1188: }
1189:
1.1.1.3 ! root 1190: #if 0
1.1 root 1191: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1192: #endif
1193: Exception (4,0);
1194: return 4;
1195: }
1196:
1197: void mmu_op(uae_u32 opcode, uae_u16 extra)
1198: {
1199: if ((opcode & 0xFE0) == 0x0500) {
1200: /* PFLUSH */
1201: mmusr = 0;
1202: write_log ("PFLUSH\n");
1203: } else if ((opcode & 0x0FD8) == 0x548) {
1204: /* PTEST */
1205: write_log ("PTEST\n");
1206: } else
1207: op_illg (opcode);
1208: }
1209:
1210:
1211: static uaecptr last_trace_ad = 0;
1212:
1213: static void do_trace (void)
1214: {
1215: if (regs.t0 && cpu_level >= 2) {
1216: uae_u16 opcode;
1217: /* should also include TRAP, CHK, SR modification FPcc */
1218: /* probably never used so why bother */
1219: /* We can afford this to be inefficient... */
1220: m68k_setpc (m68k_getpc ());
1221: fill_prefetch_0 ();
1222: opcode = get_word (regs.pc);
1223: if (opcode == 0x4e72 /* RTE */
1224: || opcode == 0x4e74 /* RTD */
1225: || opcode == 0x4e75 /* RTS */
1226: || opcode == 0x4e77 /* RTR */
1227: || opcode == 0x4e76 /* TRAPV */
1228: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1229: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1230: || (opcode & 0xff00) == 0x6100 /* BSR */
1231: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1232: && cctrue((opcode >> 8) & 0xf))
1233: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1234: && !cctrue((opcode >> 8) & 0xf)
1235: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1236: {
1237: last_trace_ad = m68k_getpc ();
1238: unset_special (SPCFLAG_TRACE);
1239: set_special (SPCFLAG_DOTRACE);
1240: }
1241: } else if (regs.t1) {
1242: last_trace_ad = m68k_getpc ();
1243: unset_special (SPCFLAG_TRACE);
1244: set_special (SPCFLAG_DOTRACE);
1245: }
1246: }
1247:
1248:
1249: static int do_specialties (void)
1250: {
1251: run_compiled_code();
1252: if (regs.spcflags & SPCFLAG_DOTRACE) {
1253: Exception (9,last_trace_ad);
1254: }
1255: while (regs.spcflags & SPCFLAG_STOP) {
1256: do_cycles (4);
1257: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.3 ! root 1258: /*int intr = intlev ();*/
1.1 root 1259: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.3 ! root 1260: /*if (intr != -1 && intr > regs.intmask) {
1.1 root 1261: Interrupt (intr);
1262: regs.stopped = 0;
1263: unset_special (SPCFLAG_STOP);
1.1.1.3 ! root 1264: }*/
1.1 root 1265: }
1266: }
1267: if (regs.spcflags & SPCFLAG_TRACE)
1268: do_trace ();
1269:
1270: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.3 ! root 1271: /*int intr = intlev ();*/
1.1 root 1272: unset_special (SPCFLAG_DOINT);
1.1.1.3 ! root 1273: /*if (intr != -1 && intr > regs.intmask) {
1.1 root 1274: Interrupt (intr);
1275: regs.stopped = 0;
1.1.1.3 ! root 1276: }*/
1.1 root 1277: }
1278: if (regs.spcflags & SPCFLAG_INT) {
1279: unset_special (SPCFLAG_INT);
1280: set_special (SPCFLAG_DOINT);
1281: }
1282: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1283: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1284: return 1;
1285: }
1286: return 0;
1287: }
1288:
1.1.1.3 ! root 1289:
1.1 root 1290: /* It's really sad to have two almost identical functions for this, but we
1291: do it all for performance... :( */
1292: static void m68k_run_1 (void)
1293: {
1294: #ifdef DEBUG_PREFETCH
1295: uae_u8 saved_bytes[20];
1296: uae_u16 *oldpcp;
1297: #endif
1298: while(!quit_program) {
1299: int cycles;
1300: uae_u32 opcode = get_iword_prefetch (0);
1301: #ifdef DEBUG_PREFETCH
1302: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1303: fprintf (stderr, "Prefetch differs from memory.\n");
1304: debugging = 1;
1305: return;
1306: }
1307: oldpcp = regs.pc_p;
1308: memcpy (saved_bytes, regs.pc_p, 20);
1309: #endif
1310:
1311: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 ! root 1312: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1313:
1314: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1315: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1316: #if COUNT_INSTRS == 2
1317: if (table68k[opcode].handler != -1)
1318: instrcount[table68k[opcode].handler]++;
1319: #elif COUNT_INSTRS == 1
1320: instrcount[opcode]++;
1321: #endif
1.1.1.2 root 1322:
1.1 root 1323: cycles = (*cpufunctbl[cft_map(opcode)])(opcode);
1.1.1.2 root 1324:
1.1 root 1325: #ifdef DEBUG_PREFETCH
1326: if (memcmp (saved_bytes, oldpcp, 20) != 0) {
1327: fprintf (stderr, "Self-modifying code detected.\n");
1328: set_special (SPCFLAG_BRK);
1329: debugging = 1;
1330: }
1331: #endif
1.1.1.2 root 1332:
1.1 root 1333: do_cycles (cycles);
1334: if (regs.spcflags) {
1335: if (do_specialties ())
1336: return;
1337: }
1338: }
1339: }
1340:
1341: #define DEBUG_PREFETCH
1342:
1343: /* Same thing, but don't use prefetch to get opcode. */
1344: static void m68k_run_2 (void)
1345: {
1346: while(!quit_program) {
1347: int cycles;
1348: #ifdef HAVE_GET_WORD_UNSWAPPED
1349: uae_u32 opcode = do_get_mem_word_unswapped (regs.pc_p);
1350: #else
1351: uae_u32 opcode = get_iword (0);
1352: #endif
1353:
1354: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 ! root 1355: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1356:
1357: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1358: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1359: #if COUNT_INSTRS == 2
1360: if (table68k[opcode].handler != -1)
1361: instrcount[table68k[opcode].handler]++;
1362: #elif COUNT_INSTRS == 1
1363: instrcount[opcode]++;
1364: #endif
1.1.1.2 root 1365:
1.1 root 1366: cycles = (*cpufunctbl[cft_map(opcode)])(opcode);
1367:
1368: do_cycles (cycles);
1369: if (regs.spcflags) {
1370: if (do_specialties ())
1371: return;
1372: }
1373: }
1374: }
1375:
1376:
1377: int in_m68k_go = 0;
1378:
1379: void m68k_go (int may_quit)
1380: {
1381: if (in_m68k_go || !may_quit) {
1382: write_log ("Bug! m68k_go is not reentrant.\n");
1383: abort ();
1384: }
1385:
1386: in_m68k_go++;
1387: while(!quit_program) {
1388: /*
1389: if (debugging)
1390: debug ();
1391: */
1.1.1.2 root 1392: if(cpu_compatible)
1393: m68k_run_1();
1394: else
1395: m68k_run_2();
1.1 root 1396: }
1397: in_m68k_go--;
1398: }
1399:
1400: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1401: {
1402: uae_u32 opcode, val;
1403: struct instr *dp;
1404:
1405: opcode = get_iword_1(0);
1406: last_op_for_exception_3 = opcode;
1407: m68kpc_offset = 2;
1408:
1409: if (cpufunctbl[cft_map(opcode)] == op_illg_1) {
1410: opcode = 0x4AFC;
1411: }
1412: dp = table68k + opcode;
1413:
1414: if (dp->suse) {
1415: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1416: Exception (3, 0);
1417: return;
1418: }
1419: }
1420: if (dp->duse) {
1421: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1422: Exception (3, 0);
1423: return;
1424: }
1425: }
1426: }
1427:
1428: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1429: {
1430: uaecptr newpc = 0;
1431: m68kpc_offset = addr - m68k_getpc ();
1432: while (cnt-- > 0) {
1433: char instrname[20],*ccpt;
1434: int opwords;
1435: uae_u32 opcode;
1436: struct mnemolookup *lookup;
1437: struct instr *dp;
1438: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1439: for (opwords = 0; opwords < 5; opwords++){
1440: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1441: }
1442: opcode = get_iword_1 (m68kpc_offset);
1443: m68kpc_offset += 2;
1444: if (cpufunctbl[cft_map(opcode)] == op_illg_1) {
1445: opcode = 0x4AFC;
1446: }
1447: dp = table68k + opcode;
1448: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1449: ;
1450:
1451: strcpy (instrname, lookup->name);
1452: ccpt = strstr (instrname, "cc");
1453: if (ccpt != 0) {
1454: strncpy (ccpt, ccnames[dp->cc], 2);
1455: }
1456: fprintf (f, "%s", instrname);
1457: switch (dp->size){
1458: case sz_byte: fprintf (f, ".B "); break;
1459: case sz_word: fprintf (f, ".W "); break;
1460: case sz_long: fprintf (f, ".L "); break;
1461: default: fprintf (f, " "); break;
1462: }
1463:
1464: if (dp->suse) {
1465: newpc = m68k_getpc () + m68kpc_offset;
1466: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1467: }
1468: if (dp->suse && dp->duse)
1469: fprintf (f, ",");
1470: if (dp->duse) {
1471: newpc = m68k_getpc () + m68kpc_offset;
1472: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1473: }
1474: if (ccpt != 0) {
1475: if (cctrue(dp->cc))
1476: fprintf (f, " == %08lx (TRUE)", newpc);
1477: else
1478: fprintf (f, " == %08lx (FALSE)", newpc);
1479: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1480: fprintf (f, " == %08lx", newpc);
1481: fprintf (f, "\n");
1482: }
1483: if (nextpc)
1484: *nextpc = m68k_getpc () + m68kpc_offset;
1485: }
1486:
1487: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1488: {
1489: int i;
1490: for (i = 0; i < 8; i++){
1491: fprintf (f, "D%d: %08lx ", i, m68k_dreg(regs, i));
1492: if ((i & 3) == 3) fprintf (f, "\n");
1493: }
1494: for (i = 0; i < 8; i++){
1495: fprintf (f, "A%d: %08lx ", i, m68k_areg(regs, i));
1496: if ((i & 3) == 3) fprintf (f, "\n");
1497: }
1498: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1499: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1500: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1501: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1502: regs.usp,regs.isp,regs.msp,regs.vbr);
1503: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1504: regs.t1, regs.t0, regs.s, regs.m,
1505: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1506: for (i = 0; i < 8; i++){
1507: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1508: if ((i & 3) == 3) fprintf (f, "\n");
1509: }
1510: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1511: (regs.fpsr & 0x8000000) != 0,
1512: (regs.fpsr & 0x4000000) != 0,
1513: (regs.fpsr & 0x2000000) != 0,
1514: (regs.fpsr & 0x1000000) != 0);
1515: if (cpu_compatible)
1516: fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1517:
1518: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1519: if (nextpc)
1520: fprintf (f, "next PC: %08lx\n", *nextpc);
1521: }
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