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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
9: *
1.1 root 10: */
11:
12: #include "sysdeps.h"
13: #include "hatari-glue.h"
14: #include "maccess.h"
15: #include "memory.h"
16: #include "newcpu.h"
17: #include "compiler.h"
18: #include "events.h"
19: #include "../includes/tos.h"
20:
21:
1.1.1.4 ! root 22: extern int bQuitProgram; /* Declared in main.c */
! 23:
! 24:
1.1 root 25: struct flag_struct regflags;
26:
1.1.1.2 root 27: int lastInstructionCycles; /* how many cycles last instruction took to execute */
28:
1.1 root 29: /* Opcode of faulting instruction */
30: uae_u16 last_op_for_exception_3;
31: /* PC at fault time */
32: uaecptr last_addr_for_exception_3;
33: /* Address that generated the exception */
34: uaecptr last_fault_for_exception_3;
35:
36: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
37: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
38:
39: int movem_index1[256];
40: int movem_index2[256];
41: int movem_next[256];
42:
43: int fpp_movem_index1[256];
44: int fpp_movem_index2[256];
45: int fpp_movem_next[256];
46:
47: cpuop_func *cpufunctbl[65536];
48:
49: #define COUNT_INSTRS 0
50:
51: #if COUNT_INSTRS
52: static unsigned long int instrcount[65536];
53: static uae_u16 opcodenums[65536];
54:
55: static int compfn (const void *el1, const void *el2)
56: {
57: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
58: }
59:
60: static char *icountfilename (void)
61: {
62: char *name = getenv ("INSNCOUNT");
63: if (name)
64: return name;
65: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
66: }
67:
68: void dump_counts (void)
69: {
70: FILE *f = fopen (icountfilename (), "w");
71: unsigned long int total;
72: int i;
73:
74: write_log ("Writing instruction count file...\n");
75: for (i = 0; i < 65536; i++) {
76: opcodenums[i] = i;
77: total += instrcount[i];
78: }
79: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
80:
81: fprintf (f, "Total: %lu\n", total);
82: for (i=0; i < 65536; i++) {
83: unsigned long int cnt = instrcount[opcodenums[i]];
84: struct instr *dp;
85: struct mnemolookup *lookup;
86: if (!cnt)
87: break;
88: dp = table68k + opcodenums[i];
89: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
90: ;
91: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
92: }
93: fclose (f);
94: }
95: #else
96: void dump_counts (void)
97: {
98: }
99: #endif
100:
101: int broken_in;
102:
103: static __inline__ unsigned int cft_map (unsigned int f)
104: {
105: #ifndef HAVE_GET_WORD_UNSWAPPED
106: return f;
107: #else
108: return ((f >> 8) & 255) | ((f & 255) << 8);
109: #endif
110: }
111:
112: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
113:
114: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
115: {
116: op_illg (cft_map (opcode));
117: return 4;
118: }
119:
1.1.1.4 ! root 120:
! 121: void build_cpufunctbl(void)
1.1 root 122: {
123: int i;
124: unsigned long opcode;
125: struct cputbl *tbl = (cpu_level == 4 ? op_smalltbl_0_ff
126: : cpu_level == 3 ? op_smalltbl_1_ff
127: : cpu_level == 2 ? op_smalltbl_2_ff
128: : cpu_level == 1 ? op_smalltbl_3_ff
129: : ! cpu_compatible ? op_smalltbl_4_ff
130: : op_smalltbl_5_ff);
131:
132: write_log ("Building CPU function table (%d %d %d).\n",
133: cpu_level, cpu_compatible, address_space_24);
134:
135: for (opcode = 0; opcode < 65536; opcode++)
136: cpufunctbl[cft_map(opcode)] = op_illg_1;
137: for (i = 0; tbl[i].handler != NULL; i++) {
138: if (! tbl[i].specific)
139: cpufunctbl[cft_map (tbl[i].opcode)] = tbl[i].handler;
140: }
141: for (opcode = 0; opcode < 65536; opcode++) {
142: cpuop_func *f;
143:
144: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > cpu_level)
145: continue;
146:
147: if (table68k[opcode].handler != -1) {
148: f = cpufunctbl[cft_map (table68k[opcode].handler)];
149: if (f == op_illg_1)
150: abort();
151: cpufunctbl[cft_map(opcode)] = f;
152: }
153: }
154: for (i = 0; tbl[i].handler != NULL; i++) {
155: if (tbl[i].specific)
156: cpufunctbl[cft_map(tbl[i].opcode)] = tbl[i].handler;
157: }
158:
159: /* Hataris illegal opcodes: */
1.1.1.3 root 160: cpufunctbl[cft_map(GEMDOS_OPCODE)] = OpCode_GemDos;
161: cpufunctbl[cft_map(RUNOLDGEMDOS_OPCODE)] = OpCode_OldGemDos;
1.1 root 162: cpufunctbl[cft_map(CONDRV_OPCODE)] = OpCode_ConnectedDrive;
163: cpufunctbl[cft_map(TIMERD_OPCODE)] = OpCode_TimerD;
164: }
165:
166:
167:
168: void init_m68k (void)
169: {
170: int i;
171:
172: for (i = 0 ; i < 256 ; i++) {
173: int j;
174: for (j = 0 ; j < 8 ; j++) {
175: if (i & (1 << j)) break;
176: }
177: movem_index1[i] = j;
178: movem_index2[i] = 7-j;
179: movem_next[i] = i & (~(1 << j));
180: }
181: for (i = 0 ; i < 256 ; i++) {
182: int j;
183: for (j = 7 ; j >= 0 ; j--) {
184: if (i & (1 << j)) break;
185: }
186: fpp_movem_index1[i] = 7-j;
187: fpp_movem_index2[i] = j;
188: fpp_movem_next[i] = i & (~(1 << j));
189: }
190: #if COUNT_INSTRS
191: {
192: FILE *f = fopen (icountfilename (), "r");
193: memset (instrcount, 0, sizeof instrcount);
194: if (f) {
195: uae_u32 opcode, count, total;
196: char name[20];
197: write_log ("Reading instruction count file...\n");
198: fscanf (f, "Total: %lu\n", &total);
199: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
200: instrcount[opcode] = count;
201: }
202: fclose(f);
203: }
204: }
205: #endif
206: write_log ("Building CPU table for configuration: 68");
207: if (address_space_24 && cpu_level > 1)
208: write_log ("EC");
209: switch (cpu_level) {
210: case 1:
211: write_log ("010");
212: break;
213: case 2:
214: write_log ("020");
215: break;
216: case 3:
217: write_log ("020/881");
218: break;
219: case 4:
220: /* Who is going to miss the MMU anyway...? :-) */
221: write_log ("040");
222: break;
223: default:
224: write_log ("000");
225: break;
226: }
227: if (cpu_compatible)
228: write_log (" (compatible mode)");
229: write_log ("\n");
230:
231: read_table68k ();
232: do_merges ();
233:
234: write_log ("%d CPU functions\n", nr_cpuop_funcs);
235:
236: build_cpufunctbl ();
237: }
238:
1.1.1.4 ! root 239:
1.1 root 240: struct regstruct regs, lastint_regs;
241: static struct regstruct regs_backup[16];
242: static int backup_pointer = 0;
243: static long int m68kpc_offset;
244: int lastint_no;
245:
246: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
247: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
248: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
249:
250: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
251: {
252: uae_u16 dp;
253: uae_s8 disp8;
254: uae_s16 disp16;
255: int r;
256: uae_u32 dispreg;
257: uaecptr addr;
258: uae_s32 offset = 0;
259: char buffer[80];
260:
261: switch (mode){
262: case Dreg:
263: sprintf (buffer,"D%d", reg);
264: break;
265: case Areg:
266: sprintf (buffer,"A%d", reg);
267: break;
268: case Aind:
269: sprintf (buffer,"(A%d)", reg);
270: break;
271: case Aipi:
272: sprintf (buffer,"(A%d)+", reg);
273: break;
274: case Apdi:
275: sprintf (buffer,"-(A%d)", reg);
276: break;
277: case Ad16:
278: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
279: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
280: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
281: (unsigned long)addr);
282: break;
283: case Ad8r:
284: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
285: disp8 = dp & 0xFF;
286: r = (dp & 0x7000) >> 12;
287: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
288: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
289: dispreg <<= (dp >> 9) & 3;
290:
291: if (dp & 0x100) {
292: uae_s32 outer = 0, disp = 0;
293: uae_s32 base = m68k_areg(regs,reg);
294: char name[10];
295: sprintf (name,"A%d, ",reg);
296: if (dp & 0x80) { base = 0; name[0] = 0; }
297: if (dp & 0x40) dispreg = 0;
298: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
299: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
300: base += disp;
301:
302: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
303: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
304:
305: if (!(dp & 4)) base += dispreg;
306: if (dp & 3) base = get_long (base);
307: if (dp & 4) base += dispreg;
308:
309: addr = base + outer;
310: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
311: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
312: 1 << ((dp >> 9) & 3),
313: disp,outer,
314: (unsigned long)addr);
315: } else {
316: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
317: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
318: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
319: 1 << ((dp >> 9) & 3), disp8,
320: (unsigned long)addr);
321: }
322: break;
323: case PC16:
324: addr = m68k_getpc () + m68kpc_offset;
325: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
326: addr += (uae_s16)disp16;
327: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
328: break;
329: case PC8r:
330: addr = m68k_getpc () + m68kpc_offset;
331: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
332: disp8 = dp & 0xFF;
333: r = (dp & 0x7000) >> 12;
334: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
335: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
336: dispreg <<= (dp >> 9) & 3;
337:
338: if (dp & 0x100) {
339: uae_s32 outer = 0,disp = 0;
340: uae_s32 base = addr;
341: char name[10];
342: sprintf (name,"PC, ");
343: if (dp & 0x80) { base = 0; name[0] = 0; }
344: if (dp & 0x40) dispreg = 0;
345: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
346: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
347: base += disp;
348:
349: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
350: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
351:
352: if (!(dp & 4)) base += dispreg;
353: if (dp & 3) base = get_long (base);
354: if (dp & 4) base += dispreg;
355:
356: addr = base + outer;
357: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
358: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
359: 1 << ((dp >> 9) & 3),
360: disp,outer,
361: (unsigned long)addr);
362: } else {
363: addr += (uae_s32)((uae_s8)disp8) + dispreg;
364: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
365: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
366: disp8, (unsigned long)addr);
367: }
368: break;
369: case absw:
370: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
371: m68kpc_offset += 2;
372: break;
373: case absl:
374: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
375: m68kpc_offset += 4;
376: break;
377: case imm:
378: switch (size){
379: case sz_byte:
380: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
381: m68kpc_offset += 2;
382: break;
383: case sz_word:
384: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
385: m68kpc_offset += 2;
386: break;
387: case sz_long:
388: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
389: m68kpc_offset += 4;
390: break;
391: default:
392: break;
393: }
394: break;
395: case imm0:
396: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
397: m68kpc_offset += 2;
398: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
399: break;
400: case imm1:
401: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
402: m68kpc_offset += 2;
403: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
404: break;
405: case imm2:
406: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
407: m68kpc_offset += 4;
408: sprintf (buffer,"#$%08lx", (unsigned long)offset);
409: break;
410: case immi:
411: offset = (uae_s32)(uae_s8)(reg & 0xff);
412: sprintf (buffer,"#$%08lx", (unsigned long)offset);
413: break;
414: default:
415: break;
416: }
417: if (buf == 0)
418: fprintf (f, "%s", buffer);
419: else
420: strcat (buf, buffer);
421: return offset;
422: }
423:
424: /* The plan is that this will take over the job of exception 3 handling -
425: * the CPU emulation functions will just do a longjmp to m68k_go whenever
426: * they hit an odd address. */
427: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
428: {
429: uae_u16 dp;
430: uae_s8 disp8;
431: uae_s16 disp16;
432: int r;
433: uae_u32 dispreg;
434: uaecptr addr;
435: uae_s32 offset = 0;
436:
437: switch (mode){
438: case Dreg:
439: *val = m68k_dreg (regs, reg);
440: return 1;
441: case Areg:
442: *val = m68k_areg (regs, reg);
443: return 1;
444:
445: case Aind:
446: case Aipi:
447: addr = m68k_areg (regs, reg);
448: break;
449: case Apdi:
450: addr = m68k_areg (regs, reg);
451: break;
452: case Ad16:
453: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
454: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
455: break;
456: case Ad8r:
457: addr = m68k_areg (regs, reg);
458: d8r_common:
459: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
460: disp8 = dp & 0xFF;
461: r = (dp & 0x7000) >> 12;
462: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
463: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
464: dispreg <<= (dp >> 9) & 3;
465:
466: if (dp & 0x100) {
467: uae_s32 outer = 0, disp = 0;
468: uae_s32 base = addr;
469: if (dp & 0x80) base = 0;
470: if (dp & 0x40) dispreg = 0;
471: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
472: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
473: base += disp;
474:
475: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
476: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
477:
478: if (!(dp & 4)) base += dispreg;
479: if (dp & 3) base = get_long (base);
480: if (dp & 4) base += dispreg;
481:
482: addr = base + outer;
483: } else {
484: addr += (uae_s32)((uae_s8)disp8) + dispreg;
485: }
486: break;
487: case PC16:
488: addr = m68k_getpc () + m68kpc_offset;
489: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
490: addr += (uae_s16)disp16;
491: break;
492: case PC8r:
493: addr = m68k_getpc () + m68kpc_offset;
494: goto d8r_common;
495: case absw:
496: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
497: m68kpc_offset += 2;
498: break;
499: case absl:
500: addr = get_ilong_1 (m68kpc_offset);
501: m68kpc_offset += 4;
502: break;
503: case imm:
504: switch (size){
505: case sz_byte:
506: *val = get_iword_1 (m68kpc_offset) & 0xff;
507: m68kpc_offset += 2;
508: break;
509: case sz_word:
510: *val = get_iword_1 (m68kpc_offset) & 0xffff;
511: m68kpc_offset += 2;
512: break;
513: case sz_long:
514: *val = get_ilong_1 (m68kpc_offset);
515: m68kpc_offset += 4;
516: break;
517: default:
518: break;
519: }
520: return 1;
521: case imm0:
522: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
523: m68kpc_offset += 2;
524: return 1;
525: case imm1:
526: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
527: m68kpc_offset += 2;
528: return 1;
529: case imm2:
530: *val = get_ilong_1 (m68kpc_offset);
531: m68kpc_offset += 4;
532: return 1;
533: case immi:
534: *val = (uae_s32)(uae_s8)(reg & 0xff);
535: return 1;
536: default:
537: addr = 0;
538: break;
539: }
540: if ((addr & 1) == 0)
541: return 1;
542:
543: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
544: last_fault_for_exception_3 = addr;
545: return 0;
546: }
547:
548: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
549: {
550: int reg = (dp >> 12) & 15;
551: uae_s32 regd = regs.regs[reg];
552: if ((dp & 0x800) == 0)
553: regd = (uae_s32)(uae_s16)regd;
554: regd <<= (dp >> 9) & 3;
555: if (dp & 0x100) {
556: uae_s32 outer = 0;
557: if (dp & 0x80) base = 0;
558: if (dp & 0x40) regd = 0;
559:
560: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
561: if ((dp & 0x30) == 0x30) base += next_ilong();
562:
563: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
564: if ((dp & 0x3) == 0x3) outer = next_ilong();
565:
566: if ((dp & 0x4) == 0) base += regd;
567: if (dp & 0x3) base = get_long (base);
568: if (dp & 0x4) base += regd;
569:
570: return base + outer;
571: } else {
572: return base + (uae_s32)((uae_s8)dp) + regd;
573: }
574: }
575:
576: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
577: {
578: int reg = (dp >> 12) & 15;
579: uae_s32 regd = regs.regs[reg];
580: #if 1
581: if ((dp & 0x800) == 0)
582: regd = (uae_s32)(uae_s16)regd;
583: return base + (uae_s8)dp + regd;
584: #else
585: /* Branch-free code... benchmark this again now that
586: * things are no longer inline. */
587: uae_s32 regd16;
588: uae_u32 mask;
589: mask = ((dp & 0x800) >> 11) - 1;
590: regd16 = (uae_s32)(uae_s16)regd;
591: regd16 &= mask;
592: mask = ~mask;
593: base += (uae_s8)dp;
594: regd &= mask;
595: regd |= regd16;
596: return base + regd;
597: #endif
598: }
599:
600: void MakeSR (void)
601: {
602: #if 0
603: assert((regs.t1 & 1) == regs.t1);
604: assert((regs.t0 & 1) == regs.t0);
605: assert((regs.s & 1) == regs.s);
606: assert((regs.m & 1) == regs.m);
607: assert((XFLG & 1) == XFLG);
608: assert((NFLG & 1) == NFLG);
609: assert((ZFLG & 1) == ZFLG);
610: assert((VFLG & 1) == VFLG);
611: assert((CFLG & 1) == CFLG);
612: #endif
613: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
614: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
615: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
616: | GET_CFLG);
617: }
618:
619: void MakeFromSR (void)
620: {
621: int oldm = regs.m;
622: int olds = regs.s;
623:
624: regs.t1 = (regs.sr >> 15) & 1;
625: regs.t0 = (regs.sr >> 14) & 1;
626: regs.s = (regs.sr >> 13) & 1;
627: regs.m = (regs.sr >> 12) & 1;
628: regs.intmask = (regs.sr >> 8) & 7;
629: SET_XFLG ((regs.sr >> 4) & 1);
630: SET_NFLG ((regs.sr >> 3) & 1);
631: SET_ZFLG ((regs.sr >> 2) & 1);
632: SET_VFLG ((regs.sr >> 1) & 1);
633: SET_CFLG (regs.sr & 1);
634: if (cpu_level >= 2) {
635: if (olds != regs.s) {
636: if (olds) {
637: if (oldm)
638: regs.msp = m68k_areg(regs, 7);
639: else
640: regs.isp = m68k_areg(regs, 7);
641: m68k_areg(regs, 7) = regs.usp;
642: } else {
643: regs.usp = m68k_areg(regs, 7);
644: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
645: }
646: } else if (olds && oldm != regs.m) {
647: if (oldm) {
648: regs.msp = m68k_areg(regs, 7);
649: m68k_areg(regs, 7) = regs.isp;
650: } else {
651: regs.isp = m68k_areg(regs, 7);
652: m68k_areg(regs, 7) = regs.msp;
653: }
654: }
655: } else {
656: if (olds != regs.s) {
657: if (olds) {
658: regs.isp = m68k_areg(regs, 7);
659: m68k_areg(regs, 7) = regs.usp;
660: } else {
661: regs.usp = m68k_areg(regs, 7);
662: m68k_areg(regs, 7) = regs.isp;
663: }
664: }
665: }
666:
667: set_special (SPCFLAG_INT);
668: if (regs.t1 || regs.t0)
669: set_special (SPCFLAG_TRACE);
670: else
671: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
672: }
673:
674: void Exception(int nr, uaecptr oldpc)
675: {
676: uae_u32 currpc = m68k_getpc ();
677:
1.1.1.2 root 678: /*if( nr>=2 && nr<10 ) fprintf(stderr,"Exception (-> %i bombs)!\n",nr);*/
1.1 root 679:
680: compiler_flush_jsr_stack();
681: MakeSR();
682:
683: if (!regs.s) {
684: regs.usp = m68k_areg(regs, 7);
685: if (cpu_level >= 2)
686: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
687: else
688: m68k_areg(regs, 7) = regs.isp;
689: regs.s = 1;
690: }
691: if (cpu_level > 0) {
692: if (nr == 2 || nr == 3) {
693: int i;
694: /* @@@ this is probably wrong (?) */
695: for (i = 0 ; i < 12 ; i++) {
696: m68k_areg(regs, 7) -= 2;
697: put_word (m68k_areg(regs, 7), 0);
698: }
699: m68k_areg(regs, 7) -= 2;
700: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
701: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
702: m68k_areg(regs, 7) -= 4;
703: put_long (m68k_areg(regs, 7), oldpc);
704: m68k_areg(regs, 7) -= 2;
705: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
706: } else if (regs.m && nr >= 24 && nr < 32) {
707: m68k_areg(regs, 7) -= 2;
708: put_word (m68k_areg(regs, 7), nr * 4);
709: m68k_areg(regs, 7) -= 4;
710: put_long (m68k_areg(regs, 7), currpc);
711: m68k_areg(regs, 7) -= 2;
712: put_word (m68k_areg(regs, 7), regs.sr);
713: regs.sr |= (1 << 13);
714: regs.msp = m68k_areg(regs, 7);
715: m68k_areg(regs, 7) = regs.isp;
716: m68k_areg(regs, 7) -= 2;
717: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
718: } else {
719: m68k_areg(regs, 7) -= 2;
720: put_word (m68k_areg(regs, 7), nr * 4);
721: }
722: }
1.1.1.3 root 723:
724: /* Push PC on stack: */
1.1 root 725: m68k_areg(regs, 7) -= 4;
726: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 727: /* Push SR on stack: */
1.1 root 728: m68k_areg(regs, 7) -= 2;
729: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 730:
731: /* 68000 bus/address errors: */
732: if (cpu_level==0 && (nr==2 || nr==3)) {
733: m68k_areg(regs, 7) -= 8;
734: if (nr == 3) { /* Address error */
735: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
736: put_long (m68k_areg(regs, 7)+2, last_fault_for_exception_3);
737: put_word (m68k_areg(regs, 7)+6, last_op_for_exception_3);
738: put_long (m68k_areg(regs, 7)+10, last_addr_for_exception_3);
739: if( bEnableDebug ) {
740: fprintf(stderr,"Address Error at address $%x, PC=$%x\n",last_fault_for_exception_3,currpc);
741: DebugUI();
742: }
743: }
744: else { /* Bus error */
745: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
746: put_long (m68k_areg(regs, 7)+2, BusAddressLocation);
747: put_word (m68k_areg(regs, 7)+6, get_word(currpc));
748: if( bEnableDebug && BusAddressLocation!=0xff8a00) {
749: fprintf(stderr,"Bus Error at address $%x, PC=$%x\n",BusAddressLocation,currpc);
750: DebugUI();
751: }
752: }
753: }
754:
1.1 root 755: m68k_setpc (get_long (regs.vbr + 4*nr));
756: fill_prefetch_0 ();
757: regs.t1 = regs.t0 = regs.m = 0;
758: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
759: }
760:
761: static void Interrupt(int nr)
762: {
763: assert(nr < 8 && nr >= 0);
764: lastint_regs = regs;
765: lastint_no = nr;
766: Exception(nr+24, 0);
767:
768: regs.intmask = nr;
769: set_special (SPCFLAG_INT);
770: }
771:
772: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr;
773:
774: int m68k_move2c (int regno, uae_u32 *regp)
775: {
776: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
777: || (cpu_level < 4 && (regno & 0x7FF) > 2)
778: || (cpu_level == 4 && regno == 0x802))
779: {
780: op_illg (0x4E7B);
781: return 0;
782: } else {
783: switch (regno) {
784: case 0: regs.sfc = *regp & 7; break;
785: case 1: regs.dfc = *regp & 7; break;
786: case 2: cacr = *regp & (cpu_level < 4 ? 0x3 : 0x80008000); break;
787: case 3: tc = *regp & 0xc000; break;
788: /* Mask out fields that should be zero. */
789: case 4: itt0 = *regp & 0xffffe364; break;
790: case 5: itt1 = *regp & 0xffffe364; break;
791: case 6: dtt0 = *regp & 0xffffe364; break;
792: case 7: dtt1 = *regp & 0xffffe364; break;
793:
794: case 0x800: regs.usp = *regp; break;
795: case 0x801: regs.vbr = *regp; break;
796: case 0x802: caar = *regp & 0xfc; break;
797: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
798: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
799: default:
800: op_illg (0x4E7B);
801: return 0;
802: }
803: }
804: return 1;
805: }
806:
807: int m68k_movec2 (int regno, uae_u32 *regp)
808: {
809: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
810: || (cpu_level < 4 && (regno & 0x7FF) > 2)
811: || (cpu_level == 4 && regno == 0x802))
812: {
813: op_illg (0x4E7A);
814: return 0;
815: } else {
816: switch (regno) {
817: case 0: *regp = regs.sfc; break;
818: case 1: *regp = regs.dfc; break;
819: case 2: *regp = cacr; break;
820: case 3: *regp = tc; break;
821: case 4: *regp = itt0; break;
822: case 5: *regp = itt1; break;
823: case 6: *regp = dtt0; break;
824: case 7: *regp = dtt1; break;
825: case 0x800: *regp = regs.usp; break;
826: case 0x801: *regp = regs.vbr; break;
827: case 0x802: *regp = caar; break;
828: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
829: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
830: case 0x805: *regp = mmusr; break;
831: default:
832: op_illg (0x4E7A);
833: return 0;
834: }
835: }
836: return 1;
837: }
838:
839: STATIC_INLINE int
840: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
841: {
842: uae_u32 q = 0, cbit = 0;
843: int i;
844:
845: if (div <= src_hi) {
846: return 1;
847: }
848: for (i = 0 ; i < 32 ; i++) {
849: cbit = src_hi & 0x80000000ul;
850: src_hi <<= 1;
851: if (src_lo & 0x80000000ul) src_hi++;
852: src_lo <<= 1;
853: q = q << 1;
854: if (cbit || div <= src_hi) {
855: q |= 1;
856: src_hi -= div;
857: }
858: }
859: *quot = q;
860: *rem = src_hi;
861: return 0;
862: }
863:
864: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
865: {
866: #if defined(uae_s64)
867: if (src == 0) {
868: Exception (5, oldpc);
869: return;
870: }
871: if (extra & 0x800) {
872: /* signed variant */
873: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
874: uae_s64 quot, rem;
875:
876: if (extra & 0x400) {
877: a &= 0xffffffffu;
878: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
879: }
880: rem = a % (uae_s64)(uae_s32)src;
881: quot = a / (uae_s64)(uae_s32)src;
882: if ((quot & UVAL64(0xffffffff80000000)) != 0
883: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
884: {
885: SET_VFLG (1);
886: SET_NFLG (1);
887: SET_CFLG (0);
888: } else {
889: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
890: SET_VFLG (0);
891: SET_CFLG (0);
892: SET_ZFLG (((uae_s32)quot) == 0);
893: SET_NFLG (((uae_s32)quot) < 0);
894: m68k_dreg(regs, extra & 7) = rem;
895: m68k_dreg(regs, (extra >> 12) & 7) = quot;
896: }
897: } else {
898: /* unsigned */
899: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
900: uae_u64 quot, rem;
901:
902: if (extra & 0x400) {
903: a &= 0xffffffffu;
904: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
905: }
906: rem = a % (uae_u64)src;
907: quot = a / (uae_u64)src;
908: if (quot > 0xffffffffu) {
909: SET_VFLG (1);
910: SET_NFLG (1);
911: SET_CFLG (0);
912: } else {
913: SET_VFLG (0);
914: SET_CFLG (0);
915: SET_ZFLG (((uae_s32)quot) == 0);
916: SET_NFLG (((uae_s32)quot) < 0);
917: m68k_dreg(regs, extra & 7) = rem;
918: m68k_dreg(regs, (extra >> 12) & 7) = quot;
919: }
920: }
921: #else
922: if (src == 0) {
923: Exception (5, oldpc);
924: return;
925: }
926: if (extra & 0x800) {
927: /* signed variant */
928: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
929: uae_s32 hi = lo < 0 ? -1 : 0;
930: uae_s32 save_high;
931: uae_u32 quot, rem;
932: uae_u32 sign;
933:
934: if (extra & 0x400) {
935: hi = (uae_s32)m68k_dreg(regs, extra & 7);
936: }
937: save_high = hi;
938: sign = (hi ^ src);
939: if (hi < 0) {
940: hi = ~hi;
941: lo = -lo;
942: if (lo == 0) hi++;
943: }
944: if ((uae_s32)src < 0) src = -src;
945: if (div_unsigned(hi, lo, src, ", &rem) ||
946: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
947: SET_VFLG (1);
948: SET_NFLG (1);
949: SET_CFLG (0);
950: } else {
951: if (sign & 0x80000000) quot = -quot;
952: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
953: SET_VFLG (0);
954: SET_CFLG (0);
955: SET_ZFLG (((uae_s32)quot) == 0);
956: SET_NFLG (((uae_s32)quot) < 0);
957: m68k_dreg(regs, extra & 7) = rem;
958: m68k_dreg(regs, (extra >> 12) & 7) = quot;
959: }
960: } else {
961: /* unsigned */
962: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
963: uae_u32 hi = 0;
964: uae_u32 quot, rem;
965:
966: if (extra & 0x400) {
967: hi = (uae_u32)m68k_dreg(regs, extra & 7);
968: }
969: if (div_unsigned(hi, lo, src, ", &rem)) {
970: SET_VFLG (1);
971: SET_NFLG (1);
972: SET_CFLG (0);
973: } else {
974: SET_VFLG (0);
975: SET_CFLG (0);
976: SET_ZFLG (((uae_s32)quot) == 0);
977: SET_NFLG (((uae_s32)quot) < 0);
978: m68k_dreg(regs, extra & 7) = rem;
979: m68k_dreg(regs, (extra >> 12) & 7) = quot;
980: }
981: }
982: #endif
983: }
984:
985: STATIC_INLINE void
986: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
987: {
988: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
989: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
990: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
991: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
992: uae_u32 lo;
993:
994: lo = r0 + ((r1 << 16) & 0xffff0000ul);
995: if (lo < r0) r3++;
996: r0 = lo;
997: lo = r0 + ((r2 << 16) & 0xffff0000ul);
998: if (lo < r0) r3++;
999: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1000: *dst_lo = lo;
1001: *dst_hi = r3;
1002: }
1003:
1004: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1005: {
1006: #if defined(uae_s64)
1007: if (extra & 0x800) {
1008: /* signed variant */
1009: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1010:
1011: a *= (uae_s64)(uae_s32)src;
1012: SET_VFLG (0);
1013: SET_CFLG (0);
1014: SET_ZFLG (a == 0);
1015: SET_NFLG (a < 0);
1016: if (extra & 0x400)
1017: m68k_dreg(regs, extra & 7) = a >> 32;
1018: else if ((a & UVAL64(0xffffffff80000000)) != 0
1019: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1020: {
1021: SET_VFLG (1);
1022: }
1023: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1024: } else {
1025: /* unsigned */
1026: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1027:
1028: a *= (uae_u64)src;
1029: SET_VFLG (0);
1030: SET_CFLG (0);
1031: SET_ZFLG (a == 0);
1032: SET_NFLG (((uae_s64)a) < 0);
1033: if (extra & 0x400)
1034: m68k_dreg(regs, extra & 7) = a >> 32;
1035: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1036: SET_VFLG (1);
1037: }
1038: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1039: }
1040: #else
1041: if (extra & 0x800) {
1042: /* signed variant */
1043: uae_s32 src1,src2;
1044: uae_u32 dst_lo,dst_hi;
1045: uae_u32 sign;
1046:
1047: src1 = (uae_s32)src;
1048: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1049: sign = (src1 ^ src2);
1050: if (src1 < 0) src1 = -src1;
1051: if (src2 < 0) src2 = -src2;
1052: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1053: if (sign & 0x80000000) {
1054: dst_hi = ~dst_hi;
1055: dst_lo = -dst_lo;
1056: if (dst_lo == 0) dst_hi++;
1057: }
1058: SET_VFLG (0);
1059: SET_CFLG (0);
1060: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1061: SET_NFLG (((uae_s32)dst_hi) < 0);
1062: if (extra & 0x400)
1063: m68k_dreg(regs, extra & 7) = dst_hi;
1064: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1065: && ((dst_hi & 0xffffffff) != 0xffffffff
1066: || (dst_lo & 0x80000000) != 0x80000000))
1067: {
1068: SET_VFLG (1);
1069: }
1070: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1071: } else {
1072: /* unsigned */
1073: uae_u32 dst_lo,dst_hi;
1074:
1075: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1076:
1077: SET_VFLG (0);
1078: SET_CFLG (0);
1079: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1080: SET_NFLG (((uae_s32)dst_hi) < 0);
1081: if (extra & 0x400)
1082: m68k_dreg(regs, extra & 7) = dst_hi;
1083: else if (dst_hi != 0) {
1084: SET_VFLG (1);
1085: }
1086: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1087: }
1088: #endif
1089: }
1090: static char* ccnames[] =
1091: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1092: "VC","VS","PL","MI","GE","LT","GT","LE" };
1093:
1094: void m68k_reset (void)
1095: {
1.1.1.4 ! root 1096: m68k_areg(regs, 7) = get_long(0);
! 1097: m68k_setpc(get_long(4));
1.1 root 1098: fill_prefetch_0 ();
1099: regs.s = 1;
1100: regs.m = 0;
1101: regs.stopped = 0;
1102: regs.t1 = 0;
1103: regs.t0 = 0;
1104: SET_ZFLG (0);
1105: SET_XFLG (0);
1106: SET_CFLG (0);
1107: SET_VFLG (0);
1108: SET_NFLG (0);
1109: regs.spcflags = 0;
1110: regs.intmask = 7;
1111: regs.vbr = regs.sfc = regs.dfc = 0;
1112: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1113: }
1114:
1115: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1116: {
1117: uaecptr pc = m68k_getpc ();
1118: /*
1119: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1120: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1121: m68k_incpc (2);
1122: fill_prefetch_0 ();
1123: return 4;
1124: }
1125: */
1126: compiler_flush_jsr_stack ();
1127: if (opcode == 0x4E7B && get_long (0x10) == 0 )
1128: {
1129: write_log ("This program requires a 68020 CPU!\n");
1130: broken_in = 1;
1131: set_special (SPCFLAG_BRK);
1.1.1.4 ! root 1132: bQuitProgram = 1;
1.1 root 1133: }
1134: /*
1135: if (opcode == 0xFF0D) {
1136: if ((pc & 0xF80000) == 0xF80000) {
1137: // This is from the dummy Kickstart replacement
1138: uae_u16 arg = get_iword (2);
1139: m68k_incpc (4);
1140: ersatz_perform (arg);
1141: fill_prefetch_0 ();
1142: return 4;
1143: } else if ((pc & 0xF80000) == 0xF00000) {
1144: // User-mode STOP replacement
1145: m68k_setstopped (1);
1146: return 4;
1147: }
1148: }
1149: */
1150: /*
1151: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1152: // Calltrap.
1153: m68k_incpc(2);
1154: call_calltrap (opcode & 0xFFF);
1155: fill_prefetch_0 ();
1156: return 4;
1157: }
1158: */
1159: if ((opcode & 0xF000) == 0xF000)
1160: {
1161: Exception(0xB,0);
1162: return 4;
1163: }
1164: if ((opcode & 0xF000) == 0xA000)
1165: {
1166: /*
1167: if ((pc & 0xF80000) == 0xF00000) {
1168: // Calltrap.
1169: call_calltrap (opcode & 0xFFF);
1170: }
1171: */
1172: Exception(0xA,0);
1173: return 4;
1174: }
1175:
1.1.1.3 root 1176: #if 0
1.1 root 1177: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1178: #endif
1179: Exception (4,0);
1180: return 4;
1181: }
1182:
1183: void mmu_op(uae_u32 opcode, uae_u16 extra)
1184: {
1185: if ((opcode & 0xFE0) == 0x0500) {
1186: /* PFLUSH */
1187: mmusr = 0;
1188: write_log ("PFLUSH\n");
1189: } else if ((opcode & 0x0FD8) == 0x548) {
1190: /* PTEST */
1191: write_log ("PTEST\n");
1192: } else
1193: op_illg (opcode);
1194: }
1195:
1196:
1197: static uaecptr last_trace_ad = 0;
1198:
1199: static void do_trace (void)
1200: {
1201: if (regs.t0 && cpu_level >= 2) {
1202: uae_u16 opcode;
1203: /* should also include TRAP, CHK, SR modification FPcc */
1204: /* probably never used so why bother */
1205: /* We can afford this to be inefficient... */
1206: m68k_setpc (m68k_getpc ());
1207: fill_prefetch_0 ();
1208: opcode = get_word (regs.pc);
1209: if (opcode == 0x4e72 /* RTE */
1210: || opcode == 0x4e74 /* RTD */
1211: || opcode == 0x4e75 /* RTS */
1212: || opcode == 0x4e77 /* RTR */
1213: || opcode == 0x4e76 /* TRAPV */
1214: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1215: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1216: || (opcode & 0xff00) == 0x6100 /* BSR */
1217: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1218: && cctrue((opcode >> 8) & 0xf))
1219: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1220: && !cctrue((opcode >> 8) & 0xf)
1221: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1222: {
1223: last_trace_ad = m68k_getpc ();
1224: unset_special (SPCFLAG_TRACE);
1225: set_special (SPCFLAG_DOTRACE);
1226: }
1227: } else if (regs.t1) {
1228: last_trace_ad = m68k_getpc ();
1229: unset_special (SPCFLAG_TRACE);
1230: set_special (SPCFLAG_DOTRACE);
1231: }
1232: }
1233:
1234:
1235: static int do_specialties (void)
1236: {
1237: run_compiled_code();
1238: if (regs.spcflags & SPCFLAG_DOTRACE) {
1239: Exception (9,last_trace_ad);
1240: }
1241: while (regs.spcflags & SPCFLAG_STOP) {
1242: do_cycles (4);
1243: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)){
1.1.1.3 root 1244: /*int intr = intlev ();*/
1.1 root 1245: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.3 root 1246: /*if (intr != -1 && intr > regs.intmask) {
1.1 root 1247: Interrupt (intr);
1248: regs.stopped = 0;
1249: unset_special (SPCFLAG_STOP);
1.1.1.3 root 1250: }*/
1.1 root 1251: }
1252: }
1253: if (regs.spcflags & SPCFLAG_TRACE)
1254: do_trace ();
1255:
1256: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.3 root 1257: /*int intr = intlev ();*/
1.1 root 1258: unset_special (SPCFLAG_DOINT);
1.1.1.3 root 1259: /*if (intr != -1 && intr > regs.intmask) {
1.1 root 1260: Interrupt (intr);
1261: regs.stopped = 0;
1.1.1.3 root 1262: }*/
1.1 root 1263: }
1264: if (regs.spcflags & SPCFLAG_INT) {
1265: unset_special (SPCFLAG_INT);
1266: set_special (SPCFLAG_DOINT);
1267: }
1268: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1269: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1270: return 1;
1271: }
1272: return 0;
1273: }
1274:
1.1.1.3 root 1275:
1.1 root 1276: /* It's really sad to have two almost identical functions for this, but we
1277: do it all for performance... :( */
1278: static void m68k_run_1 (void)
1279: {
1280: #ifdef DEBUG_PREFETCH
1281: uae_u8 saved_bytes[20];
1282: uae_u16 *oldpcp;
1283: #endif
1.1.1.4 ! root 1284: while(!bQuitProgram) {
1.1 root 1285: int cycles;
1286: uae_u32 opcode = get_iword_prefetch (0);
1287: #ifdef DEBUG_PREFETCH
1288: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1289: fprintf (stderr, "Prefetch differs from memory.\n");
1290: debugging = 1;
1291: return;
1292: }
1293: oldpcp = regs.pc_p;
1294: memcpy (saved_bytes, regs.pc_p, 20);
1295: #endif
1296:
1297: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 root 1298: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1299:
1300: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1301: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1302: #if COUNT_INSTRS == 2
1303: if (table68k[opcode].handler != -1)
1304: instrcount[table68k[opcode].handler]++;
1305: #elif COUNT_INSTRS == 1
1306: instrcount[opcode]++;
1307: #endif
1.1.1.2 root 1308:
1.1 root 1309: cycles = (*cpufunctbl[cft_map(opcode)])(opcode);
1.1.1.2 root 1310:
1.1 root 1311: #ifdef DEBUG_PREFETCH
1312: if (memcmp (saved_bytes, oldpcp, 20) != 0) {
1313: fprintf (stderr, "Self-modifying code detected.\n");
1314: set_special (SPCFLAG_BRK);
1315: debugging = 1;
1316: }
1317: #endif
1.1.1.2 root 1318:
1.1 root 1319: do_cycles (cycles);
1320: if (regs.spcflags) {
1321: if (do_specialties ())
1322: return;
1323: }
1324: }
1325: }
1326:
1327:
1328: /* Same thing, but don't use prefetch to get opcode. */
1329: static void m68k_run_2 (void)
1330: {
1.1.1.4 ! root 1331: while(!bQuitProgram) {
1.1 root 1332: int cycles;
1333: #ifdef HAVE_GET_WORD_UNSWAPPED
1334: uae_u32 opcode = do_get_mem_word_unswapped (regs.pc_p);
1335: #else
1336: uae_u32 opcode = get_iword (0);
1337: #endif
1338:
1339: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 root 1340: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1341:
1342: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1343: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1344: #if COUNT_INSTRS == 2
1345: if (table68k[opcode].handler != -1)
1346: instrcount[table68k[opcode].handler]++;
1347: #elif COUNT_INSTRS == 1
1348: instrcount[opcode]++;
1349: #endif
1.1.1.2 root 1350:
1.1 root 1351: cycles = (*cpufunctbl[cft_map(opcode)])(opcode);
1352:
1353: do_cycles (cycles);
1354: if (regs.spcflags) {
1355: if (do_specialties ())
1356: return;
1357: }
1358: }
1359: }
1360:
1361:
1362: int in_m68k_go = 0;
1363:
1364: void m68k_go (int may_quit)
1365: {
1366: if (in_m68k_go || !may_quit) {
1367: write_log ("Bug! m68k_go is not reentrant.\n");
1368: abort ();
1369: }
1370:
1371: in_m68k_go++;
1.1.1.4 ! root 1372: while(!bQuitProgram) {
1.1.1.2 root 1373: if(cpu_compatible)
1374: m68k_run_1();
1375: else
1376: m68k_run_2();
1.1 root 1377: }
1378: in_m68k_go--;
1379: }
1380:
1381: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1382: {
1383: uae_u32 opcode, val;
1384: struct instr *dp;
1385:
1386: opcode = get_iword_1(0);
1387: last_op_for_exception_3 = opcode;
1388: m68kpc_offset = 2;
1389:
1390: if (cpufunctbl[cft_map(opcode)] == op_illg_1) {
1391: opcode = 0x4AFC;
1392: }
1393: dp = table68k + opcode;
1394:
1395: if (dp->suse) {
1396: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1397: Exception (3, 0);
1398: return;
1399: }
1400: }
1401: if (dp->duse) {
1402: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1403: Exception (3, 0);
1404: return;
1405: }
1406: }
1407: }
1408:
1409: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1410: {
1411: uaecptr newpc = 0;
1412: m68kpc_offset = addr - m68k_getpc ();
1413: while (cnt-- > 0) {
1414: char instrname[20],*ccpt;
1415: int opwords;
1416: uae_u32 opcode;
1417: struct mnemolookup *lookup;
1418: struct instr *dp;
1419: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1420: for (opwords = 0; opwords < 5; opwords++){
1421: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1422: }
1423: opcode = get_iword_1 (m68kpc_offset);
1424: m68kpc_offset += 2;
1425: if (cpufunctbl[cft_map(opcode)] == op_illg_1) {
1426: opcode = 0x4AFC;
1427: }
1428: dp = table68k + opcode;
1429: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1430: ;
1431:
1432: strcpy (instrname, lookup->name);
1433: ccpt = strstr (instrname, "cc");
1434: if (ccpt != 0) {
1435: strncpy (ccpt, ccnames[dp->cc], 2);
1436: }
1437: fprintf (f, "%s", instrname);
1438: switch (dp->size){
1439: case sz_byte: fprintf (f, ".B "); break;
1440: case sz_word: fprintf (f, ".W "); break;
1441: case sz_long: fprintf (f, ".L "); break;
1442: default: fprintf (f, " "); break;
1443: }
1444:
1445: if (dp->suse) {
1446: newpc = m68k_getpc () + m68kpc_offset;
1447: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1448: }
1449: if (dp->suse && dp->duse)
1450: fprintf (f, ",");
1451: if (dp->duse) {
1452: newpc = m68k_getpc () + m68kpc_offset;
1453: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1454: }
1455: if (ccpt != 0) {
1456: if (cctrue(dp->cc))
1457: fprintf (f, " == %08lx (TRUE)", newpc);
1458: else
1459: fprintf (f, " == %08lx (FALSE)", newpc);
1460: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1461: fprintf (f, " == %08lx", newpc);
1462: fprintf (f, "\n");
1463: }
1464: if (nextpc)
1465: *nextpc = m68k_getpc () + m68kpc_offset;
1466: }
1467:
1468: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1469: {
1470: int i;
1471: for (i = 0; i < 8; i++){
1472: fprintf (f, "D%d: %08lx ", i, m68k_dreg(regs, i));
1473: if ((i & 3) == 3) fprintf (f, "\n");
1474: }
1475: for (i = 0; i < 8; i++){
1476: fprintf (f, "A%d: %08lx ", i, m68k_areg(regs, i));
1477: if ((i & 3) == 3) fprintf (f, "\n");
1478: }
1479: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1480: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1481: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1482: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1483: regs.usp,regs.isp,regs.msp,regs.vbr);
1484: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1485: regs.t1, regs.t0, regs.s, regs.m,
1486: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1487: for (i = 0; i < 8; i++){
1488: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1489: if ((i & 3) == 3) fprintf (f, "\n");
1490: }
1491: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1492: (regs.fpsr & 0x8000000) != 0,
1493: (regs.fpsr & 0x4000000) != 0,
1494: (regs.fpsr & 0x2000000) != 0,
1495: (regs.fpsr & 0x1000000) != 0);
1496: if (cpu_compatible)
1497: fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1498:
1499: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1500: if (nextpc)
1501: fprintf (f, "next PC: %08lx\n", *nextpc);
1502: }
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