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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
9: *
1.1 root 10: */
11:
12: #include "sysdeps.h"
13: #include "hatari-glue.h"
14: #include "maccess.h"
15: #include "memory.h"
16: #include "newcpu.h"
17: #include "compiler.h"
18: #include "events.h"
1.1.1.5 ! root 19: #include "../includes/main.h"
1.1 root 20: #include "../includes/tos.h"
1.1.1.5 ! root 21: #include "../includes/vdi.h"
! 22: #include "../includes/cart.h"
! 23: #include "../includes/debugui.h"
1.1 root 24:
25:
1.1.1.4 root 26:
1.1 root 27: struct flag_struct regflags;
28:
1.1.1.2 root 29: int lastInstructionCycles; /* how many cycles last instruction took to execute */
30:
1.1 root 31: /* Opcode of faulting instruction */
32: uae_u16 last_op_for_exception_3;
33: /* PC at fault time */
34: uaecptr last_addr_for_exception_3;
35: /* Address that generated the exception */
36: uaecptr last_fault_for_exception_3;
37:
38: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
39: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
40:
41: int movem_index1[256];
42: int movem_index2[256];
43: int movem_next[256];
44:
45: int fpp_movem_index1[256];
46: int fpp_movem_index2[256];
47: int fpp_movem_next[256];
48:
49: cpuop_func *cpufunctbl[65536];
50:
51: #define COUNT_INSTRS 0
52:
53: #if COUNT_INSTRS
54: static unsigned long int instrcount[65536];
55: static uae_u16 opcodenums[65536];
56:
57: static int compfn (const void *el1, const void *el2)
58: {
59: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
60: }
61:
62: static char *icountfilename (void)
63: {
64: char *name = getenv ("INSNCOUNT");
65: if (name)
66: return name;
67: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
68: }
69:
70: void dump_counts (void)
71: {
72: FILE *f = fopen (icountfilename (), "w");
73: unsigned long int total;
74: int i;
75:
76: write_log ("Writing instruction count file...\n");
77: for (i = 0; i < 65536; i++) {
78: opcodenums[i] = i;
79: total += instrcount[i];
80: }
81: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
82:
83: fprintf (f, "Total: %lu\n", total);
84: for (i=0; i < 65536; i++) {
85: unsigned long int cnt = instrcount[opcodenums[i]];
86: struct instr *dp;
87: struct mnemolookup *lookup;
88: if (!cnt)
89: break;
90: dp = table68k + opcodenums[i];
91: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
92: ;
93: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
94: }
95: fclose (f);
96: }
97: #else
98: void dump_counts (void)
99: {
100: }
101: #endif
102:
103: int broken_in;
104:
105: static __inline__ unsigned int cft_map (unsigned int f)
106: {
107: #ifndef HAVE_GET_WORD_UNSWAPPED
108: return f;
109: #else
110: return ((f >> 8) & 255) | ((f & 255) << 8);
111: #endif
112: }
113:
114: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
115:
116: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
117: {
118: op_illg (cft_map (opcode));
119: return 4;
120: }
121:
1.1.1.4 root 122:
123: void build_cpufunctbl(void)
1.1 root 124: {
125: int i;
126: unsigned long opcode;
127: struct cputbl *tbl = (cpu_level == 4 ? op_smalltbl_0_ff
128: : cpu_level == 3 ? op_smalltbl_1_ff
129: : cpu_level == 2 ? op_smalltbl_2_ff
130: : cpu_level == 1 ? op_smalltbl_3_ff
131: : ! cpu_compatible ? op_smalltbl_4_ff
132: : op_smalltbl_5_ff);
133:
134: write_log ("Building CPU function table (%d %d %d).\n",
135: cpu_level, cpu_compatible, address_space_24);
136:
137: for (opcode = 0; opcode < 65536; opcode++)
138: cpufunctbl[cft_map(opcode)] = op_illg_1;
139: for (i = 0; tbl[i].handler != NULL; i++) {
140: if (! tbl[i].specific)
141: cpufunctbl[cft_map (tbl[i].opcode)] = tbl[i].handler;
142: }
143: for (opcode = 0; opcode < 65536; opcode++) {
144: cpuop_func *f;
145:
146: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > cpu_level)
147: continue;
148:
149: if (table68k[opcode].handler != -1) {
150: f = cpufunctbl[cft_map (table68k[opcode].handler)];
151: if (f == op_illg_1)
152: abort();
153: cpufunctbl[cft_map(opcode)] = f;
154: }
155: }
156: for (i = 0; tbl[i].handler != NULL; i++) {
157: if (tbl[i].specific)
158: cpufunctbl[cft_map(tbl[i].opcode)] = tbl[i].handler;
159: }
160:
161: /* Hataris illegal opcodes: */
1.1.1.3 root 162: cpufunctbl[cft_map(GEMDOS_OPCODE)] = OpCode_GemDos;
163: cpufunctbl[cft_map(RUNOLDGEMDOS_OPCODE)] = OpCode_OldGemDos;
1.1 root 164: cpufunctbl[cft_map(CONDRV_OPCODE)] = OpCode_ConnectedDrive;
165: cpufunctbl[cft_map(TIMERD_OPCODE)] = OpCode_TimerD;
1.1.1.5 ! root 166: cpufunctbl[cft_map(VDI_OPCODE)] = OpCode_VDI;
1.1 root 167: }
168:
169:
170:
171: void init_m68k (void)
172: {
173: int i;
174:
175: for (i = 0 ; i < 256 ; i++) {
176: int j;
177: for (j = 0 ; j < 8 ; j++) {
178: if (i & (1 << j)) break;
179: }
180: movem_index1[i] = j;
181: movem_index2[i] = 7-j;
182: movem_next[i] = i & (~(1 << j));
183: }
184: for (i = 0 ; i < 256 ; i++) {
185: int j;
186: for (j = 7 ; j >= 0 ; j--) {
187: if (i & (1 << j)) break;
188: }
189: fpp_movem_index1[i] = 7-j;
190: fpp_movem_index2[i] = j;
191: fpp_movem_next[i] = i & (~(1 << j));
192: }
193: #if COUNT_INSTRS
194: {
195: FILE *f = fopen (icountfilename (), "r");
196: memset (instrcount, 0, sizeof instrcount);
197: if (f) {
198: uae_u32 opcode, count, total;
199: char name[20];
200: write_log ("Reading instruction count file...\n");
201: fscanf (f, "Total: %lu\n", &total);
202: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
203: instrcount[opcode] = count;
204: }
205: fclose(f);
206: }
207: }
208: #endif
209: write_log ("Building CPU table for configuration: 68");
210: if (address_space_24 && cpu_level > 1)
211: write_log ("EC");
212: switch (cpu_level) {
213: case 1:
214: write_log ("010");
215: break;
216: case 2:
217: write_log ("020");
218: break;
219: case 3:
220: write_log ("020/881");
221: break;
222: case 4:
223: /* Who is going to miss the MMU anyway...? :-) */
224: write_log ("040");
225: break;
226: default:
227: write_log ("000");
228: break;
229: }
230: if (cpu_compatible)
231: write_log (" (compatible mode)");
232: write_log ("\n");
233:
234: read_table68k ();
235: do_merges ();
236:
237: write_log ("%d CPU functions\n", nr_cpuop_funcs);
238:
239: build_cpufunctbl ();
240: }
241:
1.1.1.4 root 242:
1.1 root 243: struct regstruct regs, lastint_regs;
244: static struct regstruct regs_backup[16];
245: static int backup_pointer = 0;
246: static long int m68kpc_offset;
247: int lastint_no;
248:
249: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
250: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
251: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
252:
253: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
254: {
255: uae_u16 dp;
256: uae_s8 disp8;
257: uae_s16 disp16;
258: int r;
259: uae_u32 dispreg;
260: uaecptr addr;
261: uae_s32 offset = 0;
262: char buffer[80];
263:
264: switch (mode){
265: case Dreg:
266: sprintf (buffer,"D%d", reg);
267: break;
268: case Areg:
269: sprintf (buffer,"A%d", reg);
270: break;
271: case Aind:
272: sprintf (buffer,"(A%d)", reg);
273: break;
274: case Aipi:
275: sprintf (buffer,"(A%d)+", reg);
276: break;
277: case Apdi:
278: sprintf (buffer,"-(A%d)", reg);
279: break;
280: case Ad16:
281: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
282: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
283: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
284: (unsigned long)addr);
285: break;
286: case Ad8r:
287: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
288: disp8 = dp & 0xFF;
289: r = (dp & 0x7000) >> 12;
290: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
291: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
292: dispreg <<= (dp >> 9) & 3;
293:
294: if (dp & 0x100) {
295: uae_s32 outer = 0, disp = 0;
296: uae_s32 base = m68k_areg(regs,reg);
297: char name[10];
298: sprintf (name,"A%d, ",reg);
299: if (dp & 0x80) { base = 0; name[0] = 0; }
300: if (dp & 0x40) dispreg = 0;
301: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
302: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
303: base += disp;
304:
305: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
306: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
307:
308: if (!(dp & 4)) base += dispreg;
309: if (dp & 3) base = get_long (base);
310: if (dp & 4) base += dispreg;
311:
312: addr = base + outer;
313: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
314: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
315: 1 << ((dp >> 9) & 3),
1.1.1.5 ! root 316: (long)disp, (long)outer, (unsigned long)addr);
1.1 root 317: } else {
318: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
319: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
320: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
321: 1 << ((dp >> 9) & 3), disp8,
322: (unsigned long)addr);
323: }
324: break;
325: case PC16:
326: addr = m68k_getpc () + m68kpc_offset;
327: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
328: addr += (uae_s16)disp16;
329: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
330: break;
331: case PC8r:
332: addr = m68k_getpc () + m68kpc_offset;
333: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
334: disp8 = dp & 0xFF;
335: r = (dp & 0x7000) >> 12;
336: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
337: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
338: dispreg <<= (dp >> 9) & 3;
339:
340: if (dp & 0x100) {
341: uae_s32 outer = 0,disp = 0;
342: uae_s32 base = addr;
343: char name[10];
344: sprintf (name,"PC, ");
345: if (dp & 0x80) { base = 0; name[0] = 0; }
346: if (dp & 0x40) dispreg = 0;
347: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
348: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
349: base += disp;
350:
351: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
352: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
353:
354: if (!(dp & 4)) base += dispreg;
355: if (dp & 3) base = get_long (base);
356: if (dp & 4) base += dispreg;
357:
358: addr = base + outer;
359: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
360: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
361: 1 << ((dp >> 9) & 3),
1.1.1.5 ! root 362: (long)disp, (long)outer, (unsigned long)addr);
1.1 root 363: } else {
364: addr += (uae_s32)((uae_s8)disp8) + dispreg;
365: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
366: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
367: disp8, (unsigned long)addr);
368: }
369: break;
370: case absw:
371: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
372: m68kpc_offset += 2;
373: break;
374: case absl:
375: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
376: m68kpc_offset += 4;
377: break;
378: case imm:
379: switch (size){
380: case sz_byte:
381: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
382: m68kpc_offset += 2;
383: break;
384: case sz_word:
385: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
386: m68kpc_offset += 2;
387: break;
388: case sz_long:
389: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
390: m68kpc_offset += 4;
391: break;
392: default:
393: break;
394: }
395: break;
396: case imm0:
397: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
398: m68kpc_offset += 2;
399: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
400: break;
401: case imm1:
402: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
403: m68kpc_offset += 2;
404: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
405: break;
406: case imm2:
407: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
408: m68kpc_offset += 4;
409: sprintf (buffer,"#$%08lx", (unsigned long)offset);
410: break;
411: case immi:
412: offset = (uae_s32)(uae_s8)(reg & 0xff);
413: sprintf (buffer,"#$%08lx", (unsigned long)offset);
414: break;
415: default:
416: break;
417: }
418: if (buf == 0)
419: fprintf (f, "%s", buffer);
420: else
421: strcat (buf, buffer);
422: return offset;
423: }
424:
425: /* The plan is that this will take over the job of exception 3 handling -
426: * the CPU emulation functions will just do a longjmp to m68k_go whenever
427: * they hit an odd address. */
428: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
429: {
430: uae_u16 dp;
431: uae_s8 disp8;
432: uae_s16 disp16;
433: int r;
434: uae_u32 dispreg;
435: uaecptr addr;
1.1.1.5 ! root 436: /*uae_s32 offset = 0;*/
1.1 root 437:
438: switch (mode){
439: case Dreg:
440: *val = m68k_dreg (regs, reg);
441: return 1;
442: case Areg:
443: *val = m68k_areg (regs, reg);
444: return 1;
445:
446: case Aind:
447: case Aipi:
448: addr = m68k_areg (regs, reg);
449: break;
450: case Apdi:
451: addr = m68k_areg (regs, reg);
452: break;
453: case Ad16:
454: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
455: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
456: break;
457: case Ad8r:
458: addr = m68k_areg (regs, reg);
459: d8r_common:
460: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
461: disp8 = dp & 0xFF;
462: r = (dp & 0x7000) >> 12;
463: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
464: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
465: dispreg <<= (dp >> 9) & 3;
466:
467: if (dp & 0x100) {
468: uae_s32 outer = 0, disp = 0;
469: uae_s32 base = addr;
470: if (dp & 0x80) base = 0;
471: if (dp & 0x40) dispreg = 0;
472: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
473: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
474: base += disp;
475:
476: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
477: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
478:
479: if (!(dp & 4)) base += dispreg;
480: if (dp & 3) base = get_long (base);
481: if (dp & 4) base += dispreg;
482:
483: addr = base + outer;
484: } else {
485: addr += (uae_s32)((uae_s8)disp8) + dispreg;
486: }
487: break;
488: case PC16:
489: addr = m68k_getpc () + m68kpc_offset;
490: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
491: addr += (uae_s16)disp16;
492: break;
493: case PC8r:
494: addr = m68k_getpc () + m68kpc_offset;
495: goto d8r_common;
496: case absw:
497: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
498: m68kpc_offset += 2;
499: break;
500: case absl:
501: addr = get_ilong_1 (m68kpc_offset);
502: m68kpc_offset += 4;
503: break;
504: case imm:
505: switch (size){
506: case sz_byte:
507: *val = get_iword_1 (m68kpc_offset) & 0xff;
508: m68kpc_offset += 2;
509: break;
510: case sz_word:
511: *val = get_iword_1 (m68kpc_offset) & 0xffff;
512: m68kpc_offset += 2;
513: break;
514: case sz_long:
515: *val = get_ilong_1 (m68kpc_offset);
516: m68kpc_offset += 4;
517: break;
518: default:
519: break;
520: }
521: return 1;
522: case imm0:
523: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
524: m68kpc_offset += 2;
525: return 1;
526: case imm1:
527: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
528: m68kpc_offset += 2;
529: return 1;
530: case imm2:
531: *val = get_ilong_1 (m68kpc_offset);
532: m68kpc_offset += 4;
533: return 1;
534: case immi:
535: *val = (uae_s32)(uae_s8)(reg & 0xff);
536: return 1;
537: default:
538: addr = 0;
539: break;
540: }
541: if ((addr & 1) == 0)
542: return 1;
543:
544: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
545: last_fault_for_exception_3 = addr;
546: return 0;
547: }
548:
549: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
550: {
551: int reg = (dp >> 12) & 15;
552: uae_s32 regd = regs.regs[reg];
553: if ((dp & 0x800) == 0)
554: regd = (uae_s32)(uae_s16)regd;
555: regd <<= (dp >> 9) & 3;
556: if (dp & 0x100) {
557: uae_s32 outer = 0;
558: if (dp & 0x80) base = 0;
559: if (dp & 0x40) regd = 0;
560:
561: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
562: if ((dp & 0x30) == 0x30) base += next_ilong();
563:
564: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
565: if ((dp & 0x3) == 0x3) outer = next_ilong();
566:
567: if ((dp & 0x4) == 0) base += regd;
568: if (dp & 0x3) base = get_long (base);
569: if (dp & 0x4) base += regd;
570:
571: return base + outer;
572: } else {
573: return base + (uae_s32)((uae_s8)dp) + regd;
574: }
575: }
576:
577: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
578: {
579: int reg = (dp >> 12) & 15;
580: uae_s32 regd = regs.regs[reg];
581: #if 1
582: if ((dp & 0x800) == 0)
583: regd = (uae_s32)(uae_s16)regd;
584: return base + (uae_s8)dp + regd;
585: #else
586: /* Branch-free code... benchmark this again now that
587: * things are no longer inline. */
588: uae_s32 regd16;
589: uae_u32 mask;
590: mask = ((dp & 0x800) >> 11) - 1;
591: regd16 = (uae_s32)(uae_s16)regd;
592: regd16 &= mask;
593: mask = ~mask;
594: base += (uae_s8)dp;
595: regd &= mask;
596: regd |= regd16;
597: return base + regd;
598: #endif
599: }
600:
601: void MakeSR (void)
602: {
603: #if 0
604: assert((regs.t1 & 1) == regs.t1);
605: assert((regs.t0 & 1) == regs.t0);
606: assert((regs.s & 1) == regs.s);
607: assert((regs.m & 1) == regs.m);
608: assert((XFLG & 1) == XFLG);
609: assert((NFLG & 1) == NFLG);
610: assert((ZFLG & 1) == ZFLG);
611: assert((VFLG & 1) == VFLG);
612: assert((CFLG & 1) == CFLG);
613: #endif
614: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
615: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
616: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
617: | GET_CFLG);
618: }
619:
620: void MakeFromSR (void)
621: {
622: int oldm = regs.m;
623: int olds = regs.s;
624:
625: regs.t1 = (regs.sr >> 15) & 1;
626: regs.t0 = (regs.sr >> 14) & 1;
627: regs.s = (regs.sr >> 13) & 1;
628: regs.m = (regs.sr >> 12) & 1;
629: regs.intmask = (regs.sr >> 8) & 7;
630: SET_XFLG ((regs.sr >> 4) & 1);
631: SET_NFLG ((regs.sr >> 3) & 1);
632: SET_ZFLG ((regs.sr >> 2) & 1);
633: SET_VFLG ((regs.sr >> 1) & 1);
634: SET_CFLG (regs.sr & 1);
635: if (cpu_level >= 2) {
636: if (olds != regs.s) {
637: if (olds) {
638: if (oldm)
639: regs.msp = m68k_areg(regs, 7);
640: else
641: regs.isp = m68k_areg(regs, 7);
642: m68k_areg(regs, 7) = regs.usp;
643: } else {
644: regs.usp = m68k_areg(regs, 7);
645: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
646: }
647: } else if (olds && oldm != regs.m) {
648: if (oldm) {
649: regs.msp = m68k_areg(regs, 7);
650: m68k_areg(regs, 7) = regs.isp;
651: } else {
652: regs.isp = m68k_areg(regs, 7);
653: m68k_areg(regs, 7) = regs.msp;
654: }
655: }
656: } else {
657: if (olds != regs.s) {
658: if (olds) {
659: regs.isp = m68k_areg(regs, 7);
660: m68k_areg(regs, 7) = regs.usp;
661: } else {
662: regs.usp = m68k_areg(regs, 7);
663: m68k_areg(regs, 7) = regs.isp;
664: }
665: }
666: }
667:
668: set_special (SPCFLAG_INT);
669: if (regs.t1 || regs.t0)
670: set_special (SPCFLAG_TRACE);
671: else
672: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
673: }
674:
1.1.1.5 ! root 675:
1.1 root 676: void Exception(int nr, uaecptr oldpc)
677: {
678: uae_u32 currpc = m68k_getpc ();
679:
1.1.1.2 root 680: /*if( nr>=2 && nr<10 ) fprintf(stderr,"Exception (-> %i bombs)!\n",nr);*/
1.1 root 681:
1.1.1.5 ! root 682: /* Intercept exceptions... - FIXME: Find a better way to do this! */
! 683: if(bUseVDIRes)
! 684: {
! 685: if(nr == 0x22) /* Trap 2 - intercept VDI call */
! 686: {
! 687: if( !VDI() )
! 688: {
! 689: /* Set 'PC' as address of 'VDI_OPCODE' illegal instruction
! 690: * This will call OpCode_VDI after completion of Trap call!
! 691: * Use to modify return structure from VDI */
! 692: /*if (bUseVDIRes)*/
! 693: {
! 694: VDI_OldPC = currpc;
! 695: currpc = CART_VDI_OPCODE_ADDR;
! 696: }
! 697: }
! 698: }
! 699: else if(nr == 0x0a) /* Line A */
! 700: {
! 701: if((get_word(currpc)&0x0fff) == 0x0ff) /* 0xA0FF opcode? */
! 702: {
! 703: /* we use this to get pointer to Line-A structure details
! 704: * (to fix for extended VDI res) */
! 705: LineABase = regs.regs[0]; /* D0 */
! 706: FontBase = regs.regs[9]; /* A1 */
! 707: VDI_LineA();
! 708: m68k_setpc(currpc + 2);
! 709: fill_prefetch_0();
! 710: return;
! 711: }
! 712: }
! 713: }
! 714:
1.1 root 715: compiler_flush_jsr_stack();
716: MakeSR();
717:
718: if (!regs.s) {
719: regs.usp = m68k_areg(regs, 7);
720: if (cpu_level >= 2)
721: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
722: else
723: m68k_areg(regs, 7) = regs.isp;
724: regs.s = 1;
725: }
726: if (cpu_level > 0) {
727: if (nr == 2 || nr == 3) {
728: int i;
729: /* @@@ this is probably wrong (?) */
730: for (i = 0 ; i < 12 ; i++) {
731: m68k_areg(regs, 7) -= 2;
732: put_word (m68k_areg(regs, 7), 0);
733: }
734: m68k_areg(regs, 7) -= 2;
735: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
736: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
737: m68k_areg(regs, 7) -= 4;
738: put_long (m68k_areg(regs, 7), oldpc);
739: m68k_areg(regs, 7) -= 2;
740: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
741: } else if (regs.m && nr >= 24 && nr < 32) {
742: m68k_areg(regs, 7) -= 2;
743: put_word (m68k_areg(regs, 7), nr * 4);
744: m68k_areg(regs, 7) -= 4;
745: put_long (m68k_areg(regs, 7), currpc);
746: m68k_areg(regs, 7) -= 2;
747: put_word (m68k_areg(regs, 7), regs.sr);
748: regs.sr |= (1 << 13);
749: regs.msp = m68k_areg(regs, 7);
750: m68k_areg(regs, 7) = regs.isp;
751: m68k_areg(regs, 7) -= 2;
752: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
753: } else {
754: m68k_areg(regs, 7) -= 2;
755: put_word (m68k_areg(regs, 7), nr * 4);
756: }
757: }
1.1.1.3 root 758:
759: /* Push PC on stack: */
1.1 root 760: m68k_areg(regs, 7) -= 4;
761: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 762: /* Push SR on stack: */
1.1 root 763: m68k_areg(regs, 7) -= 2;
764: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 765:
766: /* 68000 bus/address errors: */
767: if (cpu_level==0 && (nr==2 || nr==3)) {
768: m68k_areg(regs, 7) -= 8;
769: if (nr == 3) { /* Address error */
770: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
771: put_long (m68k_areg(regs, 7)+2, last_fault_for_exception_3);
772: put_word (m68k_areg(regs, 7)+6, last_op_for_exception_3);
773: put_long (m68k_areg(regs, 7)+10, last_addr_for_exception_3);
774: if( bEnableDebug ) {
775: fprintf(stderr,"Address Error at address $%x, PC=$%x\n",last_fault_for_exception_3,currpc);
776: DebugUI();
777: }
778: }
779: else { /* Bus error */
780: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
781: put_long (m68k_areg(regs, 7)+2, BusAddressLocation);
782: put_word (m68k_areg(regs, 7)+6, get_word(currpc));
783: if( bEnableDebug && BusAddressLocation!=0xff8a00) {
1.1.1.5 ! root 784: fprintf(stderr,"Bus Error at address $%lx, PC=$%lx\n",BusAddressLocation,(long)currpc);
1.1.1.3 root 785: DebugUI();
786: }
787: }
788: }
789:
1.1 root 790: m68k_setpc (get_long (regs.vbr + 4*nr));
791: fill_prefetch_0 ();
792: regs.t1 = regs.t0 = regs.m = 0;
793: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
794: }
795:
796: static void Interrupt(int nr)
797: {
798: assert(nr < 8 && nr >= 0);
799: lastint_regs = regs;
800: lastint_no = nr;
801: Exception(nr+24, 0);
802:
803: regs.intmask = nr;
804: set_special (SPCFLAG_INT);
805: }
806:
807: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr;
808:
809: int m68k_move2c (int regno, uae_u32 *regp)
810: {
811: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
812: || (cpu_level < 4 && (regno & 0x7FF) > 2)
813: || (cpu_level == 4 && regno == 0x802))
814: {
815: op_illg (0x4E7B);
816: return 0;
817: } else {
818: switch (regno) {
819: case 0: regs.sfc = *regp & 7; break;
820: case 1: regs.dfc = *regp & 7; break;
821: case 2: cacr = *regp & (cpu_level < 4 ? 0x3 : 0x80008000); break;
822: case 3: tc = *regp & 0xc000; break;
823: /* Mask out fields that should be zero. */
824: case 4: itt0 = *regp & 0xffffe364; break;
825: case 5: itt1 = *regp & 0xffffe364; break;
826: case 6: dtt0 = *regp & 0xffffe364; break;
827: case 7: dtt1 = *regp & 0xffffe364; break;
828:
829: case 0x800: regs.usp = *regp; break;
830: case 0x801: regs.vbr = *regp; break;
831: case 0x802: caar = *regp & 0xfc; break;
832: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
833: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
834: default:
835: op_illg (0x4E7B);
836: return 0;
837: }
838: }
839: return 1;
840: }
841:
842: int m68k_movec2 (int regno, uae_u32 *regp)
843: {
844: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
845: || (cpu_level < 4 && (regno & 0x7FF) > 2)
846: || (cpu_level == 4 && regno == 0x802))
847: {
848: op_illg (0x4E7A);
849: return 0;
850: } else {
851: switch (regno) {
852: case 0: *regp = regs.sfc; break;
853: case 1: *regp = regs.dfc; break;
854: case 2: *regp = cacr; break;
855: case 3: *regp = tc; break;
856: case 4: *regp = itt0; break;
857: case 5: *regp = itt1; break;
858: case 6: *regp = dtt0; break;
859: case 7: *regp = dtt1; break;
860: case 0x800: *regp = regs.usp; break;
861: case 0x801: *regp = regs.vbr; break;
862: case 0x802: *regp = caar; break;
863: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
864: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
865: case 0x805: *regp = mmusr; break;
866: default:
867: op_illg (0x4E7A);
868: return 0;
869: }
870: }
871: return 1;
872: }
873:
874: STATIC_INLINE int
875: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
876: {
877: uae_u32 q = 0, cbit = 0;
878: int i;
879:
880: if (div <= src_hi) {
881: return 1;
882: }
883: for (i = 0 ; i < 32 ; i++) {
884: cbit = src_hi & 0x80000000ul;
885: src_hi <<= 1;
886: if (src_lo & 0x80000000ul) src_hi++;
887: src_lo <<= 1;
888: q = q << 1;
889: if (cbit || div <= src_hi) {
890: q |= 1;
891: src_hi -= div;
892: }
893: }
894: *quot = q;
895: *rem = src_hi;
896: return 0;
897: }
898:
899: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
900: {
901: #if defined(uae_s64)
902: if (src == 0) {
903: Exception (5, oldpc);
904: return;
905: }
906: if (extra & 0x800) {
907: /* signed variant */
908: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
909: uae_s64 quot, rem;
910:
911: if (extra & 0x400) {
912: a &= 0xffffffffu;
913: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
914: }
915: rem = a % (uae_s64)(uae_s32)src;
916: quot = a / (uae_s64)(uae_s32)src;
917: if ((quot & UVAL64(0xffffffff80000000)) != 0
918: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
919: {
920: SET_VFLG (1);
921: SET_NFLG (1);
922: SET_CFLG (0);
923: } else {
924: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
925: SET_VFLG (0);
926: SET_CFLG (0);
927: SET_ZFLG (((uae_s32)quot) == 0);
928: SET_NFLG (((uae_s32)quot) < 0);
929: m68k_dreg(regs, extra & 7) = rem;
930: m68k_dreg(regs, (extra >> 12) & 7) = quot;
931: }
932: } else {
933: /* unsigned */
934: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
935: uae_u64 quot, rem;
936:
937: if (extra & 0x400) {
938: a &= 0xffffffffu;
939: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
940: }
941: rem = a % (uae_u64)src;
942: quot = a / (uae_u64)src;
943: if (quot > 0xffffffffu) {
944: SET_VFLG (1);
945: SET_NFLG (1);
946: SET_CFLG (0);
947: } else {
948: SET_VFLG (0);
949: SET_CFLG (0);
950: SET_ZFLG (((uae_s32)quot) == 0);
951: SET_NFLG (((uae_s32)quot) < 0);
952: m68k_dreg(regs, extra & 7) = rem;
953: m68k_dreg(regs, (extra >> 12) & 7) = quot;
954: }
955: }
956: #else
957: if (src == 0) {
958: Exception (5, oldpc);
959: return;
960: }
961: if (extra & 0x800) {
962: /* signed variant */
963: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
964: uae_s32 hi = lo < 0 ? -1 : 0;
965: uae_s32 save_high;
966: uae_u32 quot, rem;
967: uae_u32 sign;
968:
969: if (extra & 0x400) {
970: hi = (uae_s32)m68k_dreg(regs, extra & 7);
971: }
972: save_high = hi;
973: sign = (hi ^ src);
974: if (hi < 0) {
975: hi = ~hi;
976: lo = -lo;
977: if (lo == 0) hi++;
978: }
979: if ((uae_s32)src < 0) src = -src;
980: if (div_unsigned(hi, lo, src, ", &rem) ||
981: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
982: SET_VFLG (1);
983: SET_NFLG (1);
984: SET_CFLG (0);
985: } else {
986: if (sign & 0x80000000) quot = -quot;
987: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
988: SET_VFLG (0);
989: SET_CFLG (0);
990: SET_ZFLG (((uae_s32)quot) == 0);
991: SET_NFLG (((uae_s32)quot) < 0);
992: m68k_dreg(regs, extra & 7) = rem;
993: m68k_dreg(regs, (extra >> 12) & 7) = quot;
994: }
995: } else {
996: /* unsigned */
997: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
998: uae_u32 hi = 0;
999: uae_u32 quot, rem;
1000:
1001: if (extra & 0x400) {
1002: hi = (uae_u32)m68k_dreg(regs, extra & 7);
1003: }
1004: if (div_unsigned(hi, lo, src, ", &rem)) {
1005: SET_VFLG (1);
1006: SET_NFLG (1);
1007: SET_CFLG (0);
1008: } else {
1009: SET_VFLG (0);
1010: SET_CFLG (0);
1011: SET_ZFLG (((uae_s32)quot) == 0);
1012: SET_NFLG (((uae_s32)quot) < 0);
1013: m68k_dreg(regs, extra & 7) = rem;
1014: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1015: }
1016: }
1017: #endif
1018: }
1019:
1020: STATIC_INLINE void
1021: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1022: {
1023: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
1024: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
1025: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
1026: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
1027: uae_u32 lo;
1028:
1029: lo = r0 + ((r1 << 16) & 0xffff0000ul);
1030: if (lo < r0) r3++;
1031: r0 = lo;
1032: lo = r0 + ((r2 << 16) & 0xffff0000ul);
1033: if (lo < r0) r3++;
1034: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1035: *dst_lo = lo;
1036: *dst_hi = r3;
1037: }
1038:
1039: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1040: {
1041: #if defined(uae_s64)
1042: if (extra & 0x800) {
1043: /* signed variant */
1044: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1045:
1046: a *= (uae_s64)(uae_s32)src;
1047: SET_VFLG (0);
1048: SET_CFLG (0);
1049: SET_ZFLG (a == 0);
1050: SET_NFLG (a < 0);
1051: if (extra & 0x400)
1052: m68k_dreg(regs, extra & 7) = a >> 32;
1053: else if ((a & UVAL64(0xffffffff80000000)) != 0
1054: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1055: {
1056: SET_VFLG (1);
1057: }
1058: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1059: } else {
1060: /* unsigned */
1061: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1062:
1063: a *= (uae_u64)src;
1064: SET_VFLG (0);
1065: SET_CFLG (0);
1066: SET_ZFLG (a == 0);
1067: SET_NFLG (((uae_s64)a) < 0);
1068: if (extra & 0x400)
1069: m68k_dreg(regs, extra & 7) = a >> 32;
1070: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1071: SET_VFLG (1);
1072: }
1073: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1074: }
1075: #else
1076: if (extra & 0x800) {
1077: /* signed variant */
1078: uae_s32 src1,src2;
1079: uae_u32 dst_lo,dst_hi;
1080: uae_u32 sign;
1081:
1082: src1 = (uae_s32)src;
1083: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1084: sign = (src1 ^ src2);
1085: if (src1 < 0) src1 = -src1;
1086: if (src2 < 0) src2 = -src2;
1087: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1088: if (sign & 0x80000000) {
1089: dst_hi = ~dst_hi;
1090: dst_lo = -dst_lo;
1091: if (dst_lo == 0) dst_hi++;
1092: }
1093: SET_VFLG (0);
1094: SET_CFLG (0);
1095: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1096: SET_NFLG (((uae_s32)dst_hi) < 0);
1097: if (extra & 0x400)
1098: m68k_dreg(regs, extra & 7) = dst_hi;
1099: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1100: && ((dst_hi & 0xffffffff) != 0xffffffff
1101: || (dst_lo & 0x80000000) != 0x80000000))
1102: {
1103: SET_VFLG (1);
1104: }
1105: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1106: } else {
1107: /* unsigned */
1108: uae_u32 dst_lo,dst_hi;
1109:
1110: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1111:
1112: SET_VFLG (0);
1113: SET_CFLG (0);
1114: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1115: SET_NFLG (((uae_s32)dst_hi) < 0);
1116: if (extra & 0x400)
1117: m68k_dreg(regs, extra & 7) = dst_hi;
1118: else if (dst_hi != 0) {
1119: SET_VFLG (1);
1120: }
1121: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1122: }
1123: #endif
1124: }
1125: static char* ccnames[] =
1126: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1127: "VC","VS","PL","MI","GE","LT","GT","LE" };
1128:
1129: void m68k_reset (void)
1130: {
1.1.1.4 root 1131: m68k_areg(regs, 7) = get_long(0);
1132: m68k_setpc(get_long(4));
1.1 root 1133: fill_prefetch_0 ();
1134: regs.s = 1;
1135: regs.m = 0;
1136: regs.stopped = 0;
1137: regs.t1 = 0;
1138: regs.t0 = 0;
1139: SET_ZFLG (0);
1140: SET_XFLG (0);
1141: SET_CFLG (0);
1142: SET_VFLG (0);
1143: SET_NFLG (0);
1144: regs.spcflags = 0;
1145: regs.intmask = 7;
1146: regs.vbr = regs.sfc = regs.dfc = 0;
1147: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1148: }
1149:
1150: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1151: {
1152: uaecptr pc = m68k_getpc ();
1153: /*
1154: if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
1155: m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
1156: m68k_incpc (2);
1157: fill_prefetch_0 ();
1158: return 4;
1159: }
1160: */
1161: compiler_flush_jsr_stack ();
1162: if (opcode == 0x4E7B && get_long (0x10) == 0 )
1163: {
1164: write_log ("This program requires a 68020 CPU!\n");
1165: broken_in = 1;
1166: set_special (SPCFLAG_BRK);
1.1.1.4 root 1167: bQuitProgram = 1;
1.1 root 1168: }
1169: /*
1170: if (opcode == 0xFF0D) {
1171: if ((pc & 0xF80000) == 0xF80000) {
1172: // This is from the dummy Kickstart replacement
1173: uae_u16 arg = get_iword (2);
1174: m68k_incpc (4);
1175: ersatz_perform (arg);
1176: fill_prefetch_0 ();
1177: return 4;
1178: } else if ((pc & 0xF80000) == 0xF00000) {
1179: // User-mode STOP replacement
1180: m68k_setstopped (1);
1181: return 4;
1182: }
1183: }
1184: */
1185: /*
1186: if ((opcode & 0xF000) == 0xA000 && (pc & 0xF80000) == 0xF00000) {
1187: // Calltrap.
1188: m68k_incpc(2);
1189: call_calltrap (opcode & 0xFFF);
1190: fill_prefetch_0 ();
1191: return 4;
1192: }
1193: */
1194: if ((opcode & 0xF000) == 0xF000)
1195: {
1196: Exception(0xB,0);
1197: return 4;
1198: }
1199: if ((opcode & 0xF000) == 0xA000)
1200: {
1201: /*
1202: if ((pc & 0xF80000) == 0xF00000) {
1203: // Calltrap.
1204: call_calltrap (opcode & 0xFFF);
1205: }
1206: */
1207: Exception(0xA,0);
1208: return 4;
1209: }
1210:
1.1.1.3 root 1211: #if 0
1.1 root 1212: write_log ("Illegal instruction: %04x at %08lx\n", opcode, pc);
1213: #endif
1214: Exception (4,0);
1215: return 4;
1216: }
1217:
1218: void mmu_op(uae_u32 opcode, uae_u16 extra)
1219: {
1220: if ((opcode & 0xFE0) == 0x0500) {
1221: /* PFLUSH */
1222: mmusr = 0;
1223: write_log ("PFLUSH\n");
1224: } else if ((opcode & 0x0FD8) == 0x548) {
1225: /* PTEST */
1226: write_log ("PTEST\n");
1227: } else
1228: op_illg (opcode);
1229: }
1230:
1231:
1232: static uaecptr last_trace_ad = 0;
1233:
1234: static void do_trace (void)
1235: {
1236: if (regs.t0 && cpu_level >= 2) {
1237: uae_u16 opcode;
1238: /* should also include TRAP, CHK, SR modification FPcc */
1239: /* probably never used so why bother */
1240: /* We can afford this to be inefficient... */
1241: m68k_setpc (m68k_getpc ());
1242: fill_prefetch_0 ();
1243: opcode = get_word (regs.pc);
1244: if (opcode == 0x4e72 /* RTE */
1245: || opcode == 0x4e74 /* RTD */
1246: || opcode == 0x4e75 /* RTS */
1247: || opcode == 0x4e77 /* RTR */
1248: || opcode == 0x4e76 /* TRAPV */
1249: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1250: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1251: || (opcode & 0xff00) == 0x6100 /* BSR */
1252: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1253: && cctrue((opcode >> 8) & 0xf))
1254: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1255: && !cctrue((opcode >> 8) & 0xf)
1256: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1257: {
1258: last_trace_ad = m68k_getpc ();
1259: unset_special (SPCFLAG_TRACE);
1260: set_special (SPCFLAG_DOTRACE);
1261: }
1262: } else if (regs.t1) {
1263: last_trace_ad = m68k_getpc ();
1264: unset_special (SPCFLAG_TRACE);
1265: set_special (SPCFLAG_DOTRACE);
1266: }
1267: }
1268:
1269:
1270: static int do_specialties (void)
1271: {
1272: run_compiled_code();
1273: if (regs.spcflags & SPCFLAG_DOTRACE) {
1274: Exception (9,last_trace_ad);
1275: }
1276: while (regs.spcflags & SPCFLAG_STOP) {
1277: do_cycles (4);
1.1.1.5 ! root 1278: if (regs.intmask>5) {
! 1279: /* We still have to care about events when IPL==7 ! */
! 1280: Main_EventHandler();
! 1281: if(bQuitProgram) unset_special(SPCFLAG_STOP);
! 1282: }
! 1283: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)) {
1.1.1.3 root 1284: /*int intr = intlev ();*/
1.1 root 1285: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.3 root 1286: /*if (intr != -1 && intr > regs.intmask) {
1.1 root 1287: Interrupt (intr);
1288: regs.stopped = 0;
1289: unset_special (SPCFLAG_STOP);
1.1.1.3 root 1290: }*/
1.1 root 1291: }
1292: }
1293: if (regs.spcflags & SPCFLAG_TRACE)
1294: do_trace ();
1295:
1296: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.3 root 1297: /*int intr = intlev ();*/
1.1 root 1298: unset_special (SPCFLAG_DOINT);
1.1.1.3 root 1299: /*if (intr != -1 && intr > regs.intmask) {
1.1 root 1300: Interrupt (intr);
1301: regs.stopped = 0;
1.1.1.3 root 1302: }*/
1.1 root 1303: }
1304: if (regs.spcflags & SPCFLAG_INT) {
1305: unset_special (SPCFLAG_INT);
1306: set_special (SPCFLAG_DOINT);
1307: }
1308: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1309: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1310: return 1;
1311: }
1312: return 0;
1313: }
1314:
1.1.1.3 root 1315:
1.1 root 1316: /* It's really sad to have two almost identical functions for this, but we
1317: do it all for performance... :( */
1318: static void m68k_run_1 (void)
1319: {
1320: #ifdef DEBUG_PREFETCH
1321: uae_u8 saved_bytes[20];
1322: uae_u16 *oldpcp;
1323: #endif
1.1.1.4 root 1324: while(!bQuitProgram) {
1.1 root 1325: int cycles;
1326: uae_u32 opcode = get_iword_prefetch (0);
1327: #ifdef DEBUG_PREFETCH
1328: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1329: fprintf (stderr, "Prefetch differs from memory.\n");
1330: debugging = 1;
1331: return;
1332: }
1333: oldpcp = regs.pc_p;
1334: memcpy (saved_bytes, regs.pc_p, 20);
1335: #endif
1336:
1337: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 root 1338: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1339:
1340: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1341: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1342: #if COUNT_INSTRS == 2
1343: if (table68k[opcode].handler != -1)
1344: instrcount[table68k[opcode].handler]++;
1345: #elif COUNT_INSTRS == 1
1346: instrcount[opcode]++;
1347: #endif
1.1.1.2 root 1348:
1.1 root 1349: cycles = (*cpufunctbl[cft_map(opcode)])(opcode);
1.1.1.2 root 1350:
1.1 root 1351: #ifdef DEBUG_PREFETCH
1352: if (memcmp (saved_bytes, oldpcp, 20) != 0) {
1353: fprintf (stderr, "Self-modifying code detected.\n");
1354: set_special (SPCFLAG_BRK);
1355: debugging = 1;
1356: }
1357: #endif
1.1.1.2 root 1358:
1.1 root 1359: do_cycles (cycles);
1360: if (regs.spcflags) {
1361: if (do_specialties ())
1362: return;
1363: }
1364: }
1365: }
1366:
1367:
1368: /* Same thing, but don't use prefetch to get opcode. */
1369: static void m68k_run_2 (void)
1370: {
1.1.1.4 root 1371: while(!bQuitProgram) {
1.1 root 1372: int cycles;
1373: #ifdef HAVE_GET_WORD_UNSWAPPED
1374: uae_u32 opcode = do_get_mem_word_unswapped (regs.pc_p);
1375: #else
1376: uae_u32 opcode = get_iword (0);
1377: #endif
1378:
1379: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 root 1380: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1381:
1382: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1383: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1384: #if COUNT_INSTRS == 2
1385: if (table68k[opcode].handler != -1)
1386: instrcount[table68k[opcode].handler]++;
1387: #elif COUNT_INSTRS == 1
1388: instrcount[opcode]++;
1389: #endif
1.1.1.2 root 1390:
1.1 root 1391: cycles = (*cpufunctbl[cft_map(opcode)])(opcode);
1392:
1393: do_cycles (cycles);
1394: if (regs.spcflags) {
1395: if (do_specialties ())
1396: return;
1397: }
1398: }
1399: }
1400:
1401:
1402: int in_m68k_go = 0;
1403:
1404: void m68k_go (int may_quit)
1405: {
1406: if (in_m68k_go || !may_quit) {
1407: write_log ("Bug! m68k_go is not reentrant.\n");
1408: abort ();
1409: }
1410:
1411: in_m68k_go++;
1.1.1.4 root 1412: while(!bQuitProgram) {
1.1.1.2 root 1413: if(cpu_compatible)
1414: m68k_run_1();
1415: else
1416: m68k_run_2();
1.1 root 1417: }
1418: in_m68k_go--;
1419: }
1420:
1421: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1422: {
1423: uae_u32 opcode, val;
1424: struct instr *dp;
1425:
1426: opcode = get_iword_1(0);
1427: last_op_for_exception_3 = opcode;
1428: m68kpc_offset = 2;
1429:
1430: if (cpufunctbl[cft_map(opcode)] == op_illg_1) {
1431: opcode = 0x4AFC;
1432: }
1433: dp = table68k + opcode;
1434:
1435: if (dp->suse) {
1436: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1437: Exception (3, 0);
1438: return;
1439: }
1440: }
1441: if (dp->duse) {
1442: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1443: Exception (3, 0);
1444: return;
1445: }
1446: }
1447: }
1448:
1449: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1450: {
1451: uaecptr newpc = 0;
1452: m68kpc_offset = addr - m68k_getpc ();
1453: while (cnt-- > 0) {
1454: char instrname[20],*ccpt;
1455: int opwords;
1456: uae_u32 opcode;
1457: struct mnemolookup *lookup;
1458: struct instr *dp;
1459: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1460: for (opwords = 0; opwords < 5; opwords++){
1461: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1462: }
1463: opcode = get_iword_1 (m68kpc_offset);
1464: m68kpc_offset += 2;
1465: if (cpufunctbl[cft_map(opcode)] == op_illg_1) {
1466: opcode = 0x4AFC;
1467: }
1468: dp = table68k + opcode;
1469: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1470: ;
1471:
1472: strcpy (instrname, lookup->name);
1473: ccpt = strstr (instrname, "cc");
1474: if (ccpt != 0) {
1475: strncpy (ccpt, ccnames[dp->cc], 2);
1476: }
1477: fprintf (f, "%s", instrname);
1478: switch (dp->size){
1479: case sz_byte: fprintf (f, ".B "); break;
1480: case sz_word: fprintf (f, ".W "); break;
1481: case sz_long: fprintf (f, ".L "); break;
1482: default: fprintf (f, " "); break;
1483: }
1484:
1485: if (dp->suse) {
1486: newpc = m68k_getpc () + m68kpc_offset;
1487: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1488: }
1489: if (dp->suse && dp->duse)
1490: fprintf (f, ",");
1491: if (dp->duse) {
1492: newpc = m68k_getpc () + m68kpc_offset;
1493: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1494: }
1495: if (ccpt != 0) {
1496: if (cctrue(dp->cc))
1.1.1.5 ! root 1497: fprintf (f, " == %08lx (TRUE)", (long)newpc);
1.1 root 1498: else
1.1.1.5 ! root 1499: fprintf (f, " == %08lx (FALSE)", (long)newpc);
1.1 root 1500: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.5 ! root 1501: fprintf (f, " == %08lx", (long)newpc);
1.1 root 1502: fprintf (f, "\n");
1503: }
1504: if (nextpc)
1505: *nextpc = m68k_getpc () + m68kpc_offset;
1506: }
1507:
1508: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1509: {
1510: int i;
1511: for (i = 0; i < 8; i++){
1.1.1.5 ! root 1512: fprintf (f, "D%d: %08lx ", i, (long)m68k_dreg(regs, i));
1.1 root 1513: if ((i & 3) == 3) fprintf (f, "\n");
1514: }
1515: for (i = 0; i < 8; i++){
1.1.1.5 ! root 1516: fprintf (f, "A%d: %08lx ", i, (long)m68k_areg(regs, i));
1.1 root 1517: if ((i & 3) == 3) fprintf (f, "\n");
1518: }
1519: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1520: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1521: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1522: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1.1.1.5 ! root 1523: (long)regs.usp,(long)regs.isp,(long)regs.msp,(long)regs.vbr);
1.1 root 1524: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1525: regs.t1, regs.t0, regs.s, regs.m,
1526: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1527: for (i = 0; i < 8; i++){
1528: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1529: if ((i & 3) == 3) fprintf (f, "\n");
1530: }
1531: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1532: (regs.fpsr & 0x8000000) != 0,
1533: (regs.fpsr & 0x4000000) != 0,
1534: (regs.fpsr & 0x2000000) != 0,
1535: (regs.fpsr & 0x1000000) != 0);
1536: if (cpu_compatible)
1537: fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1538:
1539: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1540: if (nextpc)
1.1.1.5 ! root 1541: fprintf (f, "next PC: %08lx\n", (long)*nextpc);
1.1 root 1542: }
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