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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1 root 3: *
4: * MC68000 emulation
5: *
6: * (c) 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
9: *
1.1.1.6 ! root 10: * This file is distributed under the GNU Public License, version 2 or at
! 11: * your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
1.1.1.6 ! root 13: static char rcsid[] = "Hatari $Id: newcpu.c,v 1.15 2003/03/07 17:10:43 thothy Exp $";
1.1 root 14:
15: #include "sysdeps.h"
16: #include "hatari-glue.h"
17: #include "maccess.h"
18: #include "memory.h"
19: #include "newcpu.h"
20: #include "compiler.h"
21: #include "events.h"
1.1.1.5 root 22: #include "../includes/main.h"
1.1 root 23: #include "../includes/tos.h"
1.1.1.5 root 24: #include "../includes/vdi.h"
25: #include "../includes/cart.h"
26: #include "../includes/debugui.h"
1.1 root 27:
28:
29: struct flag_struct regflags;
30:
1.1.1.2 root 31: int lastInstructionCycles; /* how many cycles last instruction took to execute */
32:
1.1 root 33: /* Opcode of faulting instruction */
34: uae_u16 last_op_for_exception_3;
35: /* PC at fault time */
36: uaecptr last_addr_for_exception_3;
37: /* Address that generated the exception */
38: uaecptr last_fault_for_exception_3;
39:
40: int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
41: int imm8_table[] = { 8,1,2,3,4,5,6,7 };
42:
43: int movem_index1[256];
44: int movem_index2[256];
45: int movem_next[256];
46:
47: int fpp_movem_index1[256];
48: int fpp_movem_index2[256];
49: int fpp_movem_next[256];
50:
51: cpuop_func *cpufunctbl[65536];
52:
1.1.1.6 ! root 53: static uae_u32 busAddressErrPC = 0; /* Needed to store the right PC when bus-/address error occurs */
! 54:
! 55:
1.1 root 56: #define COUNT_INSTRS 0
57:
58: #if COUNT_INSTRS
59: static unsigned long int instrcount[65536];
60: static uae_u16 opcodenums[65536];
61:
62: static int compfn (const void *el1, const void *el2)
63: {
64: return instrcount[*(const uae_u16 *)el1] < instrcount[*(const uae_u16 *)el2];
65: }
66:
67: static char *icountfilename (void)
68: {
69: char *name = getenv ("INSNCOUNT");
70: if (name)
71: return name;
72: return COUNT_INSTRS == 2 ? "frequent.68k" : "insncount";
73: }
74:
75: void dump_counts (void)
76: {
77: FILE *f = fopen (icountfilename (), "w");
78: unsigned long int total;
79: int i;
80:
81: write_log ("Writing instruction count file...\n");
82: for (i = 0; i < 65536; i++) {
83: opcodenums[i] = i;
84: total += instrcount[i];
85: }
86: qsort (opcodenums, 65536, sizeof(uae_u16), compfn);
87:
88: fprintf (f, "Total: %lu\n", total);
89: for (i=0; i < 65536; i++) {
90: unsigned long int cnt = instrcount[opcodenums[i]];
91: struct instr *dp;
92: struct mnemolookup *lookup;
93: if (!cnt)
94: break;
95: dp = table68k + opcodenums[i];
96: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
97: ;
98: fprintf (f, "%04x: %lu %s\n", opcodenums[i], cnt, lookup->name);
99: }
100: fclose (f);
101: }
102: #else
103: void dump_counts (void)
104: {
105: }
106: #endif
107:
108: int broken_in;
109:
110: static unsigned long op_illg_1 (uae_u32 opcode) REGPARAM;
111:
112: static unsigned long REGPARAM2 op_illg_1 (uae_u32 opcode)
113: {
1.1.1.6 ! root 114: op_illg (opcode);
1.1 root 115: return 4;
116: }
117:
1.1.1.4 root 118:
119: void build_cpufunctbl(void)
1.1 root 120: {
121: int i;
122: unsigned long opcode;
123: struct cputbl *tbl = (cpu_level == 4 ? op_smalltbl_0_ff
124: : cpu_level == 3 ? op_smalltbl_1_ff
125: : cpu_level == 2 ? op_smalltbl_2_ff
126: : cpu_level == 1 ? op_smalltbl_3_ff
127: : ! cpu_compatible ? op_smalltbl_4_ff
128: : op_smalltbl_5_ff);
129:
130: write_log ("Building CPU function table (%d %d %d).\n",
131: cpu_level, cpu_compatible, address_space_24);
132:
133: for (opcode = 0; opcode < 65536; opcode++)
1.1.1.6 ! root 134: cpufunctbl[opcode] = op_illg_1;
1.1 root 135: for (i = 0; tbl[i].handler != NULL; i++) {
136: if (! tbl[i].specific)
1.1.1.6 ! root 137: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1 root 138: }
139: for (opcode = 0; opcode < 65536; opcode++) {
140: cpuop_func *f;
141:
142: if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > cpu_level)
143: continue;
144:
145: if (table68k[opcode].handler != -1) {
1.1.1.6 ! root 146: f = cpufunctbl[table68k[opcode].handler];
1.1 root 147: if (f == op_illg_1)
148: abort();
1.1.1.6 ! root 149: cpufunctbl[opcode] = f;
1.1 root 150: }
151: }
152: for (i = 0; tbl[i].handler != NULL; i++) {
153: if (tbl[i].specific)
1.1.1.6 ! root 154: cpufunctbl[tbl[i].opcode] = tbl[i].handler;
1.1 root 155: }
156:
1.1.1.6 ! root 157: /* Hatari's illegal opcodes: */
! 158: cpufunctbl[GEMDOS_OPCODE] = OpCode_GemDos;
! 159: cpufunctbl[RUNOLDGEMDOS_OPCODE] = OpCode_OldGemDos;
! 160: cpufunctbl[CONDRV_OPCODE] = OpCode_ConnectedDrive;
! 161: cpufunctbl[TIMERD_OPCODE] = OpCode_TimerD;
! 162: cpufunctbl[VDI_OPCODE] = OpCode_VDI;
1.1 root 163: }
164:
165:
166:
167: void init_m68k (void)
168: {
169: int i;
170:
171: for (i = 0 ; i < 256 ; i++) {
172: int j;
173: for (j = 0 ; j < 8 ; j++) {
174: if (i & (1 << j)) break;
175: }
176: movem_index1[i] = j;
177: movem_index2[i] = 7-j;
178: movem_next[i] = i & (~(1 << j));
179: }
180: for (i = 0 ; i < 256 ; i++) {
181: int j;
182: for (j = 7 ; j >= 0 ; j--) {
183: if (i & (1 << j)) break;
184: }
185: fpp_movem_index1[i] = 7-j;
186: fpp_movem_index2[i] = j;
187: fpp_movem_next[i] = i & (~(1 << j));
188: }
189: #if COUNT_INSTRS
190: {
191: FILE *f = fopen (icountfilename (), "r");
192: memset (instrcount, 0, sizeof instrcount);
193: if (f) {
194: uae_u32 opcode, count, total;
195: char name[20];
196: write_log ("Reading instruction count file...\n");
197: fscanf (f, "Total: %lu\n", &total);
198: while (fscanf (f, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
199: instrcount[opcode] = count;
200: }
201: fclose(f);
202: }
203: }
204: #endif
205: write_log ("Building CPU table for configuration: 68");
206: if (address_space_24 && cpu_level > 1)
207: write_log ("EC");
208: switch (cpu_level) {
209: case 1:
210: write_log ("010");
211: break;
212: case 2:
213: write_log ("020");
214: break;
215: case 3:
216: write_log ("020/881");
217: break;
218: case 4:
219: /* Who is going to miss the MMU anyway...? :-) */
220: write_log ("040");
221: break;
222: default:
223: write_log ("000");
224: break;
225: }
226: if (cpu_compatible)
227: write_log (" (compatible mode)");
228: write_log ("\n");
229:
230: read_table68k ();
231: do_merges ();
232:
233: write_log ("%d CPU functions\n", nr_cpuop_funcs);
234:
235: build_cpufunctbl ();
236: }
237:
1.1.1.4 root 238:
1.1 root 239: struct regstruct regs, lastint_regs;
240: static struct regstruct regs_backup[16];
241: static int backup_pointer = 0;
242: static long int m68kpc_offset;
243: int lastint_no;
244:
245: #define get_ibyte_1(o) get_byte(regs.pc + (regs.pc_p - regs.pc_oldp) + (o) + 1)
246: #define get_iword_1(o) get_word(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
247: #define get_ilong_1(o) get_long(regs.pc + (regs.pc_p - regs.pc_oldp) + (o))
248:
249: uae_s32 ShowEA (FILE *f, int reg, amodes mode, wordsizes size, char *buf)
250: {
251: uae_u16 dp;
252: uae_s8 disp8;
253: uae_s16 disp16;
254: int r;
255: uae_u32 dispreg;
256: uaecptr addr;
257: uae_s32 offset = 0;
258: char buffer[80];
259:
260: switch (mode){
261: case Dreg:
262: sprintf (buffer,"D%d", reg);
263: break;
264: case Areg:
265: sprintf (buffer,"A%d", reg);
266: break;
267: case Aind:
268: sprintf (buffer,"(A%d)", reg);
269: break;
270: case Aipi:
271: sprintf (buffer,"(A%d)+", reg);
272: break;
273: case Apdi:
274: sprintf (buffer,"-(A%d)", reg);
275: break;
276: case Ad16:
277: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
278: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
279: sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
280: (unsigned long)addr);
281: break;
282: case Ad8r:
283: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
284: disp8 = dp & 0xFF;
285: r = (dp & 0x7000) >> 12;
286: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
287: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
288: dispreg <<= (dp >> 9) & 3;
289:
290: if (dp & 0x100) {
291: uae_s32 outer = 0, disp = 0;
292: uae_s32 base = m68k_areg(regs,reg);
293: char name[10];
294: sprintf (name,"A%d, ",reg);
295: if (dp & 0x80) { base = 0; name[0] = 0; }
296: if (dp & 0x40) dispreg = 0;
297: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
298: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
299: base += disp;
300:
301: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
302: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
303:
304: if (!(dp & 4)) base += dispreg;
305: if (dp & 3) base = get_long (base);
306: if (dp & 4) base += dispreg;
307:
308: addr = base + outer;
309: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
310: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
311: 1 << ((dp >> 9) & 3),
1.1.1.5 root 312: (long)disp, (long)outer, (unsigned long)addr);
1.1 root 313: } else {
314: addr = m68k_areg(regs,reg) + (uae_s32)((uae_s8)disp8) + dispreg;
315: sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
316: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
317: 1 << ((dp >> 9) & 3), disp8,
318: (unsigned long)addr);
319: }
320: break;
321: case PC16:
322: addr = m68k_getpc () + m68kpc_offset;
323: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
324: addr += (uae_s16)disp16;
325: sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
326: break;
327: case PC8r:
328: addr = m68k_getpc () + m68kpc_offset;
329: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
330: disp8 = dp & 0xFF;
331: r = (dp & 0x7000) >> 12;
332: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
333: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
334: dispreg <<= (dp >> 9) & 3;
335:
336: if (dp & 0x100) {
337: uae_s32 outer = 0,disp = 0;
338: uae_s32 base = addr;
339: char name[10];
340: sprintf (name,"PC, ");
341: if (dp & 0x80) { base = 0; name[0] = 0; }
342: if (dp & 0x40) dispreg = 0;
343: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
344: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
345: base += disp;
346:
347: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
348: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
349:
350: if (!(dp & 4)) base += dispreg;
351: if (dp & 3) base = get_long (base);
352: if (dp & 4) base += dispreg;
353:
354: addr = base + outer;
355: sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
356: dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
357: 1 << ((dp >> 9) & 3),
1.1.1.5 root 358: (long)disp, (long)outer, (unsigned long)addr);
1.1 root 359: } else {
360: addr += (uae_s32)((uae_s8)disp8) + dispreg;
361: sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
362: (int)r, dp & 0x800 ? 'L' : 'W', 1 << ((dp >> 9) & 3),
363: disp8, (unsigned long)addr);
364: }
365: break;
366: case absw:
367: sprintf (buffer,"$%08lx", (unsigned long)(uae_s32)(uae_s16)get_iword_1 (m68kpc_offset));
368: m68kpc_offset += 2;
369: break;
370: case absl:
371: sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
372: m68kpc_offset += 4;
373: break;
374: case imm:
375: switch (size){
376: case sz_byte:
377: sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
378: m68kpc_offset += 2;
379: break;
380: case sz_word:
381: sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
382: m68kpc_offset += 2;
383: break;
384: case sz_long:
385: sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
386: m68kpc_offset += 4;
387: break;
388: default:
389: break;
390: }
391: break;
392: case imm0:
393: offset = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
394: m68kpc_offset += 2;
395: sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
396: break;
397: case imm1:
398: offset = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
399: m68kpc_offset += 2;
400: sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
401: break;
402: case imm2:
403: offset = (uae_s32)get_ilong_1 (m68kpc_offset);
404: m68kpc_offset += 4;
405: sprintf (buffer,"#$%08lx", (unsigned long)offset);
406: break;
407: case immi:
408: offset = (uae_s32)(uae_s8)(reg & 0xff);
409: sprintf (buffer,"#$%08lx", (unsigned long)offset);
410: break;
411: default:
412: break;
413: }
414: if (buf == 0)
415: fprintf (f, "%s", buffer);
416: else
417: strcat (buf, buffer);
418: return offset;
419: }
420:
421: /* The plan is that this will take over the job of exception 3 handling -
422: * the CPU emulation functions will just do a longjmp to m68k_go whenever
423: * they hit an odd address. */
424: static int verify_ea (int reg, amodes mode, wordsizes size, uae_u32 *val)
425: {
426: uae_u16 dp;
427: uae_s8 disp8;
428: uae_s16 disp16;
429: int r;
430: uae_u32 dispreg;
431: uaecptr addr;
1.1.1.5 root 432: /*uae_s32 offset = 0;*/
1.1 root 433:
434: switch (mode){
435: case Dreg:
436: *val = m68k_dreg (regs, reg);
437: return 1;
438: case Areg:
439: *val = m68k_areg (regs, reg);
440: return 1;
441:
442: case Aind:
443: case Aipi:
444: addr = m68k_areg (regs, reg);
445: break;
446: case Apdi:
447: addr = m68k_areg (regs, reg);
448: break;
449: case Ad16:
450: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
451: addr = m68k_areg(regs,reg) + (uae_s16)disp16;
452: break;
453: case Ad8r:
454: addr = m68k_areg (regs, reg);
455: d8r_common:
456: dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
457: disp8 = dp & 0xFF;
458: r = (dp & 0x7000) >> 12;
459: dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
460: if (!(dp & 0x800)) dispreg = (uae_s32)(uae_s16)(dispreg);
461: dispreg <<= (dp >> 9) & 3;
462:
463: if (dp & 0x100) {
464: uae_s32 outer = 0, disp = 0;
465: uae_s32 base = addr;
466: if (dp & 0x80) base = 0;
467: if (dp & 0x40) dispreg = 0;
468: if ((dp & 0x30) == 0x20) { disp = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
469: if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
470: base += disp;
471:
472: if ((dp & 0x3) == 0x2) { outer = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
473: if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
474:
475: if (!(dp & 4)) base += dispreg;
476: if (dp & 3) base = get_long (base);
477: if (dp & 4) base += dispreg;
478:
479: addr = base + outer;
480: } else {
481: addr += (uae_s32)((uae_s8)disp8) + dispreg;
482: }
483: break;
484: case PC16:
485: addr = m68k_getpc () + m68kpc_offset;
486: disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
487: addr += (uae_s16)disp16;
488: break;
489: case PC8r:
490: addr = m68k_getpc () + m68kpc_offset;
491: goto d8r_common;
492: case absw:
493: addr = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
494: m68kpc_offset += 2;
495: break;
496: case absl:
497: addr = get_ilong_1 (m68kpc_offset);
498: m68kpc_offset += 4;
499: break;
500: case imm:
501: switch (size){
502: case sz_byte:
503: *val = get_iword_1 (m68kpc_offset) & 0xff;
504: m68kpc_offset += 2;
505: break;
506: case sz_word:
507: *val = get_iword_1 (m68kpc_offset) & 0xffff;
508: m68kpc_offset += 2;
509: break;
510: case sz_long:
511: *val = get_ilong_1 (m68kpc_offset);
512: m68kpc_offset += 4;
513: break;
514: default:
515: break;
516: }
517: return 1;
518: case imm0:
519: *val = (uae_s32)(uae_s8)get_iword_1 (m68kpc_offset);
520: m68kpc_offset += 2;
521: return 1;
522: case imm1:
523: *val = (uae_s32)(uae_s16)get_iword_1 (m68kpc_offset);
524: m68kpc_offset += 2;
525: return 1;
526: case imm2:
527: *val = get_ilong_1 (m68kpc_offset);
528: m68kpc_offset += 4;
529: return 1;
530: case immi:
531: *val = (uae_s32)(uae_s8)(reg & 0xff);
532: return 1;
533: default:
534: addr = 0;
535: break;
536: }
537: if ((addr & 1) == 0)
538: return 1;
539:
540: last_addr_for_exception_3 = m68k_getpc () + m68kpc_offset;
541: last_fault_for_exception_3 = addr;
542: return 0;
543: }
544:
545: uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp)
546: {
547: int reg = (dp >> 12) & 15;
548: uae_s32 regd = regs.regs[reg];
549: if ((dp & 0x800) == 0)
550: regd = (uae_s32)(uae_s16)regd;
551: regd <<= (dp >> 9) & 3;
552: if (dp & 0x100) {
553: uae_s32 outer = 0;
554: if (dp & 0x80) base = 0;
555: if (dp & 0x40) regd = 0;
556:
557: if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)next_iword();
558: if ((dp & 0x30) == 0x30) base += next_ilong();
559:
560: if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)next_iword();
561: if ((dp & 0x3) == 0x3) outer = next_ilong();
562:
563: if ((dp & 0x4) == 0) base += regd;
564: if (dp & 0x3) base = get_long (base);
565: if (dp & 0x4) base += regd;
566:
567: return base + outer;
568: } else {
569: return base + (uae_s32)((uae_s8)dp) + regd;
570: }
571: }
572:
573: uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp)
574: {
575: int reg = (dp >> 12) & 15;
576: uae_s32 regd = regs.regs[reg];
577: #if 1
578: if ((dp & 0x800) == 0)
579: regd = (uae_s32)(uae_s16)regd;
580: return base + (uae_s8)dp + regd;
581: #else
582: /* Branch-free code... benchmark this again now that
583: * things are no longer inline. */
584: uae_s32 regd16;
585: uae_u32 mask;
586: mask = ((dp & 0x800) >> 11) - 1;
587: regd16 = (uae_s32)(uae_s16)regd;
588: regd16 &= mask;
589: mask = ~mask;
590: base += (uae_s8)dp;
591: regd &= mask;
592: regd |= regd16;
593: return base + regd;
594: #endif
595: }
596:
597: void MakeSR (void)
598: {
599: #if 0
600: assert((regs.t1 & 1) == regs.t1);
601: assert((regs.t0 & 1) == regs.t0);
602: assert((regs.s & 1) == regs.s);
603: assert((regs.m & 1) == regs.m);
604: assert((XFLG & 1) == XFLG);
605: assert((NFLG & 1) == NFLG);
606: assert((ZFLG & 1) == ZFLG);
607: assert((VFLG & 1) == VFLG);
608: assert((CFLG & 1) == CFLG);
609: #endif
610: regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
611: | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
612: | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
613: | GET_CFLG);
614: }
615:
616: void MakeFromSR (void)
617: {
618: int oldm = regs.m;
619: int olds = regs.s;
620:
621: regs.t1 = (regs.sr >> 15) & 1;
622: regs.t0 = (regs.sr >> 14) & 1;
623: regs.s = (regs.sr >> 13) & 1;
624: regs.m = (regs.sr >> 12) & 1;
625: regs.intmask = (regs.sr >> 8) & 7;
626: SET_XFLG ((regs.sr >> 4) & 1);
627: SET_NFLG ((regs.sr >> 3) & 1);
628: SET_ZFLG ((regs.sr >> 2) & 1);
629: SET_VFLG ((regs.sr >> 1) & 1);
630: SET_CFLG (regs.sr & 1);
631: if (cpu_level >= 2) {
632: if (olds != regs.s) {
633: if (olds) {
634: if (oldm)
635: regs.msp = m68k_areg(regs, 7);
636: else
637: regs.isp = m68k_areg(regs, 7);
638: m68k_areg(regs, 7) = regs.usp;
639: } else {
640: regs.usp = m68k_areg(regs, 7);
641: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
642: }
643: } else if (olds && oldm != regs.m) {
644: if (oldm) {
645: regs.msp = m68k_areg(regs, 7);
646: m68k_areg(regs, 7) = regs.isp;
647: } else {
648: regs.isp = m68k_areg(regs, 7);
649: m68k_areg(regs, 7) = regs.msp;
650: }
651: }
652: } else {
653: if (olds != regs.s) {
654: if (olds) {
655: regs.isp = m68k_areg(regs, 7);
656: m68k_areg(regs, 7) = regs.usp;
657: } else {
658: regs.usp = m68k_areg(regs, 7);
659: m68k_areg(regs, 7) = regs.isp;
660: }
661: }
662: }
663:
664: set_special (SPCFLAG_INT);
665: if (regs.t1 || regs.t0)
666: set_special (SPCFLAG_TRACE);
667: else
1.1.1.6 ! root 668: /* Keep SPCFLAG_DOTRACE, we still want a trace exception for
! 669: SR-modifying instructions (including STOP). */
! 670: unset_special (SPCFLAG_TRACE);
1.1 root 671: }
672:
1.1.1.5 root 673:
1.1 root 674: void Exception(int nr, uaecptr oldpc)
675: {
676: uae_u32 currpc = m68k_getpc ();
677:
1.1.1.2 root 678: /*if( nr>=2 && nr<10 ) fprintf(stderr,"Exception (-> %i bombs)!\n",nr);*/
1.1 root 679:
1.1.1.5 root 680: /* Intercept exceptions... - FIXME: Find a better way to do this! */
1.1.1.6 ! root 681: if(bUseVDIRes && nr == 0x22) /* Trap 2 - intercept VDI call */
1.1.1.5 root 682: {
1.1.1.6 ! root 683: if(!VDI())
1.1.1.5 root 684: {
1.1.1.6 ! root 685: /* Set 'PC' as address of 'VDI_OPCODE' illegal instruction
! 686: * This will call OpCode_VDI after completion of Trap call!
! 687: * Use to modify return structure from VDI */
! 688: VDI_OldPC = currpc;
! 689: currpc = CART_VDI_OPCODE_ADDR;
1.1.1.5 root 690: }
691: }
692:
1.1 root 693: compiler_flush_jsr_stack();
694: MakeSR();
695:
696: if (!regs.s) {
697: regs.usp = m68k_areg(regs, 7);
698: if (cpu_level >= 2)
699: m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
700: else
701: m68k_areg(regs, 7) = regs.isp;
702: regs.s = 1;
703: }
704: if (cpu_level > 0) {
705: if (nr == 2 || nr == 3) {
706: int i;
707: /* @@@ this is probably wrong (?) */
708: for (i = 0 ; i < 12 ; i++) {
709: m68k_areg(regs, 7) -= 2;
710: put_word (m68k_areg(regs, 7), 0);
711: }
712: m68k_areg(regs, 7) -= 2;
713: put_word (m68k_areg(regs, 7), 0xa000 + nr * 4);
714: } else if (nr ==5 || nr == 6 || nr == 7 || nr == 9) {
715: m68k_areg(regs, 7) -= 4;
716: put_long (m68k_areg(regs, 7), oldpc);
717: m68k_areg(regs, 7) -= 2;
718: put_word (m68k_areg(regs, 7), 0x2000 + nr * 4);
719: } else if (regs.m && nr >= 24 && nr < 32) {
720: m68k_areg(regs, 7) -= 2;
721: put_word (m68k_areg(regs, 7), nr * 4);
722: m68k_areg(regs, 7) -= 4;
723: put_long (m68k_areg(regs, 7), currpc);
724: m68k_areg(regs, 7) -= 2;
725: put_word (m68k_areg(regs, 7), regs.sr);
726: regs.sr |= (1 << 13);
727: regs.msp = m68k_areg(regs, 7);
728: m68k_areg(regs, 7) = regs.isp;
729: m68k_areg(regs, 7) -= 2;
730: put_word (m68k_areg(regs, 7), 0x1000 + nr * 4);
731: } else {
732: m68k_areg(regs, 7) -= 2;
733: put_word (m68k_areg(regs, 7), nr * 4);
734: }
735: }
1.1.1.3 root 736:
737: /* Push PC on stack: */
1.1 root 738: m68k_areg(regs, 7) -= 4;
739: put_long (m68k_areg(regs, 7), currpc);
1.1.1.3 root 740: /* Push SR on stack: */
1.1 root 741: m68k_areg(regs, 7) -= 2;
742: put_word (m68k_areg(regs, 7), regs.sr);
1.1.1.3 root 743:
744: /* 68000 bus/address errors: */
745: if (cpu_level==0 && (nr==2 || nr==3)) {
746: m68k_areg(regs, 7) -= 8;
747: if (nr == 3) { /* Address error */
748: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
749: put_long (m68k_areg(regs, 7)+2, last_fault_for_exception_3);
750: put_word (m68k_areg(regs, 7)+6, last_op_for_exception_3);
751: put_long (m68k_areg(regs, 7)+10, last_addr_for_exception_3);
752: if( bEnableDebug ) {
753: fprintf(stderr,"Address Error at address $%x, PC=$%x\n",last_fault_for_exception_3,currpc);
754: DebugUI();
755: }
756: }
757: else { /* Bus error */
758: put_word (m68k_areg(regs, 7), regs.sr); /*?*/
759: put_long (m68k_areg(regs, 7)+2, BusAddressLocation);
760: put_word (m68k_areg(regs, 7)+6, get_word(currpc));
761: if( bEnableDebug && BusAddressLocation!=0xff8a00) {
1.1.1.5 root 762: fprintf(stderr,"Bus Error at address $%lx, PC=$%lx\n",BusAddressLocation,(long)currpc);
1.1.1.3 root 763: DebugUI();
764: }
765: }
766: }
767:
1.1 root 768: m68k_setpc (get_long (regs.vbr + 4*nr));
769: fill_prefetch_0 ();
770: regs.t1 = regs.t0 = regs.m = 0;
771: unset_special (SPCFLAG_TRACE | SPCFLAG_DOTRACE);
1.1.1.6 ! root 772:
! 773: /* Store a backup of the PC after bus-/address error: */
! 774: if(nr==2 || nr==3) {
! 775: busAddressErrPC = regs.pc;
! 776: }
1.1 root 777: }
778:
779: static void Interrupt(int nr)
780: {
781: assert(nr < 8 && nr >= 0);
782: lastint_regs = regs;
783: lastint_no = nr;
784: Exception(nr+24, 0);
785:
786: regs.intmask = nr;
787: set_special (SPCFLAG_INT);
788: }
789:
1.1.1.6 ! root 790: static uae_u32 caar, cacr, itt0, itt1, dtt0, dtt1, tc, mmusr, urp, srp;
1.1 root 791:
792: int m68k_move2c (int regno, uae_u32 *regp)
793: {
794: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
795: || (cpu_level < 4 && (regno & 0x7FF) > 2)
796: || (cpu_level == 4 && regno == 0x802))
797: {
798: op_illg (0x4E7B);
799: return 0;
800: } else {
801: switch (regno) {
802: case 0: regs.sfc = *regp & 7; break;
803: case 1: regs.dfc = *regp & 7; break;
804: case 2: cacr = *regp & (cpu_level < 4 ? 0x3 : 0x80008000); break;
805: case 3: tc = *regp & 0xc000; break;
806: /* Mask out fields that should be zero. */
807: case 4: itt0 = *regp & 0xffffe364; break;
808: case 5: itt1 = *regp & 0xffffe364; break;
809: case 6: dtt0 = *regp & 0xffffe364; break;
810: case 7: dtt1 = *regp & 0xffffe364; break;
811:
812: case 0x800: regs.usp = *regp; break;
813: case 0x801: regs.vbr = *regp; break;
814: case 0x802: caar = *regp & 0xfc; break;
815: case 0x803: regs.msp = *regp; if (regs.m == 1) m68k_areg(regs, 7) = regs.msp; break;
816: case 0x804: regs.isp = *regp; if (regs.m == 0) m68k_areg(regs, 7) = regs.isp; break;
1.1.1.6 ! root 817: case 0x805: mmusr = *regp; break;
! 818: case 0x806: urp = *regp; break;
! 819: case 0x807: srp = *regp; break;
1.1 root 820: default:
821: op_illg (0x4E7B);
822: return 0;
823: }
824: }
825: return 1;
826: }
827:
828: int m68k_movec2 (int regno, uae_u32 *regp)
829: {
830: if ((cpu_level == 1 && (regno & 0x7FF) > 1)
831: || (cpu_level < 4 && (regno & 0x7FF) > 2)
832: || (cpu_level == 4 && regno == 0x802))
833: {
834: op_illg (0x4E7A);
835: return 0;
836: } else {
837: switch (regno) {
838: case 0: *regp = regs.sfc; break;
839: case 1: *regp = regs.dfc; break;
840: case 2: *regp = cacr; break;
841: case 3: *regp = tc; break;
842: case 4: *regp = itt0; break;
843: case 5: *regp = itt1; break;
844: case 6: *regp = dtt0; break;
845: case 7: *regp = dtt1; break;
846: case 0x800: *regp = regs.usp; break;
847: case 0x801: *regp = regs.vbr; break;
848: case 0x802: *regp = caar; break;
849: case 0x803: *regp = regs.m == 1 ? m68k_areg(regs, 7) : regs.msp; break;
850: case 0x804: *regp = regs.m == 0 ? m68k_areg(regs, 7) : regs.isp; break;
851: case 0x805: *regp = mmusr; break;
1.1.1.6 ! root 852: case 0x806: *regp = urp; break;
! 853: case 0x807: *regp = srp; break;
1.1 root 854: default:
855: op_illg (0x4E7A);
856: return 0;
857: }
858: }
859: return 1;
860: }
861:
862: STATIC_INLINE int
863: div_unsigned(uae_u32 src_hi, uae_u32 src_lo, uae_u32 div, uae_u32 *quot, uae_u32 *rem)
864: {
865: uae_u32 q = 0, cbit = 0;
866: int i;
867:
868: if (div <= src_hi) {
869: return 1;
870: }
871: for (i = 0 ; i < 32 ; i++) {
872: cbit = src_hi & 0x80000000ul;
873: src_hi <<= 1;
874: if (src_lo & 0x80000000ul) src_hi++;
875: src_lo <<= 1;
876: q = q << 1;
877: if (cbit || div <= src_hi) {
878: q |= 1;
879: src_hi -= div;
880: }
881: }
882: *quot = q;
883: *rem = src_hi;
884: return 0;
885: }
886:
887: void m68k_divl (uae_u32 opcode, uae_u32 src, uae_u16 extra, uaecptr oldpc)
888: {
889: #if defined(uae_s64)
890: if (src == 0) {
891: Exception (5, oldpc);
892: return;
893: }
894: if (extra & 0x800) {
895: /* signed variant */
896: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
897: uae_s64 quot, rem;
898:
899: if (extra & 0x400) {
900: a &= 0xffffffffu;
901: a |= (uae_s64)m68k_dreg(regs, extra & 7) << 32;
902: }
903: rem = a % (uae_s64)(uae_s32)src;
904: quot = a / (uae_s64)(uae_s32)src;
905: if ((quot & UVAL64(0xffffffff80000000)) != 0
906: && (quot & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
907: {
908: SET_VFLG (1);
909: SET_NFLG (1);
910: SET_CFLG (0);
911: } else {
912: if (((uae_s32)rem < 0) != ((uae_s64)a < 0)) rem = -rem;
913: SET_VFLG (0);
914: SET_CFLG (0);
915: SET_ZFLG (((uae_s32)quot) == 0);
916: SET_NFLG (((uae_s32)quot) < 0);
917: m68k_dreg(regs, extra & 7) = rem;
918: m68k_dreg(regs, (extra >> 12) & 7) = quot;
919: }
920: } else {
921: /* unsigned */
922: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
923: uae_u64 quot, rem;
924:
925: if (extra & 0x400) {
926: a &= 0xffffffffu;
927: a |= (uae_u64)m68k_dreg(regs, extra & 7) << 32;
928: }
929: rem = a % (uae_u64)src;
930: quot = a / (uae_u64)src;
931: if (quot > 0xffffffffu) {
932: SET_VFLG (1);
933: SET_NFLG (1);
934: SET_CFLG (0);
935: } else {
936: SET_VFLG (0);
937: SET_CFLG (0);
938: SET_ZFLG (((uae_s32)quot) == 0);
939: SET_NFLG (((uae_s32)quot) < 0);
940: m68k_dreg(regs, extra & 7) = rem;
941: m68k_dreg(regs, (extra >> 12) & 7) = quot;
942: }
943: }
944: #else
945: if (src == 0) {
946: Exception (5, oldpc);
947: return;
948: }
949: if (extra & 0x800) {
950: /* signed variant */
951: uae_s32 lo = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
952: uae_s32 hi = lo < 0 ? -1 : 0;
953: uae_s32 save_high;
954: uae_u32 quot, rem;
955: uae_u32 sign;
956:
957: if (extra & 0x400) {
958: hi = (uae_s32)m68k_dreg(regs, extra & 7);
959: }
960: save_high = hi;
961: sign = (hi ^ src);
962: if (hi < 0) {
963: hi = ~hi;
964: lo = -lo;
965: if (lo == 0) hi++;
966: }
967: if ((uae_s32)src < 0) src = -src;
968: if (div_unsigned(hi, lo, src, ", &rem) ||
969: (sign & 0x80000000) ? quot > 0x80000000 : quot > 0x7fffffff) {
970: SET_VFLG (1);
971: SET_NFLG (1);
972: SET_CFLG (0);
973: } else {
974: if (sign & 0x80000000) quot = -quot;
975: if (((uae_s32)rem < 0) != (save_high < 0)) rem = -rem;
976: SET_VFLG (0);
977: SET_CFLG (0);
978: SET_ZFLG (((uae_s32)quot) == 0);
979: SET_NFLG (((uae_s32)quot) < 0);
980: m68k_dreg(regs, extra & 7) = rem;
981: m68k_dreg(regs, (extra >> 12) & 7) = quot;
982: }
983: } else {
984: /* unsigned */
985: uae_u32 lo = (uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
986: uae_u32 hi = 0;
987: uae_u32 quot, rem;
988:
989: if (extra & 0x400) {
990: hi = (uae_u32)m68k_dreg(regs, extra & 7);
991: }
992: if (div_unsigned(hi, lo, src, ", &rem)) {
993: SET_VFLG (1);
994: SET_NFLG (1);
995: SET_CFLG (0);
996: } else {
997: SET_VFLG (0);
998: SET_CFLG (0);
999: SET_ZFLG (((uae_s32)quot) == 0);
1000: SET_NFLG (((uae_s32)quot) < 0);
1001: m68k_dreg(regs, extra & 7) = rem;
1002: m68k_dreg(regs, (extra >> 12) & 7) = quot;
1003: }
1004: }
1005: #endif
1006: }
1007:
1008: STATIC_INLINE void
1009: mul_unsigned(uae_u32 src1, uae_u32 src2, uae_u32 *dst_hi, uae_u32 *dst_lo)
1010: {
1011: uae_u32 r0 = (src1 & 0xffff) * (src2 & 0xffff);
1012: uae_u32 r1 = ((src1 >> 16) & 0xffff) * (src2 & 0xffff);
1013: uae_u32 r2 = (src1 & 0xffff) * ((src2 >> 16) & 0xffff);
1014: uae_u32 r3 = ((src1 >> 16) & 0xffff) * ((src2 >> 16) & 0xffff);
1015: uae_u32 lo;
1016:
1017: lo = r0 + ((r1 << 16) & 0xffff0000ul);
1018: if (lo < r0) r3++;
1019: r0 = lo;
1020: lo = r0 + ((r2 << 16) & 0xffff0000ul);
1021: if (lo < r0) r3++;
1022: r3 += ((r1 >> 16) & 0xffff) + ((r2 >> 16) & 0xffff);
1023: *dst_lo = lo;
1024: *dst_hi = r3;
1025: }
1026:
1027: void m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
1028: {
1029: #if defined(uae_s64)
1030: if (extra & 0x800) {
1031: /* signed variant */
1032: uae_s64 a = (uae_s64)(uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1033:
1034: a *= (uae_s64)(uae_s32)src;
1035: SET_VFLG (0);
1036: SET_CFLG (0);
1037: SET_ZFLG (a == 0);
1038: SET_NFLG (a < 0);
1039: if (extra & 0x400)
1040: m68k_dreg(regs, extra & 7) = a >> 32;
1041: else if ((a & UVAL64(0xffffffff80000000)) != 0
1042: && (a & UVAL64(0xffffffff80000000)) != UVAL64(0xffffffff80000000))
1043: {
1044: SET_VFLG (1);
1045: }
1046: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1047: } else {
1048: /* unsigned */
1049: uae_u64 a = (uae_u64)(uae_u32)m68k_dreg(regs, (extra >> 12) & 7);
1050:
1051: a *= (uae_u64)src;
1052: SET_VFLG (0);
1053: SET_CFLG (0);
1054: SET_ZFLG (a == 0);
1055: SET_NFLG (((uae_s64)a) < 0);
1056: if (extra & 0x400)
1057: m68k_dreg(regs, extra & 7) = a >> 32;
1058: else if ((a & UVAL64(0xffffffff00000000)) != 0) {
1059: SET_VFLG (1);
1060: }
1061: m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
1062: }
1063: #else
1064: if (extra & 0x800) {
1065: /* signed variant */
1066: uae_s32 src1,src2;
1067: uae_u32 dst_lo,dst_hi;
1068: uae_u32 sign;
1069:
1070: src1 = (uae_s32)src;
1071: src2 = (uae_s32)m68k_dreg(regs, (extra >> 12) & 7);
1072: sign = (src1 ^ src2);
1073: if (src1 < 0) src1 = -src1;
1074: if (src2 < 0) src2 = -src2;
1075: mul_unsigned((uae_u32)src1,(uae_u32)src2,&dst_hi,&dst_lo);
1076: if (sign & 0x80000000) {
1077: dst_hi = ~dst_hi;
1078: dst_lo = -dst_lo;
1079: if (dst_lo == 0) dst_hi++;
1080: }
1081: SET_VFLG (0);
1082: SET_CFLG (0);
1083: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1084: SET_NFLG (((uae_s32)dst_hi) < 0);
1085: if (extra & 0x400)
1086: m68k_dreg(regs, extra & 7) = dst_hi;
1087: else if ((dst_hi != 0 || (dst_lo & 0x80000000) != 0)
1088: && ((dst_hi & 0xffffffff) != 0xffffffff
1089: || (dst_lo & 0x80000000) != 0x80000000))
1090: {
1091: SET_VFLG (1);
1092: }
1093: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1094: } else {
1095: /* unsigned */
1096: uae_u32 dst_lo,dst_hi;
1097:
1098: mul_unsigned(src,(uae_u32)m68k_dreg(regs, (extra >> 12) & 7),&dst_hi,&dst_lo);
1099:
1100: SET_VFLG (0);
1101: SET_CFLG (0);
1102: SET_ZFLG (dst_hi == 0 && dst_lo == 0);
1103: SET_NFLG (((uae_s32)dst_hi) < 0);
1104: if (extra & 0x400)
1105: m68k_dreg(regs, extra & 7) = dst_hi;
1106: else if (dst_hi != 0) {
1107: SET_VFLG (1);
1108: }
1109: m68k_dreg(regs, (extra >> 12) & 7) = dst_lo;
1110: }
1111: #endif
1112: }
1.1.1.6 ! root 1113:
1.1 root 1114: static char* ccnames[] =
1115: { "T ","F ","HI","LS","CC","CS","NE","EQ",
1116: "VC","VS","PL","MI","GE","LT","GT","LE" };
1117:
1118: void m68k_reset (void)
1119: {
1.1.1.4 root 1120: m68k_areg(regs, 7) = get_long(0);
1121: m68k_setpc(get_long(4));
1.1.1.6 ! root 1122: refill_prefetch (m68k_getpc (), 0);
1.1 root 1123: regs.s = 1;
1124: regs.m = 0;
1125: regs.stopped = 0;
1126: regs.t1 = 0;
1127: regs.t0 = 0;
1128: SET_ZFLG (0);
1129: SET_XFLG (0);
1130: SET_CFLG (0);
1131: SET_VFLG (0);
1132: SET_NFLG (0);
1133: regs.spcflags = 0;
1134: regs.intmask = 7;
1135: regs.vbr = regs.sfc = regs.dfc = 0;
1136: regs.fpcr = regs.fpsr = regs.fpiar = 0;
1137: }
1138:
1139: unsigned long REGPARAM2 op_illg (uae_u32 opcode)
1140: {
1141: uaecptr pc = m68k_getpc ();
1.1.1.6 ! root 1142:
1.1 root 1143: compiler_flush_jsr_stack ();
1.1.1.6 ! root 1144: if (opcode == 0x4E7B && get_long (0x10) == 0 ) {
1.1 root 1145: write_log ("This program requires a 68020 CPU!\n");
1146: broken_in = 1;
1147: set_special (SPCFLAG_BRK);
1.1.1.4 root 1148: bQuitProgram = 1;
1.1 root 1149: }
1.1.1.6 ! root 1150:
! 1151: if ((opcode & 0xF000) == 0xF000) {
1.1 root 1152: Exception(0xB,0);
1153: return 4;
1.1.1.6 ! root 1154: }
! 1155: if ((opcode & 0xF000) == 0xA000) {
1.1 root 1156: Exception(0xA,0);
1157: return 4;
1.1.1.6 ! root 1158: }
1.1 root 1159:
1.1.1.3 root 1160: #if 0
1.1.1.6 ! root 1161: write_log ("Illegal instruction: %04x at %08lx\n", opcode, (long)pc);
1.1 root 1162: #endif
1163: Exception (4,0);
1164: return 4;
1165: }
1166:
1167: void mmu_op(uae_u32 opcode, uae_u16 extra)
1168: {
1169: if ((opcode & 0xFE0) == 0x0500) {
1170: /* PFLUSH */
1171: mmusr = 0;
1172: write_log ("PFLUSH\n");
1173: } else if ((opcode & 0x0FD8) == 0x548) {
1174: /* PTEST */
1175: write_log ("PTEST\n");
1176: } else
1177: op_illg (opcode);
1178: }
1179:
1180:
1181: static uaecptr last_trace_ad = 0;
1182:
1183: static void do_trace (void)
1184: {
1185: if (regs.t0 && cpu_level >= 2) {
1186: uae_u16 opcode;
1187: /* should also include TRAP, CHK, SR modification FPcc */
1188: /* probably never used so why bother */
1189: /* We can afford this to be inefficient... */
1190: m68k_setpc (m68k_getpc ());
1191: fill_prefetch_0 ();
1192: opcode = get_word (regs.pc);
1193: if (opcode == 0x4e72 /* RTE */
1194: || opcode == 0x4e74 /* RTD */
1195: || opcode == 0x4e75 /* RTS */
1196: || opcode == 0x4e77 /* RTR */
1197: || opcode == 0x4e76 /* TRAPV */
1198: || (opcode & 0xffc0) == 0x4e80 /* JSR */
1199: || (opcode & 0xffc0) == 0x4ec0 /* JMP */
1200: || (opcode & 0xff00) == 0x6100 /* BSR */
1201: || ((opcode & 0xf000) == 0x6000 /* Bcc */
1202: && cctrue((opcode >> 8) & 0xf))
1203: || ((opcode & 0xf0f0) == 0x5050 /* DBcc */
1204: && !cctrue((opcode >> 8) & 0xf)
1205: && (uae_s16)m68k_dreg(regs, opcode & 7) != 0))
1206: {
1207: last_trace_ad = m68k_getpc ();
1208: unset_special (SPCFLAG_TRACE);
1209: set_special (SPCFLAG_DOTRACE);
1210: }
1211: } else if (regs.t1) {
1212: last_trace_ad = m68k_getpc ();
1213: unset_special (SPCFLAG_TRACE);
1214: set_special (SPCFLAG_DOTRACE);
1215: }
1216: }
1217:
1218:
1219: static int do_specialties (void)
1220: {
1221: run_compiled_code();
1222: if (regs.spcflags & SPCFLAG_DOTRACE) {
1223: Exception (9,last_trace_ad);
1224: }
1225: while (regs.spcflags & SPCFLAG_STOP) {
1.1.1.6 ! root 1226: do_cycles (8);
1.1.1.5 root 1227: if (regs.intmask>5) {
1228: /* We still have to care about events when IPL==7 ! */
1229: Main_EventHandler();
1230: if(bQuitProgram) unset_special(SPCFLAG_STOP);
1231: }
1232: if (regs.spcflags & (SPCFLAG_INT | SPCFLAG_DOINT)) {
1.1.1.6 ! root 1233: int intr = intlev ();
1.1 root 1234: unset_special (SPCFLAG_INT | SPCFLAG_DOINT);
1.1.1.6 ! root 1235: if (intr != -1 && intr > regs.intmask) {
1.1 root 1236: Interrupt (intr);
1237: regs.stopped = 0;
1238: unset_special (SPCFLAG_STOP);
1.1.1.6 ! root 1239: }
1.1 root 1240: }
1241: }
1242: if (regs.spcflags & SPCFLAG_TRACE)
1243: do_trace ();
1244:
1245: if (regs.spcflags & SPCFLAG_DOINT) {
1.1.1.6 ! root 1246: int intr = intlev ();
1.1 root 1247: unset_special (SPCFLAG_DOINT);
1.1.1.6 ! root 1248: if (intr != -1 && intr > regs.intmask) {
1.1 root 1249: Interrupt (intr);
1250: regs.stopped = 0;
1.1.1.6 ! root 1251: }
1.1 root 1252: }
1253: if (regs.spcflags & SPCFLAG_INT) {
1254: unset_special (SPCFLAG_INT);
1255: set_special (SPCFLAG_DOINT);
1256: }
1257: if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
1258: unset_special (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
1259: return 1;
1260: }
1261: return 0;
1262: }
1263:
1.1.1.3 root 1264:
1.1 root 1265: /* It's really sad to have two almost identical functions for this, but we
1266: do it all for performance... :( */
1267: static void m68k_run_1 (void)
1268: {
1269: #ifdef DEBUG_PREFETCH
1270: uae_u8 saved_bytes[20];
1271: uae_u16 *oldpcp;
1272: #endif
1.1.1.4 root 1273: while(!bQuitProgram) {
1.1 root 1274: int cycles;
1275: uae_u32 opcode = get_iword_prefetch (0);
1276: #ifdef DEBUG_PREFETCH
1277: if (get_ilong (0) != do_get_mem_long (®s.prefetch)) {
1278: fprintf (stderr, "Prefetch differs from memory.\n");
1279: debugging = 1;
1280: return;
1281: }
1282: oldpcp = regs.pc_p;
1283: memcpy (saved_bytes, regs.pc_p, 20);
1284: #endif
1285:
1286: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 root 1287: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1288:
1289: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1290: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1291: #if COUNT_INSTRS == 2
1292: if (table68k[opcode].handler != -1)
1293: instrcount[table68k[opcode].handler]++;
1294: #elif COUNT_INSTRS == 1
1295: instrcount[opcode]++;
1296: #endif
1.1.1.2 root 1297:
1.1.1.6 ! root 1298: cycles = (*cpufunctbl[opcode])(opcode);
! 1299:
! 1300: /* Unfortunately needed at the moment: */
! 1301: /* Check if we had an bus/address error and correct the PC then... */
! 1302: if(busAddressErrPC) {
! 1303: /*write_log("Fixed PC to $%x instead of $%x after bus-/address error!\n",
! 1304: busAddressErrPC, m68k_getpc());*/
! 1305: m68k_setpc(busAddressErrPC);
! 1306: busAddressErrPC = 0;
! 1307: }
1.1.1.2 root 1308:
1.1 root 1309: #ifdef DEBUG_PREFETCH
1310: if (memcmp (saved_bytes, oldpcp, 20) != 0) {
1311: fprintf (stderr, "Self-modifying code detected.\n");
1312: set_special (SPCFLAG_BRK);
1313: debugging = 1;
1314: }
1315: #endif
1.1.1.2 root 1316:
1.1 root 1317: do_cycles (cycles);
1318: if (regs.spcflags) {
1319: if (do_specialties ())
1320: return;
1321: }
1322: }
1323: }
1324:
1325:
1326: /* Same thing, but don't use prefetch to get opcode. */
1327: static void m68k_run_2 (void)
1328: {
1.1.1.4 root 1329: while(!bQuitProgram) {
1.1 root 1330: int cycles;
1331: uae_u32 opcode = get_iword (0);
1332:
1333: /*m68k_dumpstate(stderr, NULL);*/
1.1.1.3 root 1334: /*m68k_disasm(stderr, m68k_getpc (), NULL, 1);*/
1.1 root 1335:
1336: /* assert (!regs.stopped && !(regs.spcflags & SPCFLAG_STOP)); */
1337: /* regs_backup[backup_pointer = (backup_pointer + 1) % 16] = regs;*/
1338: #if COUNT_INSTRS == 2
1339: if (table68k[opcode].handler != -1)
1340: instrcount[table68k[opcode].handler]++;
1341: #elif COUNT_INSTRS == 1
1342: instrcount[opcode]++;
1343: #endif
1.1.1.2 root 1344:
1.1.1.6 ! root 1345: cycles = (*cpufunctbl[opcode])(opcode);
! 1346:
! 1347: /* Unfortunately needed at the moment: */
! 1348: /* Check if we had an bus/address error and correct the PC then... */
! 1349: if(busAddressErrPC) {
! 1350: /*write_log("Fixed PC to $%x instead of $%x after bus-/address error!\n",
! 1351: busAddressErrPC, m68k_getpc());*/
! 1352: m68k_setpc(busAddressErrPC);
! 1353: busAddressErrPC = 0;
! 1354: }
1.1 root 1355:
1356: do_cycles (cycles);
1357: if (regs.spcflags) {
1358: if (do_specialties ())
1359: return;
1360: }
1361: }
1362: }
1363:
1364:
1365: int in_m68k_go = 0;
1366:
1367: void m68k_go (int may_quit)
1368: {
1369: if (in_m68k_go || !may_quit) {
1370: write_log ("Bug! m68k_go is not reentrant.\n");
1371: abort ();
1372: }
1373:
1374: in_m68k_go++;
1.1.1.4 root 1375: while(!bQuitProgram) {
1.1.1.2 root 1376: if(cpu_compatible)
1377: m68k_run_1();
1378: else
1379: m68k_run_2();
1.1 root 1380: }
1381: in_m68k_go--;
1382: }
1383:
1384: static void m68k_verify (uaecptr addr, uaecptr *nextpc)
1385: {
1386: uae_u32 opcode, val;
1387: struct instr *dp;
1388:
1389: opcode = get_iword_1(0);
1390: last_op_for_exception_3 = opcode;
1391: m68kpc_offset = 2;
1392:
1.1.1.6 ! root 1393: if (cpufunctbl[opcode] == op_illg_1) {
1.1 root 1394: opcode = 0x4AFC;
1395: }
1396: dp = table68k + opcode;
1397:
1398: if (dp->suse) {
1399: if (!verify_ea (dp->sreg, dp->smode, dp->size, &val)) {
1400: Exception (3, 0);
1401: return;
1402: }
1403: }
1404: if (dp->duse) {
1405: if (!verify_ea (dp->dreg, dp->dmode, dp->size, &val)) {
1406: Exception (3, 0);
1407: return;
1408: }
1409: }
1410: }
1411:
1412: void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
1413: {
1414: uaecptr newpc = 0;
1415: m68kpc_offset = addr - m68k_getpc ();
1416: while (cnt-- > 0) {
1417: char instrname[20],*ccpt;
1418: int opwords;
1419: uae_u32 opcode;
1420: struct mnemolookup *lookup;
1421: struct instr *dp;
1422: fprintf (f, "%08lx: ", m68k_getpc () + m68kpc_offset);
1423: for (opwords = 0; opwords < 5; opwords++){
1424: fprintf (f, "%04x ", get_iword_1 (m68kpc_offset + opwords*2));
1425: }
1426: opcode = get_iword_1 (m68kpc_offset);
1427: m68kpc_offset += 2;
1.1.1.6 ! root 1428: if (cpufunctbl[opcode] == op_illg_1) {
1.1 root 1429: opcode = 0x4AFC;
1430: }
1431: dp = table68k + opcode;
1432: for (lookup = lookuptab;lookup->mnemo != dp->mnemo; lookup++)
1433: ;
1434:
1435: strcpy (instrname, lookup->name);
1436: ccpt = strstr (instrname, "cc");
1437: if (ccpt != 0) {
1438: strncpy (ccpt, ccnames[dp->cc], 2);
1439: }
1440: fprintf (f, "%s", instrname);
1441: switch (dp->size){
1442: case sz_byte: fprintf (f, ".B "); break;
1443: case sz_word: fprintf (f, ".W "); break;
1444: case sz_long: fprintf (f, ".L "); break;
1445: default: fprintf (f, " "); break;
1446: }
1447:
1448: if (dp->suse) {
1449: newpc = m68k_getpc () + m68kpc_offset;
1450: newpc += ShowEA (f, dp->sreg, dp->smode, dp->size, 0);
1451: }
1452: if (dp->suse && dp->duse)
1453: fprintf (f, ",");
1454: if (dp->duse) {
1455: newpc = m68k_getpc () + m68kpc_offset;
1456: newpc += ShowEA (f, dp->dreg, dp->dmode, dp->size, 0);
1457: }
1458: if (ccpt != 0) {
1459: if (cctrue(dp->cc))
1.1.1.5 root 1460: fprintf (f, " == %08lx (TRUE)", (long)newpc);
1.1 root 1461: else
1.1.1.5 root 1462: fprintf (f, " == %08lx (FALSE)", (long)newpc);
1.1 root 1463: } else if ((opcode & 0xff00) == 0x6100) /* BSR */
1.1.1.5 root 1464: fprintf (f, " == %08lx", (long)newpc);
1.1 root 1465: fprintf (f, "\n");
1466: }
1467: if (nextpc)
1468: *nextpc = m68k_getpc () + m68kpc_offset;
1469: }
1470:
1471: void m68k_dumpstate (FILE *f, uaecptr *nextpc)
1472: {
1473: int i;
1474: for (i = 0; i < 8; i++){
1.1.1.5 root 1475: fprintf (f, "D%d: %08lx ", i, (long)m68k_dreg(regs, i));
1.1 root 1476: if ((i & 3) == 3) fprintf (f, "\n");
1477: }
1478: for (i = 0; i < 8; i++){
1.1.1.5 root 1479: fprintf (f, "A%d: %08lx ", i, (long)m68k_areg(regs, i));
1.1 root 1480: if ((i & 3) == 3) fprintf (f, "\n");
1481: }
1482: if (regs.s == 0) regs.usp = m68k_areg(regs, 7);
1483: if (regs.s && regs.m) regs.msp = m68k_areg(regs, 7);
1484: if (regs.s && regs.m == 0) regs.isp = m68k_areg(regs, 7);
1485: fprintf (f, "USP=%08lx ISP=%08lx MSP=%08lx VBR=%08lx\n",
1.1.1.5 root 1486: (long)regs.usp,(long)regs.isp,(long)regs.msp,(long)regs.vbr);
1.1 root 1487: fprintf (f, "T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d\n",
1488: regs.t1, regs.t0, regs.s, regs.m,
1489: GET_XFLG, GET_NFLG, GET_ZFLG, GET_VFLG, GET_CFLG, regs.intmask);
1490: for (i = 0; i < 8; i++){
1491: fprintf (f, "FP%d: %g ", i, regs.fp[i]);
1492: if ((i & 3) == 3) fprintf (f, "\n");
1493: }
1494: fprintf (f, "N=%d Z=%d I=%d NAN=%d\n",
1495: (regs.fpsr & 0x8000000) != 0,
1496: (regs.fpsr & 0x4000000) != 0,
1497: (regs.fpsr & 0x2000000) != 0,
1498: (regs.fpsr & 0x1000000) != 0);
1499: if (cpu_compatible)
1500: fprintf (f, "prefetch %08lx\n", (unsigned long)do_get_mem_long(®s.prefetch));
1501:
1502: m68k_disasm (f, m68k_getpc (), nextpc, 1);
1503: if (nextpc)
1.1.1.5 root 1504: fprintf (f, "next PC: %08lx\n", (long)*nextpc);
1.1 root 1505: }
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