--- hatari/src/uae-cpu/newcpu.h	2019/04/01 07:14:57	1.1.1.11
+++ hatari/src/uae-cpu/newcpu.h	2019/04/09 08:53:26	1.1.1.14
@@ -7,8 +7,8 @@
   *
   * Adaptation to Hatari by Thomas Huth
   *
-  * This file is distributed under the GNU Public License, version 2 or at
-  * your option any later version. Read the file gpl.txt for details.
+  * This file is distributed under the GNU General Public License, version 2
+  * or at your option any later version. Read the file gpl.txt for details.
   */
 
 #ifndef UAE_NEWCPU_H
@@ -20,13 +20,14 @@
 
 
 /* Possible exceptions sources for M68000_Exception() and Exception() */
-#define M68000_EXCEPTION_SRC_CPU	1	/* exception is a direct CPU exception */
-#define M68000_EXCEPTION_SRC_INT_MFP	2	/* exception caused by an MFP interrupt */
-#define M68000_EXCEPTION_SRC_INT_VIDEO	3	/* exception caused by a video interrupt */
-
+#define M68000_EXC_SRC_CPU	    1  /* Direct CPU exception */
+#define M68000_EXC_SRC_AUTOVEC  2  /* Auto-vector exception (e.g. VBL) */
+#define M68000_EXC_SRC_INT_MFP	3  /* MFP interrupt exception */
+#define M68000_EXC_SRC_INT_DSP  4  /* DSP interrupt exception */
 
 
 /* Special flags */
+#define SPCFLAG_DEBUGGER 1
 #define SPCFLAG_STOP 2
 #define SPCFLAG_BUSERROR 4
 #define SPCFLAG_INT 8
@@ -38,6 +39,7 @@
 #define SPCFLAG_MFP 0x200
 #define SPCFLAG_EXEC 0x400
 #define SPCFLAG_MODE_CHANGE 0x800
+#define SPCFLAG_DSP 0x1000
 
 
 #ifndef SET_CFLG
@@ -350,4 +352,8 @@ extern uae_u32 caar, cacr;
 /* Family of the latest instruction executed (to check for pairing) */
 extern int OpcodeFamily;			/* see instrmnem in readcpu.h */
 
+/* How many cycles to add to the current instruction in case a "misaligned" bus acces is made */
+/* (used when addressing mode is d8(an,ix)) */
+extern int BusCyclePenalty;
+
 #endif	/* UAE_NEWCPU_H */