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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
1.1.1.6 root 3: *
1.1 root 4: * MC68000 emulation
5: *
6: * Copyright 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
9: *
1.1.1.14! root 10: * This file is distributed under the GNU General Public License, version 2
! 11: * or at your option any later version. Read the file gpl.txt for details.
1.1 root 12: */
13:
1.1.1.4 root 14: #ifndef UAE_NEWCPU_H
15: #define UAE_NEWCPU_H
1.1 root 16:
17: #include "readcpu.h"
18: #include "m68k.h"
1.1.1.10 root 19: #include "memory.h"
1.1 root 20:
21:
1.1.1.11 root 22: /* Possible exceptions sources for M68000_Exception() and Exception() */
1.1.1.13 root 23: #define M68000_EXC_SRC_CPU 1 /* Direct CPU exception */
24: #define M68000_EXC_SRC_AUTOVEC 2 /* Auto-vector exception (e.g. VBL) */
25: #define M68000_EXC_SRC_INT_MFP 3 /* MFP interrupt exception */
26: #define M68000_EXC_SRC_INT_DSP 4 /* DSP interrupt exception */
1.1.1.11 root 27:
28:
1.1.1.7 root 29: /* Special flags */
1.1.1.12 root 30: #define SPCFLAG_DEBUGGER 1
1.1 root 31: #define SPCFLAG_STOP 2
1.1.1.6 root 32: #define SPCFLAG_BUSERROR 4
1.1 root 33: #define SPCFLAG_INT 8
1.1.1.6 root 34: #define SPCFLAG_BRK 0x10
35: #define SPCFLAG_EXTRA_CYCLES 0x20
36: #define SPCFLAG_TRACE 0x40
37: #define SPCFLAG_DOTRACE 0x80
38: #define SPCFLAG_DOINT 0x100
1.1.1.7 root 39: #define SPCFLAG_MFP 0x200
1.1.1.6 root 40: #define SPCFLAG_EXEC 0x400
41: #define SPCFLAG_MODE_CHANGE 0x800
1.1.1.14! root 42: #define SPCFLAG_DSP 0x1000
1.1 root 43:
1.1.1.7 root 44:
1.1 root 45: #ifndef SET_CFLG
46:
47: #define SET_CFLG(x) (CFLG = (x))
48: #define SET_NFLG(x) (NFLG = (x))
49: #define SET_VFLG(x) (VFLG = (x))
50: #define SET_ZFLG(x) (ZFLG = (x))
51: #define SET_XFLG(x) (XFLG = (x))
52:
53: #define GET_CFLG CFLG
54: #define GET_NFLG NFLG
55: #define GET_VFLG VFLG
56: #define GET_ZFLG ZFLG
57: #define GET_XFLG XFLG
58:
59: #define CLEAR_CZNV do { \
60: SET_CFLG (0); \
61: SET_ZFLG (0); \
62: SET_NFLG (0); \
63: SET_VFLG (0); \
64: } while (0)
65:
66: #define COPY_CARRY (SET_XFLG (GET_CFLG))
67: #endif
68:
1.1.1.9 root 69: extern const int areg_byteinc[];
70: extern const int imm8_table[];
1.1 root 71:
72: extern int movem_index1[256];
73: extern int movem_index2[256];
74: extern int movem_next[256];
75:
76: extern int fpp_movem_index1[256];
77: extern int fpp_movem_index2[256];
78: extern int fpp_movem_next[256];
79:
80:
81: typedef unsigned long cpuop_func (uae_u32) REGPARAM;
82:
83: struct cputbl {
84: cpuop_func *handler;
85: int specific;
86: uae_u16 opcode;
87: };
88:
89: extern unsigned long op_illg (uae_u32) REGPARAM;
90:
91: typedef char flagtype;
92:
1.1.1.5 root 93: /* You can set this to long double to be more accurate. However, the
94: resulting alignment issues will cost a lot of performance in some
95: apps */
96: #define USE_LONG_DOUBLE 0
97:
98: #if USE_LONG_DOUBLE
99: typedef long double fptype;
100: #else
101: typedef double fptype;
102: #endif
103:
1.1 root 104: extern struct regstruct
105: {
106: uae_u32 regs[16];
107: uaecptr usp,isp,msp;
108: uae_u16 sr;
109: flagtype t1;
110: flagtype t0;
111: flagtype s;
112: flagtype m;
113: flagtype x;
114: flagtype stopped;
115: int intmask;
116:
117: uae_u32 pc;
118: uae_u8 *pc_p;
119: uae_u8 *pc_oldp;
120:
121: uae_u32 vbr,sfc,dfc;
122:
1.1.1.5 root 123: fptype fp[8];
124: fptype fp_result;
125:
1.1 root 126: uae_u32 fpcr,fpsr,fpiar;
1.1.1.5 root 127: uae_u32 fpsr_highbyte;
1.1 root 128:
129: uae_u32 spcflags;
130:
1.1.1.5 root 131: uae_u32 prefetch_pc;
1.1 root 132: uae_u32 prefetch;
133: } regs, lastint_regs;
134:
135: STATIC_INLINE void set_special (uae_u32 x)
136: {
137: regs.spcflags |= x;
138: }
139:
140: STATIC_INLINE void unset_special (uae_u32 x)
141: {
142: regs.spcflags &= ~x;
143: }
144:
145: #define m68k_dreg(r,num) ((r).regs[(num)])
146: #define m68k_areg(r,num) (((r).regs + 8)[(num)])
147:
1.1.1.6 root 148:
1.1.1.5 root 149: STATIC_INLINE void m68k_setpc (uaecptr newpc)
150: {
151: regs.pc_p = regs.pc_oldp = get_real_address (newpc);
152: regs.pc = newpc;
153: }
154:
155: STATIC_INLINE uaecptr m68k_getpc (void)
156: {
157: return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
158: }
159:
160: STATIC_INLINE uaecptr m68k_getpc_p (uae_u8 *p)
161: {
162: return regs.pc + ((char *)p - (char *)regs.pc_oldp);
163: }
164:
1.1.1.8 root 165: #define get_ibyte(o) do_get_mem_byte(regs.pc_p + (o) + 1)
166: #define get_iword(o) do_get_mem_word(regs.pc_p + (o))
167: #define get_ilong(o) do_get_mem_long(regs.pc_p + (o))
1.1 root 168:
1.1.1.5 root 169: STATIC_INLINE void refill_prefetch (uae_u32 currpc, uae_u32 offs)
1.1 root 170: {
1.1.1.6 root 171: uae_u32 t = (currpc + offs) & ~1;
1.1.1.5 root 172: uae_s32 pc_p_offs = t - currpc;
173: uae_u8 *ptr = regs.pc_p + pc_p_offs;
174: uae_u32 r;
175: #ifdef UNALIGNED_PROFITABLE
176: r = *(uae_u32 *)ptr;
177: regs.prefetch = r;
178: #else
1.1.1.8 root 179: r = do_get_mem_long (ptr);
1.1.1.5 root 180: do_put_mem_long (®s.prefetch, r);
181: #endif
182: /* printf ("PC %lx T %lx PCPOFFS %d R %lx\n", currpc, t, pc_p_offs, r); */
183: regs.prefetch_pc = t;
184: }
1.1 root 185:
1.1.1.5 root 186: STATIC_INLINE uae_u32 get_ibyte_prefetch (uae_s32 o)
187: {
188: uae_u32 currpc = m68k_getpc ();
189: uae_u32 addr = currpc + o + 1;
190: uae_u32 offs = addr - regs.prefetch_pc;
191: uae_u32 v;
192: if (offs > 3) {
193: refill_prefetch (currpc, o + 1);
194: offs = addr - regs.prefetch_pc;
195: }
196: v = do_get_mem_byte (((uae_u8 *)®s.prefetch) + offs);
197: if (offs >= 2)
1.1.1.6 root 198: refill_prefetch (currpc, 2);
1.1.1.5 root 199: /* printf ("get_ibyte PC %lx ADDR %lx OFFS %lx V %lx\n", currpc, addr, offs, v); */
200: return v;
1.1 root 201: }
202: STATIC_INLINE uae_u32 get_iword_prefetch (uae_s32 o)
203: {
1.1.1.5 root 204: uae_u32 currpc = m68k_getpc ();
205: uae_u32 addr = currpc + o;
206: uae_u32 offs = addr - regs.prefetch_pc;
207: uae_u32 v;
208: if (offs > 3) {
209: refill_prefetch (currpc, o);
210: offs = addr - regs.prefetch_pc;
211: }
1.1.1.8 root 212: v = do_get_mem_word (((uae_u8 *)®s.prefetch) + offs);
1.1.1.5 root 213: if (offs >= 2)
1.1.1.6 root 214: refill_prefetch (currpc, 2);
1.1.1.5 root 215: /* printf ("get_iword PC %lx ADDR %lx OFFS %lx V %lx\n", currpc, addr, offs, v); */
216: return v;
1.1 root 217: }
218: STATIC_INLINE uae_u32 get_ilong_prefetch (uae_s32 o)
219: {
1.1.1.5 root 220: uae_u32 v = get_iword_prefetch (o);
221: v <<= 16;
222: v |= get_iword_prefetch (o + 2);
223: return v;
1.1 root 224: }
225:
226: #define m68k_incpc(o) (regs.pc_p += (o))
227:
228: STATIC_INLINE void fill_prefetch_0 (void)
229: {
230: }
231:
232: #define fill_prefetch_2 fill_prefetch_0
233:
234: /* These are only used by the 68020/68881 code, and therefore don't
235: * need to handle prefetch. */
236: STATIC_INLINE uae_u32 next_ibyte (void)
237: {
238: uae_u32 r = get_ibyte (0);
239: m68k_incpc (2);
240: return r;
241: }
242:
243: STATIC_INLINE uae_u32 next_iword (void)
244: {
245: uae_u32 r = get_iword (0);
246: m68k_incpc (2);
247: return r;
248: }
249:
250: STATIC_INLINE uae_u32 next_ilong (void)
251: {
252: uae_u32 r = get_ilong (0);
253: m68k_incpc (4);
254: return r;
255: }
256:
257: #define m68k_setpc_bcc m68k_setpc
258: #define m68k_setpc_rte m68k_setpc
259:
260: STATIC_INLINE void m68k_setstopped (int stop)
261: {
262: regs.stopped = stop;
1.1.1.5 root 263: /* A traced STOP instruction drops through immediately without
264: actually stopping. */
265: if (stop && (regs.spcflags & SPCFLAG_DOTRACE) == 0)
1.1 root 266: regs.spcflags |= SPCFLAG_STOP;
267: }
268:
1.1.1.6 root 269: /* m68k_do_rts, m68k_do_bsr and m68k_do_jsr were originally defined in
270: * compiler.h, but since that header file has been removed from Hatari,
271: * they are now defined here: */
272: STATIC_INLINE void m68k_do_rts(void)
273: {
274: m68k_setpc(get_long(m68k_areg(regs, 7)));
275: m68k_areg(regs, 7) += 4;
276: }
277:
278: STATIC_INLINE void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
279: {
280: m68k_areg(regs, 7) -= 4;
281: put_long(m68k_areg(regs, 7), oldpc);
282: m68k_incpc(offset);
283: }
284:
285: STATIC_INLINE void m68k_do_jsr(uaecptr oldpc, uaecptr dest)
286: {
287: m68k_areg(regs, 7) -= 4;
288: put_long(m68k_areg(regs, 7), oldpc);
289: m68k_setpc(dest);
290: }
291:
292:
1.1 root 293: extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
294: extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);
295:
296: extern uae_s32 ShowEA (FILE *, int reg, amodes mode, wordsizes size, char *buf);
297:
298: extern void MakeSR (void);
299: extern void MakeFromSR (void);
1.1.1.11 root 300: extern void Exception (int, uaecptr, int);
1.1 root 301: extern void dump_counts (void);
302: extern int m68k_move2c (int, uae_u32 *);
303: extern int m68k_movec2 (int, uae_u32 *);
304: extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
305: extern void m68k_mull (uae_u32, uae_u32, uae_u16);
1.1.1.4 root 306: extern void build_cpufunctbl(void);
1.1 root 307: extern void init_m68k (void);
308: extern void m68k_go (int);
309: extern void m68k_dumpstate (FILE *, uaecptr *);
310: extern void m68k_disasm (FILE *, uaecptr, uaecptr *, int);
311: extern void m68k_reset (void);
312:
313: extern void mmu_op (uae_u32, uae_u16);
314:
315: extern void fpp_opp (uae_u32, uae_u16);
316: extern void fdbcc_opp (uae_u32, uae_u16);
317: extern void fscc_opp (uae_u32, uae_u16);
318: extern void ftrapcc_opp (uae_u32,uaecptr);
319: extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
320: extern void fsave_opp (uae_u32);
321: extern void frestore_opp (uae_u32);
322:
1.1.1.10 root 323: extern int getDivu68kCycles (uae_u32 dividend, uae_u16 divisor);
324: extern int getDivs68kCycles (uae_s32 dividend, uae_s16 divisor);
1.1.1.2 root 325:
1.1 root 326: /* Opcode of faulting instruction */
327: extern uae_u16 last_op_for_exception_3;
328: /* PC at fault time */
329: extern uaecptr last_addr_for_exception_3;
330: /* Address that generated the exception */
331: extern uaecptr last_fault_for_exception_3;
332:
333: #define CPU_OP_NAME(a) op ## a
334:
335: /* 68040 */
1.1.1.9 root 336: extern const struct cputbl op_smalltbl_0_ff[];
1.1 root 337: /* 68020 + 68881 */
1.1.1.9 root 338: extern const struct cputbl op_smalltbl_1_ff[];
1.1 root 339: /* 68020 */
1.1.1.9 root 340: extern const struct cputbl op_smalltbl_2_ff[];
1.1 root 341: /* 68010 */
1.1.1.9 root 342: extern const struct cputbl op_smalltbl_3_ff[];
1.1 root 343: /* 68000 */
1.1.1.9 root 344: extern const struct cputbl op_smalltbl_4_ff[];
1.1 root 345: /* 68000 slow but compatible. */
1.1.1.9 root 346: extern const struct cputbl op_smalltbl_5_ff[];
1.1 root 347:
1.1.1.2 root 348: extern cpuop_func *cpufunctbl[65536];
1.1 root 349:
1.1.1.10 root 350: extern uae_u32 caar, cacr;
351:
352: /* Family of the latest instruction executed (to check for pairing) */
353: extern int OpcodeFamily; /* see instrmnem in readcpu.h */
1.1.1.7 root 354:
1.1.1.13 root 355: /* How many cycles to add to the current instruction in case a "misaligned" bus acces is made */
356: /* (used when addressing mode is d8(an,ix)) */
357: extern int BusCyclePenalty;
358:
1.1.1.4 root 359: #endif /* UAE_NEWCPU_H */
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