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1.1 root 1: /*
1.1.1.2 root 2: * UAE - The Un*x Amiga Emulator - CPU core
3: *
1.1 root 4: * MC68000 emulation
5: *
6: * Copyright 1995 Bernd Schmidt
1.1.1.2 root 7: *
8: * Adaptation to Hatari by Thomas Huth
9: *
1.1 root 10: */
11:
12: #ifndef UAENEWCPU
13: #define UAENEWCPU
14:
15: #include "readcpu.h"
16: #include "m68k.h"
17:
18:
19: /* custom chip support */
20: #define SPCFLAG_STOP 2
21: /*#define SPCFLAG_COPPER 4*/
22: #define SPCFLAG_INT 8
23: #define SPCFLAG_BRK 16
24: #define SPCFLAG_EXTRA_CYCLES 32
25: #define SPCFLAG_TRACE 64
26: #define SPCFLAG_DOTRACE 128
27: #define SPCFLAG_DOINT 256
28: /*#define SPCFLAG_BLTNASTY 512*/
29: #define SPCFLAG_EXEC 1024
30: #define SPCFLAG_MODE_CHANGE 8192
31:
32:
33: #ifndef SET_CFLG
34:
35: #define SET_CFLG(x) (CFLG = (x))
36: #define SET_NFLG(x) (NFLG = (x))
37: #define SET_VFLG(x) (VFLG = (x))
38: #define SET_ZFLG(x) (ZFLG = (x))
39: #define SET_XFLG(x) (XFLG = (x))
40:
41: #define GET_CFLG CFLG
42: #define GET_NFLG NFLG
43: #define GET_VFLG VFLG
44: #define GET_ZFLG ZFLG
45: #define GET_XFLG XFLG
46:
47: #define CLEAR_CZNV do { \
48: SET_CFLG (0); \
49: SET_ZFLG (0); \
50: SET_NFLG (0); \
51: SET_VFLG (0); \
52: } while (0)
53:
54: #define COPY_CARRY (SET_XFLG (GET_CFLG))
55: #endif
56:
57: extern int areg_byteinc[];
58: extern int imm8_table[];
59:
60: extern int movem_index1[256];
61: extern int movem_index2[256];
62: extern int movem_next[256];
63:
64: extern int fpp_movem_index1[256];
65: extern int fpp_movem_index2[256];
66: extern int fpp_movem_next[256];
67:
68: extern int broken_in;
69:
70: typedef unsigned long cpuop_func (uae_u32) REGPARAM;
71:
72: struct cputbl {
73: cpuop_func *handler;
74: int specific;
75: uae_u16 opcode;
76: };
77:
78: extern unsigned long op_illg (uae_u32) REGPARAM;
79:
80: typedef char flagtype;
81:
82: extern struct regstruct
83: {
84: uae_u32 regs[16];
85: uaecptr usp,isp,msp;
86: uae_u16 sr;
87: flagtype t1;
88: flagtype t0;
89: flagtype s;
90: flagtype m;
91: flagtype x;
92: flagtype stopped;
93: int intmask;
94:
95: uae_u32 pc;
96: uae_u8 *pc_p;
97: uae_u8 *pc_oldp;
98:
99: uae_u32 vbr,sfc,dfc;
100:
101: double fp[8];
102: uae_u32 fpcr,fpsr,fpiar;
103:
104: uae_u32 spcflags;
105:
106: /* Fellow sources say this is 4 longwords. That's impossible. It needs
107: * to be at least a longword. The HRM has some cryptic comment about two
108: * instructions being on the same longword boundary.
109: * The way this is implemented now seems like a good compromise.
110: */
111: uae_u32 prefetch;
112: } regs, lastint_regs;
113:
114: STATIC_INLINE void set_special (uae_u32 x)
115: {
116: regs.spcflags |= x;
117: }
118:
119: STATIC_INLINE void unset_special (uae_u32 x)
120: {
121: regs.spcflags &= ~x;
122: }
123:
124: #define m68k_dreg(r,num) ((r).regs[(num)])
125: #define m68k_areg(r,num) (((r).regs + 8)[(num)])
126:
127: #define get_ibyte(o) do_get_mem_byte((uae_u8 *)(regs.pc_p + (o) + 1))
128: #define get_iword(o) do_get_mem_word((uae_u16 *)(regs.pc_p + (o)))
129: #define get_ilong(o) do_get_mem_long((uae_u32 *)(regs.pc_p + (o)))
130:
131: STATIC_INLINE uae_u32 get_ibyte_prefetch (uae_s32 o)
132: {
133: if (o > 3 || o < 0)
134: return do_get_mem_byte((uae_u8 *)(regs.pc_p + o + 1));
135:
136: return do_get_mem_byte((uae_u8 *)(((uae_u8 *)®s.prefetch) + o + 1));
137: }
138: STATIC_INLINE uae_u32 get_iword_prefetch (uae_s32 o)
139: {
140: if (o > 3 || o < 0)
141: return do_get_mem_word((uae_u16 *)(regs.pc_p + o));
142:
143: return do_get_mem_word((uae_u16 *)(((uae_u8 *)®s.prefetch) + o));
144: }
145: STATIC_INLINE uae_u32 get_ilong_prefetch (uae_s32 o)
146: {
147: if (o > 3 || o < 0)
148: return do_get_mem_long((uae_u32 *)(regs.pc_p + o));
149: if (o == 0)
150: return do_get_mem_long(®s.prefetch);
151: return (do_get_mem_word (((uae_u16 *)®s.prefetch) + 1) << 16) | do_get_mem_word ((uae_u16 *)(regs.pc_p + 4));
152: }
153:
154: #define m68k_incpc(o) (regs.pc_p += (o))
155:
156: STATIC_INLINE void fill_prefetch_0 (void)
157: {
158: uae_u32 r;
159: #ifdef UNALIGNED_PROFITABLE
160: r = *(uae_u32 *)regs.pc_p;
161: regs.prefetch = r;
162: #else
163: r = do_get_mem_long ((uae_u32 *)regs.pc_p);
164: do_put_mem_long (®s.prefetch, r);
165: #endif
166: }
167:
168: #if 0
169: STATIC_INLINE void fill_prefetch_2 (void)
170: {
171: uae_u32 r = do_get_mem_long (®s.prefetch) << 16;
172: uae_u32 r2 = do_get_mem_word (((uae_u16 *)regs.pc_p) + 1);
173: r |= r2;
174: do_put_mem_long (®s.prefetch, r);
175: }
176: #else
177: #define fill_prefetch_2 fill_prefetch_0
178: #endif
179:
180: /* These are only used by the 68020/68881 code, and therefore don't
181: * need to handle prefetch. */
182: STATIC_INLINE uae_u32 next_ibyte (void)
183: {
184: uae_u32 r = get_ibyte (0);
185: m68k_incpc (2);
186: return r;
187: }
188:
189: STATIC_INLINE uae_u32 next_iword (void)
190: {
191: uae_u32 r = get_iword (0);
192: m68k_incpc (2);
193: return r;
194: }
195:
196: STATIC_INLINE uae_u32 next_ilong (void)
197: {
198: uae_u32 r = get_ilong (0);
199: m68k_incpc (4);
200: return r;
201: }
202:
203: #if !defined USE_COMPILER
204: STATIC_INLINE void m68k_setpc (uaecptr newpc)
205: {
206: regs.pc_p = regs.pc_oldp = (uae_u8 *)get_real_address(newpc);
207: regs.pc = newpc;
208: }
209: #else
210: extern void m68k_setpc (uaecptr newpc);
211: #endif
212:
213: STATIC_INLINE uaecptr m68k_getpc (void)
214: {
215: return regs.pc + ((char *)regs.pc_p - (char *)regs.pc_oldp);
216: }
217:
218: STATIC_INLINE uaecptr m68k_getpc_p (uae_u8 *p)
219: {
220: return regs.pc + ((char *)p - (char *)regs.pc_oldp);
221: }
222:
223: #ifdef USE_COMPILER
224: extern void m68k_setpc_fast (uaecptr newpc);
225: extern void m68k_setpc_bcc (uaecptr newpc);
226: extern void m68k_setpc_rte (uaecptr newpc);
227: #else
228: #define m68k_setpc_fast m68k_setpc
229: #define m68k_setpc_bcc m68k_setpc
230: #define m68k_setpc_rte m68k_setpc
231: #endif
232:
233: STATIC_INLINE void m68k_setstopped (int stop)
234: {
235: regs.stopped = stop;
236: if (stop)
237: regs.spcflags |= SPCFLAG_STOP;
238: }
239:
240: extern uae_u32 get_disp_ea_020 (uae_u32 base, uae_u32 dp);
241: extern uae_u32 get_disp_ea_000 (uae_u32 base, uae_u32 dp);
242:
243: extern uae_s32 ShowEA (FILE *, int reg, amodes mode, wordsizes size, char *buf);
244:
245: extern void MakeSR (void);
246: extern void MakeFromSR (void);
247: extern void Exception (int, uaecptr);
248: extern void dump_counts (void);
249: extern int m68k_move2c (int, uae_u32 *);
250: extern int m68k_movec2 (int, uae_u32 *);
251: extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
252: extern void m68k_mull (uae_u32, uae_u32, uae_u16);
253: extern void init_m68k (void);
254: extern void m68k_go (int);
255: extern void m68k_dumpstate (FILE *, uaecptr *);
256: extern void m68k_disasm (FILE *, uaecptr, uaecptr *, int);
257: extern void m68k_reset (void);
258:
259: extern void mmu_op (uae_u32, uae_u16);
260:
261: extern void fpp_opp (uae_u32, uae_u16);
262: extern void fdbcc_opp (uae_u32, uae_u16);
263: extern void fscc_opp (uae_u32, uae_u16);
264: extern void ftrapcc_opp (uae_u32,uaecptr);
265: extern void fbcc_opp (uae_u32, uaecptr, uae_u32);
266: extern void fsave_opp (uae_u32);
267: extern void frestore_opp (uae_u32);
268:
1.1.1.2 root 269: extern int lastInstructionCycles;
270:
1.1 root 271: /* Opcode of faulting instruction */
272: extern uae_u16 last_op_for_exception_3;
273: /* PC at fault time */
274: extern uaecptr last_addr_for_exception_3;
275: /* Address that generated the exception */
276: extern uaecptr last_fault_for_exception_3;
277:
278: #define CPU_OP_NAME(a) op ## a
279:
280: /* 68040 */
281: extern struct cputbl op_smalltbl_0_ff[];
282: /* 68020 + 68881 */
283: extern struct cputbl op_smalltbl_1_ff[];
284: /* 68020 */
285: extern struct cputbl op_smalltbl_2_ff[];
286: /* 68010 */
287: extern struct cputbl op_smalltbl_3_ff[];
288: /* 68000 */
289: extern struct cputbl op_smalltbl_4_ff[];
290: /* 68000 slow but compatible. */
291: extern struct cputbl op_smalltbl_5_ff[];
292:
1.1.1.2 root 293: extern cpuop_func *cpufunctbl[65536];
1.1 root 294:
295: #endif /* ifndef UAENEWCPU */
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