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1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /*
26: * Copyright (c) 1998-1999 by Apple Computer, Inc., All rights reserved.
27: *
28: * Miscellaneous definitions for the BMac Ethernet controller.
29: *
30: * HISTORY
31: *
32: */
33:
34: #import "BMacEnetRegisters.h"
35: #import "BMacEnetPrivate.h"
36:
37:
38: void WriteBigMacRegister( IOPPCAddress ioBaseEnet, u_int32_t reg_offset, u_int16_t data )
39: {
40: WriteSwap16( ioBaseEnet, reg_offset, data );
41: eieio();
42: }
43:
44:
45: volatile u_int16_t ReadBigMacRegister( IOPPCAddress ioBaseEnet, u_int32_t reg_offset )
46: {
47: return ReadSwap16( ioBaseEnet, reg_offset );
48: }
49:
50: /*
51: * Procedure for reading EEPROM
52: */
53: #define kSROMAddressLength 5
54: #define kDataInOn 0x0008
55: #define kDataInOff 0x0000
56: #define kClk 0x0002
57: #define kChipSelect 0x0001
58: #define kSDIShiftCount 3
59: #define kSD0ShiftCount 2
60: #define kDelayValue 1000 // number of microseconds
61:
62: #define kSROMStartOffset 10 // this is in words
63: #define kSROMReadCount 3 // number of words to read from SROM
64:
65: unsigned char clock_out_bit(IOPPCAddress base)
66: {
67: u_int16_t data;
68: u_int16_t val;
69:
70: WriteBigMacRegister(base, kSROMCSR, kChipSelect | kClk);
71: IODelay(kDelayValue);
72:
73: data = ReadBigMacRegister(base, kSROMCSR);
74: IODelay(kDelayValue);
75: val = (data >> kSD0ShiftCount) & 1;
76:
77: WriteBigMacRegister(base, kSROMCSR, kChipSelect);
78: IODelay(kDelayValue);
79:
80: return val;
81: }
82:
83: void clock_in_bit(IOPPCAddress base, unsigned int val)
84: {
85: u_int16_t data;
86:
87: if (val != 0 && val != 1)
88: {
89: IOLog("bogus data in clock_in_bit\n");
90: return;
91: }
92:
93: data = (val << kSDIShiftCount);
94: WriteBigMacRegister(base, kSROMCSR, data | kChipSelect );
95: IODelay(kDelayValue);
96:
97: WriteBigMacRegister(base, kSROMCSR, data | kChipSelect | kClk );
98: IODelay(kDelayValue);
99:
100: WriteBigMacRegister(base, kSROMCSR, data | kChipSelect);
101: IODelay(kDelayValue);
102: }
103:
104: void reset_and_select_srom(IOPPCAddress base)
105: {
106: /* first reset */
107: WriteBigMacRegister(base, kSROMCSR, 0);
108: IODelay(kDelayValue);
109:
110: /* send it the read command (110) */
111: clock_in_bit(base, 1);
112: clock_in_bit(base, 1);
113: clock_in_bit(base, 0);
114: }
115:
116: unsigned short read_srom(IOPPCAddress base, unsigned int addr, unsigned int addr_len)
117: {
118: unsigned short data, val;
119: int i;
120:
121: /* send out the address we want to read from */
122: for (i = 0; i < addr_len; i++) {
123: val = addr >> (addr_len-i-1);
124: clock_in_bit(base, val & 1);
125: }
126:
127: /* Now read in the 16-bit data */
128: data = 0;
129: for (i = 0; i < 16; i++) {
130: val = clock_out_bit(base);
131: data <<= 1;
132: data |= val;
133: }
134: WriteBigMacRegister(base, kSROMCSR, 0);
135:
136: return data;
137: }
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