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1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /*
26: * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
27: * All Rights Reserved
28: *
29: * Permission to use, copy, modify, and distribute this software and
30: * its documentation for any purpose and without fee is hereby granted,
31: * provided that the above copyright notice appears in all copies and
32: * that both the copyright notice and this permission notice appear in
33: * supporting documentation.
34: *
35: * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
36: * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
37: * FOR A PARTICULAR PURPOSE.
38: *
39: * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
40: * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
41: * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
42: * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
43: * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
44: *
45: */
46: /*
47: * Copyright 1996 1995 by Apple Computer, Inc. 1997 1996 1995 1994 1993 1992 1991
48: * All Rights Reserved
49: *
50: * Permission to use, copy, modify, and distribute this software and
51: * its documentation for any purpose and without fee is hereby granted,
52: * provided that the above copyright notice appears in all copies and
53: * that both the copyright notice and this permission notice appear in
54: * supporting documentation.
55: *
56: * APPLE COMPUTER DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
57: * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
58: * FOR A PARTICULAR PURPOSE.
59: *
60: * IN NO EVENT SHALL APPLE COMPUTER BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
61: * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
62: * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
63: * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
64: * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
65: */
66: /*
67: * MKLINUX-1.0DR2
68: */
69: #include "via6522.h"
70:
71: typedef struct VIARegisterAddress VIARegisterAddress;
72:
73: struct VIARegisterAddress
74: {
75: volatile unsigned char* dataB;
76: volatile unsigned char* handshakeDataA;
77: volatile unsigned char* dataDirectionB;
78: volatile unsigned char* dataDirectionA;
79: volatile unsigned char* timer1CounterLow;
80: volatile unsigned char* timer1CounterHigh;
81: volatile unsigned char* timer1LatchLow;
82: volatile unsigned char* timer1LatchHigh;
83: volatile unsigned char* timer2CounterLow;
84: volatile unsigned char* timer2CounterHigh;
85: volatile unsigned char* shift;
86: volatile unsigned char* auxillaryControl;
87: volatile unsigned char* peripheralControl;
88: volatile unsigned char* interruptFlag;
89: volatile unsigned char* interruptEnable;
90: volatile unsigned char* dataA;
91: };
92:
93:
94:
95: // Cuda to VIA signal definition. They are all active low.
96:
97: enum
98: {
99: kCudaTransferRequestMask = EVRB_XCVR, // TREQ (input)
100: kCudaNegateTransferRequest = EVRB_XCVR, // TREQ
101: kCudaAssertTransferRequest = ~EVRB_XCVR, // /TREQ
102:
103: kCudaByteAcknowledgeMask = EVRB_FULL, // ByteAck (output)
104: kCudaNegateByteAcknowledge = EVRB_FULL, // ByteAck
105: kCudaAssertByteAcknowledge = ~EVRB_FULL, // /ByteAck
106:
107: kCudaTransferInProgressMask = EVRB_SYSES, // TIP (output)
108: kCudaNegateTransferInProgress = EVRB_SYSES, // TIP
109: kCudaAssertTransferInProgress = ~EVRB_SYSES, // /TIP
110:
111: kCudaTransferMode = VAC_SRMD3, //
112:
113: kCudaDirectionMask = VAC_SRMD4, //
114: kCudaSystemSend = VAC_SRMD4, //
115: kCudaSystemRecieve = ~VAC_SRMD4, //
116:
117: kCudaInterruptMask = VIE_SR,
118: kCudaInterruptDisable = VIE_CLEAR | VIE_SR,
119: kCudaInterruptEnable = VIE_SET | VIE_SR
120: };
121:
122: // The bits from Cuda that determines the cause of an interrupt
123:
124: enum
125: {
126: kCudaInterruptStateMask = kCudaTransferInProgressMask |
127: kCudaTransferRequestMask
128: };
129:
130: // Interrupt states. Determined by kTransferRequest, kTransferInProgress and
131: // kCudaDirection. The names are from the view of the system.
132:
133: enum
134: {
135: kCudaReceiveByte = 0, // 0x00
136: kCudaReceiveLastByte = kCudaNegateTransferRequest, // 0x08
137: kCudaCollision = kCudaSystemSend, // 0x10
138: kCudaTransmitByte = kCudaSystemSend |
139: kCudaNegateTransferRequest, // 0x18
140: kCudaUnexpectedAttention = kCudaNegateTransferInProgress,// 0x20
141: kCudaIdleState = kCudaNegateTransferInProgress |
142: kCudaNegateTransferRequest, // 0x28
143: kCudaExpectedAttention = kCudaSystemSend |
144: kCudaNegateTransferInProgress,// 0x30
145: kCudaIllegalState = kCudaSystemSend |
146: kCudaNegateTransferInProgress |
147: kCudaNegateTransferRequest // 0x38
148: };
149:
150: enum
151: {
152: kCudaSRQAssertMask = 0x01, // inactive device asserted SRQ
153: kCudaTimeOutMask = 0x02, // active device did not have data available
154: kCudaSRQErrorMask = 0x04, // device asserted excessive SRQ period
155: kCudaBusErrorMask = 0x08, // timing error in bit cell was detected
156: kCudaAutoPollMask = 0x40, // data is from an AutoPoll
157: kCudaResponseMask = 0x80 // response Packet in progress
158: };
159:
160: #define cuda_write_data(theByte) {*cuda_via_regs.shift = theByte; eieio(); }
161: #define cuda_set_data_direction_to_input() {*cuda_via_regs.auxillaryControl &= kCudaSystemRecieve; eieio(); }
162: #define cuda_set_data_direction_to_output() {*cuda_via_regs.auxillaryControl |= kCudaSystemSend; eieio(); }
163: #define cuda_assert_transfer_in_progress() {*cuda_via_regs.dataB &= kCudaAssertTransferInProgress; eieio(); }
164: #define cuda_neg_transfer_in_progress() {*cuda_via_regs.dataB |= kCudaNegateTransferInProgress; eieio(); }
165: #define cuda_neg_tip_and_byteack() {*cuda_via_regs.dataB |= kCudaNegateByteAcknowledge | kCudaNegateTransferInProgress; eieio(); }
166: #define cuda_toggle_byte_ack() {*cuda_via_regs.dataB ^= kCudaByteAcknowledgeMask; eieio(); }
167: #define cuda_assert_byte_ack() {*cuda_via_regs.dataB &= kCudaAssertByteAcknowledge; eieio(); }
168: #define cuda_neg_byte_ack() {*cuda_via_regs.dataB |= kCudaNegateByteAcknowledge; eieio(); }
169: #define cuda_is_transfer_in_progress() ((*cuda_via_regs.dataB & kCudaTransferRequestMask) == 0 )
170: #define cuda_disable_interrupt() {*cuda_via_regs.interruptEnable = kCudaInterruptDisable; eieio(); }
171: #define cuda_enable_interrupt() {*cuda_via_regs.interruptEnable = kCudaInterruptEnable; eieio(); }
172: #define cuda_get_interrupt_state() (*cuda_via_regs.dataB & kCudaInterruptStateMask) | \
173: (*cuda_via_regs.auxillaryControl & kCudaDirectionMask)
174: #define cuda_wait_for_transfer_request_assert() while ( (*cuda_via_regs.dataB & kCudaTransferRequestMask) != 0 ) { eieio(); } ; eieio()
175: #define cuda_wait_for_transfer_request_neg() while ( (*cuda_via_regs.dataB & kCudaTransferRequestMask) == 0 ) { eieio(); } ; eieio()
176: #define cuda_wait_for_interrupt() while ( (*cuda_via_regs.interruptFlag & kCudaInterruptMask) == 0 ) { eieio(); } ; eieio()
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