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1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: #ifndef _MACH_PPC_THREAD_STATUS_H_
26: #define _MACH_PPC_THREAD_STATUS_H_
27:
28: /*
29: * ppc_thread_state is the structure that is exported to user threads for
30: * use in status/mutate calls. This structure should never change.
31: *
32: */
33:
34: #define PPC_THREAD_STATE 1
35: #define PPC_FLOAT_STATE 2
36: #define PPC_EXCEPTION_STATE 3
37: #define THREAD_STATE_NONE 7
38:
39: struct ppc_thread_state {
40: unsigned int srr0; /* Instruction address register (PC) */
41: unsigned int srr1; /* Machine state register (supervisor) */
42: /* srr1 may contain SRR_SYSCALL_VAL */
43: unsigned int r0;
44: unsigned int r1;
45: unsigned int r2;
46: unsigned int r3;
47: unsigned int r4;
48: unsigned int r5;
49: unsigned int r6;
50: unsigned int r7;
51: unsigned int r8;
52: unsigned int r9;
53: unsigned int r10;
54: unsigned int r11;
55: unsigned int r12;
56: unsigned int r13;
57: unsigned int r14;
58: unsigned int r15;
59: unsigned int r16;
60: unsigned int r17;
61: unsigned int r18;
62: unsigned int r19;
63: unsigned int r20;
64: unsigned int r21;
65: unsigned int r22;
66: unsigned int r23;
67: unsigned int r24;
68: unsigned int r25;
69: unsigned int r26;
70: unsigned int r27;
71: unsigned int r28;
72: unsigned int r29;
73: unsigned int r30;
74: unsigned int r31;
75:
76: unsigned int cr; /* Condition register */
77: unsigned int xer; /* User's integer exception register */
78: unsigned int lr; /* Link register */
79: unsigned int ctr; /* Count register */
80: unsigned int mq; /* MQ register (601 only) */
81:
82: unsigned int pad; /* structure TODO - check these! */
83: };
84:
85: typedef struct ppc_thread_state ppc_thread_state_t;
86:
87: /* This structure should be double-word aligned for performance */
88:
89: struct ppc_float_state {
90: double fpregs[32];
91:
92: unsigned int fpscr_pad; /* fpscr is 64 bits, 32 bits of rubbish */
93: unsigned int fpscr; /* floating point status register */
94: };
95:
96: typedef struct ppc_float_state ppc_float_state_t;
97:
98: /*
99: * saved state structure
100: *
101: * This structure corresponds to the state of the user registers as saved
102: * on the stack upon kernel entry (saved in pcb). On interrupts and exceptions
103: * we save all registers. On system calls we only save the registers not
104: * saved by the caller.
105: *
106: */
107:
108: struct ppc_saved_state {
109: unsigned int srr0; /* Instruction address register (PC) */
110: unsigned int srr1; /* Machine state register (supervisor) */
111: /* srr1 may contain SRR_SYSCALL_VAL */
112: unsigned int r0;
113: unsigned int r1;
114: unsigned int r2;
115: unsigned int r3;
116: unsigned int r4;
117: unsigned int r5;
118: unsigned int r6;
119: unsigned int r7;
120: unsigned int r8;
121: unsigned int r9;
122: unsigned int r10;
123: unsigned int r11;
124: unsigned int r12;
125: unsigned int r13;
126: unsigned int r14;
127: unsigned int r15;
128: unsigned int r16;
129: unsigned int r17;
130: unsigned int r18;
131: unsigned int r19;
132: unsigned int r20;
133: unsigned int r21;
134: unsigned int r22;
135: unsigned int r23;
136: unsigned int r24;
137: unsigned int r25;
138: unsigned int r26;
139: unsigned int r27;
140: unsigned int r28;
141: unsigned int r29;
142: unsigned int r30;
143: unsigned int r31;
144:
145: unsigned int cr; /* Condition register */
146: unsigned int xer; /* User's integer exception register */
147: unsigned int lr; /* Link register */
148: unsigned int ctr; /* Count register */
149: unsigned int mq; /* MQ register (601 only) */
150: unsigned int pad; /* To mirror pcb_thread_state in pcb*/
151:
152: unsigned int sr_copyin; /* SR_COPYIN is used for remapping */
153: unsigned int pad2;
154: unsigned int pad3;
155: unsigned int pad4;
156: };
157:
158: typedef struct ppc_saved_state ppc_saved_state_t;
159:
160: /*
161: * ppc_exception_state
162: *
163: * This structure corresponds to some additional state of the user
164: * registers as saved in the PCB upon kernel entry. They are only
165: * available if an exception is passed out of the kernel, and even
166: * then not all are guaranteed to be updated.
167: *
168: * Some padding is included in this structure which allows space for
169: * servers to store temporary values if need be, to maintain binary
170: * compatiblity.
171: */
172:
173: struct ppc_exception_state {
174: unsigned long dar; /* Fault registers for coredump */
175: unsigned long dsisr;
176: unsigned long exception;/* number of powerpc exception taken */
177: unsigned long pad0; /* align to 16 bytes */
178:
179: unsigned long pad1[4]; /* space in PCB "just in case" */
180: };
181:
182: typedef struct ppc_exception_state ppc_exception_state_t;
183:
184: /*
185: * Save State Flags
186: */
187:
188: #define PPC_THREAD_STATE_COUNT \
189: (sizeof(struct ppc_thread_state) / sizeof(int))
190:
191: #define PPC_EXCEPTION_STATE_COUNT \
192: (sizeof(struct ppc_exception_state) / sizeof(int))
193:
194: #define PPC_FLOAT_STATE_COUNT \
195: (sizeof(struct ppc_float_state) / sizeof(int))
196:
197: /*
198: * Machine-independent way for servers and Mach's exception mechanism to
199: * choose the most efficient state flavor for exception RPC's:
200: */
201: #define MACHINE_THREAD_STATE PPC_THREAD_STATE
202: #define MACHINE_THREAD_STATE_COUNT PPC_THREAD_STATE_COUNT
203:
204: /*
205: * Largest state on this machine:
206: */
207: #define THREAD_MACHINE_STATE_MAX PPC_THREAD_STATE_COUNT
208:
209:
210: #define PPC_THREAD_STATE_FLAVOR_COUNT 3
211:
212: #define PPC_THREAD_STATE_FLAVOR_LIST_COUNT \
213: ( PPC_THREAD_STATE_FLAVOR_COUNT * \
214: (sizeof (struct thread_state_flavor) / sizeof(int)))
215:
216: #endif /* _MACH_PPC_THREAD_STATUS_H_ */
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