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1.1 ! root 1: /* ! 2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved. ! 3: * ! 4: * @APPLE_LICENSE_HEADER_START@ ! 5: * ! 6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights ! 7: * Reserved. This file contains Original Code and/or Modifications of ! 8: * Original Code as defined in and that are subject to the Apple Public ! 9: * Source License Version 1.1 (the "License"). You may not use this file ! 10: * except in compliance with the License. Please obtain a copy of the ! 11: * License at http://www.apple.com/publicsource and read it before using ! 12: * this file. ! 13: * ! 14: * The Original Code and all software distributed under the License are ! 15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER ! 16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES, ! 17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY, ! 18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the ! 19: * License for the specific language governing rights and limitations ! 20: * under the License. ! 21: * ! 22: * @APPLE_LICENSE_HEADER_END@ ! 23: */ ! 24: ! 25: /* ! 26: * Copyright (c) 1992 NeXT Computer, Inc. ! 27: * ! 28: * dma_internal.h -- DMA controller module internal definitions. ! 29: * ! 30: * HISTORY ! 31: * ! 32: * 13 July 1992 ? at NeXT ! 33: * Created. ! 34: */ ! 35: ! 36: #import <architecture/i386/io.h> ! 37: ! 38: #import <machdep/i386/dma.h> ! 39: ! 40: #define DMA_NCHAN 8 // A fundamental constant ! 41: #define DMA_NCHIPS 2 ! 42: #define DMA_CASCADE_CHAN 4 // Channel is not usable for transfers ! 43: ! 44: struct _dma_chan_port { ! 45: io_addr_t addr; ! 46: io_addr_t page; ! 47: io_addr_t hipage; ! 48: io_addr_t count; ! 49: io_addr_t hicount; ! 50: }; ! 51: ! 52: #define DMA_CHAN_PORT(chan, which) \ ! 53: ( _dma_chan_port[(chan)].which ) ! 54: ! 55: struct _dma_chip_port { ! 56: io_addr_t cmd_status; ! 57: io_addr_t req; ! 58: io_addr_t mask; ! 59: io_addr_t mode; ! 60: io_addr_t clear_ff; ! 61: io_addr_t master_reset; ! 62: io_addr_t extend_mode; ! 63: }; ! 64: ! 65: #define DMA_CHIP_PORT(chan, which) \ ! 66: ( ((chan) <= 3)? _dma_chip_port[0].which : _dma_chip_port[1].which ) ! 67: ! 68: ! 69: #define DMA_CHAN_IS_ASSIGNED(chan) \ ! 70: ( (boolean_t) ((dma_assigned_bits & (1 << (chan))) != 0) ) ! 71: ! 72: struct dma_write_regs { ! 73: /* dma_cmd_reg_t cmd; */ ! 74: dma_mode_reg_t mode; ! 75: dma_extend_mode_reg_t extend_mode; ! 76: }; ! 77: ! 78: void dma_buf_initialize( ! 79: void); ! 80: ! 81: extern struct _dma_chan_port _dma_chan_port[]; ! 82: extern struct _dma_chip_port _dma_chip_port[]; ! 83: extern unsigned char dma_assigned_bits; ! 84: extern struct dma_write_regs dma_write_regs[]; ! 85:
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