![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to intr_inline.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Apple Darwin 0.x] / kernel / machdep / i386|
Return to intr_inline.h CVS log | Up to [Apple Darwin 0.x] / kernel / machdep / i386 |
1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /*
26: * Copyright (c) 1992 NeXT Computer, Inc.
27: *
28: * Inlines for interrupt chip access.
29: *
30: * HISTORY
31: *
32: * 25 June 1992 ? at NeXT
33: * Created.
34: */
35:
36: #import <machdep/i386/intr.h>
37: #import <machdep/i386/io_inline.h>
38:
39: typedef union {
40: intr_icw1_t icw1;
41: intr_icw2_t icw2;
42: intr_icw3m_t icw3m;
43: intr_icw3s_t icw3s;
44: intr_icw4_t icw4;
45: intr_ocw1_t ocw1;
46: intr_ocw2_t ocw2;
47: intr_ocw3_t ocw3;
48: unsigned char iodata;
49: } cw_conv_t;
50:
51: static
52: initialize_master(
53: intr_icw1_t icw1,
54: intr_icw2_t icw2,
55: intr_icw3m_t icw3,
56: intr_icw4_t icw4
57: )
58: {
59: cw_conv_t tconv;
60:
61: tconv.icw1 = icw1;
62: outb(INTR_PRIMARY_PORT, tconv.iodata);
63:
64: tconv.icw2 = icw2;
65: outb(INTR_SECONDARY_PORT, tconv.iodata);
66:
67: if (!icw1.no_slaves) {
68: tconv.icw3m = icw3;
69: outb(INTR_SECONDARY_PORT, tconv.iodata);
70: }
71:
72: if (icw1.ic4) {
73: tconv.icw4 = icw4;
74: outb(INTR_SECONDARY_PORT, tconv.iodata);
75: }
76:
77: // Set up status register to read ISR instead of IRR.
78: tconv.iodata = 0;
79: tconv.ocw3.read_reg = INTR_OCW3_READ_ISR;
80: tconv.ocw3.set_to_one = 1;
81: tconv.ocw3.smm = INTR_OCW3_RESET_SMM;
82: outb(INTR_PRIMARY_PORT, tconv.iodata);
83: }
84:
85: static
86: initialize_slave(
87: intr_icw1_t icw1,
88: intr_icw2_t icw2,
89: intr_icw3s_t icw3,
90: intr_icw4_t icw4
91: )
92: {
93: cw_conv_t tconv;
94:
95: tconv.icw1 = icw1;
96: outb(INTR2_PRIMARY_PORT, tconv.iodata);
97:
98: tconv.icw2 = icw2;
99: outb(INTR2_SECONDARY_PORT, tconv.iodata);
100:
101: if (!icw1.no_slaves) {
102: tconv.icw3s = icw3;
103: outb(INTR2_SECONDARY_PORT, tconv.iodata);
104: }
105:
106: if (icw1.ic4) {
107: tconv.icw4 = icw4;
108: outb(INTR2_SECONDARY_PORT, tconv.iodata);
109: }
110:
111: // Set up status register to read ISR instead of IRR.
112: tconv.iodata = 0;
113: tconv.ocw3.read_reg = INTR_OCW3_READ_ISR;
114: tconv.ocw3.set_to_one = 1;
115: tconv.ocw3.smm = INTR_OCW3_RESET_SMM;
116: outb(INTR2_PRIMARY_PORT, tconv.iodata);
117: }
118:
119: static inline
120: void
121: send_eoi_command(
122: intr_ocw2_t ocw2
123: )
124: {
125: cw_conv_t tconv;
126:
127: tconv.ocw2 = ocw2;
128:
129: outb(INTR_PRIMARY_PORT, tconv.iodata);
130: outb(INTR2_PRIMARY_PORT, tconv.iodata);
131: }
132:
133: static inline
134: void
135: set_master_mask(
136: intr_ocw1_t ocw1
137: )
138: {
139: outb(INTR_SECONDARY_PORT, ocw1.mask);
140: }
141:
142: static inline
143: void
144: set_slave_mask(
145: intr_ocw1_t ocw1
146: )
147: {
148: outb(INTR2_SECONDARY_PORT, ocw1.mask);
149: }
150:
151: static inline
152: void
153: set_master_elcr(
154: intr_elcr_t elcr
155: )
156: {
157: outb(INTR_ELCR_PORT, elcr.mask);
158: }
159:
160: static inline
161: void
162: set_slave_elcr(
163: intr_elcr_t elcr
164: )
165: {
166: outb(INTR2_ELCR_PORT, elcr.mask);
167: }
168:
169: static inline
170: unsigned char
171: get_master_isr(
172: void
173: )
174: {
175: return inb(INTR_PRIMARY_PORT);
176: }
177:
178: static inline
179: unsigned char
180: get_slave_isr(
181: void
182: )
183: {
184: return inb(INTR2_PRIMARY_PORT);
185: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.