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1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /*
26: * Copyright (c) 1992 NeXT Computer, Inc.
27: *
28: * Intel386 Family: Machine dependent thread state.
29: *
30: * HISTORY
31: *
32: * 30 September 1992 ? at NeXT
33: * Moved tss out of pcb.
34: *
35: * 6 April 1992 ? at NeXT
36: * Created.
37: */
38:
39: #ifndef _MACHDEP_I386_PCB_H_
40: #define _MACHDEP_I386_PCB_H_
41:
42: #import <kern/kernel_stack.h>
43:
44: #import <architecture/i386/frame.h>
45: #import <architecture/i386/fpu.h>
46:
47: #import <machdep/i386/seg.h>
48: #import <machdep/i386/regs.h>
49:
50: /*
51: * Context information which is common
52: * to all threads in a task. Each
53: * thread has its own copy of this
54: * information.
55: */
56: typedef struct pcb_common {
57: vm_offset_t ldt; /* a LINEAR address */
58: vm_size_t ldt_size;
59: struct {
60: vm_offset_t base;
61: vm_size_t length;
62: } io_bmap;
63: lock_data_t lock;
64: } pcb_common_t;
65:
66: /*
67: * Storage definition for a threads
68: * hardware task state segment.
69: * Threads which need an IO space
70: * bitmap for access to device
71: * registers from user mode need
72: * an externally allocated TSS.
73: */
74: typedef union {
75: tss_t internal;
76: struct tss_alloc {
77: vm_offset_t base;
78: vm_size_t length;
79: } external;
80: } pcb_tss_t;
81:
82: /*
83: * Thread state is saved in
84: * this format whenever an
85: * interrupt/trap/system call
86: * occurs.
87: */
88: typedef struct thread_saved_state {
89: regs_t regs;
90: unsigned int trapno;
91: except_frame_t frame;
92: } thread_saved_state_t;
93:
94: /*
95: * A thread uses a private save
96: * area as its kernel stack while
97: * executing in user mode. After
98: * the user state is saved, it
99: * switches to the active kernel
100: * stack. The save area must be
101: * large enough to hold the entire
102: * user state, plus enough for a
103: * kernel mode interrupt in case
104: * one occurs before the stack is
105: * switched. In addition, if a
106: * call gate gets invoked with
107: * the TF (single step) flag set,
108: * the debug trap gets taken from
109: * kernel mode after the call
110: * frame gets saved but before the
111: * first instruction of the call
112: * gate handler gets executed. Thus,
113: * an extra exception frame is needed
114: * for the worst case.
115: */
116: typedef struct thread_save_area {
117: except_frame_t sa_x;
118: thread_saved_state_t sa_k;
119: thread_saved_state_t sa_u;
120: } thread_save_area_t;
121:
122: /*
123: * Per-thread machine dependent
124: * context information.
125: */
126: typedef struct pcb {
127: /*
128: * i386 Hardware Task State.
129: */
130: tss_t * tss;
131: vm_size_t tss_size;
132: pcb_tss_t tss_store;
133:
134: /*
135: * The private area for saved user
136: * state is external to the pcb,
137: * and is created lazily. This
138: * avoids wasting the space for
139: * kernel mode-only threads.
140: */
141: thread_save_area_t *save_area;
142:
143: /*
144: * Most threads use a common, static
145: * LDT. Some threads have their own,
146: * which resides in the task virtual
147: * address space.
148: */
149: vm_offset_t ldt; /* a LINEAR address */
150: vm_size_t ldt_size;
151:
152: /*
153: * Floating point state is
154: * identical to the format
155: * written by the FSAVE instruction.
156: */
157: fp_state_t fpstate;
158:
159: /*
160: * cthreads 'self' id
161: */
162: unsigned int cthread_self;
163:
164: /*
165: * Private data structure for
166: * PC support.
167: */
168: struct PCprivate *PCpriv;
169:
170: /*
171: * Boolean flags.
172: */
173: unsigned int
174: /* boolean_t */ trace :1,
175: fpvalid :1,
176: extern_tss :1,
177: :0;
178: } *pcb_t;
179:
180: #define current_stack_pointer() (stack_pointers[cpu_number()])
181:
182: #define USER_REGS(thread) \
183: ((thread)->pcb->save_area ? \
184: (&(thread)->pcb->save_area->sa_u) : \
185: (void *)(thread_user_state(thread)))
186:
187: #endif /* _MACHDEP_I386_PCB_H_ */
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