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1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /*
26: * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
27: * All Rights Reserved
28: *
29: * Permission to use, copy, modify, and distribute this software and
30: * its documentation for any purpose and without fee is hereby granted,
31: * provided that the above copyright notice appears in all copies and
32: * that both the copyright notice and this permission notice appear in
33: * supporting documentation.
34: *
35: * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
36: * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
37: * FOR A PARTICULAR PURPOSE.
38: *
39: * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
40: * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
41: * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
42: * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
43: * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
44: *
45: */
46: /*
47: * MKLINUX-1.0DR2
48: */
49:
50: #import <mach/mach_types.h>
51: #import <ppc/powermac.h>
52: #import <ppc/proc_reg.h>
53: #import "dbdma.h"
54: #import <sys/param.h>
55:
56: #define PG_SIZE NBPG
57: static unsigned long dbdma_area[(PG_SIZE + 16)/sizeof(long)];
58:
59: //#define KVTOPHYS kvtophys
60:
61: static __inline__ vm_offset_t
62: KVTOPHYS(vm_offset_t v)
63: {
64: return (v);
65: }
66:
67: static int dbdma_alloc_index = 0;
68: dbdma_command_t *dbdma_alloc_commands = 0;
69:
70: void
71: dbdma_start(int channel, dbdma_command_t *commands)
72: {
73: unsigned long addr = KVTOPHYS((vm_offset_t) commands);
74: volatile dbdma_regmap_t *dmap = DBDMA_REGMAP(channel);
75:
76: eieio();
77: if (addr & 0xf)
78: panic("dbdma_start command structure not 16-byte aligned");
79:
80: dmap->d_intselect = 0xff; /* Endian magic - clear out interrupts */
81: eieio();
82:
83: DBDMA_ST4_ENDIAN(&dmap->d_control,
84: DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_ACTIVE
85: | DBDMA_CNTRL_DEAD
86: | DBDMA_CNTRL_WAKE
87: | DBDMA_CNTRL_FLUSH
88: | DBDMA_CNTRL_PAUSE
89: | DBDMA_CNTRL_RUN)); eieio();
90:
91: while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
92: eieio();
93:
94: dmap->d_cmdptrhi = 0; eieio();/* 64-bit not yet */
95: DBDMA_ST4_ENDIAN(&dmap->d_cmdptrlo, addr); eieio();
96:
97: DBDMA_ST4_ENDIAN(&dmap->d_control,
98: DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN | DBDMA_CNTRL_WAKE));
99: eieio();
100:
101: }
102:
103: void
104: dbdma_stop(int channel)
105: {
106: volatile dbdma_regmap_t *dmap = DBDMA_REGMAP(channel);
107:
108: eieio();
109: DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_RUN) |
110: DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH)); eieio();
111:
112: while (DBDMA_LD4_ENDIAN(&dmap->d_status) & (DBDMA_CNTRL_ACTIVE|DBDMA_CNTRL_FLUSH))
113: eieio();
114: }
115:
116: void
117: dbdma_flush(int channel)
118: {
119: volatile dbdma_regmap_t *dmap = DBDMA_REGMAP(channel);
120:
121:
122: eieio();
123: DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_FLUSH));
124: eieio();
125:
126: while (DBDMA_LD4_ENDIAN(&dmap->d_status) & (DBDMA_CNTRL_FLUSH))
127: eieio();
128: }
129:
130:
131: void
132: dbdma_reset(int channel)
133: {
134: volatile dbdma_regmap_t *dmap = DBDMA_REGMAP(channel);
135:
136:
137: eieio();
138: DBDMA_ST4_ENDIAN(&dmap->d_control,
139: DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_ACTIVE
140: | DBDMA_CNTRL_DEAD
141: | DBDMA_CNTRL_WAKE
142: | DBDMA_CNTRL_FLUSH
143: | DBDMA_CNTRL_PAUSE
144: | DBDMA_CNTRL_RUN)); eieio();
145:
146: while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_RUN)
147: eieio();
148: }
149:
150: void
151: dbdma_continue(int channel)
152: {
153: volatile dbdma_regmap_t *dmap = DBDMA_REGMAP(channel);
154:
155: eieio();
156: DBDMA_ST4_ENDIAN(&dmap->d_control, DBDMA_SET_CNTRL(DBDMA_CNTRL_RUN|DBDMA_CNTRL_WAKE) | DBDMA_CLEAR_CNTRL(DBDMA_CNTRL_PAUSE|DBDMA_CNTRL_DEAD));
157: eieio();
158: }
159:
160: void
161: dbdma_pause(int channel)
162: {
163: volatile dbdma_regmap_t *dmap = DBDMA_REGMAP(channel);
164:
165: eieio();
166: DBDMA_ST4_ENDIAN(&dmap->d_control,DBDMA_SET_CNTRL(DBDMA_CNTRL_PAUSE));
167: eieio();
168:
169: while (DBDMA_LD4_ENDIAN(&dmap->d_status) & DBDMA_CNTRL_ACTIVE)
170: eieio();
171: }
172:
173: dbdma_command_t *
174: dbdma_alloc(int count)
175: {
176: dbdma_command_t *dbdmap;
177:
178: #define ALIGN_MASK 0xfffffff0UL
179:
180: #if 0
181: if (dbdma_alloc_index == 0)
182: dbdma_alloc_commands = (dbdma_command_t *) io_map(0, PAGE_SIZE);
183: #endif
184: if (dbdma_alloc_index == 0) {
185: dbdma_alloc_commands = (dbdma_command_t *)
186: ((unsigned long)(dbdma_area + 15) & ALIGN_MASK);
187: }
188:
189: if ((dbdma_alloc_index+count) >= PG_SIZE / sizeof(dbdma_command_t))
190: panic("Too many dbdma command structures!");
191:
192: dbdmap = &dbdma_alloc_commands[dbdma_alloc_index];
193: dbdma_alloc_index += count;
194: return dbdmap;
195: }
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