![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to dbdma.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Apple Darwin 0.x] / kernel / machdep / ppc|
Return to dbdma.h CVS log | Up to [Apple Darwin 0.x] / kernel / machdep / ppc |
1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /*
26: * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
27: * All Rights Reserved
28: *
29: * Permission to use, copy, modify, and distribute this software and
30: * its documentation for any purpose and without fee is hereby granted,
31: * provided that the above copyright notice appears in all copies and
32: * that both the copyright notice and this permission notice appear in
33: * supporting documentation.
34: *
35: * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
36: * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
37: * FOR A PARTICULAR PURPOSE.
38: *
39: * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
40: * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
41: * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
42: * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
43: * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
44: *
45: */
46: /*
47: * MKLINUX-1.0DR2
48: */
49:
50: #ifndef _POWERMAC_DBDMA_H_
51: #define _POWERMAC_DBDMA_H_
52:
53: #define DBDMA_CMD_OUT_MORE 0
54: #define DBDMA_CMD_OUT_LAST 1
55: #define DBDMA_CMD_IN_MORE 2
56: #define DBDMA_CMD_IN_LAST 3
57: #define DBDMA_CMD_STORE_QUAD 4
58: #define DBDMA_CMD_LOAD_QUAD 5
59: #define DBDMA_CMD_NOP 6
60: #define DBDMA_CMD_STOP 7
61:
62: /* Keys */
63:
64: #define DBDMA_KEY_STREAM0 0
65: #define DBDMA_KEY_STREAM1 1
66: #define DBDMA_KEY_STREAM2 2
67: #define DBDMA_KEY_STREAM3 3
68:
69: /* value 4 is reserved */
70: #define DBDMA_KEY_REGS 5
71: #define DBDMA_KEY_SYSTEM 6
72: #define DBDMA_KEY_DEVICE 7
73:
74: #define DBDMA_INT_NEVER 0
75: #define DBDMA_INT_IF_TRUE 1
76: #define DBDMA_INT_IF_FALSE 2
77: #define DBDMA_INT_ALWAYS 3
78:
79: #define DBDMA_BRANCH_NEVER 0
80: #define DBDMA_BRANCH_IF_TRUE 1
81: #define DBDMA_BRANCH_IF_FALSE 2
82: #define DBDMA_BRANCH_ALWAYS 3
83:
84: #define DBDMA_WAIT_NEVER 0
85: #define DBDMA_WAIT_IF_TRUE 1
86: #define DBDMA_WAIT_IF_FALSE 2
87: #define DBDMA_WAIT_ALWAYS 3
88:
89:
90: /* DBDMA Channels Macros */
91:
92: #define DBDMA_CURIO_SCSI (powermac_dbdma_channels->dbdma_channel_curio)
93: #define DBDMA_MESH_SCSI (powermac_dbdma_channels->dbdma_channel_mesh)
94: #define DBDMA_FLOPPY (powermac_dbdma_channels->dbdma_channel_floppy)
95: #define DBDMA_ETHERNET_TX (powermac_dbdma_channels->dbdma_channel_ethernet_tx)
96: #define DBDMA_ETHERNET_RV (powermac_dbdma_channels->dbdma_channel_ethernet_rx)
97: #define DBDMA_SCC_XMIT_A (powermac_dbdma_channels->dbdma_channel_scc_xmit_a)
98: #define DBDMA_SCC_RECV_A (powermac_dbdma_channels->dbdma_channel_scc_recv_a)
99: #define DBDMA_SCC_XMIT_B (powermac_dbdma_channels->dbdma_channel_scc_xmit_b)
100: #define DBDMA_SCC_RECV_B (powermac_dbdma_channels->dbdma_channel_scc_recv_b)
101: #define DBDMA_AUDIO_OUT (powermac_dbdma_channels->dbdma_channel_audio_out)
102: #define DBDMA_AUDIO_IN (powermac_dbdma_channels->dbdma_channel_audio_in)
103: #define DBDMA_IDE0 (powermac_dbdma_channels->dbdma_channel_ide0)
104: #define DBDMA_IDE1 (powermac_dbdma_channels->dbdma_channel_ide1)
105:
106: /* Control register values (in little endian) */
107:
108: #define DBDMA_STATUS_MASK 0x000000ff /* Status Mask */
109: #define DBDMA_CNTRL_BRANCH 0x00000100
110: /* 0x200 reserved */
111: #define DBDMA_CNTRL_ACTIVE 0x00000400
112: #define DBDMA_CNTRL_DEAD 0x00000800
113: #define DBDMA_CNTRL_WAKE 0x00001000
114: #define DBDMA_CNTRL_FLUSH 0x00002000
115: #define DBDMA_CNTRL_PAUSE 0x00004000
116: #define DBDMA_CNTRL_RUN 0x00008000
117:
118: #define DBDMA_SET_CNTRL(x) ( ((x) | (x) << 16) )
119: #define DBDMA_CLEAR_CNTRL(x) ( (x) << 16)
120:
121:
122: #define DBDMA_REGMAP(channel) \
123: (dbdma_regmap_t *)((v_u_char *) POWERMAC_IO(PCI_DMA_BASE_PHYS) \
124: + (channel << 8))
125:
126:
127: /* powermac_dbdma_channels hold the physical channel numbers for
128: * each dbdma device
129: */
130:
131: typedef struct powermac_dbdma_channels {
132: int dbdma_channel_curio;
133: int dbdma_channel_mesh;
134: int dbdma_channel_floppy;
135: int dbdma_channel_ethernet_tx;
136: int dbdma_channel_ethernet_rx;
137: int dbdma_channel_scc_xmit_a;
138: int dbdma_channel_scc_recv_a;
139: int dbdma_channel_scc_xmit_b;
140: int dbdma_channel_scc_recv_b;
141: int dbdma_channel_audio_out;
142: int dbdma_channel_audio_in;
143: int dbdma_channel_ide0;
144: int dbdma_channel_ide1;
145: } powermac_dbdma_channels_t;
146:
147: extern powermac_dbdma_channels_t *powermac_dbdma_channels;
148:
149: /* This struct is layout in little endian format */
150:
151: struct dbdma_command {
152: unsigned long d_cmd_count;
153: unsigned long d_address;
154: unsigned long d_cmddep;
155: unsigned long d_status_resid;
156: };
157:
158: typedef struct dbdma_command dbdma_command_t;
159:
160: #define DBDMA_BUILD(d, cmd, key, count, address, interrupt, wait, branch) {\
161: DBDMA_ST4_ENDIAN(&d->d_address, address); \
162: (d)->d_status_resid = 0; \
163: (d)->d_cmddep = 0; \
164: DBDMA_ST4_ENDIAN(&d->d_cmd_count, \
165: ((cmd) << 28) | ((key) << 24) |\
166: ((interrupt) << 20) |\
167: ((branch) << 18) | ((wait) << 16) | \
168: (count)); \
169: }
170:
171: static __inline__ unsigned
172: endianswap32bit(unsigned value)
173: {
174: register unsigned temp;
175:
176: temp = ((value & 0xFF000000) >> 24);
177: temp |= ((value & 0x00FF0000) >> 8);
178: temp |= ((value & 0x0000FF00) << 8);
179: temp |= ((value & 0x000000FF) << 24);
180: return (temp);
181: }
182:
183: static __inline__ void
184: dbdma_st4_endian(volatile unsigned long *a, unsigned long x)
185: {
186: *a = endianswap32bit(x);
187: #if 0
188: __asm__ volatile
189: ("stwbrx %0,0,%1" : : "r" (x), "r" (a) : "memory");
190: #endif
191: return;
192: }
193:
194: static __inline__ unsigned long
195: dbdma_ld4_endian(volatile unsigned long *a)
196: {
197: #if 0
198: unsigned long swap;
199: #endif
200:
201: return (endianswap32bit(*a));
202: #if 0
203: __asm__ volatile
204: ("lwbrx %0,0,%1" : "=r" (swap) : "r" (a));
205:
206: return swap;
207: #endif
208: }
209:
210: #define DBDMA_LD4_ENDIAN(a) dbdma_ld4_endian(a)
211: #define DBDMA_ST4_ENDIAN(a, x) dbdma_st4_endian(a, x)
212:
213: /*
214: * DBDMA Channel layout
215: *
216: * NOTE - This structure is in little-endian format.
217: */
218:
219: struct dbdma_regmap {
220: volatile unsigned long d_control; /* Control Register */
221: volatile unsigned long d_status; /* DBDMA Status Register */
222: volatile unsigned long d_cmdptrhi; /* MSB of command pointer (not used yet) */
223: volatile unsigned long d_cmdptrlo; /* LSB of command pointer */
224: volatile unsigned long d_intselect; /* Interrupt Select */
225: volatile unsigned long d_branch; /* Branch selection */
226: volatile unsigned long d_wait; /* Wait selection */
227: volatile unsigned long d_transmode; /* Transfer modes */
228: volatile unsigned long d_dataptrhi; /* MSB of Data Pointer */
229: volatile unsigned long d_dataptrlo; /* LSB of Data Pointer */
230: volatile unsigned long d_reserved; /* Reserved for the moment */
231: volatile unsigned long d_branchptrhi; /* MSB of Branch Pointer */
232: volatile unsigned long d_branchptrlo; /* LSB of Branch Pointer */
233: /* The remaining fields are undefinied and unimplemented */
234: };
235:
236: typedef struct dbdma_regmap dbdma_regmap_t;
237:
238: /* DBDMA routines */
239:
240: void dbdma_start(int channel, dbdma_command_t *commands);
241: void dbdma_stop(int channel);
242: void dbdma_flush(int channel);
243: void dbdma_reset(int channel);
244: void dbdma_continue(int channel);
245: void dbdma_pause(int channel);
246:
247: dbdma_command_t *dbdma_alloc(int); /* Allocate command structures */
248:
249: #endif /* !defined(_POWERMAC_DBDMA_H_) */
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.