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1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /* HISTORY
26: *
27: * 1998/02/25 Umesh Vaishampayan ([email protected])
28: * Moved kdp_flush_icache() to cache.s
29: *
30: * 1997/10/14 Umesh Vaishampayan ([email protected])
31: * Added disable_ee() and restore_ee() for the use of mcount.
32: *
33: * 1997/05/16 Rene Vega -- Cleanup sync/isync usage.
34: */
35:
36: /*
37: * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
38: * All Rights Reserved
39: *
40: * Permission to use, copy, modify, and distribute this software and
41: * its documentation for any purpose and without fee is hereby granted,
42: * provided that the above copyright notice appears in all copies and
43: * that both the copyright notice and this permission notice appear in
44: * supporting documentation.
45: *
46: * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
47: * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
48: * FOR A PARTICULAR PURPOSE.
49: *
50: * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
51: * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
52: * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
53: * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
54: * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
55: */
56: /*
57: * MKLINUX-1.0DR2
58: */
59:
60: #include <assym.h>
61: #include <machdep/ppc/asm.h>
62: #include <machdep/ppc/proc_reg.h>
63: #include <mach/ppc/vm_param.h>
64: #include <machdep/ppc/powermac.h>
65:
66: /* Disable external interrupts and return the previous value of msr */
67: /* These routines are used by mcount() */
68: ENTRY(disable_ee, TAG_NO_FRAME_USED)
69: mfmsr r3
70: rlwinm r0, r3, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
71: mtmsr r0
72: blr
73:
74: /* /Restore the msr to the value passed in the first parameter */
75: ENTRY(restore_ee, TAG_NO_FRAME_USED)
76: mtmsr r3
77: blr
78:
79: /* Mask and unmask interrupts at the processor level */
80: ENTRY(interrupt_disable, TAG_NO_FRAME_USED)
81: mfmsr r0
82: rlwinm r0, r0, 0, MSR_EE_BIT+1, MSR_EE_BIT-1
83: mtmsr r0
84: blr
85:
86: ENTRY(interrupt_enable, TAG_NO_FRAME_USED)
87: mfmsr r0
88: ori r0, r0, MASK(MSR_EE)
89: mtmsr r0
90: blr
91:
92:
93: /*
94: ** get_timebase()
95: **
96: ** Entry - R3 contains pointer to 64 bit structure.
97: **
98: ** Exit - 64 bit structure filled in.
99: **
100: */
101: ENTRY(get_timebase, TAG_NO_FRAME_USED)
102: loop:
103: mftbu r4
104: mftb r5
105: mftbu r6
106: cmpw r6, r4
107: bne loop
108:
109: stw r4, 0(r3)
110: stw r5, 4(r3)
111:
112: blr
113:
114:
115: /*
116: * Boolean test_and_set (UInt32 theBit, UInt8 *theAddress)
117: *{
118: * UInt32 theValue;
119: * UInt32 theMask;
120: *
121: * theAddress += theBit / 8;
122: * theBit %= 8;
123: *
124: * theBit += (theAddress % 4) * 8;
125: * theAddress &= ~(0x00000003); // long-align the address
126: *
127: * theMask = 1 << (31 - theBit);
128: *
129: * while (true) {
130: * theValue = __lwarx(theAddress);
131: * if ((theValue & theMask) != 0)
132: * return true;
133: *
134: * if (__stwcx(theValue | theMask, theAddress))
135: * return false;
136: * }
137: *}
138: */
139: ENTRY(test_and_set, TAG_NO_FRAME_USED)
140:
141: rlwinm r7, r3, (32 - 3), 3,31 // r7 = theBit / 8
142: rlwinm r3, r3, 0, 29,31 // theBit %= 8
143: add r4, r4, r7 // theAddress += theBit / 8
144: rlwinm r7, r4, 3, 27,28 // r7 = (theAddress % 4) * 8
145: add r3, r3, r7 // theBit += (theAddress %4)*8
146: rlwinm r4, r4, 0, 0,29 // long-align the address
147: li r7, 1
148: nor r3, r3, r3 // theBit = 31 - theBit
149: rlwnm r7, r7, r3, 0,31 // theMask = 1 << (31 - theBit)
150:
151: li r3, 1 // assume it is already set
152:
153: Ltasl:
154: sync
155: lwarx r5, 0, r4
156: and. r8, r5, r7 // was the masked bit set?
157: bnelr // it was already set, return
158:
159: or r5, r5, r7 // set the bit
160: sync
161: stwcx. r5, 0, r4
162: bne- Ltasl
163: isync
164: li r3, 0
165:
166: blr
167:
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