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1.1 root 1: /*
2: * Copyright (c) 1999 Apple Computer, Inc. All rights reserved.
3: *
4: * @APPLE_LICENSE_HEADER_START@
5: *
6: * Portions Copyright (c) 1999 Apple Computer, Inc. All Rights
7: * Reserved. This file contains Original Code and/or Modifications of
8: * Original Code as defined in and that are subject to the Apple Public
9: * Source License Version 1.1 (the "License"). You may not use this file
10: * except in compliance with the License. Please obtain a copy of the
11: * License at http://www.apple.com/publicsource and read it before using
12: * this file.
13: *
14: * The Original Code and all software distributed under the License are
15: * distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, EITHER
16: * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
17: * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT. Please see the
19: * License for the specific language governing rights and limitations
20: * under the License.
21: *
22: * @APPLE_LICENSE_HEADER_END@
23: */
24:
25: /*
26: * HISTORY
27: * Revision 1.2 1997/10/29 02:14:00 tmason
28: * Fixed oodles of bugs related to pmap issues as well as bcopy, FLOAT!, and cached accesses.
29: * Radar Bug ID:
30: *
31: * Revision 1.1.1.1 1997/09/30 02:45:23 wsanchez
32: * Import of kernel from umeshv/kernel
33: *
34: * Revision 1.1.??.1 1997/06/28 10:58:00 rvega
35: * Radar #1665906
36: * Restore comments, alignment, and white space lost during integration.
37: * [1997/06/28 10:58:00 rvega]
38: *
39: * Revision 1.1.??.1 1997/06/17 14:54:28 rvega
40: * pmap_page_copy needs to flush the i-cache *and*
41: * it needs to work without using floating point registers.
42: * [1997/06/17 14:54:28 rvega]
43: *
44: * Revision 1.1.??.1 1997/05/14 18:55:55 rvega
45: * Cleanup sync/isync usage.
46: * [1997/05/14 18:55:55 rvega]
47: *
48: */
49:
50: /*
51: * Copyright 1996 1995 by Open Software Foundation, Inc. 1997 1996 1995 1994 1993 1992 1991
52: * All Rights Reserved
53: *
54: * Permission to use, copy, modify, and distribute this software and
55: * its documentation for any purpose and without fee is hereby granted,
56: * provided that the above copyright notice appears in all copies and
57: * that both the copyright notice and this permission notice appear in
58: * supporting documentation.
59: *
60: * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
61: * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
62: * FOR A PARTICULAR PURPOSE.
63: *
64: * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
65: * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
66: * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
67: * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
68: * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
69: */
70: /*
71: * MKLINUX-1.0DR2
72: */
73:
74: #include <debug.h>
75: #include <ppc/asm.h>
76: #include <ppc/proc_reg.h>
77: #include <mach/ppc/vm_param.h>
78: #include <assym.h>
79:
80: #ifndef USE_FLOATING_POINT_IN_KERNEL
81: #define USE_FLOATING_POINT_IN_KERNEL 0
82: #else
83: #undef USE_FLOATING_POINT_IN_KERNEL
84: #define USE_FLOATING_POINT_IN_KERNEL 0
85: #endif
86:
87:
88: /*
89: * void pmap_zero_page(vm_offset_t pa)
90: *
91: * zero a page of physical memory.
92: */
93:
94: #if DEBUG
95: /* C debug stub in pmap.c calls this */
96: ENTRY(pmap_zero_page_assembler, TAG_NO_FRAME_USED)
97: #else
98: ENTRY(pmap_zero_page, TAG_NO_FRAME_USED)
99: #endif /* DEBUG */
100:
101: /* Switch off data translations */
102: mfmsr r6
103: rlwinm r7, r6, 0, MSR_DR_BIT+1, MSR_DR_BIT-1
104: mtmsr r7
105: isync /* Ensure data translations are off */
106:
107: #ifndef UNCACHED_DATA_604
108: li r4, (PPC_PGBYTES/CACHE_LINE_SIZE)
109: #else /* UNCACHED_DATA_604 */
110: li r4, (PPC_PGBYTES/4)
111: #endif /* UNCACHED_DATA_604 */
112: mtctr r4
113: .L_phys_zero_loop:
114: #ifndef UNCACHED_DATA_604
115: dcbz 0, ARG0
116: addi ARG0, ARG0, CACHE_LINE_SIZE
117: #else /* UNCACHED_DATA_604 */
118: li r7, 0
119: stwx r7, 0, ARG0
120: addi ARG0, ARG0, 4
121: #endif /* UNCACHED_DATA_604 */
122: bdnz+ .L_phys_zero_loop
123:
124: sync /* Finish any outstanding writes */
125: mtmsr r6 /* Restore original translations */
126: isync /* Ensure data translations are on */
127:
128: blr
129:
130: /* void
131: * phys_copy(src, dst, bytecount)
132: * vm_offset_t src;
133: * vm_offset_t dst;
134: * int bytecount
135: *
136: * This routine will copy bytecount bytes from physical address src to physical
137: * address dst.
138: */
139:
140: ENTRY(phys_copy, TAG_NO_FRAME_USED)
141:
142: /* Switch off data relocation.
143: */
144: mfmsr r6
145: rlwinm r7, r6, 0, MSR_DR_BIT+1, MSR_DR_BIT-1
146: mtmsr r7
147: isync /* Ensure data translations are off */
148: mtctr ARG2
149: .L_phys_copy_byte_loop:
150: lbz r7, 0(ARG0)
151: stb r7, 0(ARG1)
152: addi ARG0, ARG0, 1
153: addi ARG1, ARG1, 1
154: bdnz+ .L_phys_copy_byte_loop
155:
156: .L_phys_copy_done:
157: mtmsr r6 /* Restore original translations */
158: isync /* Ensure data translations are off */
159:
160: blr
161:
162:
163:
164:
165: /* void
166: * pmap_copy_page(src, dst)
167: * vm_offset_t src;
168: * vm_offset_t dst;
169: *
170: * This routine will copy the physical page src to physical page dst
171: *
172: * This routine assumes that the src and dst are page aligned and that the
173: * destination is cached.
174: *
175: * This routine is called in a myriad places to copy pages containing
176: * instructions to be executed later, therefore it has to invalidate the
177: * i-cache entries of the destination page.
178: */
179:
180: #if DEBUG
181: /* if debug, we have a little piece of C around this
182: * in pmap.c that gives some trace ability
183: */
184: ENTRY(pmap_copy_page_assembler, TAG_NO_FRAME_USED)
185: #else
186: ENTRY(pmap_copy_page, TAG_NO_FRAME_USED)
187: #endif /* DEBUG */
188:
189: #if USE_FLOATING_POINT_IN_KERNEL
190: /* Save off the link register, we want to call fpu_save. We assume
191: * that fpu_save leaves ARG0-5 intact and that it doesn't need
192: * a frame, otherwise we'd need one too.
193: */
194:
195: mflr ARG3
196: bl EXT(fpu_save)
197: mtlr ARG3
198: #endif /* USE_FLOATING_POINT_IN_KERNEL */
199:
200: /* Switch off data relocation.
201: */
202: mfmsr r6
203: rlwinm r7, r6, 0, MSR_DR_BIT+1, MSR_DR_BIT-1
204: mtmsr r7
205: isync /* Ensure data translations are off */
206:
207: #if USE_FLOATING_POINT_IN_KERNEL
208: li r7, (PPC_PGBYTES/(2*32))
209: mtctr r7
210: li r7, 32
211: #else /* USE_FLOATING_POINT_IN_KERNEL */
212: li r7, (PPC_PGBYTES/CACHE_LINE_SIZE)
213: mtctr r7
214: #endif /* USE_FLOATING_POINT_IN_KERNEL */
215:
216: .L_pmap_copy_page_loop:
217: #ifndef UNCACHED_DATA_604
218: dcbz 0, ARG1
219: #if USE_FLOATING_POINT_IN_KERNEL
220: dcbz r7, ARG1
221: #endif /* USE_FLOATING_POINT_IN_KERNEL */
222: #endif /* UNCACHED_DATA_604 */
223:
224: #if USE_FLOATING_POINT_IN_KERNEL
225: lfd f0, 0(ARG0)
226: lfd f1, 8(ARG0)
227: lfd f2, 16(ARG0)
228: lfd f3, 24(ARG0)
229: lfd f4, 32(ARG0)
230: lfd f5, 40(ARG0)
231: lfd f6, 48(ARG0)
232: lfd f7, 56(ARG0)
233: addi ARG0, ARG0, (2*32)
234:
235: stfd f0, 0(ARG1)
236: stfd f1, 8(ARG1)
237: stfd f2, 16(ARG1)
238: stfd f3, 24(ARG1)
239: #ifndef UNCACHED_DATA_604
240: dcbst 0, ARG1
241: sync
242: #endif /* UNCACHED_DATA_604 */
243: #ifndef UNCACHED_INST_604
244: icbi 0, ARG1
245: sync
246: isync
247: #endif /* UNCACHED_INST_604 */
248:
249: addi ARG1, ARG1, CACHE_LINE_SIZE
250:
251: stfd f4, 0(ARG1)
252: stfd f5, 8(ARG1)
253: stfd f6, 16(ARG1)
254: stfd f7, 24(ARG1)
255: #else USE_FLOATING_POINT_IN_KERNEL
256: lwz r0, 0(ARG0)
257: lwz r5, 4(ARG0)
258: lwz r7, 8(ARG0)
259: lwz r8, 12(ARG0)
260: lwz r9, 16(ARG0)
261: lwz r10, 20(ARG0)
262: lwz r11, 24(ARG0)
263: lwz r12, 28(ARG0)
264: addi ARG0, ARG0, CACHE_LINE_SIZE
265:
266: stw r0, 0(ARG1)
267: stw r5, 4(ARG1)
268: stw r7, 8(ARG1)
269: stw r8, 12(ARG1)
270: stw r9, 16(ARG1)
271: stw r10, 20(ARG1)
272: stw r11, 24(ARG1)
273: stw r12, 28(ARG1)
274:
275: #endif /* USE_FLOATING_POINT_IN_KERNEL */
276:
277: /*
278: ** Invalidate the i-cache entries.
279: */
280: #ifndef UNCACHED_DATA_604
281: dcbst 0, ARG1
282: sync
283: #endif /* UNCACHED_DATA_604 */
284: #ifndef UNCACHED_INST_604
285: icbi 0, ARG1
286: sync
287: isync
288: #endif /* UNCACHED_INST_604 */
289:
290: addi ARG1, ARG1, CACHE_LINE_SIZE
291: bdnz+ .L_pmap_copy_page_loop
292:
293: #if USE_FLOATING_POINT_IN_KERNEL
294: rlwinm r6, r6, 0, MSR_FP_BIT+1, MSR_FP_BIT-1
295: #endif /* USE_FLOATING_POINT_IN_KERNEL */
296: mtmsr r6 /* Restore original translations */
297: isync /* Ensure data translations are on */
298:
299: blr
300:
301:
302:
303: /*
304: * vm_offset_t
305: * view_user_address(addr)
306: * vm_offset_t addr;
307: *
308: * Set SR_COPYIN to point to segmentt containing address
309: * and return modified address.
310: *
311: */
312:
313: ENTRY(view_user_address, TAG_NO_FRAME_USED)
314: addis ARG1, 0, ha16(EXT(kdp_space))
315: addi ARG1, ARG1, lo16(EXT(kdp_space))
316: lwz ARG1, 0(ARG1)
317: cmpwi ARG1, 0 ; if kdp_space is set use that
318: bne 1f
319: mfsprg ARG1, 0 /* get per-proc_info */
320: lwz ARG1, PP_CPU_DATA(ARG1)
321: lwz ARG1, CPU_ACTIVE_THREAD(ARG1)
322: lwz ARG1, THREAD_TASK(ARG1)
323: lwz ARG1, TASK_VMMAP(ARG1)
324: lwz ARG1, VMMAP_PMAP(ARG1)
325: lwz ARG1, PMAP_SPACE(ARG1)
326: 1:
327: lis r0, SEG_REG_PROT>>16 /* Top byte of SR value */
328: rlwimi r0, ARG1, 4, 4, 31 /* Insert space<<4 */
329: rlwimi r0, ARG0, 4, 28, 31 /* Insert seg number */
330:
331: isync
332: mtsr SR_COPYIN_NAME, r0
333: isync
334:
335: /* ARG0 = adjusted user pointer mapping into SR_COPYIN */
336: rlwinm ARG0, ARG0, 0, 4, 31
337: oris ARG0, ARG0, (SR_COPYIN << (28-16))
338:
339: blr
340:
341: ENTRY(cioseg, TAG_NO_FRAME_USED)
342: // build seg reg value
343: lis r7, SEG_REG_PROT>>16 /* Top byte of SR value */
344: rlwimi r7, r3, 4, 4, 31 /* Insert space<<4 */
345: rlwimi r7, r4, 4, 28, 31 /* Insert seg number */
346:
347: // update seg reg
348: isync
349: mtsr SR_COPYIN_NAME, r7
350: isync
351:
352: // build and return mapped addr for caller
353: rlwinm r3, r4, 0, 4, 31
354: oris r3, r3, (SR_COPYIN << (28-16))
355:
356: blr
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