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1.1 ! root 1: /*++ ! 2: ! 3: Copyright (c) 1992 Digital Equipment Corporation ! 4: ! 5: Module Name: ! 6: ! 7: alphaops.h ! 8: ! 9: Abstract: ! 10: ! 11: Alpha AXP instruction and floating constant definitions. ! 12: ! 13: Author: ! 14: ! 15: Steve Jenness (jenness) 1-Apr-1992 ! 16: Thomas Van Baak (tvb) 28-May-1992 ! 17: ! 18: Revision History: ! 19: ! 20: --*/ ! 21: ! 22: #ifndef _ALPHAOPS_ ! 23: #define _ALPHAOPS_ ! 24: ! 25: // ! 26: // Instruction types. ! 27: // The Alpha architecture does not number the instruction types, ! 28: // this numbering is for software decoding only. ! 29: // ! 30: ! 31: #define ALPHA_UNKNOWN 0 // Reserved or illegal ! 32: #define ALPHA_MEMORY 1 // Memory (load/store) ! 33: #define ALPHA_FP_MEMORY 2 // Floating point Memory ! 34: #define ALPHA_MEMSPC 3 // Memory special ! 35: #define ALPHA_JUMP 4 // Jump (memory formation) ! 36: #define ALPHA_BRANCH 5 // Branch ! 37: #define ALPHA_FP_BRANCH 6 // Floating Point Branch ! 38: #define ALPHA_OPERATE 7 // Register-register operate ! 39: #define ALPHA_LITERAL 8 // Literal-register operate ! 40: #define ALPHA_FP_OPERATE 9 // Floating point operate ! 41: #define ALPHA_FP_CONVERT 10 // Floating point convert ! 42: #define ALPHA_CALLPAL 11 // Call to PAL ! 43: #define ALPHA_EV4_PR 12 // EV4 MTPR/MFPR PAL mode instructions ! 44: #define ALPHA_EV4_MEM 13 // EV4 special memory PAL mode access ! 45: #define ALPHA_EV4_REI 14 // EV4 PAL mode switch ! 46: ! 47: // ! 48: // Instruction Opcodes. ! 49: // ! 50: ! 51: #define CALLPAL_OP 0x00 // ALPHA_CALLPAL ! 52: #define _01_OP 0x01 // - reserved opcode ! 53: #define _02_OP 0x02 // - reserved opcode ! 54: #define _03_OP 0x03 // - reserved opcode ! 55: #define _04_OP 0x04 // - reserved opcode ! 56: #define _05_OP 0x05 // - reserved opcode ! 57: #define _06_OP 0x06 // - reserved opcode ! 58: #define _07_OP 0x07 // - reserved opcode ! 59: #define LDA_OP 0x08 // ALPHA_MEMORY ! 60: #define LDAH_OP 0x09 // ALPHA_MEMORY ! 61: #define _0A_OP 0x0A // - reserved opcode ! 62: #define LDQ_U_OP 0x0B // ALPHA_MEMORY ! 63: #define _0C_OP 0x0C // - reserved opcode ! 64: #define _0D_OP 0x0D // - reserved opcode ! 65: #define _0E_OP 0x0E // - reserved opcode ! 66: #define STQ_U_OP 0x0F // ALPHA_MEMORY ! 67: #define ARITH_OP 0x10 // ALPHA_OPERATE or ALPHA_LITERAL ! 68: #define BIT_OP 0x11 // ALPHA_OPERATE or ALPHA_LITERAL ! 69: #define BYTE_OP 0x12 // ALPHA_OPERATE or ALPHA_LITERAL ! 70: #define MUL_OP 0x13 // ALPHA_OPERATE or ALPHA_LITERAL ! 71: #define _14_OP 0x14 // - reserved opcode ! 72: #define VAXFP_OP 0x15 // ALPHA_FP_OPERATE ! 73: #define IEEEFP_OP 0x16 // ALPHA_FP_OPERATE ! 74: #define FPOP_OP 0x17 // ALPHA_FP_OPERATE ! 75: #define MEMSPC_OP 0x18 // ALPHA_MEMORY ! 76: #define PAL19_OP 0x19 // - reserved for PAL mode ! 77: //#define MFPR_OP 0x19 // ALPHA_MFPR ! 78: #define JMP_OP 0x1A // ALPHA_JUMP ! 79: #define PAL1B_OP 0x1B // - reserved for PAL mode ! 80: #define _1C_OP 0x1C // - reserved opcode ! 81: #define PAL1D_OP 0x1D // - reserved for PAL mode ! 82: //#define MTPR_OP 0x1D // ALPHA_MTPR ! 83: #define PAL1E_OP 0x1E // - reserved for PAL mode ! 84: #define PAL1F_OP 0x1F // - reserved for PAL mode ! 85: #define LDF_OP 0x20 // ALPHA_MEMORY ! 86: #define LDG_OP 0x21 // ALPHA_MEMORY ! 87: #define LDS_OP 0x22 // ALPHA_MEMORY ! 88: #define LDT_OP 0x23 // ALPHA_MEMORY ! 89: #define STF_OP 0x24 // ALPHA_MEMORY ! 90: #define STG_OP 0x25 // ALPHA_MEMORY ! 91: #define STS_OP 0x26 // ALPHA_MEMORY ! 92: #define STT_OP 0x27 // ALPHA_MEMORY ! 93: #define LDL_OP 0x28 // ALPHA_MEMORY ! 94: #define LDQ_OP 0x29 // ALPHA_MEMORY ! 95: #define LDL_L_OP 0x2A // ALPHA_MEMORY ! 96: #define LDQ_L_OP 0x2B // ALPHA_MEMORY ! 97: #define STL_OP 0x2C // ALPHA_MEMORY ! 98: #define STQ_OP 0x2D // ALPHA_MEMORY ! 99: #define STL_C_OP 0x2E // ALPHA_MEMORY ! 100: #define STQ_C_OP 0x2F // ALPHA_MEMORY ! 101: #define BR_OP 0x30 // ALPHA_BRANCH ! 102: #define FBEQ_OP 0x31 // ALPHA_BRANCH ! 103: #define FBLT_OP 0x32 // ALPHA_BRANCH ! 104: #define FBLE_OP 0x33 // ALPHA_BRANCH ! 105: #define BSR_OP 0x34 // ALPHA_BRANCH ! 106: #define FBNE_OP 0x35 // ALPHA_BRANCH ! 107: #define FBGE_OP 0x36 // ALPHA_BRANCH ! 108: #define FBGT_OP 0x37 // ALPHA_BRANCH ! 109: #define BLBC_OP 0x38 // ALPHA_BRANCH ! 110: #define BEQ_OP 0x39 // ALPHA_BRANCH ! 111: #define BLT_OP 0x3A // ALPHA_BRANCH ! 112: #define BLE_OP 0x3B // ALPHA_BRANCH ! 113: #define BLBS_OP 0x3C // ALPHA_BRANCH ! 114: #define BNE_OP 0x3D // ALPHA_BRANCH ! 115: #define BGE_OP 0x3E // ALPHA_BRANCH ! 116: #define BGT_OP 0x3F // ALPHA_BRANCH ! 117: ! 118: #define LDA_OP_STR "lda" ! 119: #define LDAH_OP_STR "ldah" ! 120: #define LDQ_U_OP_STR "ldq_u" ! 121: #define STQ_U_OP_STR "stq_u" ! 122: #define LDF_OP_STR "ldf" ! 123: #define LDG_OP_STR "ldg" ! 124: #define LDS_OP_STR "lds" ! 125: #define LDT_OP_STR "ldt" ! 126: #define STF_OP_STR "stf" ! 127: #define STG_OP_STR "stg" ! 128: #define STS_OP_STR "sts" ! 129: #define STT_OP_STR "stt" ! 130: #define LDL_OP_STR "ldl" ! 131: #define LDQ_OP_STR "ldq" ! 132: #define LDL_L_OP_STR "ldl_l" ! 133: #define LDQ_L_OP_STR "ldq_l" ! 134: #define STL_OP_STR "stl" ! 135: #define STQ_OP_STR "stq" ! 136: #define STL_C_OP_STR "stl_c" ! 137: #define STQ_C_OP_STR "stq_c" ! 138: #define BR_OP_STR "br" ! 139: #define FBEQ_OP_STR "fbeq" ! 140: #define FBLT_OP_STR "fblt" ! 141: #define FBLE_OP_STR "fble" ! 142: #define BSR_OP_STR "bsr" ! 143: #define FBNE_OP_STR "fbne" ! 144: #define FBGE_OP_STR "fbge" ! 145: #define FBGT_OP_STR "fbgt" ! 146: #define BLBC_OP_STR "blbc" ! 147: #define BEQ_OP_STR "beq" ! 148: #define BLT_OP_STR "blt" ! 149: #define BLE_OP_STR "ble" ! 150: #define BLBS_OP_STR "blbs" ! 151: #define BNE_OP_STR "bne" ! 152: #define BGE_OP_STR "bge" ! 153: #define BGT_OP_STR "bgt" ! 154: ! 155: // ! 156: // Type (1) Memory Instruction Format. ! 157: // Type (2) Memory Special Instruction Format. ! 158: // ! 159: // 3 2 2 2 2 1 1 ! 160: // 1 6 5 1 0 6 5 0 ! 161: // +-----------+---------+---------+-------------------------------+ ! 162: // | opcode | Ra | Rb | Memory_disp | ! 163: // +-----------+---------+---------+-------------------------------+ ! 164: // ! 165: // LDAx Ra.wq,disp.ab(Rb.ab) x = (,H) ! 166: // LDx Ra.wq,disp.ab(Rb.ab) x = (L,Q,F,G,S,T) ! 167: // LDQ_U Ra.wq,disp.ab(Rb.ab) ! 168: // LDx_L Ra.wq,disp.ab(Rb.ab) x = (L,Q) ! 169: // STx_C Ra.mq,disp.ab(Rb.ab) x = (L,Q) ! 170: // STx Ra.rq,disp.ab(Rb.ab) x = (L,Q,F,G,S,T) ! 171: // STQ_U Ra.rq,disp.ab(Rb.ab) ! 172: // ! 173: ! 174: typedef struct _Alpha_Memory_Format { ! 175: LONG MemDisp : 16; ! 176: ULONG Rb : 5; ! 177: ULONG Ra : 5; ! 178: ULONG Opcode : 6; ! 179: } Alpha_Memory_Format; ! 180: ! 181: // ! 182: // Special Memory instruction function codes (in Memdisp). ! 183: // ! 184: ! 185: #define TRAPB_FUNC 0x0000 ! 186: #define EXCB_FUNC 0x0400 ! 187: #define MB_FUNC 0x4000 ! 188: #define WMB_FUNC 0x4400 ! 189: #define MB2_FUNC 0x4800 ! 190: #define MB3_FUNC 0x4C00 ! 191: #define FETCH_FUNC 0x8000 ! 192: #define FETCH_M_FUNC 0xA000 ! 193: #define RPCC_FUNC 0xC000 ! 194: #define RC_FUNC 0xE000 ! 195: #define RS_FUNC 0xF000 ! 196: ! 197: #define TRAPB_FUNC_STR "trapb" ! 198: #define EXCB_FUNC_STR "excb" ! 199: #define MB_FUNC_STR "mb" ! 200: #define MB1_FUNC_STR "wmb" ! 201: #define MB2_FUNC_STR "mb2" ! 202: #define MB3_FUNC_STR "mb3" ! 203: #define FETCH_FUNC_STR "fetch" ! 204: #define FETCH_M_FUNC_STR "fetch_m" ! 205: #define RPCC_FUNC_STR "rpcc" ! 206: #define RC_FUNC_STR "rc" ! 207: #define RS_FUNC_STR "rs" ! 208: ! 209: // ! 210: // Type (3) Memory Format Jump Instructions. ! 211: // ! 212: // 3 2 2 2 2 1 1 1 1 ! 213: // 1 6 5 1 0 6 5 4 3 0 ! 214: // +-----------+---------+---------+---+---------------------------+ ! 215: // | opcode | Ra | Rb |Fnc| Hint | ! 216: // +-----------+---------+---------+---+---------------------------+ ! 217: // ! 218: // xxx Ra.wq,(Rb.ab),hint xxx = (JMP, JSR, RET, JSR_COROUTINE) ! 219: // ! 220: ! 221: typedef struct _Alpha_Jump_Format { ! 222: LONG Hint : 14; ! 223: ULONG Function : 2; ! 224: ULONG Rb : 5; ! 225: ULONG Ra : 5; ! 226: ULONG Opcode : 6; ! 227: } Alpha_Jump_Format; ! 228: ! 229: // ! 230: // Jump function codes (in Function, opcode 1A, JMP_OP). ! 231: // ! 232: ! 233: #define JMP_FUNC 0x0 // Jump ! 234: #define JSR_FUNC 0x1 // Jump to Subroutine ! 235: #define RET_FUNC 0x2 // Return from Subroutine ! 236: #define JSR_CO_FUNC 0x3 // Jump to Subroutine Return ! 237: ! 238: #define JMP_FUNC_STR "jmp" ! 239: #define JSR_FUNC_STR "jsr" ! 240: #define RET_FUNC_STR "ret" ! 241: #define JSR_CO_FUNC_STR "jsr_cortn" ! 242: ! 243: // ! 244: // The exception handling compatible return instruction has a hint value ! 245: // of 0001. Define a macro that identifies these return instructions. ! 246: // The Rb register field is masked out since it is normally, but not ! 247: // required to be, RA_REG. ! 248: // ! 249: ! 250: #define IS_RETURN_0001_INSTRUCTION(Instruction) \ ! 251: (((Instruction) & 0xFFE0FFFF) == 0x6BE08001) ! 252: ! 253: // ! 254: // Type (4) Branch Instruction Format. ! 255: // ! 256: // 3 2 2 2 2 ! 257: // 1 6 5 1 0 0 ! 258: // +-----------+---------+-----------------------------------------+ ! 259: // | opcode | Ra | Branch_disp | ! 260: // +-----------+---------+-----------------------------------------+ ! 261: // ! 262: // Bxx Ra.rq,disp.al x = (EQ,NE,LT,LE,GT,GE,LBC,LBS) ! 263: // BxR Ra.wq,disp.al x = (,S) ! 264: // FBxx Ra.rq,disp.al x = (EQ,NE,LT,LE,GT,GE) ! 265: // ! 266: ! 267: typedef struct _Alpha_Branch_Format { ! 268: LONG BranchDisp : 21; ! 269: ULONG Ra : 5; ! 270: ULONG Opcode : 6; ! 271: } Alpha_Branch_Format; ! 272: ! 273: // ! 274: // Type (5) Operate Register Instruction Format. ! 275: // Type (6) Operate Literal Instruction Format. ! 276: // bop = Rb.rq or #b.ib ! 277: // ! 278: // 3 2 2 2 2 1 1 1 1 1 ! 279: // 1 6 5 1 0 6 5 3 2 1 5 4 0 ! 280: // +-----------+---------+---------+-----+-+-------------+---------+ ! 281: // | opcode | Ra | Rb | SBZ |0| function | Rc | ! 282: // +-----------+---------+---------+-----+-+-------------+---------+ ! 283: // 3 2 2 2 2 1 1 1 ! 284: // 1 6 5 1 0 3 2 1 5 4 0 ! 285: // +-----------+---------+---------------+-+-------------+---------+ ! 286: // | opcode | Ra | LIT |1| function | Rc | ! 287: // +-----------+---------+---------------+-+-------------+---------+ ! 288: // ! 289: // ! 290: // ADDx Ra.rq,bop,Rc.wq /V x = (Q,L) ! 291: // SxADDy Ra.rq,bop,Rc.wq x = (4,8), y = (Q, L) ! 292: // CMPx Ra.rq,bop,Rc.wq x = (EQ,LT,LE,ULT,ULE) ! 293: // MULx Ra.rq,bop,Rc.wq /V x = (Q,L) ! 294: // UMULH Ra.rq,bop,Rc.wq ! 295: // SUBx Ra.rq,bop,Rc.wq /V x = (Q,L) ! 296: // SxSUBy Ra.rq,bop,Rc.wq x = (4,8), y = (Q, L) ! 297: // xxx Ra.rq,bop,Rc.wq xxx = (AND,BIS,XOR,BIC,ORNOT,EQV) ! 298: // CMOVxx Ra.rq,bop,Rc.wq xx = (EQ,NE,LT,LE,GT,GE,LBC,LBS) ! 299: // SxL Ra.rq,bop,Rc.wq x = (L,R) ! 300: // SRA Ra.rq,bop,Rc.wq ! 301: // CMPBGE Ra.rq,bop,Rc.wq ! 302: // EXTxx Ra.rq,bop,Rc.wq xx = (BL,WL,WH,LL,LH,WL,QH) ! 303: // INSxx Ra.rq,bop,Rc.wq xx = (BL,WL,WH,LL,LH,WL,QH) ! 304: // MSKxx Ra.rq,bop,Rc.wq xx = (BL,WL,WH,LL,LH,WL,QH) ! 305: // ZAPx Ra.rq,bop,Rc.wq x = (,NOT) ! 306: // ! 307: ! 308: typedef struct _Alpha_OpReg_Format { ! 309: ULONG Rc : 5; ! 310: ULONG Function : 7; ! 311: ULONG RbvType : 1; // 0 for register format ! 312: ULONG SBZ : 3; ! 313: ULONG Rb : 5; ! 314: ULONG Ra : 5; ! 315: ULONG Opcode : 6; ! 316: } Alpha_OpReg_Format; ! 317: ! 318: typedef struct _Alpha_OpLit_Format { ! 319: ULONG Rc : 5; ! 320: ULONG Function : 7; ! 321: ULONG RbvType : 1; // 1 for literal format ! 322: ULONG Literal : 8; ! 323: ULONG Ra : 5; ! 324: ULONG Opcode : 6; ! 325: } Alpha_OpLit_Format; ! 326: ! 327: #define RBV_REGISTER_FORMAT 0 ! 328: #define RBV_LITERAL_FORMAT 1 ! 329: ! 330: // ! 331: // Arithmetic operate function codes (in Function, Opcode 10, ARITH_OP). ! 332: // ! 333: ! 334: #define ADDL_FUNC 0x00 // Add Longword ! 335: #define ADDLV_FUNC 0x40 // Add Longword, Integer Overflow Enable ! 336: #define S4ADDL_FUNC 0x02 // Scaled Add Longword by 4 ! 337: #define S8ADDL_FUNC 0x12 // Scaled Add Longword by 8 ! 338: ! 339: #define ADDQ_FUNC 0x20 // Add Quadword ! 340: #define ADDQV_FUNC 0x60 // Add Quadword, Integer Overflow Enable ! 341: #define S4ADDQ_FUNC 0x22 // Scaled Add Quadword by 4 ! 342: #define S8ADDQ_FUNC 0x32 // Scaled Add Quadword by 8 ! 343: ! 344: #define SUBL_FUNC 0x09 // Subtract Longword ! 345: #define SUBLV_FUNC 0x49 // Subtract Longword, Integer Overflow Enable ! 346: #define S4SUBL_FUNC 0x0B // Scaled Subtract Longword by 4 ! 347: #define S8SUBL_FUNC 0x1B // Scaled Subtract Longword by 8 ! 348: ! 349: #define SUBQ_FUNC 0x29 // Subtract Quadword ! 350: #define SUBQV_FUNC 0x69 // Subtract Quadword, Integer Overflow Enable ! 351: #define S4SUBQ_FUNC 0x2B // Scaled Subtract Quadword by 4 ! 352: #define S8SUBQ_FUNC 0x3B // Scaled Subtract Quadword by 8 ! 353: ! 354: #define CMPEQ_FUNC 0x2D // Compare Signed Quadword Equal ! 355: #define CMPLT_FUNC 0x4D // Compare Signed Quadword Less Than ! 356: #define CMPLE_FUNC 0x6D // Compare Signed Quadword Less Than or Equal ! 357: #define CMPULT_FUNC 0x1D // Compare Unsigned Quadword Less Than ! 358: #define CMPULE_FUNC 0x3D // Compare Unsigned Quadword Less Than or Equal ! 359: #define CMPBGE_FUNC 0x0F // Compare 8 Unsigned Bytes Greater Than or Equal ! 360: ! 361: #define ADDL_FUNC_STR "addl" ! 362: #define ADDLV_FUNC_STR "addl/v" ! 363: #define S4ADDL_FUNC_STR "s4addl" ! 364: #define S8ADDL_FUNC_STR "s8addl" ! 365: ! 366: #define ADDQ_FUNC_STR "addq" ! 367: #define ADDQV_FUNC_STR "addq/v" ! 368: #define S4ADDQ_FUNC_STR "s4addq" ! 369: #define S8ADDQ_FUNC_STR "s8addq" ! 370: ! 371: #define SUBL_FUNC_STR "subl" ! 372: #define SUBLV_FUNC_STR "subl/v" ! 373: #define S4SUBL_FUNC_STR "s4subl" ! 374: #define S8SUBL_FUNC_STR "s8subl" ! 375: ! 376: #define SUBQ_FUNC_STR "subq" ! 377: #define SUBQV_FUNC_STR "subq/v" ! 378: #define S4SUBQ_FUNC_STR "s4subq" ! 379: #define S8SUBQ_FUNC_STR "s8subq" ! 380: ! 381: #define CMPEQ_FUNC_STR "cmpeq" ! 382: #define CMPLT_FUNC_STR "cmplt" ! 383: #define CMPLE_FUNC_STR "cmple" ! 384: #define CMPULT_FUNC_STR "cmpult" ! 385: #define CMPULE_FUNC_STR "cmpule" ! 386: #define CMPBGE_FUNC_STR "cmpbge" ! 387: ! 388: // ! 389: // Bit and conditional operate function codes (in Function, Opcode 11, BIT_OP). ! 390: // ! 391: ! 392: #define AND_FUNC 0x00 // Logical Product ! 393: #define BIC_FUNC 0x08 // Logical Product with Complement ! 394: #define BIS_FUNC 0x20 // Logical Sum (OR) ! 395: #define EQV_FUNC 0x48 // Logical Equivalence (XORNOT) ! 396: #define ORNOT_FUNC 0x28 // Logical Sum with Complement ! 397: #define XOR_FUNC 0x40 // Logical Difference ! 398: ! 399: #define CMOVEQ_FUNC 0x24 // CMOVE if Register Equal to Zero ! 400: #define CMOVGE_FUNC 0x46 // CMOVE if Register Greater Than or Equal to Zero ! 401: #define CMOVGT_FUNC 0x66 // CMOVE if Register Greater Than Zero ! 402: #define CMOVLBC_FUNC 0x16 // CMOVE if Register Low Bit Clear ! 403: #define CMOVLBS_FUNC 0x14 // CMOVE if Register Low Bit Set ! 404: #define CMOVLE_FUNC 0x64 // CMOVE if Register Less Than or Equal to Zero ! 405: #define CMOVLT_FUNC 0x44 // CMOVE if Register Less Than Zero ! 406: #define CMOVNE_FUNC 0x26 // CMOVE if Register Not Equal to Zero ! 407: ! 408: #define AND_FUNC_STR "and" ! 409: #define BIC_FUNC_STR "bic" ! 410: #define BIS_FUNC_STR "bis" ! 411: #define EQV_FUNC_STR "eqv" ! 412: #define ORNOT_FUNC_STR "ornot" ! 413: #define XOR_FUNC_STR "xor" ! 414: ! 415: #define CMOVEQ_FUNC_STR "cmoveq" ! 416: #define CMOVGE_FUNC_STR "cmovge" ! 417: #define CMOVGT_FUNC_STR "cmovgt" ! 418: #define CMOVLBC_FUNC_STR "cmovlbc" ! 419: #define CMOVLBS_FUNC_STR "cmovlbs" ! 420: #define CMOVLE_FUNC_STR "cmovle" ! 421: #define CMOVLT_FUNC_STR "cmovlt" ! 422: #define CMOVNE_FUNC_STR "cmovne" ! 423: ! 424: // ! 425: // Shift and byte operate function codes (in Function, Opcode 12, BYTE_OP). ! 426: // ! 427: ! 428: #define SLL_FUNC 0x39 // Shift Left Logical ! 429: #define SRL_FUNC 0x34 // Shift Right Logical ! 430: #define SRA_FUNC 0x3C // Shift Right Arithmetic ! 431: ! 432: #define EXTBL_FUNC 0x06 // Extract Byte Low ! 433: #define EXTWL_FUNC 0x16 // Extract Word Low ! 434: #define EXTLL_FUNC 0x26 // Extract Longword Low ! 435: #define EXTQL_FUNC 0x36 // Extract Quadword Low ! 436: #define EXTWH_FUNC 0x5A // Extract Word High ! 437: #define EXTLH_FUNC 0x6A // Extract Longword High ! 438: #define EXTQH_FUNC 0x7A // Extract Quadword High ! 439: ! 440: #define INSBL_FUNC 0x0B // Insert Byte Low ! 441: #define INSWL_FUNC 0x1B // Insert Word Low ! 442: #define INSLL_FUNC 0x2B // Insert Longword Low ! 443: #define INSQL_FUNC 0x3B // Quadword Low ! 444: #define INSWH_FUNC 0x57 // Insert Word High ! 445: #define INSLH_FUNC 0x67 // Insert Longword High ! 446: #define INSQH_FUNC 0x77 // Insert Quadword High ! 447: ! 448: #define MSKBL_FUNC 0x02 // Mask Byte Low ! 449: #define MSKWL_FUNC 0x12 // Mask Word Low ! 450: #define MSKLL_FUNC 0x22 // Mask Longword Low ! 451: #define MSKQL_FUNC 0x32 // Mask Quadword Low ! 452: #define MSKWH_FUNC 0x52 // Mask Word High ! 453: #define MSKLH_FUNC 0x62 // Mask Longword High ! 454: #define MSKQH_FUNC 0x72 // Mask Quadword High ! 455: ! 456: #define ZAP_FUNC 0x30 // Zero Bytes ! 457: #define ZAPNOT_FUNC 0x31 // Zero Bytes Not ! 458: ! 459: #define SLL_FUNC_STR "sll" ! 460: #define SRL_FUNC_STR "srl" ! 461: #define SRA_FUNC_STR "sra" ! 462: ! 463: #define EXTBL_FUNC_STR "extbl" ! 464: #define EXTWL_FUNC_STR "extwl" ! 465: #define EXTLL_FUNC_STR "extll" ! 466: #define EXTQL_FUNC_STR "extql" ! 467: #define EXTWH_FUNC_STR "extwh" ! 468: #define EXTLH_FUNC_STR "extlh" ! 469: #define EXTQH_FUNC_STR "extqh" ! 470: ! 471: #define INSBL_FUNC_STR "insbl" ! 472: #define INSWL_FUNC_STR "inswl" ! 473: #define INSLL_FUNC_STR "insll" ! 474: #define INSQL_FUNC_STR "insql" ! 475: #define INSWH_FUNC_STR "inswh" ! 476: #define INSLH_FUNC_STR "inslh" ! 477: #define INSQH_FUNC_STR "insqh" ! 478: ! 479: #define MSKBL_FUNC_STR "mskbl" ! 480: #define MSKWL_FUNC_STR "mskwl" ! 481: #define MSKLL_FUNC_STR "mskll" ! 482: #define MSKQL_FUNC_STR "mskql" ! 483: #define MSKWH_FUNC_STR "mskwh" ! 484: #define MSKLH_FUNC_STR "msklh" ! 485: #define MSKQH_FUNC_STR "mskqh" ! 486: ! 487: #define ZAP_FUNC_STR "zap" ! 488: #define ZAPNOT_FUNC_STR "zapnot" ! 489: ! 490: // ! 491: // Integer multiply operate function codes (in Function, Opcode 13, MUL_OP). ! 492: // ! 493: ! 494: #define MULL_FUNC 0x00 // Multiply Longword ! 495: #define MULLV_FUNC 0x40 // Multiply Longword, Integer Overflow Enable ! 496: #define MULQ_FUNC 0x20 // Multiply Quadword ! 497: #define MULQV_FUNC 0x60 // Multiply Quadword, Integer Overflow Enable ! 498: #define UMULH_FUNC 0x30 // Unsinged Multiply Quadword High ! 499: ! 500: #define MULL_FUNC_STR "mull" ! 501: #define MULLV_FUNC_STR "mull/v" ! 502: #define MULQ_FUNC_STR "mulq" ! 503: #define MULQV_FUNC_STR "mulq/v" ! 504: #define UMULH_FUNC_STR "umulh" ! 505: ! 506: // ! 507: // Type (7) Floating-point Operate Instruction Format. ! 508: // Type (8) Floating-point Convert Instruction Format. ! 509: // ! 510: // Type 6 and 7 are the same, except for type 7 ! 511: // Fc == F31 (1s) and Fb is the source. ! 512: // ! 513: // 3 2 2 2 2 1 1 ! 514: // 1 6 5 1 0 6 5 5 4 0 ! 515: // +-----------+---------+---------+---------------------+---------+ ! 516: // | opcode | Fa | Fb | function | Fc | ! 517: // +-----------+---------+---------+---------------------+---------+ ! 518: // ! 519: ! 520: typedef struct _Alpha_FpOp_Format { ! 521: ULONG Fc : 5; ! 522: ULONG Function : 11; ! 523: ULONG Fb : 5; ! 524: ULONG Fa : 5; ! 525: ULONG Opcode : 6; ! 526: } Alpha_FpOp_Format; ! 527: ! 528: // ! 529: // Format independent function codes (in Function, Opcode 17) ! 530: // ! 531: ! 532: #define CVTLQ_FUNC 0x010 ! 533: #define CPYS_FUNC 0x020 ! 534: #define CPYSN_FUNC 0x021 ! 535: #define CPYSE_FUNC 0x022 ! 536: #define MT_FPCR_FUNC 0x024 ! 537: #define MF_FPCR_FUNC 0x025 ! 538: #define FCMOVEQ_FUNC 0x02A ! 539: #define FCMOVNE_FUNC 0x02B ! 540: #define FCMOVLT_FUNC 0x02C ! 541: #define FCMOVGE_FUNC 0x02D ! 542: #define FCMOVLE_FUNC 0x02E ! 543: #define FCMOVGT_FUNC 0x02F ! 544: #define CVTQL_FUNC 0x030 ! 545: #define CVTQLV_FUNC 0x130 ! 546: #define CVTQLSV_FUNC 0x530 ! 547: ! 548: #define CVTLQ_FUNC_STR "cvtlq" ! 549: #define CPYS_FUNC_STR "cpys" ! 550: #define CPYSN_FUNC_STR "cpysn" ! 551: #define CPYSE_FUNC_STR "cpyse" ! 552: #define MT_FPCR_FUNC_STR "mt_fpcr" ! 553: #define MF_FPCR_FUNC_STR "mf_fpcr" ! 554: #define FCMOVEQ_FUNC_STR "fcmoveq" ! 555: #define FCMOVNE_FUNC_STR "fcmovne" ! 556: #define FCMOVLT_FUNC_STR "fcmovlt" ! 557: #define FCMOVGE_FUNC_STR "fcmovge" ! 558: #define FCMOVLE_FUNC_STR "fcmovle" ! 559: #define FCMOVGT_FUNC_STR "fcmovgt" ! 560: #define CVTQL_FUNC_STR "cvtql" ! 561: #define CVTQLV_FUNC_STR "cvtql/v" ! 562: #define CVTQLSV_FUNC_STR "cvtql/sv" ! 563: ! 564: // ! 565: // IEEE function codes without flags (in Function, Opcode 16). ! 566: // ! 567: ! 568: #define MSK_FP_OP 0x03F ! 569: ! 570: #define ADDS_FUNC 0x000 ! 571: #define SUBS_FUNC 0x001 ! 572: #define MULS_FUNC 0x002 ! 573: #define DIVS_FUNC 0x003 ! 574: #define ADDT_FUNC 0x020 ! 575: #define SUBT_FUNC 0x021 ! 576: #define MULT_FUNC 0x022 ! 577: #define DIVT_FUNC 0x023 ! 578: #define CMPTUN_FUNC 0x024 ! 579: #define CMPTEQ_FUNC 0x025 ! 580: #define CMPTLT_FUNC 0x026 ! 581: #define CMPTLE_FUNC 0x027 ! 582: #define CVTTS_FUNC 0x02C ! 583: #define CVTTQ_FUNC 0x02F ! 584: #define CVTQS_FUNC 0x03C ! 585: #define CVTQT_FUNC 0x03E ! 586: ! 587: #define ADDS_FUNC_STR "adds" ! 588: #define SUBS_FUNC_STR "subs" ! 589: #define MULS_FUNC_STR "muls" ! 590: #define DIVS_FUNC_STR "divs" ! 591: #define ADDT_FUNC_STR "addt" ! 592: #define SUBT_FUNC_STR "subt" ! 593: #define MULT_FUNC_STR "mult" ! 594: #define DIVT_FUNC_STR "divt" ! 595: #define CMPTUN_FUNC_STR "cmptun" ! 596: #define CMPTEQ_FUNC_STR "cmpteq" ! 597: #define CMPTLT_FUNC_STR "cmptlt" ! 598: #define CMPTLE_FUNC_STR "cmptle" ! 599: #define CVTTS_FUNC_STR "cvtts" ! 600: #define CVTTQ_FUNC_STR "cvttq" ! 601: #define CVTQS_FUNC_STR "cvtqs" ! 602: #define CVTQT_FUNC_STR "cvtqt" ! 603: ! 604: // ! 605: // CVTST is a little different. ! 606: // ! 607: ! 608: #define CVTST_FUNC 0x2AC ! 609: #define CVTST_S_FUNC 0x6AC ! 610: ! 611: #define CVTST_FUNC_STR "cvtst" ! 612: #define CVTST_S_FUNC_STR "cvtst/s" ! 613: ! 614: // ! 615: // VAX function codes without flags (in Function, Opcode 15). ! 616: // ! 617: ! 618: #define ADDF_FUNC 0x000 ! 619: #define CVTDG_FUNC 0x01E ! 620: #define ADDG_FUNC 0x020 ! 621: #define CMPGEQ_FUNC 0x025 ! 622: #define CMPGLT_FUNC 0x026 ! 623: #define CMPGLE_FUNC 0x027 ! 624: #define CVTGF_FUNC 0x02C ! 625: #define CVTGD_FUNC 0x02D ! 626: #define CVTQF_FUNC 0x03C ! 627: #define CVTQG_FUNC 0x03E ! 628: #define DIVF_FUNC 0x003 ! 629: #define DIVG_FUNC 0x023 ! 630: #define MULF_FUNC 0x002 ! 631: #define MULG_FUNC 0x022 ! 632: #define SUBF_FUNC 0x001 ! 633: #define SUBG_FUNC 0x021 ! 634: #define CVTGQ_FUNC 0x03F ! 635: ! 636: #define ADDF_FUNC_STR "addf" ! 637: #define CVTDG_FUNC_STR "cvtdg" ! 638: #define ADDG_FUNC_STR "addg" ! 639: #define CMPGEQ_FUNC_STR "cmpgeq" ! 640: #define CMPGLT_FUNC_STR "cmpglt" ! 641: #define CMPGLE_FUNC_STR "cmpgle" ! 642: #define CVTGF_FUNC_STR "cvtgf" ! 643: #define CVTGD_FUNC_STR "cvtgd" ! 644: #define CVTQF_FUNC_STR "cvtqf" ! 645: #define CVTQG_FUNC_STR "cvtqg" ! 646: #define DIVF_FUNC_STR "divf" ! 647: #define DIVG_FUNC_STR "divg" ! 648: #define MULF_FUNC_STR "mulf" ! 649: #define MULG_FUNC_STR "mulg" ! 650: #define SUBF_FUNC_STR "subf" ! 651: #define SUBG_FUNC_STR "subg" ! 652: #define CVTGQ_FUNC_STR "cvtgq" ! 653: ! 654: // ! 655: // Define subfields within the 11 bit IEEE floating operate function field. ! 656: // ! 657: ! 658: #define FP_FUNCTION_MASK 0x03F // Function code including format ! 659: ! 660: // ! 661: // Define the 2 bit format field. ! 662: // ! 663: ! 664: #define FP_FORMAT_MASK 0x030 ! 665: #define FP_FORMAT_S 0x000 // Single (32 bit floating) ! 666: #define FP_FORMAT_X 0x010 // Extended (128 bit floating) ! 667: #define FP_FORMAT_T 0x020 // Double (64 bit floating) ! 668: #define FP_FORMAT_Q 0x030 // Quad (64 bit integer) ! 669: #define FP_FORMAT_SHIFT 4 ! 670: ! 671: // ! 672: // Define the 2 bit rounding mode field. ! 673: // ! 674: ! 675: #define FP_ROUND_MASK 0x0C0 ! 676: #define FP_ROUND_C 0x000 // Chopped ! 677: #define FP_ROUND_M 0x040 // Minus Infinity ! 678: #define FP_ROUND_N 0x080 // Nearest ! 679: #define FP_ROUND_D 0x0C0 // Dynamic ! 680: #define FP_ROUND_SHIFT 6 ! 681: ! 682: // ! 683: // Define the 3 bit trap enable field. ! 684: // ! 685: ! 686: #define FP_TRAP_ENABLE_MASK 0x700 ! 687: #define FP_TRAP_ENABLE_NONE 0x000 ! 688: #define FP_TRAP_ENABLE_U 0x100 // Underflow ! 689: #define FP_TRAP_ENABLE_I 0x200 // Inexact ! 690: ! 691: #define FP_TRAP_ENABLE_S 0x400 // Software Completion ! 692: #define FP_TRAP_ENABLE_SU 0x500 ! 693: #define FP_TRAP_ENABLE_SUI 0x700 ! 694: ! 695: #define FP_TRAP_ENABLE_V 0x100 // Integer Overflow ! 696: #define FP_TRAP_ENABLE_SV 0x500 ! 697: #define FP_TRAP_ENABLE_SVI 0x700 ! 698: ! 699: #define FP_TRAP_ENABLE_SHIFT 8 ! 700: ! 701: // ! 702: // VAX and IEEE function flags (or'd with VAX and IEEE function code) ! 703: // ! 704: ! 705: #define MSK_FP_FLAGS 0x7C0 ! 706: ! 707: #define C_FLAGS 0x000 ! 708: #define M_FLAGS 0x040 ! 709: #define NONE_FLAGS 0x080 ! 710: #define D_FLAGS 0x0C0 ! 711: #define UC_FLAGS 0x100 ! 712: #define VC_FLAGS 0x100 ! 713: #define UM_FLAGS 0x140 ! 714: #define VM_FLAGS 0x140 ! 715: #define U_FLAGS 0x180 ! 716: #define V_FLAGS 0x180 ! 717: #define UD_FLAGS 0x1C0 ! 718: #define VD_FLAGS 0x1C0 ! 719: #define SC_FLAGS 0x400 ! 720: #define S_FLAGS 0x480 ! 721: #define SUC_FLAGS 0x500 ! 722: #define SVC_FLAGS 0x500 ! 723: #define SUM_FLAGS 0x540 ! 724: #define SVM_FLAGS 0x540 ! 725: #define SU_FLAGS 0x580 ! 726: #define SV_FLAGS 0x580 ! 727: #define SUD_FLAGS 0x5C0 ! 728: #define SVD_FLAGS 0x5C0 ! 729: #define SUIC_FLAGS 0x700 ! 730: #define SVIC_FLAGS 0x700 ! 731: #define SUIM_FLAGS 0x740 ! 732: #define SVIM_FLAGS 0x740 ! 733: #define SUI_FLAGS 0x780 ! 734: #define SVI_FLAGS 0x780 ! 735: #define SUID_FLAGS 0x7C0 ! 736: #define SVID_FLAGS 0x7C0 ! 737: ! 738: #define C_FLAGS_STR "/c" ! 739: #define M_FLAGS_STR "/m" ! 740: #define NONE_FLAGS_STR "" ! 741: #define D_FLAGS_STR "/d" ! 742: #define UC_FLAGS_STR "/uc" ! 743: #define VC_FLAGS_STR "/vc" ! 744: #define UM_FLAGS_STR "/um" ! 745: #define VM_FLAGS_STR "/vm" ! 746: #define U_FLAGS_STR "/u" ! 747: #define V_FLAGS_STR "/v" ! 748: #define UD_FLAGS_STR "/ud" ! 749: #define VD_FLAGS_STR "/vd" ! 750: #define SC_FLAGS_STR "/sc" ! 751: #define S_FLAGS_STR "/s" ! 752: #define SUC_FLAGS_STR "/suc" ! 753: #define SVC_FLAGS_STR "/svc" ! 754: #define SUM_FLAGS_STR "/sum" ! 755: #define SVM_FLAGS_STR "/svm" ! 756: #define SU_FLAGS_STR "/su" ! 757: #define SV_FLAGS_STR "/sv" ! 758: #define SUD_FLAGS_STR "/sud" ! 759: #define SVD_FLAGS_STR "/svd" ! 760: #define SUIC_FLAGS_STR "/suic" ! 761: #define SVIC_FLAGS_STR "/svic" ! 762: #define SUIM_FLAGS_STR "/suim" ! 763: #define SVIM_FLAGS_STR "/svim" ! 764: #define SUI_FLAGS_STR "/sui" ! 765: #define SVI_FLAGS_STR "/svi" ! 766: #define SUID_FLAGS_STR "/suid" ! 767: #define SVID_FLAGS_STR "/svid" ! 768: ! 769: // ! 770: // Type (9) PALcode Instruction Format. ! 771: // ! 772: // 3 2 2 ! 773: // 1 6 5 0 ! 774: // +-----------+---------------------------------------------------+ ! 775: // | opcode | PALcode func | ! 776: // +-----------+---------------------------------------------------+ ! 777: // ! 778: ! 779: typedef struct _Alpha_PAL_Format { ! 780: ULONG Function : 26; ! 781: ULONG Opcode : 6; ! 782: } Alpha_PAL_Format; ! 783: ! 784: // ! 785: // Call to PAL function codes (in Function, Opcode 0, CALLPAL_OP). ! 786: // ! 787: // N.B. - if new call pal functions are added, they must also be added ! 788: // in genalpha.c, genalpha.c will generate the include file for .s files ! 789: // that will define the call pal mnemonics for assembly language use ! 790: // ! 791: ! 792: #define PRIV_PAL_FUNC 0x0 ! 793: #define UNPRIV_PAL_FUNC 0x80 ! 794: ! 795: ! 796: // ! 797: // Unprivileged call pal functions. ! 798: // ! 799: ! 800: #define BPT_FUNC (UNPRIV_PAL_FUNC | 0x00) ! 801: #define CALLSYS_FUNC (UNPRIV_PAL_FUNC | 0x03) ! 802: #define IMB_FUNC (UNPRIV_PAL_FUNC | 0x06) ! 803: #define GENTRAP_FUNC (UNPRIV_PAL_FUNC | 0xAA) ! 804: #define RDTEB_FUNC (UNPRIV_PAL_FUNC | 0xAB) ! 805: #define KBPT_FUNC (UNPRIV_PAL_FUNC | 0xAC) ! 806: #define CALLKD_FUNC (UNPRIV_PAL_FUNC | 0xAD) ! 807: ! 808: #define BPT_FUNC_STR "bpt" ! 809: #define CALLSYS_FUNC_STR "callsys" ! 810: #define IMB_FUNC_STR "imb" ! 811: #define RDTEB_FUNC_STR "rdteb" ! 812: #define GENTRAP_FUNC_STR "gentrap" ! 813: #define KBPT_FUNC_STR "kbpt" ! 814: #define CALLKD_FUNC_STR "callkd" ! 815: ! 816: // ! 817: // Priveleged call pal functions. ! 818: // ! 819: ! 820: #define HALT_FUNC (PRIV_PAL_FUNC | 0x00) ! 821: #define RESTART_FUNC (PRIV_PAL_FUNC | 0x01) ! 822: #define DRAINA_FUNC (PRIV_PAL_FUNC | 0x02) ! 823: #define INITPAL_FUNC (PRIV_PAL_FUNC | 0x04) ! 824: #define WRENTRY_FUNC (PRIV_PAL_FUNC | 0x05) ! 825: #define SWPIRQL_FUNC (PRIV_PAL_FUNC | 0x06) ! 826: #define RDIRQL_FUNC (PRIV_PAL_FUNC | 0x07) ! 827: #define DI_FUNC (PRIV_PAL_FUNC | 0X08) ! 828: #define EI_FUNC (PRIV_PAL_FUNC | 0x09) ! 829: #define SWPPAL_FUNC (PRIV_PAL_FUNC | 0x0A) ! 830: #define SSIR_FUNC (PRIV_PAL_FUNC | 0x0C) ! 831: #define CSIR_FUNC (PRIV_PAL_FUNC | 0x0D) ! 832: #define RFE_FUNC (PRIV_PAL_FUNC | 0x0E) ! 833: #define RETSYS_FUNC (PRIV_PAL_FUNC | 0x0F) ! 834: #define SWPCTX_FUNC (PRIV_PAL_FUNC | 0x10) ! 835: #define SWPPROCESS_FUNC (PRIV_PAL_FUNC | 0x11) ! 836: #define RDMCES_FUNC (PRIV_PAL_FUNC | 0x12) ! 837: #define WRMCES_FUNC (PRIV_PAL_FUNC | 0x13) ! 838: #define TBIA_FUNC (PRIV_PAL_FUNC | 0x14) ! 839: #define TBIS_FUNC (PRIV_PAL_FUNC | 0x15) ! 840: #define DTBIS_FUNC (PRIV_PAL_FUNC | 0x16) ! 841: #define RDKSP_FUNC (PRIV_PAL_FUNC | 0x18) ! 842: #define SWPKSP_FUNC (PRIV_PAL_FUNC | 0x19) ! 843: #define RDPSR_FUNC (PRIV_PAL_FUNC | 0x1A) ! 844: #define RDPCR_FUNC (PRIV_PAL_FUNC | 0x1C) ! 845: #define RDTHREAD_FUNC (PRIV_PAL_FUNC | 0x1E) ! 846: #define RDCOUNTERS_FUNC (PRIV_PAL_FUNC | 0x30) ! 847: #define RDSTATE_FUNC (PRIV_PAL_FUNC | 0x31) ! 848: #define WRPERFMON_FUNC (PRIV_PAL_FUNC | 0x32) ! 849: ! 850: #define HALT_FUNC_STR "halt" ! 851: #define RESTART_FUNC_STR "restart" ! 852: #define DRAINA_FUNC_STR "draina" ! 853: #define INITPAL_FUNC_STR "initpal" ! 854: #define WRENTRY_FUNC_STR "wrentry" ! 855: #define SWPIRQL_FUNC_STR "swpirql" ! 856: #define RDIRQL_FUNC_STR "rdirql" ! 857: #define DI_FUNC_STR "di" ! 858: #define EI_FUNC_STR "ei" ! 859: #define SWPPAL_FUNC_STR "swppal" ! 860: #define SSIR_FUNC_STR "ssir" ! 861: #define CSIR_FUNC_STR "csir" ! 862: #define RFE_FUNC_STR "rfe" ! 863: #define RETSYS_FUNC_STR "retsys" ! 864: #define SWPCTX_FUNC_STR "swpctx" ! 865: #define SWPPROCESS_FUNC_STR "swpprocess" ! 866: #define RDMCES_FUNC_STR "rdmces" ! 867: #define WRMCES_FUNC_STR "wrmces" ! 868: #define TBIA_FUNC_STR "tbia" ! 869: #define TBIS_FUNC_STR "tbis" ! 870: #define DTBIS_FUNC_STR "dtbis" ! 871: #define RDKSP_FUNC_STR "rdksp" ! 872: #define SWPKSP_FUNC_STR "swpksp" ! 873: #define RDPSR_FUNC_STR "rdpsr" ! 874: #define RDPCR_FUNC_STR "rdpcr" ! 875: #define RDTHREAD_FUNC_STR "rdthread" ! 876: #define RDCOUNTERS_FUNC_STR "rdcounters" ! 877: #define RDSTATE_FUNC_STR "rdstate" ! 878: #define WRPERFMON_FUNC_STR "wrperfmon" ! 879: ! 880: // ! 881: // 21064 (ev4) - specific call pal functions. ! 882: // ! 883: ! 884: #define INITPCR_FUNC (PRIV_PAL_FUNC | 0x38) ! 885: ! 886: #define INITPCR_FUNC_STR "initpcr" ! 887: ! 888: // ! 889: // Type (10) EV4 MTPR/MFPR PAL mode instructions. ! 890: // ! 891: // 3 2 2 2 2 1 1 ! 892: // 1 6 5 1 0 6 5 8 7 6 5 4 0 ! 893: // +-----------+---------+---------+---------------+-+-+-+---------+ ! 894: // | opcode | Ra | Rb | IGN |P|A|I| Index | ! 895: // +-----------+---------+---------+---------------+-+-+-+---------+ ! 896: // ! 897: ! 898: typedef struct _Alpha_EV4_PR_Format { ! 899: ULONG Index : 5; ! 900: ULONG Ibox : 1; ! 901: ULONG Abox : 1; ! 902: ULONG PalTemp : 1; ! 903: ULONG IGN : 8; ! 904: ULONG Rb : 5; ! 905: ULONG Ra : 5; ! 906: ULONG Opcode : 6; ! 907: } Alpha_EV4_PR_Format; ! 908: ! 909: #define MTPR_OP 0x1D ! 910: #define MFPR_OP 0x19 ! 911: ! 912: #define MTPR_OP_STR "mt" ! 913: #define MFPR_OP_STR "mf" ! 914: ! 915: // ! 916: // Type (11) EV4 special memory PAL mode access. ! 917: // ! 918: // 3 2 2 2 2 1 1 1 1 1 1 ! 919: // 1 6 5 1 0 6 5 4 3 2 1 0 ! 920: // +-----------+---------+---------+-+-+-+-+-----------------------+ ! 921: // | opcode | Ra | Rb |P|A|R|Q| Disp | ! 922: // +-----------+---------+---------+-+-+-+-+-----------------------+ ! 923: // ! 924: ! 925: typedef struct _Alpha_EV4_MEM_Format { ! 926: ULONG Disp : 12; ! 927: ULONG QuadWord : 1; ! 928: ULONG RWcheck : 1; ! 929: ULONG Alt : 1; ! 930: ULONG Physical : 1; ! 931: ULONG Rb : 5; ! 932: ULONG Ra : 5; ! 933: ULONG Opcode : 6; ! 934: } Alpha_EV4_MEM_Format; ! 935: ! 936: #define HWLD_OP 0x1B ! 937: #define HWST_OP 0x1F ! 938: ! 939: #define HWLD_OP_STR "hwld" ! 940: #define HWST_OP_STR "hwst" ! 941: ! 942: // Type (12) EV4 PAL mode switch. ! 943: // ! 944: // 3 2 2 2 2 1 1 1 1 ! 945: // 1 6 5 1 0 6 5 4 3 0 ! 946: // +-----------+---------+---------+-+-+---------------------------+ ! 947: // | opcode | Ra | Rb |1|0| IGN | ! 948: // +-----------+---------+---------+-+-+---------------------------+ ! 949: ! 950: typedef struct _Alpha_EV4_REI_Format { ! 951: ULONG IGN : 14; ! 952: ULONG zero : 1; ! 953: ULONG one : 1; ! 954: ULONG Rb : 5; ! 955: ULONG Ra : 5; ! 956: ULONG Opcode : 6; ! 957: } Alpha_EV4_REI_Format; ! 958: ! 959: #define REI_OP 0x1E ! 960: ! 961: #define REI_OP_STR "rei" ! 962: ! 963: // ! 964: // ! 965: // ! 966: typedef union _Alpha_Instruction { ! 967: ULONG Long; ! 968: UCHAR Byte[4]; ! 969: ! 970: Alpha_Memory_Format Memory; ! 971: Alpha_Jump_Format Jump; ! 972: Alpha_Branch_Format Branch; ! 973: Alpha_OpReg_Format OpReg; ! 974: Alpha_OpLit_Format OpLit; ! 975: Alpha_FpOp_Format FpOp; ! 976: Alpha_PAL_Format Pal; ! 977: Alpha_EV4_PR_Format EV4_PR; ! 978: Alpha_EV4_MEM_Format EV4_MEM; ! 979: Alpha_EV4_REI_Format EV4_REI; ! 980: } ALPHA_INSTRUCTION, *PALPHA_INSTRUCTION; ! 981: ! 982: // ! 983: // Define standard integer register assignments. ! 984: // ! 985: ! 986: #define V0_REG 0 // v0 - return value register ! 987: ! 988: #define T0_REG 1 // t0 - temporary register ! 989: #define T1_REG 2 // t1 - temporary register ! 990: #define T2_REG 3 // t2 - temporary register ! 991: #define T3_REG 4 // t3 - temporary register ! 992: #define T4_REG 5 // t4 - temporary register ! 993: #define T5_REG 6 // t5 - temporary register ! 994: #define T6_REG 7 // t6 - temporary register ! 995: #define T7_REG 8 // t7 - temporary register ! 996: ! 997: #define S0_REG 9 // s0 - saved register ! 998: #define S1_REG 10 // s1 - saved register ! 999: #define S2_REG 11 // s2 - saved register ! 1000: #define S3_REG 12 // s3 - saved register ! 1001: #define S4_REG 13 // s4 - saved register ! 1002: #define S5_REG 14 // s5 - saved register ! 1003: ! 1004: #define S6_REG 15 // s6 - saved register, aka fp ! 1005: #define FP_REG 15 // fp - frame pointer register ! 1006: ! 1007: #define A0_REG 16 // a0 - argument register ! 1008: #define A1_REG 17 // a1 - argument register ! 1009: #define A2_REG 18 // a2 - argument register ! 1010: #define A3_REG 19 // a3 - argument register ! 1011: #define A4_REG 20 // a4 - argument register ! 1012: #define A5_REG 21 // a5 - argument register ! 1013: ! 1014: #define T8_REG 22 // t8 - temporary register ! 1015: #define T9_REG 23 // t9 - temporary register ! 1016: #define T10_REG 24 // t10 - temporary register ! 1017: #define T11_REG 25 // t11 - temporary register ! 1018: ! 1019: #define RA_REG 26 // ra - return address register ! 1020: #define T12_REG 27 // t12 - temporary register ! 1021: #define AT_REG 28 // at - assembler temporary register ! 1022: #define GP_REG 29 // gp - global pointer register ! 1023: #define SP_REG 30 // sp - stack pointer register ! 1024: #define ZERO_REG 31 // zero - zero register ! 1025: ! 1026: // ! 1027: // Define standard floating point register assignments. ! 1028: // ! 1029: ! 1030: #define F0_REG 0 // floating return value register (real) ! 1031: #define F1_REG 1 // floating return value register (imaginary) ! 1032: #define F16_REG 16 // floating argument register ! 1033: #define FZERO_REG 31 // floating zero register ! 1034: ! 1035: // ! 1036: // Define standard integer register strings ! 1037: // ! 1038: ! 1039: #define V0_REG_STR "v0" // - return value register ! 1040: ! 1041: #define T0_REG_STR "t0" // - temporary register ! 1042: #define T1_REG_STR "t1" // - temporary register ! 1043: #define T2_REG_STR "t2" // - temporary register ! 1044: #define T3_REG_STR "t3" // - temporary register ! 1045: #define T4_REG_STR "t4" // - temporary register ! 1046: #define T5_REG_STR "t5" // - temporary register ! 1047: #define T6_REG_STR "t6" // - temporary register ! 1048: #define T7_REG_STR "t7" // - temporary register ! 1049: ! 1050: #define S0_REG_STR "s0" // - saved register ! 1051: #define S1_REG_STR "s1" // - saved register ! 1052: #define S2_REG_STR "s2" // - saved register ! 1053: #define S3_REG_STR "s3" // - saved register ! 1054: #define S4_REG_STR "s4" // - saved register ! 1055: #define S5_REG_STR "s5" // - saved register ! 1056: ! 1057: #define S6_REG_STR "s6" // - saved register, aka fp ! 1058: #define FP_REG_STR "fp" // - frame pointer register ! 1059: ! 1060: #define A0_REG_STR "a0" // - argument register ! 1061: #define A1_REG_STR "a1" // - argument register ! 1062: #define A2_REG_STR "a2" // - argument register ! 1063: #define A3_REG_STR "a3" // - argument register ! 1064: #define A4_REG_STR "a4" // - argument register ! 1065: #define A5_REG_STR "a5" // - argument register ! 1066: ! 1067: #define T8_REG_STR "t8" // - temporary register ! 1068: #define T9_REG_STR "t9" // - temporary register ! 1069: #define T10_REG_STR "t10" // - temporary register ! 1070: #define T11_REG_STR "t11" // - temporary register ! 1071: ! 1072: #define RA_REG_STR "ra" // - return address register ! 1073: #define T12_REG_STR "t12" // - temporary register ! 1074: #define AT_REG_STR "at" // - assembler temporary register ! 1075: #define GP_REG_STR "gp" // - global pointer register ! 1076: #define SP_REG_STR "sp" // - stack pointer register ! 1077: #define ZERO_REG_STR "zero" // - zero register ! 1078: ! 1079: // ! 1080: // Define maximum and minimum single and double exponent values. ! 1081: // ! 1082: ! 1083: #define DOUBLE_MAXIMUM_EXPONENT 2047 ! 1084: #define DOUBLE_MINIMUM_EXPONENT 0 ! 1085: ! 1086: #define SINGLE_MAXIMUM_EXPONENT 255 ! 1087: #define SINGLE_MINIMUM_EXPONENT 0 ! 1088: ! 1089: // ! 1090: // Define single and double exponent bias values. ! 1091: // ! 1092: ! 1093: #define SINGLE_EXPONENT_BIAS 127 ! 1094: #define DOUBLE_EXPONENT_BIAS 1023 ! 1095: ! 1096: // ! 1097: // Define the largest single and double values. ! 1098: // ! 1099: ! 1100: #define SINGLE_MAXIMUM_VALUE 0x7f7fffff ! 1101: ! 1102: #define DOUBLE_MAXIMUM_VALUE_HIGH 0x7fefffff ! 1103: #define DOUBLE_MAXIMUM_VALUE_LOW 0xffffffff ! 1104: ! 1105: // ! 1106: // Define single and double quiet and signaling Nan values ! 1107: // (these are identical to X86 formats; Mips is different). ! 1108: // ! 1109: ! 1110: #define SINGLE_QUIET_NAN_PREFIX 0x7fc00000 ! 1111: #define SINGLE_SIGNAL_NAN_PREFIX 0x7f800000 ! 1112: #define SINGLE_QUIET_NAN_VALUE 0xffc00000 ! 1113: ! 1114: #define DOUBLE_QUIET_NAN_PREFIX_HIGH 0x7ff80000 ! 1115: #define DOUBLE_SIGNAL_NAN_PREFIX_HIGH 0x7ff00000 ! 1116: #define DOUBLE_QUIET_NAN_VALUE_HIGH 0xfff80000 ! 1117: #define DOUBLE_QUIET_NAN_VALUE_LOW 0x0 ! 1118: ! 1119: // ! 1120: // Define positive single and double infinity values. ! 1121: // ! 1122: ! 1123: #define SINGLE_INFINITY_VALUE 0x7f800000 ! 1124: ! 1125: #define DOUBLE_INFINITY_VALUE_HIGH 0x7ff00000 ! 1126: #define DOUBLE_INFINITY_VALUE_LOW 0x0 ! 1127: ! 1128: // ! 1129: // Quadword versions of the above. ! 1130: // ! 1131: ! 1132: #define DOUBLE_MAXIMUM_VALUE ((ULONGLONG)0x7fefffffffffffff) ! 1133: #define DOUBLE_INFINITY_VALUE ((ULONGLONG)0x7ff0000000000000) ! 1134: #define DOUBLE_QUIET_NAN_VALUE ((ULONGLONG)0xfff8000000000000) ! 1135: ! 1136: // ! 1137: // Define result values for IEEE floating point comparison operations. ! 1138: // True is 2.0 and False is 0.0. ! 1139: // ! 1140: ! 1141: #define FP_COMPARE_TRUE ((ULONGLONG)0x4000000000000000) ! 1142: #define FP_COMPARE_FALSE ((ULONGLONG)0x0000000000000000) ! 1143: ! 1144: // ! 1145: // Define Alpha AXP rounding modes. ! 1146: // ! 1147: ! 1148: #define ROUND_TO_ZERO 0 // round toward zero ! 1149: #define ROUND_TO_MINUS_INFINITY 1 // round toward minus infinity ! 1150: #define ROUND_TO_NEAREST 2 // round to nearest representable value ! 1151: #define ROUND_TO_PLUS_INFINITY 3 // round toward plus infinity ! 1152: ! 1153: #endif // _ALPHAOPS_
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