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1.1 root 1: #ifndef _NTDIS_
2: #define _NTDIS_
3:
4: // #include <excpt.h>
5: // #include <ntdef.h>
6:
7: #
8: // this stuff is all "#if 0"'ed in alphaops.h
9: //
10: // Bit manipulations for Alpha instructions
11: //
12:
13: #define SHFT_OPCODE 26
14: #define SHFT_RA 21
15: #define SHFT_RB 16
16: #define SHFT_JMP_FNC 14
17: #define SHFT_OP_FNC 5
18: #define SHFT_RBV_TYPE 12
19: #define SHFT_LIT 13
20: #define SHFT_FP_FNC 5
21:
22: #define WIDTH_OPCODE 6
23: #define WIDTH_REG 5
24: #define WIDTH_MEM_DISP 16
25: #define WIDTH_HINT 14
26: #define WIDTH_JMP_FNC 2
27: #define WIDTH_BR_DISP 21
28: #define WIDTH_OP_FNC 7
29: #define WIDTH_LIT 8
30: #define WIDTH_FP_FNC 11
31: #define WIDTH_PAL_FNC 26
32:
33: #define BITS_OPCODE ~(-1 << WIDTH_OPCODE)
34: #define BITS_REG ~(-1 << WIDTH_REG)
35: #define BITS_MEM_DISP ~(-1 << WIDTH_MEM_DISP)
36: #define BITS_HINT ~(-1 << WIDTH_HINT)
37: #define BITS_JMP_FNC ~(-1 << WIDTH_JMP_FNC)
38: #define BITS_BR_DISP ~(-1 << WIDTH_BR_DISP)
39: #define BITS_OP_FNC ~(-1 << WIDTH_OP_FNC)
40: #define BITS_LIT ~(-1 << WIDTH_LIT)
41: #define BITS_FP_FNC ~(-1 << WIDTH_FP_FNC)
42: #define BITS_PAL_FNC ~(-1 << WIDTH_PAL_FNC)
43:
44: #define OPCODE(a) ((BITS_OPCODE & (a)) << SHFT_OPCODE)
45: #define REG_A(a) ((BITS_REG & (a)) << SHFT_RA)
46: #define REG_B(a) ((BITS_REG & (a)) << SHFT_RB)
47: #define REG_C(a) (BITS_REG & (a))
48: #define MEM_DISP(a) (BITS_MEM_DISP & (a))
49: #define MEM_FUNC(a) MEM_DISP(a)
50: #define HINT(a) (BITS_HINT & (a))
51: #define JMP_FNC(a) ((BITS_JMP_FNC & (a)) << SHFT_JMP_FNC)
52: #define BR_DISP(a) (BITS_BR_DISP & (a))
53: #define OP_FNC(a) ((BITS_OP_FNC & (a)) << SHFT_OP_FNC)
54: #define RBV_TYPE(a) ((1 & (a)) << SHFT_RBV_TYPE)
55: #define LIT(a) ((BITS_LIT & (a)) << SHFT_LIT)
56: #define FP_FNC(a) ((BITS_FP_FNC & (a)) << SHFT_FP_FNC)
57: #define PAL_FNC(a) (BITS_PAL_FNC & (a))
58:
59: #define MSK_OPCODE OPCODE(BITS_OPCODE)
60: #define MSK_RA GET_RA(BITS_REG)
61: #define MSK_RB REG_B(BITS_REG)
62: #define MSK_RC REG_C(BITS_REG)
63: #define MSK_MEM_DISP DISP(BITS_MEM_DISP)
64: #define MSK_HINT HINT(BITS_HINT)
65: #define MSK_JMP_FNC JMP_FNC(BITS_JMP_FNC)
66: #define MSK_BR_DISP BR_DISP(BITS_BR_DISP)
67: #define MSK_RBV_TYPE RBV_TYPE(1)
68: #define MSK_LIT LIT(BITS_LIT)
69: #define MSK_FP_FNC FP_FNC(BITS_FP_FNC)
70: #define MSK_PAL_FNC PAL_FNC(BITS_PAL_FNC)
71:
72: #define EXTR_OPCODE(a) (((a) & MSK_OPCODE) >> SHFT_OPCODE)
73: #define EXTR_RA(a) (((a) & MSK_RA) >> SHFT_RA)
74: #define EXTR_RB(a) (((a) & MSK_RB) >> SHFT_RA)
75: #define EXTR_RC(a) ((a) & MSK_RC)
76: #define EXTR_MEM_DISP(a) ((a) & MSK_MEM_DISP)
77: #define EXTR_HINT(a) ((a) & MSK_HINT)
78: #define EXTR_JMP_FNC(a) (((a) & MSK_JMP_FNC) >> SHFT_JMP_FNC)
79: #define EXTR_BR_DISP(a) ((a) & MSK_BR_DISP)
80: #define EXTR_RBV_TYPE(a) (((a) & MSK_RBV_TYPE) >> SHFT_RBV_TYPE)
81: #define EXTR_LIT(a) (((a) & MSK_LIT) >> SHFT_LIT)
82: #define EXTR_FP_FNC(a) (((a) & MSK_FP_FNC) >> SHFT_FP_FNC)
83: #define EXTR_PAL_FNC(a) ((a) & MSK_PAL_FNC)
84:
85:
86:
87: //
88: // Bit manipulations for EV4 PAL mode instructions
89: //
90:
91: #define SHFT_EV4_IBOX 5
92: #define SHFT_EV4_ABOX 6
93: #define SHFT_EV4_PALTEMP 7
94: #define SHFT_EV4_QWORD 12
95: #define SHFT_EV4_RWCHECK 13
96: #define SHFT_EV4_ALT 14
97: #define SHFT_EV4_PHYSICAL 15
98:
99: #define WIDTH_EV4_INDEX 5
100: #define WIDTH_EV4_IBOX 1
101: #define WIDTH_EV4_ABOX 1
102: #define WIDTH_EV4_PALTEMP 1
103: #define WIDTH_EV4_DISP 12
104: #define WIDTH_EV4_QWORD 1
105: #define WIDTH_EV4_RWCHECK 1
106: #define WIDTH_EV4_ALT 1
107: #define WIDTH_EV4_PHYSICAL 1
108:
109: #define BITS_EV4_INDEX ~(-1 << WIDTH_EV4_INDEX)
110: #define BITS_EV4_IBOX ~(-1 << WIDTH_EV4_IBOX)
111: #define BITS_EV4_ABOX ~(-1 << WIDTH_EV4_ABOX)
112: #define BITS_EV4_PALTEMP ~(-1 << WIDTH_EV4_PALTEMP)
113: #define BITS_EV4_DISP ~(-1 << WIDTH_EV4_DISP)
114: #define BITS_EV4_QWORD ~(-1 << WIDTH_EV4_QWORD)
115: #define BITS_EV4_RWCHECK ~(-1 << WIDTH_EV4_RWCHECK)
116: #define BITS_EV4_ALT ~(-1 << WIDTH_EV4_ALT)
117: #define BITS_EV4_PHYSICAL ~(-1 << WIDTH_EV4_PHYSICAL)
118:
119: #define EV4_INDEX(a) (BITS_EV4_INDEX & (a))
120: #define EV4_IBOX(a) ((BITS_EV4_IBOX & (a)) << SHFT_EV4_IBOX)
121: #define EV4_ABOX(a) ((BITS_EV4_ABOX & (a)) << SHFT_EV4_ABOX)
122: #define EV4_PALTEMP(a) ((BITS_EV4_PALTEMP & (a)) << SHFT_EV4_PALTEMP)
123: #define EV4_DISP(a) (BITS_EV4_DISP & (a))
124: #define EV4_QWORD(a) ((BITS_EV4_QWORD & (a)) << SHFT_EV4_QWORD)
125: #define EV4_RWCHECK(a) ((BITS_EV4_RWCHECK & (a)) << SHFT_EV4_RWCHECK)
126: #define EV4_ALT(a) ((BITS_EV4_ALT & (a)) << SHFT_EV4_ALT)
127: #define EV4_PHYSICAL(a) ((BITS_EV4_PHYSICAL & (a)) << SHFT_EV4_PHYSICAL)
128:
129: #define MSK_EV4_INDEX EV4_INDEX(BITS_EV4_INDEX)
130: #define MSK_EV4_IBOX EV4_IBOX(BITS_EV4_IBOX)
131: #define MSK_EV4_ABOX EV4_ABOX(BITS_EV4_ABOX)
132: #define MSK_EV4_PALTEMP EV4_PALTEMP(BITS_EV4_PALTEMP)
133: #define MSK_EV4_PR (MSK_EV4_INDEX | MSK_EV4_IBOX | MSK_EV4_ABOX | MSK_EV4_PALTEMP)
134: #define MSK_EV4_DISP EV4_DISP(BITS_EV4_DISP)
135: #define MSK_EV4_QWORD EV4_QWORD(BITS_EV4_QWORD)
136: #define MSK_EV4_RWCHECK EV4_RWCHECK(BITS_EV4_RWCHECK)
137: #define MSK_EV4_ALT EV4_ALT(BITS_EV4_ALT)
138: #define MSK_EV4_PHYSICAL EV4_PHYSICAL(BITS_EV4_PHYSICAL)
139:
140: #define EXTR_EV4_INDEX(a) (MSK_EV4_INDEX & (a))
141: #define EXTR_EV4_IBOX(a) ((MSK_EV4_IBOX & (a)) >> SHFT_EV4_IBOX)
142: #define EXTR_EV4_ABOX(a) ((MSK_EV4_ABOX & (a)) >> SHFT_EV4_ABOX)
143: #define EXTR_EV4_PALTEMP(a) ((MSK_EV4_PALTEMP & (a)) >> SHFT_EV4_PALTEMP)
144: #define EXTR_EV4_DISP(a) (MSK_EV4_DISP & (a))
145: #define EXTR_EV4_QWORD(a) ((MSK_EV4_QWORD & (a)) >> SHFT_EV4_QWORD)
146: #define EXTR_EV4_RWCHECK(a) ((MSK_EV4_RWCHECK & (a)) >> SHFT_EV4_RWCHECK)
147: #define EXTR_EV4_ALT(a) ((MSK_EV4_ALT & (a)) >> SHFT_EV4_ALT)
148: #define EXTR_EV4_PHYSICAL(a) ((MSK_EV4_PHYSICAL & (a)) >> SHFT_EV4_PHYSICAL)
149:
150: #define EV4_TB_TAG (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(0))
151: #define EV4_ITB_PTE (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(1))
152: #define EV4_ICCSR (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(2))
153: #define EV4_ITM_PTE_TEMP (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(3))
154: #define EV4_EXC_ADDR (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(4))
155: #define EV4_SL_RCV (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(5))
156: #define EV4_ITBZAP (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(6))
157: #define EV4_ITBASM (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(7))
158: #define EV4_ITBIS (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(8))
159: #define EV4_PS (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(9))
160: #define EV4_EXC_SUM (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(10))
161: #define EV4_PAL_BASE (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(11))
162: #define EV4_HIRR (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(12))
163: #define EV4_SIRR (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(13))
164: #define EV4_ASTRR (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(14))
165: #define EV4_HIER (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(16))
166: #define EV4_SIER (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(17))
167: #define EV4_ASTER (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(18))
168: #define EV4_SL_CLR (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(19))
169: #define EV4_SL_XMIT (EV4_PALTEMP(0) | EV4_ABOX(0) | EV4_IBOX(1) | EV4_INDEX(22))
170: #define EV4_DTB_CTL (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(0))
171: #define EV4_DTB_PTE (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(2))
172: #define EV4_DTB_PTE_TEMP (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(3))
173: #define EV4_MMCSR (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(4))
174: #define EV4_VA (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(5))
175: #define EV4_DTBZAP (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(6))
176: #define EV4_DTASM (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(7))
177: #define EV4_DTBIS (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(8))
178: #define EV4_BIU_ADDR (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(9))
179: #define EV4_BIU_STAT (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(10))
180: #define EV4_DC_ADDR (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(11))
181: #define EV4_DC_STAT (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(12))
182: #define EV4_FILL_ADDR (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(13))
183: #define EV4_ABOX_CTL (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(14))
184: #define EV4_ALT_MODE (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(15))
185: #define EV4_CC (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(16))
186: #define EV4_CC_CTL (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(17))
187: #define EV4_BIU_CTL (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(18))
188: #define EV4_FILL_SYNDROME (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(19))
189: #define EV4_BC_TAG (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(20))
190: #define EV4_FLUSH_IC (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(21))
191: #define EV4_FLUSH_IC_ASM (EV4_PALTEMP(0) | EV4_ABOX(1) | EV4_IBOX(0) | EV4_INDEX(23))
192: #define EV4_PAL_TEMP(x) (EV4_PALTEMP(1) | EV4_ABOX(0) | EV4_IBOX(0) | EV4_INDEX(x))
193:
194: #endif
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