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1.1 root 1: //
2: // nono
1.1.1.2 root 3: // Copyright (C) 2020 nono project
4: // Licensed under nono-license.txt
1.1 root 5: //
6:
7: #include "console.h"
8: #include "debugger_private.h"
9: #include "debugger_m88xx0.h"
10: #include "m88100disasm.h"
1.1.1.2 root 11: #include "m88100acc.h"
1.1 root 12:
13: // newval が oldval から変化していれば太字属性にするマクロ
14: #define TSBOLD(newval, oldval) (((newval) != (oldval)) ? TA::Em : TA::Off)
15:
16: // cpu->name が変化していれば太字属性にするマクロ
17: #define TSBOLDC(name) TSBOLD(cpu->name, prev.name)
18:
19: // name の mask で示される部分が変化していれば太字属性にする
20: #define TSBOLDM(name, mask) TSBOLD((cpu->name & (mask)), (prev.name & (mask)))
21:
1.1.1.2 root 22: // コンストラクタ
23: DebuggerMD_m88xx0::DebuggerMD_m88xx0(Debugger *parent_, m88kcpu *cpu_)
1.1.1.5 root 24: : inherited(parent_, Debugger::Arch::M88xx0)
1.1.1.2 root 25: {
26: cpu = cpu_;
27:
1.1.1.3 root 28: // 機種依存変数
29: vector_max = 512;
1.1.1.4 root 30: inst_bytes = 4;
31: inst_bytes_fixed = 4;
1.1.1.3 root 32:
1.1.1.2 root 33: cmp_rd = -1;
34: }
35:
36: // デストラクタ
37: DebuggerMD_m88xx0::~DebuggerMD_m88xx0()
38: {
39: }
40:
41: bool
42: DebuggerMD_m88xx0::MMUEnabled() const
43: {
44: // XXX 命令/データの区別がまだないので、とりあえず命令のほうだけ見る
45: uint32 xapr = cpu->cmmu[0].GetAPR(IsSuper() ? 1 : 0);
46: return (xapr & m88200::APR_TE);
47: }
48:
49: // アドレス変換
50: uint64
1.1.1.5 root 51: DebuggerMD_m88xx0::TranslateAddr(saddr_t laddr, bool lookup) const
1.1.1.2 root 52: {
53: m88200 *cmmu;
54:
55: // XXX とりあえずね
1.1.1.5 root 56: if (laddr.IsData() == false) {
1.1.1.2 root 57: cmmu = &cpu->cmmu[0];
58: } else {
59: cmmu = &cpu->cmmu[1];
60: }
61:
1.1.1.5 root 62: return cmmu->TranslatePeek((uint32)laddr, laddr.IsSuper(), lookup);
1.1.1.2 root 63: }
64:
1.1.1.4 root 65: // op が bb0 命令なら true を返す
66: /*static*/ bool
67: DebuggerMD_m88xx0::IsBB0(uint32 op)
68: {
69: return ((op & 0xf8000000) == 0xd0000000); // bb0
70: }
71:
72: // op が tb0 命令なら true を返す
73: /*static*/ bool
74: DebuggerMD_m88xx0::IsTB0(uint32 op)
75: {
76: return ((op & 0xfc00fe00) == 0xf000d000); // tb0
77: }
78:
1.1.1.2 root 79: // op が bb0/tb0 命令なら true を返す
80: /*static*/ bool
81: DebuggerMD_m88xx0::IsBBTB0(uint32 op)
82: {
1.1.1.4 root 83: return IsBB0(op) || IsTB0(op);
1.1.1.2 root 84: }
85:
86: // op が bb1 命令なら true を返す
87: /*static*/ bool
88: DebuggerMD_m88xx0::IsBB1(uint32 op)
89: {
90: return ((op & 0xf8000000) == 0xd8000000); // bb1
91: }
92:
93: // op が tb1 命令なら true を返す
94: /*static*/ bool
95: DebuggerMD_m88xx0::IsTB1(uint32 op)
96: {
97: return ((op & 0xfc00fe00) == 0xf000d800); // tb1
98: }
99:
100: // op が bb1/tb1 命令なら true を返す
101: /*static*/ bool
102: DebuggerMD_m88xx0::IsBBTB1(uint32 op)
103: {
104: return IsBB1(op) || IsTB1(op);
105: }
106:
1.1 root 107: void
108: DebuggerMD_m88xx0::BackupRegs()
109: {
110: prev = (m88100reg)*cpu;
111: }
112:
1.1.1.2 root 113: void
114: DebuggerMD_m88xx0::SetStepOut()
115: {
116: so_r1 = cpu->r[1];
117: }
118:
119: bool
120: DebuggerMD_m88xx0::IsStepOut() const
121: {
122: return (cpu->xip == so_r1);
123: }
124:
1.1.1.4 root 125: // この命令がステップイン出来るなら true を返す
126: bool
1.1.1.5 root 127: DebuggerMD_m88xx0::IsOpStepIn(DebuggerMemoryStream& mem)
1.1.1.4 root 128: {
1.1.1.5 root 129: uint32 op = mem.FetchInst();
130:
1.1.1.4 root 131: if ((op & 0xf800'0000) == 0xc800'0000 // bsr
132: || IsTB0(op) // tb0
133: || (IsTB1(op) && ((op >> 16) & 0x1f) != 0) // tb1 (except r0)
134: || (op & 0xfc00'fe00) == 0xf000'e800 // tcnd
135: || (op & 0xfc00'fb00) == 0xf400'c800 // jsr
136: || (op & 0xfc00'0000) == 0xf800'0000 // tbnd imm
137: || (op & 0xfc00'ffe0) == 0xf400'f800 // tbnd rs2
138: ) {
139: return true;
140: }
141:
142: return false;
143: }
144:
1.1 root 145: // レジスタ名からそのレジスタ値を返す。
146: // メモリダンプのような用途なのでアドレスとして使えるアドレスのみ。
147: uint64
148: DebuggerMD_m88xx0::GetRegAddr(const char *name) const
149: {
150: char buf[8];
151:
152: if (strcmp(name, "xip") == 0) return cpu->xip;
153: if (strcmp(name, "nip") == 0) return cpu->nip;
154: if (strcmp(name, "fip") == 0) return cpu->fip;
155:
156: // 制御レジスタ
157: //if (strcmp(name, "pid") == 0) return cpu->pid;
158: //if (strcmp(name, "psr") == 0) return cpu->psr;
159: //if (strcmp(name, "epsr") == 0) return cpu->epsr;
160: //if (strcmp(name, "ssbr") == 0) return cpu->ssbr;
1.1.1.2 root 161: if (strcmp(name, "sxip") == 0) return cpu->sxip & m88100reg::SIP_MASK;
162: if (strcmp(name, "snip") == 0) return cpu->snip & m88100reg::SIP_MASK;
163: if (strcmp(name, "sfip") == 0) return cpu->sfip & m88100reg::SIP_MASK;
1.1 root 164: if (strcmp(name, "vbr") == 0) return cpu->vbr;
165: //if (strcmp(name, "dmt0") == 0) return cpu->dmt0;
166: if (strcmp(name, "dmd0") == 0) return cpu->dmd0;
167: if (strcmp(name, "dma0") == 0) return cpu->dma0;
168: //if (strcmp(name, "dmt1") == 0) return cpu->dmt1;
169: if (strcmp(name, "dmd1") == 0) return cpu->dmd1;
170: if (strcmp(name, "dma1") == 0) return cpu->dma1;
171: //if (strcmp(name, "dmt2") == 0) return cpu->dmt2;
172: if (strcmp(name, "dmd2") == 0) return cpu->dmd2;
173: if (strcmp(name, "dma2") == 0) return cpu->dma2;
174: if (strcmp(name, "sr0") == 0) return cpu->sr[0];
175: if (strcmp(name, "sr1") == 0) return cpu->sr[1];
176: if (strcmp(name, "sr2") == 0) return cpu->sr[2];
177: if (strcmp(name, "sr3") == 0) return cpu->sr[3];
178:
179: for (int i = 0; i < countof(cpu->cr); i++) {
180: snprintf(buf, sizeof(buf), "cr%d", i);
181: if (strcmp(name, buf) == 0) {
182: return cpu->cr[i];
183: }
184: }
185:
186: // FPU レジスタ
187: // XXX not implement
188:
189: // 通常レジスタ
190: for (int i = 0; i < countof(cpu->r); i++) {
191: snprintf(buf, sizeof(buf), "r%d", i);
192: if (strcmp(name, buf) == 0) {
193: return cpu->r[i];
194: }
195: }
196:
197: return (uint64)-1;
198: }
199:
1.1.1.2 root 200: // レジスタ表示系コマンドのヘルプ
201: /*static*/ const HelpMessages
1.1.1.5 root 202: DebuggerMD_m88xx0::HelpListReg = {
1.1.1.4 root 203: { "r", "Show general registers" },
204: { "rc", "Show (integer) control registers" },
205: { "rf", "Show floating point control registers" },
206: { "ro", "Show other (shadow) registers" },
207: { "ra<id>", "Show ATC on CMMU<id>" },
208: { "rd<id>", "Show data cache on CMMU<id>" },
209: { "rm<id>", "Show CMMU<id> registers" },
1.1.1.2 root 210: };
211:
1.1.1.5 root 212: /*static*/ const HelpMessages
213: DebuggerMD_m88xx0::HelpReg = {
214: //-----
215: { "r", R"**(
216: Command: r
217:
218: Shows general registers.
219: )**" },
220:
221: //-----
222: { "rc", R"**(
223: Command: rc
224:
225: Shows the (integer) control registers.
226: )**" },
227:
228: //-----
229: { "rf", R"**(
230: Command: rf
231:
232: Shows the floating point control registers.
233: )**" },
234:
235: //-----
236: { "ro", R"**(
237: Command: ro
238:
239: Shows the other registers.
240: )**" },
241:
242: //-----
243: { "ra", R"**(
244: Command: ra<id> <id> := 7, 6
245:
246: Shows BATC/PATC on CMMU<id>.
247: CMMU7 is instruction CMMU of CPU#0.
248: CMMU6 is data CMMU of CPU#0.
249: )**" },
250: { "ra6", "=ra" },
251: { "ra7", "=ra" },
252:
253: //-----
254: { "rd", R"**(
255: Command: rd<id> <id> := 7, 6
256:
257: Shows data cache on CMMU<id>.
258: CMMU7 is instruction CMMU of CPU#0.
259: CMMU6 is data CMMU of CPU#0.
260: )**" },
261: { "rd6", "=rd" },
262: { "rd7", "=rd" },
263:
264: //-----
265: { "rm", R"**(
266: Command: rm<id> <id> := 7, 6
267:
268: Shows CMMU<id> registers.
269: CMMU7 is instruction CMMU of CPU#0.
270: CMMU6 is data CMMU of CPU#0.
271: )**" },
272: { "rm6", "=rm" },
273: { "rm7", "=rm" },
274: };
275:
276: const HelpMessages&
277: DebuggerMD_m88xx0::GetHelpListReg() const
278: {
279: return HelpListReg;
280: }
281:
1.1.1.2 root 282: const HelpMessages&
1.1.1.5 root 283: DebuggerMD_m88xx0::GetHelpReg() const
1.1.1.2 root 284: {
1.1.1.5 root 285: return HelpReg;
1.1.1.2 root 286: }
287:
288: // レジスタ表示系コマンド
289: bool
290: DebuggerMD_m88xx0::ShowRegister(Console *cons,
291: const std::vector<std::string>& args)
292: {
293: int cmmu_id;
294:
295: // 余分な引数は無視する?
296:
297: if (args[0] == "r") {
298: ShowRegMain(cons);
299: return true;
300: }
301: if (args[0] == "rc") {
302: ShowRegCtrl(cons);
303: return true;
304: }
305: if (args[0] == "rf") {
306: ShowRegFPU(cons);
307: return true;
308: }
309: if (args[0] == "ro") {
310: ShowRegOther(cons);
311: return true;
312: }
313:
314: if (MatchCMMUCmd(args[0], "ra", &cmmu_id)) {
315: parent->ShowMonitor(*gMPU88200ATC[7 - cmmu_id]);
316: return true;
317: }
318: if (MatchCMMUCmd(args[0], "rd", &cmmu_id)) {
319: ShowRegCache(cons, args, cmmu_id);
320: return true;
321: }
322: if (MatchCMMUCmd(args[0], "rm", &cmmu_id)) {
323: ShowRegMMU(cons, cmmu_id);
324: return true;
325: }
326:
327: // 該当なし
328: return false;
329: }
330:
331: // CMMU ID 入りコマンド名を照合する。
332: // cmdname が basename + <id> の時、*idp に id を格納して true を返す。
333: // 一致しないか id が不正なら false を返す。
334: bool
335: DebuggerMD_m88xx0::MatchCMMUCmd(const std::string& cmdname,
336: const char *basename, int *idp)
337: {
338: int baselen = strlen(basename);
339:
340: if (strncmp(cmdname.c_str(), basename, baselen) != 0) {
341: return false;
342: }
343:
344: // 先頭が一致したら id を調べる
345: int id;
346: const char *start = cmdname.c_str() + baselen;
347: char *end;
348: errno = 0;
349: id = strtoul(start, &end, 10);
350: if (*start == '\0' || *end != '\0' || errno == ERANGE) {
351: return false;
352: }
353:
354: *idp = id;
355: return true;
356: }
357:
1.1 root 358: void
359: DebuggerMD_m88xx0::ShowRegMain(Console *cons)
360: {
361: TextScreen s(80, 8);
362:
1.1.1.2 root 363: /*
364: r0 :00000000 r8 :00000000 r16:00000000 r24:00000000 b:bs=1 a:lo=1 8:ls=0
365: r1 :00700000 r9 :00000000 r17:00000000 r25:00000000
366: r2 :0070e1a0 r10:00000000 r18:00000000 r26:00000000
367: */
368:
1.1 root 369: for (int i = 0; i < countof(cpu->r); i++) {
370: s.Print((i / 8) * 14, i % 8, TSBOLDC(r[i]), "r%-2d:%08x", i, cpu->r[i]);
371: }
372:
1.1.1.2 root 373: // cmp 以降最初の分岐命令で結果レジスタの条件ビットマップを表示する。
374: // 分岐命令は bb1 #3 みたいな形式なのでそれだけでは条件演算子が分からない
375: // のと、bb1 #n 自体は cmp 以外に対しても使えるので、cmp 命令以降最初の
376: // 分岐命令でのみ表示してみる。
377: if (cmp_rd >= 0 && (IsBBTB0(cpu->opX) || IsBBTB1(cpu->opX))) {
378: static const char * const cmpstr[] = {
379: NULL, NULL, "eq", "ne", "gt", "le", "lt", "ge",
380: "hi", "ls", "lo", "hs",
381: };
382: int x = 0;
383: int y = 0;
384: uint32 res = cpu->r[cmp_rd];
385: for (int b = 11; b >= 2; b--) {
386: s.Print(57 + x * 7, y, "%x:%s=%d", b, cmpstr[b],
387: (res & (1 << b)) ? 1 : 0);
388: x++;
389: if (x > 2) {
390: x = 0;
391: y++;
392: }
393: }
394: }
395:
396: parent->ShowTextScreen(s);
1.1 root 397: }
398:
399: void
400: DebuggerMD_m88xx0::ShowRegCtrl(Console *cons)
401: {
402: TextScreen s(80, 6);
403: int x;
404: int y;
405:
406: /*
407: 0 1 2 3 4 5 6 7
408: 0123456789012345678901234567890123456789012345678901234567890123456789012345678
1.1.1.4 root 409: pid (cr0):12345678(Arch=$00 Ver=$00 M/C=Checker) sr0(cr17):00000000
410: psr (cr1):12345678(S,LE,SER,Cy SFD1,MXM,IND,SFRZ) sr1(cr18):00000000
411: epsr(cr2):12345678(S,LE,SER,Cy SFD1,MXM,IND,SFRZ) sr2(cr19):00000000
412: xip:00000000 opX:00000000(--) sxip(cr4):00000000:VE sr3(cr20):00000000
413: nip:00000000 opF:00000000(--) snip(cr5):00000000:-- ssbr(cr3):00000000
414: fip:00000000 sfip(cr6):00000000:VE vbr (cr7):00000000
1.1 root 415: */
416:
417: #define PRINT_B(x, y, reg, mask, fmt, arg) do { \
418: uint32 _new = cpu->reg & (mask); \
419: uint32 _old = prev.reg & (mask); \
420: s.Print((x), (y), TSBOLD(_new, _old), fmt, (arg)); \
421: } while (0)
422:
423: // pid(cr0)
424: x = 0;
425: y = 0;
1.1.1.2 root 426: s.Print(x, y, TSBOLDC(pid), "pid (cr0):%08x(", cpu->pid);
427: PRINT_B(x + 19, y, pid, m88100reg::PID_REV_MASK, "Arch=$%02x",
428: (_new >> 8) & 0xff);
429: PRINT_B(x + 28, y, pid, m88100reg::PID_VER_MASK, "Ver=$%02x",
430: (_new >> 1) & 0x7f);
431: PRINT_B(x + 36, y, pid, m88100reg::PID_MASTER, "M/C=%s)",
432: (_new & m88100reg::PID_MASTER) ? "Master" : "Checker");
1.1 root 433:
434: // psr(cr1)
435: y++;
436: s.Print(x, y, TSBOLDC(psr), "psr (cr1):%08x", cpu->psr);
437: s.Print(x + 18, y, "(s,le,ser,cy sfd1,mxm,ind,sfrz)");
438: PRINT_B(x + 19, y, psr, m88100reg::PSR_SUPER, "%c", _new ? 'S' : '-');
439: PRINT_B(x + 21, y, psr, m88100reg::PSR_BO_LE, "%s", _new ? "LE" : "BE");
440: PRINT_B(x + 24, y, psr, m88100reg::PSR_SER, "%s", _new ? "CON" : "SER");
441: PRINT_B(x + 28, y, psr, m88100reg::PSR_C, "%s", _new ? "Cy" : "--");
442: PRINT_B(x + 31, y, psr, m88100reg::PSR_SFD1, "%s", _new ? "SFD1" : "----");
443: PRINT_B(x + 36, y, psr, m88100reg::PSR_MXM, "%s", _new ? "MXM" : "---");
444: PRINT_B(x + 40, y, psr, m88100reg::PSR_IND, "%s", _new ? "IND" : "---");
445: PRINT_B(x + 44, y, psr, m88100reg::PSR_SFRZ, "%s", _new ? "SFRZ" : "----");
446:
447: // epsr(cr2)
448: y++;
1.1.1.4 root 449: s.Print(x, y, TSBOLDC(epsr), "epsr(cr2):%08x", cpu->epsr);
1.1 root 450: s.Print(x + 18, y, "(s,le,ser,cy sfd1,mxm,ind,sfrz)");
451: PRINT_B(x + 19, y, epsr, m88100reg::PSR_SUPER, "%c", _new ? 'S' : '-');
452: PRINT_B(x + 21, y, epsr, m88100reg::PSR_BO_LE, "%s", _new ? "LE" : "BE");
453: PRINT_B(x + 24, y, epsr, m88100reg::PSR_SER, "%s", _new ? "CON" : "SER");
454: PRINT_B(x + 28, y, epsr, m88100reg::PSR_C, "%s", _new ? "Cy" : "--");
455: PRINT_B(x + 31, y, epsr, m88100reg::PSR_SFD1, "%s", _new ? "SFD1":"----");
456: PRINT_B(x + 36, y, epsr, m88100reg::PSR_MXM, "%s", _new ? "MXM" : "---");
457: PRINT_B(x + 40, y, epsr, m88100reg::PSR_IND, "%s", _new ? "IND" : "---");
458: PRINT_B(x + 44, y, epsr, m88100reg::PSR_SFRZ, "%s", _new ? "SFRZ":"----");
459:
460: // *IP
461: x = 0;
462: y = 3;
463: s.Print(x, y, "xip:%08x opX:%08x(%c%c)",
464: cpu->xip, (uint32)cpu->opX,
465: cpu->OpIsBusErr(cpu->opX) ? 'B' : '-',
466: cpu->OpIsDelay(cpu->opX) ? 'D' : '-');
467: s.Print(x, y + 1, "nip:%08x opF:%08x(%c%c)",
468: cpu->nip, (uint32)cpu->opF,
469: cpu->OpIsBusErr(cpu->opF) ? 'B' : '-',
470: cpu->OpIsDelay(cpu->opX) ? 'D' : '-');
471: s.Print(x, y + 2, "fip:%08x", cpu->fip);
472:
473: // S*IP
474: x = 32;
475: for (int i = 0; i < 3; i++) {
476: s.Print(x, y + i, TSBOLDC(cr[4 + i]), "%s(cr%d):%08x:%c%c",
477: m88100reg::sipname[i], 4 + i,
478: (cpu->cr[4 + i] & m88100reg::SIP_MASK),
479: (cpu->cr[4 + i] & m88100reg::SIP_V) ? 'V' : '-',
480: (cpu->cr[4 + i] & m88100reg::SIP_E) ? 'E' : '-');
481: }
482:
483: x = 55;
484: y = 0;
485: // SR*
486: for (int i = 0; i < 4; i++) {
487: int rn = 17 + i;
1.1.1.4 root 488: s.Print(x, y++, TSBOLDC(cr[rn]), "sr%d(cr%d):%08x",
1.1 root 489: i, rn, cpu->cr[rn]);
490: }
1.1.1.4 root 491: // ssbr(cr3)
492: s.Print(x, y++, TSBOLDC(ssbr), "ssbr(cr3):%08x", cpu->ssbr);
493: // vbr(cr7)
494: s.Print(x, y++, TSBOLDC(vbr), "vbr (cr7):%08x", cpu->vbr);
1.1 root 495:
1.1.1.2 root 496: parent->ShowTextScreen(s);
497: }
498:
499: // CMMU のデータキャッシュを表示
500: // rd<N> なら概要表示。
501: // rd<N> <set> なら個別セットの詳細表示。
502: void
503: DebuggerMD_m88xx0::ShowRegCache(Console *cons,
504: const std::vector<std::string>& args, int id)
505: {
506: if (args.size() < 2) {
507: ShowRegCacheOverview(cons, id);
508: } else {
509: int set;
510: char *end;
511: errno = 0;
512: set = strtol(args[1].c_str(), &end, 16);
513: if (end == &args[1][0] || *end != '\0' || errno == ERANGE) {
514: cons->Print("<set> must be a number\n");
515: return;
516: }
517: if (set < 0 || set > 256) {
518: cons->Print("<set> must be in 00..ff\n");
519: return;
520: }
521: ShowRegCacheSet(cons, id, set);
522: }
523: }
524:
525: // CMMU データキャッシュの概要表示
526: void
527: DebuggerMD_m88xx0::ShowRegCacheOverview(Console *cons, int id)
528: {
529: TextScreen s(70, 17);
530: m88200 *cmmu;
531:
532: // まだ今の所決め打ち
533: if (id == 7) {
534: cmmu = &cpu->cmmu[0];
535: } else {
536: cmmu = &cpu->cmmu[1];
537: }
538: cmmu->MonitorCacheOverview(s, 0, false);
539: parent->ShowTextScreen(s);
540: }
541:
542: // CMMU データキャッシュの指定セットの詳細表示
543: void
544: DebuggerMD_m88xx0::ShowRegCacheSet(Console *cons, int id, int setidx)
545: {
546: TextScreen s(70, 5);
547: m88200 *cmmu;
548:
549: // まだ今の所決め打ち
550: if (id == 7) {
551: cmmu = &cpu->cmmu[0];
552: } else {
553: cmmu = &cpu->cmmu[1];
554: }
555: cmmu->MonitorCacheSet(s, 0, setidx);
556: parent->ShowTextScreen(s);
1.1 root 557: }
558:
559: void
560: DebuggerMD_m88xx0::ShowRegFPU(Console *cons)
561: {
562: static const char * const fcrname[] = {
563: "fpecr",
564: "fphs1",
565: "fpls1",
566: "fphs2",
567: "fpls2",
568: "fppt",
569: "fprh",
570: "fprl",
571: "fpit",
572: "fpsr", // [9] 62
573: "fpcr", // [10] 63
574: };
575: TextScreen s(80, 4);
576:
577: for (int i = 0; i < 9; i++) {
578: s.Print((i / 4) * 22, i % 4, TSBOLDC(fcr[i]),
579: "%-5s(fcr%d):%08x", fcrname[i], i, cpu->fcr[i]);
580: }
581:
582: s.Print(44, 2, TSBOLDC(fpsr), "fpsr(fcr62):%08x", cpu->fpsr);
583: s.Print(44, 3, TSBOLDC(fpcr), "fpcr(fcr63):%08x", cpu->fpcr);
584:
1.1.1.2 root 585: parent->ShowTextScreen(s);
1.1 root 586: }
587:
588: void
1.1.1.2 root 589: DebuggerMD_m88xx0::ShowRegMMU(Console *cons, int id)
590: {
591: m88200 *cmmu;
592:
593: // まだ今の所決め打ち
594: if (id == 7) {
595: cmmu = &cpu->cmmu[0];
596: } else {
597: cmmu = &cpu->cmmu[1];
598: }
599: parent->ShowMonitor(*cmmu);
600: }
601:
602: void
603: DebuggerMD_m88xx0::ShowRegOther(Console *cons)
1.1 root 604: {
605: TextScreen s(80, 3);
606: /*
607: 0 1 2 3 4 5 6 7
608: 0123456789012345678901234567890123456789012345678901234567890123456789012345678
1.1.1.2 root 609: dmt0(cr8) :0000(B,S,D,L,Rxx,S,---B,W,V) dmd0(cr9) :00000000 dma0(cr10):00000000
610: dmt0(cr11):0000(B,U,D,L,Rxx,S,HH--,W,V) dmd0(cr9) :00000000 dma0(cr10):00000000
611: dmt0(cr14):0000(B, ,D,L,Rxx,S,LLLL,W,V) dmd0(cr9) :00000000 dma0(cr10):00000000
1.1 root 612: */
613: for (int i = 0; i <= 2; i++) {
614: int dt = 8 + i * 3;
615: int dd = 9 + i * 3;
616: int da = 10 + i * 3;
617:
618: s.Print(0, i, TSBOLDC(cr[dt]), "dmt%d(cr%-2d):%04x",
619: i, dt, (cpu->cr[dt] & 0xffff));
1.1.1.2 root 620: s.Print(15, i, "(b,s,d,l,rx, s,en ,w,v)");
1.1 root 621: PRINT_B(16, i, cr[dt], m88100reg::DM_BO, "%c", _new ? 'B' : '-');
1.1.1.2 root 622: PRINT_B(18, i, cr[dt], m88100reg::DM_DAS, "%c", _new ? 'S' : 'U');
623: PRINT_B(20, i, cr[dt], m88100reg::DM_DOUB1, "%c", _new ? 'D' : '-');
624: PRINT_B(22, i, cr[dt], m88100reg::DM_LOCK, "%c", _new ? 'L' : '-');
625: // カンマを前詰め。かつ DREG がボールドでもカンマはボールドにしない
626: PRINT_B(24, i, cr[dt], m88100reg::DM_DREG_MASK, "r%d", _new >> 7);
627: s.Puts(",");
628: PRINT_B(28, i, cr[dt], m88100reg::DM_SIGNED, "%c", _new ? 'S' : '-');
629: PRINT_B(30, i, cr[dt], m88100reg::DM_EN_MASK,"%s",
630: m88100reg::dmt_en_str[(_new >> 2) & 0xf]);
631: PRINT_B(35, i, cr[dt], m88100reg::DM_WRITE, "%c", _new ? 'W' : '-');
632: PRINT_B(37, i, cr[dt], m88100reg::DM_VALID, "%c", _new ? 'V' : '-');
1.1 root 633:
1.1.1.2 root 634: s.Print(40, i, TSBOLDC(cr[dd]), "dmd%d(cr%-2d):%08x",
1.1 root 635: i, dd, cpu->cr[dd]);
1.1.1.2 root 636: s.Print(60, i, TSBOLDC(cr[dd]), "dma%d(cr%2d):%08x",
1.1 root 637: i, da, cpu->cr[da]);
638: }
639:
1.1.1.2 root 640: parent->ShowTextScreen(s);
1.1 root 641: }
642:
643: // 逆アセンブル
644: bool
1.1.1.5 root 645: DebuggerMD_m88xx0::Disassemble(DebuggerMemoryStream& mem,
1.1 root 646: std::string& mnemonic, std::vector<uint8>& bin)
647: {
1.1.1.5 root 648: m88100disasm dis(mem);
649: if (dis.Exec() == false) {
1.1 root 650: return false;
651: }
652: mnemonic = dis.text;
653: bin = dis.bin;
654: return true;
655: }
656:
657: // 逆アセンブルをフォーマット (オフライン版)
658: std::string
659: DebuggerMD_m88xx0::FormatDisasm(const std::string& mnemonic,
660: const std::vector<uint8>& bin)
661: {
662: // 命令はすべて32ビット固定長
663: uint32 op = (bin[0] << 24) | (bin[1] << 16) | (bin[2] << 8) | bin[3];
664: return string_format("%08x %s", op, mnemonic.c_str());
665: }
666:
667: // 逆アセンブルをフォーマット (オンライン版)
668: std::string
669: DebuggerMD_m88xx0::FormatDisasmLive(const std::string& mnemonic,
670: const std::vector<uint8>& bin)
671: {
672: // 命令はすべて32ビット固定長
673: uint32 op = (bin[0] << 24) | (bin[1] << 16) | (bin[2] << 8) | bin[3];
674:
675: // 遅延スロットは分かりやすく表示したい
676: std::string delay;
677: if (cpu->OpIsDelay(cpu->opX)) {
678: delay = "(delayed) ";
679: }
680:
1.1.1.2 root 681: const char *cond = CondStr(op);
682: return string_format("%08x %s%s%s",
683: op, delay.c_str(), mnemonic.c_str(), cond);
684: }
685:
1.1.1.4 root 686: // 例外のベクタ番号から名前を取得。
687: const char *
688: DebuggerMD_m88xx0::GetExceptionName(int vector) const
689: {
690: return m88kcpu::GetExceptionName(vector);
691: }
692:
1.1.1.2 root 693: #define TAKE_IF(expr) do { \
694: if ((expr)) \
695: return " (will take)"; \
696: else \
697: return " (will not take)"; \
698: } while (0)
699:
700: // 条件命令なら、成立可否などの文字列を返す。
701: const char *
702: DebuggerMD_m88xx0::CondStr(uint32 op)
703: {
704: uint32 s = m88100opf_S1(op);
705:
706: if (IsBBTB0(op)) {
707: // 11010N BBBBB SSSSS dddddd dd dddddddd bb0
708: // 111100 BBBBB SSSSS 110100 0V VVVVVVVV tb0
709: // rS の bit B が %0 ならブランチ/トラップ
710: cmp_rd = -1;
711: uint32 b = m88100opf_B5(op);
712: TAKE_IF((cpu->r[s] & (1 << b)) == 0);
713: }
714: if (IsBB1(op)) {
715: // 11011N BBBBB SSSSS dddddd dd dddddddd bb1
716: // rS の bit B が %1 ならブランチ
717: cmp_rd = -1;
718: // 対 r0 なら絶対成立しないので nop
719: if (s == 0) {
720: return " (nop)";
721: }
722: uint32 b = m88100opf_B5(op);
723: TAKE_IF((cpu->r[s] & (1 << b)) != 0);
724: }
725: if (IsTB1(op)) {
726: // 111100 BBBBB SSSSS 110110 0V VVVVVVVV tb1
727: // rS の bit B が %1 ならトラップ
728: cmp_rd = -1;
729: // 対 r0 なら sync として使っており逆アセンブラ側で表示を加工してある
730: // のでこちら側では対処不要。
731: if (s == 0) {
732: return "";
733: }
734: uint32 b = m88100opf_B5(op);
735: TAKE_IF((cpu->r[s] & (1 << b)) != 0);
736: }
737: if ((op & 0xf8000000) == 0xe8000000 || // bcnd
738: (op & 0xfc00fe00) == 0xf000e800) // tcnd
739: {
740: // 11101N MMMMM SSSSS dddddd dd dddddddd bcnd
741: // rS が M5 で示される条件にマッチすればブランチ/トラップ
742: cmp_rd = -1;
743: uint32 m5 = m88100opf_M5(op);
744: TAKE_IF(
745: (m5 == 0x2 && cpu->r[s] == 0) || // eq0
746: (m5 == 0xd && cpu->r[s] != 0) || // ne0
747: (m5 == 0x1 && (int32)cpu->r[s] > 0) || // gt0
748: (m5 == 0xc && (int32)cpu->r[s] < 0) || // lt0
749: (m5 == 0x3 && (int32)cpu->r[s] >= 0) || // ge0
750: (m5 == 0xe && (int32)cpu->r[s] <= 0) // le0
751: );
752: }
753:
754: if ((op & 0xfc00fce0) == 0xf4007c00 || // cmp rD,rS1,rS2
755: (op & 0xfc000000) == 0x7c000000 ) // cmp rD,rS1,imm16
756: {
757: // 次の条件分岐命令で結果レジスタを表示するため、rD だけ覚えておく
758: cmp_rd = m88100opf_D(op);
759: }
760:
761: return "";
1.1 root 762: }
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