File:  [Isaki's NoNo m68k/m88k emulator] / nono / exp / dmac3.has
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Wed Apr 29 17:05:13 2026 UTC (2 months, 3 weeks ago) by root
Branches: MAIN, Isaki
CVS tags: v027, v026, v025, v024, v023, v022, v021, v020, v019, v018, v017, v016, HEAD
nono 0.4.0

;
; nono
; Copyright (C) 2020 nono project
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
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; 1. Redistributions of source code must retain the above copyright
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; 2. Redistributions in binary form must reproduce the above copyright
;    notice, this list of conditions and the following disclaimer in the
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;
; THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
; OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
; IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
; SUCH DAMAGE.

; DMAC の STR をワード書き込みした時の挙動を調べる。
;
; 実機での実行結果:
;  before 0008
;  after  0508
;  CSR|CER   9102
;  int_occur 00ff
;
; SCR|CCR のワードに書き込んだ $0588 のうち SCR 部分の $05 は書き込まれる。
; ただしタイミングエラーになったため CCR:STR は落とされている。
; int_occur は上位バイトが NIV、下位バイトが EIV が起きたことを示しており
; この場合当然エラー割り込みが起きる。
; 割り込み発生時の CER はタイミングエラーを示している
; (この後 CSR.ERR に書き込むと CER もクリアされる)。

		.include	doscall.mac
		.include	iocscall.mac
		.xref	hexstr_word

DMAC_ch2:	.equ	$e84080
DMAC_CSR:	.equ	$00
DMAC_DCR:	.equ	$04
DMAC_OCR:	.equ	$05
DMAC_SCR:	.equ	$06
DMAC_CCR:	.equ	$07
DMAC_MTC:	.equ	$0a
DMAC_MAR:	.equ	$0c
DMAC_DAR:	.equ	$14
DMAC_NIV:	.equ	$25
DMAC_EIV:	.equ	$27

PRINT		.macro	str
		pea		str
		DOS		_PRINT
		addq.l	#4,sp
		.endm

		.cpu	68000
		.list
		.text
		.even
start:
		clr.l	-(sp)
		DOS	_SUPER
		addq.l	#4,sp

		movea.l	#DMAC_ch2,a4

		moveq.l	#$68,d1			; NIV 設定
		move.b	d1,DMAC_NIV(a4)
		lea.l	niv_handler(pc),a1
		IOCS	_B_INTVCS
		move.l	d0,niv_backup

		moveq.l	#$69,d1			; EIV 設定
		move.b	d1,DMAC_EIV(a4)
		lea.l	eiv_handler(pc),a1
		IOCS	_B_INTVCS
		move.l	d0,eiv_backup

		exg.l	sp,sp			; ブレークポイント

		move.b	#$08,DMAC_CCR(a4)	; INT enable
		move.w	#$0002,DMAC_MTC(a4)
		lea.l	start(pc),a0
		move.l	a0,DMAC_MAR(a4)
		lea.l	buf(pc),a0
		move.l	a0,DMAC_DAR(a4)

		move.b	#$08,DMAC_DCR(a4)	; DCR=16bit
		move.b	#$11,DMAC_OCR(a4)	; OCR=MtoD,Word
		move.b	#$00,DMAC_SCR(a4)	; SCR=MAC=,DAC=

		move.w	DMAC_SCR(a4),d4		; Backup SCR|CCR
		move.w	d4,d0
		ori.w	#$0580,d0
		move.w	d0,DMAC_SCR(a4)		; SET STR ON WORD ACCESS!!

		move.w	DMAC_SCR(a4),d5		; Fetch SCR|CCR again

		PRINT	msg_before(pc)		; 書き込み前の SCR|CCR
		move.l	d4,d0
		bsr	putword
		PRINT	msg_after(pc)		; 書き込み後の SCR|CCR
		move.l	d5,d0
		bsr	putword
		PRINT	msg_csr(pc)		; CSR|CER
		move.w	csr_after(pc),d0
		bsr	putword
		PRINT	msg_intr(pc)		; 割り込み起きたかどうか
		move.w	niv_occur(pc),d0
		bsr	putword

		; 後始末
		move.b	#$00,DMAC_CCR(a4)	; INT disable
		moveq.l	#$68,d1			; EIV ハンドラ復元
		movea.l	niv_backup,a0
		IOCS	_B_INTVCS
		moveq.l	#$69,d1			; NIV ハンドラ復元
		movea.l	eiv_backup,a0
		IOCS	_B_INTVCS

		DOS	_EXIT

niv_handler:
		st	niv_occur
		rte
eiv_handler:
		st	eiv_occur
		move.w	DMAC_CSR(a4),d0		; clear interrupts
		move.w	d0,DMAC_CSR(a4)
		lea.l	csr_after(pc),a0	; save CSR|CER
		move.w	d0,(a0)
		rte

putword:
		swap	d0
		lea.l	buf(pc),a0
		bsr	hexstr_word
		move.b	#$0d,(a0)+
		move.b	#$0a,(a0)+
		clr.b	(a0)
		pea.l	buf(pc)
		DOS	_PRINT
		addq.l	#4,sp
		rts

msg_before:	.dc.b	"before ",0
msg_after:	.dc.b	"after  ",0
msg_csr:	.dc.b	"CSR|CER   ",0
msg_intr:	.dc.b	"int_occur ",0

		.even
niv_backup:	.ds.l	1
eiv_backup:	.ds.l	1
csr_after:	.ds.w	1
niv_occur:	.dc.b	0
eiv_occur:	.dc.b	0
buf:		.ds	16

		.end
; vi:set ts=8:

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