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File:  [Isaki's NoNo m68k/m88k emulator] / nono / exp / fmovemn.has
Revision 1.1.1.4 (vendor branch): download - view: text, annotated - select for diffs
Wed Apr 29 17:05:36 2026 UTC (2 months, 3 weeks ago) by root
Branches: MAIN, Isaki
CVS tags: v027, v026, v025, v024, v023, v022, HEAD
nono 1.2.0

;
; nono
; Copyright (C) 2020 nono project
;
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions
; are met:
; 1. Redistributions of source code must retain the above copyright
;    notice, this list of conditions and the following disclaimer.
; 2. Redistributions in binary form must reproduce the above copyright
;    notice, this list of conditions and the following disclaimer in the
;    documentation and/or other materials provided with the distribution.
;
; THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
; IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
; OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
; IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
; INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
; BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
; AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
; SUCH DAMAGE.

; How to compile:
;  > has fmovemn.has
;  > hlk fmovemn.o si_util.o

	.xref	hexstr_long
	.include doscall.mac
	.include iocscall.mac
	.list
	.cpu	68030

PRINT	.macro	msg
	pea.l	msg
	DOS	_PRINT
	addq.l	#4,sp
	.endm

	.text
	.even

start:
	clr.l	-(sp)
	DOS	_SUPER
	movem.l	d4-d7/a2-a4,-(sp)
	moveq.l	#$30,d6	; Init D6 for dynamic
	moveq.l	#0,d4		; Init D4 for d8(An,IX)
	fmove.l	d4,fpcr		; Init FPCR, especially round mode and round prec.

	; rough argument check
	cmpi.b	#4,(a2)+	; strlen(arg)<4 ?
	bcs	easymode
	cmpi.l	#$68617264,(a2)	; "hard"
	bne	easymode

hardmode:
	moveq.l	#-1,d5
	PRINT	msg_hard(pc)
	bsr	test_0
	bsr	test_1
	bsr	test_2
	bsr	test_3
	bsr	test_4
	bsr	test_5
	bsr	test_6
	bsr	test_7
	bsr	test_8
	bsr	test_9
	bsr	test_10
	bsr	test_11
	bsr	test_12
	bsr	test_13
	bsr	test_14
	bsr	test_15
	bsr	test_16
	bsr	test_17
	bsr	test_18
	bsr	test_19
	bsr	test_20
	bsr	test_21
	bsr	test_22
	bsr	test_23
	bsr	test_24
	bsr	test_25
	bsr	test_26
	bsr	test_27
	bsr	test_28
	bsr	test_29
	bsr	test_30
	bsr	test_31
	bsr	test_32
	bsr	test_33
	bsr	test_34
	bsr	test_35
	bsr	test_36
	bsr	test_37
	bsr	test_38
	bsr	test_39
	bsr	test_40
	bsr	test_41
	bsr	test_42
	bsr	test_43
	bsr	test_44
	bsr	test_45
	bsr	test_46
	bsr	test_47
	bsr	test_48
	bsr	test_49
	bsr	test_50
	bsr	test_51
	bsr	test_52
	bsr	test_53
	bsr	test_54
	bsr	test_55
	bsr	test_nofpn
	bsr	test_illdyn
	bra	done

easymode:
	moveq.l #0,d5
	PRINT	msg_easy(pc)
	bsr	test_16
	bsr	test_17
	bsr	test_19
	bsr	test_20
	bsr	test_23
	bsr	test_24
	bsr	test_26
	bsr	test_27
	bsr	test_32
	bsr	test_39
	bsr	test_44
	bsr	test_47
	bsr	test_48
	bsr	test_51
	bsr	test_54
	bsr	test_55

done:
	movem.l	(sp)+,d4-d7/a2-a4
	DOS	_EXIT

; to,pred,sta,EA=d (hard)
test_0:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_0+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200c060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,pred,sta,EA=a (hard)
test_1:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_1+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208c060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,pred,sta,EA=m (hard)
test_2:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_2+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210c060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	srcdata(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,pred,sta,EA=+ (hard)
test_3:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_3+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218c060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata+24(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	srcdata(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,pred,sta,EA=- (hard)
test_4:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_4+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220c060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,pred,sta,EA=r (hard)
test_5:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_5+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228c060
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	srcdata(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,pred,sta,EA=x (hard)
test_6:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_6+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230c060
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	srcdata(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,pred,dyn,EA=d (hard)
test_7:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_7+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200c860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,pred,dyn,EA=a (hard)
test_8:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_8+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208c860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,pred,dyn,EA=m (hard)
test_9:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_9+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210c860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,pred,dyn,EA=+ (hard)
test_10:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_10+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218c860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata+24(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,pred,dyn,EA=- (hard)
test_11:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_11+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220c860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,pred,dyn,EA=r (hard)
test_12:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_12+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228c860
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,pred,dyn,EA=x (hard)
test_13:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_13+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230c860
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	srcdata(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,sta,EA=d (hard)
test_14:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_14+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200d060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,ctrl,sta,EA=a (hard)
test_15:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_15+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208d060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,ctrl,sta,EA=m
test_16:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_16+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210d060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	srcdata(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,sta,EA=+
test_17:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_17+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218d060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata+24(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	srcdata(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,sta,EA=- (hard)
test_18:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_18+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220d060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,ctrl,sta,EA=r
test_19:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_19+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228d060
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	srcdata(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,sta,EA=x
test_20:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_20+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230d060
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	srcdata(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,dyn,EA=d (hard)
test_21:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_21+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200d860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,ctrl,dyn,EA=a (hard)
test_22:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_22+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208d860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,ctrl,dyn,EA=m
test_23:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_23+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210d860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,dyn,EA=+
test_24:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_24+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218d860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata+24(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,dyn,EA=- (hard)
test_25:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_25+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220d860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; to,ctrl,dyn,EA=r
test_26:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_26+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228d860
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; to,ctrl,dyn,EA=x
test_27:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_27+8(pc,d0.w)
	bsr	init_from
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230d860
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	srcdata(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	srcdata+12(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,sta,EA=d (hard)
test_28:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_28+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200e060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,pred,sta,EA=a (hard)
test_29:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_29+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208e060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,pred,sta,EA=m (hard)
test_30:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_30+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210e060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+6*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,sta,EA=+ (hard)
test_31:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_31+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218e060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,pred,sta,EA=-
test_32:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_32+8(pc,d0.w)
	bsr	init_from
	lea.l	(workarea+24)(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220e060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+6*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,sta,EA=r (hard)
test_33:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_33+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228e060
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+6*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,sta,EA=x (hard)
test_34:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_34+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230e060
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+6*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,dyn,EA=d (hard)
test_35:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_35+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200e860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,pred,dyn,EA=a (hard)
test_36:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_36+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208e860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,pred,dyn,EA=m (hard)
test_37:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_37+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210e860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+4*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,dyn,EA=+ (hard)
test_38:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_38+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218e860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,pred,dyn,EA=-
test_39:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_39+8(pc,d0.w)
	bsr	init_from
	lea.l	(workarea+24)(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220e860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+4*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,dyn,EA=r (hard)
test_40:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_40+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228e860
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+4*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,pred,dyn,EA=x (hard)
test_41:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_41+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230e860
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+5*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+4*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,sta,EA=d (hard)
test_42:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_42+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200f060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,ctrl,sta,EA=a (hard)
test_43:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_43+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208f060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,ctrl,sta,EA=m
test_44:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_44+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210f060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+1*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,sta,EA=+ (hard)
test_45:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_45+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218f060
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,ctrl,sta,EA=- (hard)
test_46:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_46+8(pc,d0.w)
	bsr	init_from
	lea.l	(workarea+24)(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220f060
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+1*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,sta,EA=r
test_47:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_47+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228f060
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+1*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,sta,EA=x
test_48:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_48+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230f060
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+1*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,dyn,EA=d (hard)
test_49:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_49+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f200f860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,ctrl,dyn,EA=a (hard)
test_50:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_50+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f208f860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,ctrl,dyn,EA=m
test_51:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_51+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210f860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+3*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,dyn,EA=+ (hard)
test_52:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_52+8(pc,d0.w)
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218f860
@@:
	bsr	restore_fline
	tst.l	d7
	bne	@f
	PRINT	msg_fail_notrap(pc)
	rts
@@:
	PRINT	msg_oktrap(pc)
	rts

; from,ctrl,dyn,EA=- (hard)
test_53:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_53+8(pc,d0.w)
	bsr	init_from
	lea.l	(workarea+24)(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f220f860
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+3*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,dyn,EA=r
test_54:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_54+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f228f860
	.dc.w	0
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+3*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; from,ctrl,dyn,EA=x
test_55:
	moveq.l	#-8,d0
	and.w	d5,d0
	PRINT	msg_test_55+8(pc,d0.w)
	bsr	init_from
	lea.l	workarea(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f230f860
	.dc.w	$4000
@@:
	bsr	restore_fline
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	lea.l	workarea(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	; compare first one
	pea.l	msg_fail_1st(pc)
	pea.l	(initdata+2*12)(pc)
	pea.l	(0*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare second one
	pea.l	msg_fail_2nd(pc)
	pea.l	(initdata+3*12)(pc)
	pea.l	(1*12)(a1)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts


; 空リストは正しく0個転送という扱いになる。
; たぶん dynamic でも同様だろうけどもうテストしない。
test_nofpn:
	PRINT	msg_test_nofpn(pc)
	bsr	init_from
	; 実行
	lea.l	srcdata(pc),a0
	bsr	set_fline
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f218d000	; fmovem.x (a0)+,nofpn
@@:
	bsr	restore_fline
	; 例外は起きないはずなので D7 がゼロなら成功(次へ)
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	; An を照合する。(An)+ だけど変わらないはず。
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	(initdata+0*12)(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; dynamic レジスタ指定の 0rrr_0000 の %0 のところに何か書かれてても無視。
test_illdyn:
	PRINT	msg_test_illdyn(pc)
	bsr	init_from
	; 実行
	lea.l	srcdata(pc),a0
	moveq.l	#$80,d6
	moveq.l	#0,d7
	lea.l	@f,a3
	.dc.l	$f210d86f	; fmovem.x (a0),d6
@@:
	bsr	restore_fline
	; 例外は起きないはずなので D7 がゼロなら成功(次へ)
	tst.l	d7
	beq	@f
	PRINT	msg_fail_trap(pc)
	rts
@@:
	; An を照合する。
	lea.l	srcdata(pc),a1
	cmp.l	a1,a0
	beq	@f
	pea.l	msg_fail_addr(pc)
	move.l	a1,-(sp)
	move.l	a0,-(sp)
	bsr	result
	lea.l	12(sp),sp
@@:
	lea.l	workarea(pc),a2
	; compare FP0
	pea.l	msg_fail_fp0(pc)
	pea.l	srcdata(pc)
	fmove.x	fp0,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP1
	pea.l	msg_fail_fp1(pc)
	pea.l	(initdata+1*12)(pc)
	fmove.x	fp1,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP2
	pea.l	msg_fail_fp2(pc)
	pea.l	(initdata+2*12)(pc)
	fmove.x	fp2,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP3
	pea.l	msg_fail_fp3(pc)
	pea.l	(initdata+3*12)(pc)
	fmove.x	fp3,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP4
	pea.l	msg_fail_fp4(pc)
	pea.l	(initdata+4*12)(pc)
	fmove.x	fp4,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP5
	pea.l	msg_fail_fp5(pc)
	pea.l	(initdata+5*12)(pc)
	fmove.x	fp5,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP6
	pea.l	msg_fail_fp6(pc)
	pea.l	(initdata+6*12)(pc)
	fmove.x	fp6,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp
	; compare FP7
	pea.l	msg_fail_fp7(pc)
	pea.l	(initdata+7*12)(pc)
	fmove.x	fp7,(a2)
	pea.l	(a2)
	bsr	check_ext
	lea.l	12(sp),sp

	tst.l	d7
	bne	@f
	PRINT	msg_ok(pc)
@@:
	rts

; test_from 用の初期化。
; FP0..7 を初期値で埋めるのと、書き込み先バッファを用意。
; a0/a1 は破壊する。
init_from:
	lea.l	initdata(pc),a0
	fmove.x (a0)+,fp0
	fmove.x (a0)+,fp1
	fmove.x (a0)+,fp2
	fmove.x (a0)+,fp3
	fmove.x (a0)+,fp4
	fmove.x (a0)+,fp5
	fmove.x (a0)+,fp6
	fmove.x (a0)+,fp7

	; 書き込み先を分かりやすいデータで初期化。
	lea.l	initdata_from(pc),a0
	lea.l	workarea(pc),a1
	move.l	(a0)+,(a1)+
	move.l	(a0)+,(a1)+
	move.l	(a0),(a1)+
	subq.l	#8,a0
	move.l	(a0)+,(a1)+
	move.l	(a0)+,(a1)+
	move.l	(a0),(a1)+
	rts

; 結果表示
; スタックには、メッセージ、期待値、実際の値の順で積む。
result:
	link	a6,#0
	movem.l	d0/a0,-(sp)

	move.l	8+8(a6),-(sp)
	DOS	_PRINT
	addq.l	#4,sp

	move.l	8+4(a6),d0
	lea.l	buf(pc),a0
	bsr	hexstr_long
	PRINT	buf(pc)
	PRINT	msg_but(pc)

	move.l	8+0(a6),d0
	lea.l	buf(pc),a0
	bsr	hexstr_long
	PRINT	buf(pc)
	PRINT	msg_crlf(pc)

	addq.l	#1,d7	; errcnt
	movem.l	(sp)+,d0/a0
	unlk	a6
	rts

; 拡張精度の比較と結果表示。
; 一致したら何もせず帰る。一致しなければエラーメッセージを表示。
; スタックには、(エラー時の)メッセージ、期待値、実際の値の順で積む
check_ext:
	link	a6,#0
	movem.l	d0/a0-a2,-(sp)

	move.l	8+4(a6),a1
	move.l	8+0(a6),a2
	cmpm.l	(a1)+,(a2)+
	bne	@f
	cmpm.l	(a1)+,(a2)+
	bne	@f
	cmpm.l	(a1)+,(a2)+
	bne	@f
	; equal
	bra	check_ext_done

@@:	; not equal
	; テスト名を表示した行に続けてこれを表示すると折り返してしまうので、
	; これが1件目のエラーなら先に一つ改行する。
	tst.l	d7
	bne	@f
	PRINT	msg_crlf(pc)
@@:
	move.l	8+8(a6),-(sp)
	DOS	_PRINT
	addq.l	#4,sp

	lea.l	buf(pc),a0
	move.l	8+4(a6),a1
	move.l	(a1)+,d0
	bsr	hexstr_long
	move.b	#'_',(a0)+
	move.l	(a1)+,d0
	bsr	hexstr_long
	move.b	#'_',(a0)+
	move.l	(a1),d0
	bsr	hexstr_long
	PRINT	buf(pc)
	PRINT	msg_but(pc)

	lea.l	buf(pc),a0
	move.l	8+0(a6),a2
	move.l	(a2)+,d0
	bsr	hexstr_long
	move.b	#'_',(a0)+
	move.l	(a2)+,d0
	bsr	hexstr_long
	move.b	#'_',(a0)+
	move.l	(a2),d0
	bsr	hexstr_long
	PRINT	buf(pc)
	PRINT	msg_crlf(pc)

	addq.l	#1,d7	; errcnt
check_ext_done:
	movem.l	(sp)+,d0/a0-a2
	unlk	a6
	rts

; Fライン例外をテスト用のものに差し替える。
; 変更前のアドレスを a4 に格納する。
; a1 は破壊する。
set_fline:
	movem.l	d0-d1,-(sp)
	moveq.l	#$b,d1
	lea.l	fline_handler(pc),a1
	IOCS	_B_INTVCS
	movea.l	d0,a4
	movem.l	(sp)+,d0-d1
	rts

; Fライン例外を元に戻す。
; a1 は破壊する。
restore_fline:
	movem.l	d0-d1,-(sp)
	moveq.l	#$b,d1
	movea.l	a4,a1
	IOCS	_B_INTVCS
	movem.l	(sp)+,d0-d1
	rts

; Fライン例外ハンドラ
; a3 に戻りアドレスをセットしてあること
; d7 を 1 にして帰る
fline_handler:
	moveq.l	#1,d7
	move.l	a3,2(sp)
	rte

; FPn を埋める初期値
initdata:
	.dc.l	$00010000, $80888888, $88888888
	.dc.l	$00010000, $80111111, $11111111
	.dc.l	$00010000, $80222222, $22222222
	.dc.l	$00010000, $80333333, $33333333
	.dc.l	$00010000, $80444444, $44444444
	.dc.l	$00010000, $80555555, $55555555
	.dc.l	$00010000, $80666666, $66666666
	.dc.l	$00010000, $80777777, $77777777

; ターゲットの FPn に転送するデータ
srcdata:
	.dc.l	$3fff0000, $80aaaaaa, $aaaaaaaa
	.dc.l	$3fff0000, $80bbbbbb, $bbbbbbbb

; 書き込み先の初期化用データ
initdata_from:
	.dc.l	$90919293, $94959697, $98999a9b

msg_hard:	.dc.b	"hard mode",$d,$a,0
msg_easy:	.dc.b	"easy mode",$d,$a,0
msg_oktrap:	.dc.b	$9,"ok(trap)",$d,$a,0, 0,0
msg_fail_notrap:	.dc.b	$9,"FAIL: trap expected but not occured",$d,$a,0
msg_fail_trap:	.dc.b	$9,"FAIL: unexpected trap occured",$d,$a,0
msg_skip_dst:	.dc.b	$9,"SKIP(dstmem)",0

msg_ok:		.dc.b	$9,"ok",$d,$a,0
msg_fail_fp0:	.dc.b	$9,"FAIL: fp0 expects ",0
msg_fail_fp1:	.dc.b	$9,"FAIL: fp1 expects ",0
msg_fail_fp2:	.dc.b	$9,"FAIL: fp2 expects ",0
msg_fail_fp3:	.dc.b	$9,"FAIL: fp3 expects ",0
msg_fail_fp4:	.dc.b	$9,"FAIL: fp4 expects ",0
msg_fail_fp5:	.dc.b	$9,"FAIL: fp5 expects ",0
msg_fail_fp6:	.dc.b	$9,"FAIL: fp6 expects ",0
msg_fail_fp7:	.dc.b	$9,"FAIL: fp7 expects ",0
msg_fail_1st:	.dc.b	$9,"FAIL: 1st expects ",0
msg_fail_2nd:	.dc.b	$9,"FAIL: 2nd expects ",0
msg_fail_addr:	.dc.b	$9,"FAIL: an expects ",0
msg_but:	.dc.b	" but ",0
msg_crlf:	.dc.b	$d,$a,0

msg_test_0:	.dc.b	"00:pred;fmovem.x d0,fp5-fp6",0
msg_test_1:	.dc.b	"01:pred;fmovem.x a0,fp5-fp6",0
msg_test_2:	.dc.b	"02:pred;fmovem.x (a0),fp5-fp6",0
msg_test_3:	.dc.b	"03:pred;fmovem.x (a0)+,fp5-fp6",0
msg_test_4:	.dc.b	"04:pred;fmovem.x -(a0),fp5-fp6",0
msg_test_5:	.dc.b	"05:pred;fmovem.x d16(a0),fp5-fp6",0
msg_test_6:	.dc.b	"06:pred;fmovem.x d8(a0,ix),fp5-fp6",0
msg_test_7:	.dc.b	"07:pred;fmovem.x d0,d6<fp4-fp5>",0
msg_test_8:	.dc.b	"08:pred;fmovem.x a0,d6<fp4-fp5>",0
msg_test_9:	.dc.b	"09:pred;fmovem.x (a0),d6<fp4-fp5>",0
msg_test_10:	.dc.b	"10:pred;fmovem.x (a0)+,d6<fp4-fp5>",0
msg_test_11:	.dc.b	"11:pred;fmovem.x -(a0),d6<fp4-fp5>",0
msg_test_12:	.dc.b	"12:pred;fmovem.x d16(a0),d6<fp4-fp5>",0
msg_test_13:	.dc.b	"13:pred;fmovem.x d8(a0,ix),d6<fp4-fp5>",0
msg_test_14:	.dc.b	"14:ctrl;fmovem.x d0,fp1-fp2",0
msg_test_15:	.dc.b	"15:ctrl;fmovem.x a0,fp1-fp2",0
msg_test_16:	.dc.b	"16:ctrl;fmovem.x (a0),fp1-fp2",0
msg_test_17:	.dc.b	"17:ctrl;fmovem.x (a0)+,fp1-fp2",0
msg_test_18:	.dc.b	"18:ctrl;fmovem.x -(a0),fp1-fp2",0
msg_test_19:	.dc.b	"19:ctrl;fmovem.x d16(a0),fp1-fp2",0
msg_test_20:	.dc.b	"20:ctrl;fmovem.x d8(a0,ix),fp1-fp2",0
msg_test_21:	.dc.b	"21:ctrl;fmovem.x d0,d6<fp2-fp3>",0
msg_test_22:	.dc.b	"22:ctrl;fmovem.x a0,d6<fp2-fp3>",0
msg_test_23:	.dc.b	"23:ctrl;fmovem.x (a0),d6<fp2-fp3>",0
msg_test_24:	.dc.b	"24:ctrl;fmovem.x (a0)+,d6<fp2-fp3>",0
msg_test_25:	.dc.b	"25:ctrl;fmovem.x -(a0),d6<fp2-fp3>",0
msg_test_26:	.dc.b	"26:ctrl;fmovem.x d16(a0),d6<fp2-fp3>",0
msg_test_27:	.dc.b	"27:ctrl;fmovem.x d8(a0,ix),d6<fp2-fp3>",0
msg_test_28:	.dc.b	"28:pred;fmovem.x fp5-fp6,d0",0
msg_test_29:	.dc.b	"29:pred;fmovem.x fp5-fp6,a0",0
msg_test_30:	.dc.b	"30:pred;fmovem.x fp5-fp6,(a0)",0
msg_test_31:	.dc.b	"31:pred;fmovem.x fp5-fp6,(a0)+",0
msg_test_32:	.dc.b	"32:pred;fmovem.x fp5-fp6,-(a0)",0
msg_test_33:	.dc.b	"33:pred;fmovem.x fp5-fp6,d16(a0)",0
msg_test_34:	.dc.b	"34:pred;fmovem.x fp5-fp6,d8(a0,ix)",0
msg_test_35:	.dc.b	"35:pred;fmovem.x d6<fp4-fp5>,d0",0
msg_test_36:	.dc.b	"36:pred;fmovem.x d6<fp4-fp5>,a0",0
msg_test_37:	.dc.b	"37:pred;fmovem.x d6<fp4-fp5>,(a0)",0
msg_test_38:	.dc.b	"38:pred;fmovem.x d6<fp4-fp5>,(a0)+",0
msg_test_39:	.dc.b	"39:pred;fmovem.x d6<fp4-fp5>,-(a0)",0
msg_test_40:	.dc.b	"40:pred;fmovem.x d6<fp4-fp5>,d16(a0)",0
msg_test_41:	.dc.b	"41:pred;fmovem.x d6<fp4-fp5>,d8(a0,ix)",0
msg_test_42:	.dc.b	"42:ctrl;fmovem.x fp1-fp2,d0",0
msg_test_43:	.dc.b	"43:ctrl;fmovem.x fp1-fp2,a0",0
msg_test_44:	.dc.b	"44:ctrl;fmovem.x fp1-fp2,(a0)",0
msg_test_45:	.dc.b	"45:ctrl;fmovem.x fp1-fp2,(a0)+",0
msg_test_46:	.dc.b	"46:ctrl;fmovem.x fp1-fp2,-(a0)",0
msg_test_47:	.dc.b	"47:ctrl;fmovem.x fp1-fp2,d16(a0)",0
msg_test_48:	.dc.b	"48:ctrl;fmovem.x fp1-fp2,d8(a0,ix)",0
msg_test_49:	.dc.b	"49:ctrl;fmovem.x d6<fp2-fp3>,d0",0
msg_test_50:	.dc.b	"50:ctrl;fmovem.x d6<fp2-fp3>,a0",0
msg_test_51:	.dc.b	"51:ctrl;fmovem.x d6<fp2-fp3>,(a0)",0
msg_test_52:	.dc.b	"52:ctrl;fmovem.x d6<fp2-fp3>,(a0)+",0
msg_test_53:	.dc.b	"53:ctrl;fmovem.x d6<fp2-fp3>,-(a0)",0
msg_test_54:	.dc.b	"54:ctrl;fmovem.x d6<fp2-fp3>,d16(a0)",0
msg_test_55:	.dc.b	"55:ctrl;fmovem.x d6<fp2-fp3>,d8(a0,ix)",0
msg_test_nofpn:	.dc.b	"fmovem.x (a0)+,nofpn",0
msg_test_illdyn:.dc.b	"fmovem.x (a0),d6<FP0>_bit",0

	.data
	.even
workarea:	.ds.b	24
buf:		.ds.b	64

	.end	start
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