--- nono/hd64180/hd647180io.cpp 2026/04/29 17:05:18 1.1 +++ nono/hd64180/hd647180io.cpp 2026/04/29 17:05:47 1.1.1.3 @@ -10,12 +10,13 @@ #include "mpu64180.h" #include "hd647180.h" +#include "hd647180asci.h" #include "pio.h" #include "scheduler.h" +#include "ssg.h" #include "xpbus.h" //#define ENABLE_SERIAL_LOG -//#define ENABLE_SSG_LOG uint32 MPU64180Device::ReadIO(uint32 addr) @@ -37,28 +38,36 @@ MPU64180Device::ReadInternalIO(uint32 of switch (offset) { case 0x00: // IO_CNTLA0 + data = asci->ReadCNTLA(0); + break; case 0x01: // IO_CNTLA1 - data = 0x10; -#if defined(ENABLE_SERIAL_LOG) - putlog(0, "%s -> $%02x (NOT IMPLEMENTED)", - IOName(offset).c_str(), data); -#endif - return data; + data = asci->ReadCNTLA(1); + break; case 0x02: // IO_CNTLB0 + data = asci->ReadCNTLB(0); + break; case 0x03: // IO_CNTLB1 + data = asci->ReadCNTLB(1); break; case 0x04: // IO_STAT0 + data = asci->ReadSTAT(0); + break; case 0x05: // IO_STAT1 - data = 0x02; -#if defined(ENABLE_SERIAL_LOG) - putlog(0, "%s -> $%02x (NOT IMPLEMENTED)", - IOName(offset).c_str(), data); -#endif - return data; + data = asci->ReadSTAT(1); + break; case 0x06: // IO_TDR0 + data = asci->ReadTDR(0); + break; case 0x07: // IO_TDR1 - case 0x08: // IO_TSR0 - case 0x09: // IO_TSR1 + data = asci->ReadTDR(1); + break; + case 0x08: // IO_RDR0 + data = asci->ReadRDR(0); + break; + case 0x09: // IO_RDR1 + data = asci->ReadRDR(1); + break; + case 0x0a: // IO_CNTR case 0x0b: // IO_TRDR break; @@ -210,9 +219,11 @@ MPU64180Device::ReadExternalIO(uint32 ad switch (addr & 0xff) { case 0x82: // SSG case 0x83: // SSG -#if !defined(ENABLE_SSG_LOG) - data = 0xff; -#endif + if (ssg) { + data = ssg->Read1(addr); + } else { + data = 0xff; // ? + } break; case 0x90: // INT0 ネゲート @@ -301,20 +312,26 @@ MPU64180Device::WriteInternalIO(uint32 o { switch (offset) { case 0x00: // IO_CNTLA0 + return asci->WriteCNTLA(0, data); case 0x01: // IO_CNTLA1 -#if defined(USE_XPSERIAL) - putlog(0, "%s <- $%02x (NOT IMPLEMENTED)", - IOName(offset).c_str(), data); -#endif - return 0; + return asci->WriteCNTLA(1, data); case 0x02: // IO_CNTLB0 + return asci->WriteCNTLB(0, data); case 0x03: // IO_CNTLB1 + return asci->WriteCNTLB(1, data); case 0x04: // IO_STAT0 + return asci->WriteSTAT(0, data); case 0x05: // IO_STAT1 + return asci->WriteSTAT(1, data); case 0x06: // IO_TDR0 + return asci->WriteTDR(0, data); case 0x07: // IO_TDR1 - case 0x08: // IO_TSR0 - case 0x09: // IO_TSR1 + return asci->WriteTDR(1, data); + case 0x08: // IO_RDR0 + return asci->WriteRDR(0, data); + case 0x09: // IO_RDR1 + return asci->WriteRDR(1, data); + case 0x0a: // IO_CNTR case 0x0b: // IO_TRDR break; @@ -362,7 +379,6 @@ MPU64180Device::WriteInternalIO(uint32 o break; case 0x32: // IO_DCNTL return WriteDCNTL(data); - break; case 0x33: // IO_IL return WriteIL(data); @@ -432,10 +448,10 @@ MPU64180Device::WriteExternalIO(uint32 a switch (addr & 0xff) { case 0x82: // SSG case 0x83: // SSG -#if !defined(ENABLE_SSG_LOG) + if (ssg) { + ssg->Write1(addr, data); + } return 0; -#endif - break; case 0x90: // INT0 ネゲート putlog(1, "%s Negate INT0", IOName(addr).c_str()); @@ -471,7 +487,7 @@ MPU64180Device::WriteTMDRL(int ch, uint3 IOName(HD647180::IO_TMDRL(ch)).c_str(), data); } else { t.count = (t.count & 0xff00) | data; - putlog(1, "%s <- $%02x (TMDR%d = $%04x)", + putlog(1, "%s <- $%02x (TMDR%u = $%04x)", IOName(HD647180::IO_TMDRL(ch)).c_str(), data, ch, t.count); } return 0; @@ -487,7 +503,7 @@ MPU64180Device::WriteTMDRH(int ch, uint3 IOName(HD647180::IO_TMDRH(ch)).c_str(), data); } else { t.count = (data << 8) | (t.count & 0x00ff); - putlog(1, "%s <- $%02x (TMDR%d = $%04x)", + putlog(1, "%s <- $%02x (TMDR%u = $%04x)", IOName(HD647180::IO_TMDRH(ch)).c_str(), data, ch, t.count); } return 0; @@ -499,7 +515,7 @@ MPU64180Device::WriteRLDRL(int ch, uint3 // 動作中にも変更可能 auto& t = timer[ch]; t.reload = (t.reload & 0xff00) | data; - putlog(1, "%s <- $%02x (RLDR%d = $%04x)", + putlog(1, "%s <- $%02x (RLDR%u = $%04x)", IOName(HD647180::IO_RLDRL(ch)).c_str(), data, ch, t.reload); return 0; } @@ -510,7 +526,7 @@ MPU64180Device::WriteRLDRH(int ch, uint3 // 動作中にも変更可能 auto& t = timer[ch]; t.reload = (data << 8) | (t.reload & 0x00ff); - putlog(1, "%s <- $%02x (RLDR%d = $%04x)", + putlog(1, "%s <- $%02x (RLDR%u = $%04x)", IOName(HD647180::IO_RLDRH(ch)).c_str(), data, ch, t.reload); return 0; } @@ -530,7 +546,7 @@ MPU64180Device::WriteTCR(uint32 data) new_tde[1] = (data & 0x02); new_tde[0] = (data & 0x01); - msg = string_format("TIE1=%d TIE0=%d TOC=$%d", + msg = string_format("TIE1=%u TIE0=%u TOC=$%x", (timer[1].intr_enable ? 1 : 0), (timer[0].intr_enable ? 1 : 0), timer_toc); @@ -542,7 +558,7 @@ MPU64180Device::WriteTCR(uint32 data) t.count = t.reload; t.running = true; MakeActiveTimer(); - msg += string_format(" Timer%d=Start", ch); + msg += string_format(" Timer%u=Start", ch); EnableTimer(); } else if (t.running == true && new_tde[ch] == false) { // カウントダウン停止 @@ -551,7 +567,7 @@ MPU64180Device::WriteTCR(uint32 data) // タイマーイベントの中で running が落ちてたら停止してくれる。 t.running = false; MakeActiveTimer(); - msg += string_format(" Timer%d=Stop", ch); + msg += string_format(" Timer%u=Stop", ch); } else { // 変化なし } @@ -711,15 +727,26 @@ MPU64180Device::PeekInternalIO(uint32 of { switch (offset) { case 0x00: // IO_CNTLA0 + return asci->PeekCNTLA(0); case 0x01: // IO_CNTLA1 + return asci->PeekCNTLA(1); case 0x02: // IO_CNTLB0 + return asci->PeekCNTLB(0); case 0x03: // IO_CNTLB1 + return asci->PeekCNTLB(1); case 0x04: // IO_STAT0 + return asci->PeekSTAT(0); case 0x05: // IO_STAT1 + return asci->PeekSTAT(1); case 0x06: // IO_TDR0 + return asci->PeekTDR(0); case 0x07: // IO_TDR1 - case 0x08: // IO_TSR0 - case 0x09: // IO_TSR1 + return asci->PeekTDR(1); + case 0x08: // IO_RDR0 + return asci->PeekRDR(0); + case 0x09: // IO_RDR1 + return asci->PeekRDR(1); + case 0x0a: // IO_CNTR case 0x0b: // IO_TRDR break; @@ -831,6 +858,9 @@ MPU64180Device::PeekExternalIO(uint32 ad switch (addr & 0xff) { case 0x82: // SSG case 0x83: // SSG + if (ssg) { + return ssg->Peek1(addr); + } break; case 0x90: // INT0 ネゲート @@ -1014,8 +1044,8 @@ MPU64180Device::ionames = { "STAT1", // 05 "TDR0", // 06 "TDR1", // 07 - "TSR0", // 08 - "TSR1", // 09 + "RDR0", // 08 + "RDR1", // 09 "CNTR", // 0a "TRDR", // 0b "TMDR0L", // 0c