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1.1 root 1: //
2: // nono
1.1.1.2 root 3: // Copyright (C) 2020 nono project
4: // Licensed under nono-license.txt
1.1 root 5: //
6:
1.1.1.4 ! root 7: // EA は大別して5種類。
! 8: //
! 9: // |d m rxwp | 制御 CalcCtrl サイズ不問
! 10: // |dam+-rxw | 可変 CalcData B/W/L
! 11: // | m rxwp | MMU CalcMMU サイズ不問
! 12: // |dam+-rxwpi| FPU CalcFPU B/W/L/S/D/X/P
! 13: // |d m+-rxwpi| データ FetchData B/W/L
! 14: // |dam+-rxwpi| All FetchAll B/W/L
! 15: //
! 16: // CalcCtrl はユーザーズマニュアルで「制御(Control)」と呼ばれている
! 17: // グループで、デスティネーション側のため EA の計算のみ。
! 18: // また (An)+/-(An) を含まないため、サイズに関係なく1種類だけでよい。
! 19: //
! 20: // CalcData はユーザーズマニュアルで「可変」と呼ばれているグループで、
! 21: // デスティネーション側のため EA の計算のみ。B/W/L
! 22: //
! 23: // CalcMMU は対 MMU 用に勝手に用意したもの。
! 24: //
! 25: // CalcFPU は対 FPU 用。ソースであっても CalcFPU を使用する。
! 26: // サイズは B/W/L/S/D/X/P。
! 27: // フェッチサイクルは別途存在するはずだが不詳。
! 28: //
! 29: // FetchData はユーザーズマニュアルで「データ(Data)」と呼ばれている
! 30: // グループで、ソース側のため EA 計算および値の取得。B/W/L
! 31: //
! 32: // FetchAll はユーザーズマニュアルのここには記載がないグループで、
! 33: // ソース側のため EA 計算および値の取得。B/W/L
! 34: //
! 35: // CalcCtrl、CalcData でアドレッシングモードに D や A が含まれている場合は
! 36: // その命令のデスティネーションに Dn、An が指定できるという意味であり、
! 37: // EA 処理であるここには関係ない。
! 38: // EA 計算より前に呼出側で条件分けして処理すること。
! 39: //
! 40: // CalcCtrl、CalcData と FetchData には (*) 印の例外があるので留意。
! 41: //
! 42: // (CalcCtrl)
! 43: // | m rxwp | CMP2/CHK2
! 44: // | m rxwp | JMP/JSR
! 45: // | m rxwp | LEA/PEA
! 46: // |d m rxwp | BFEXT*/BFFFO/BFTST
! 47: // |d m rxw | (*) BFCHG/BFCLR/BFINS/BFSET <ea>{#o:#w}
! 48: //
! 49: // (CalcData)
! 50: // | m+-rxw | ADD/SUB/CMP Dx,<ea>
! 51: // | m+-rxw | CAS/TAS <ea>
! 52: // | m+-rxw | MOVES <ea>,Rn
! 53: // | m+-rxw | shift/rotate.W <ea>
! 54: // | m+-rxw | BCHG/BCLR/BSET src,<ea>
! 55: // |d m+-rxw | ADDI/SUBI Dx,<ea>
! 56: // |d m+-rwx | NBCD <ea>
! 57: // |d m+-rxw | AND/OR/EOR Dx,<ea>
! 58: // |d m+-rxw | CLR/NEG/NEGX/NOT/TST/Scc <ea>
! 59: // |d m+-rxw | MOVE CCR/SR,<ea>
! 60: // |dam+-rxw | ADDQ/SUBQ #qqq,<ea>
! 61: // |dam+-rxw | (*) MOVE の dst 側。EA の分類的には CalcData だが、
! 62: // 下位6ビットの IR ではないので、cea_data_NN() ではなく
! 63: // 各々 cea_XXXX() のほうを個別に呼ぶこと。
! 64: //
! 65: // (CalcMMU)
! 66: // | m rxw | MMU
! 67: //
! 68: // (CalcFPU)
! 69: // |d m+-rxw | FScc.B <ea>
! 70: // |dam+-rxw | FMOVE.f FPn,<ea>
! 71: // |dam+-rxw | FMOVE.L ctl,<ea>
! 72: // |dam+-rxw | FMOVEM.L ctl,<ea>
! 73: // |d m+-rxwpi| Fgen <ea>,FPn
! 74: // |d m+-rxwpi| FMOVE.f <ea>,FPn
! 75: // |dam+-rwxpi| FMOVE.L <ea>,ctl
! 76: // |dam+-rxwpi| FMOVEM.L <ea>,ctl
! 77: // 実際にどのアドレッシングモードが有効かどうかは極力個別の命令内で判断する?
! 78: // ここは実行サイクル数的な分類。
! 79: //
! 80: // (FetchData)
! 81: // |d m+-rxwpi| AND/OR/CHK <ea>,Dn
! 82: // |d m+-rxwpi| MOVE.B <ea>,dst
! 83: // |d m+-rxwpi| MOVE <ea>,CCR/SR
! 84: // |d m+-rxwpi| MUL*/DIV* <ea>,Dn
! 85: // |d m+-rxwp | (*) TST.B <ea>
! 86: // |d m+-rxwp | (*) CMPI #<data>,<ea>
! 87: // | m+-rxwp | (*) BTST.B #<data>,<ea>
! 88: // | m+-rxwpi| (*) BTST.B Dx,<ea>
! 89: //
! 90: // (FetchAll)
! 91: // |dam+-rxwpi| ADD/SUB/CMP <ea>,Dn
! 92: // |dam+-rxwpi| MOVEA/ADDA/SUBA/CMPA <ea>,An
! 93: // |dam+-rxwpi| TST.WL <ea>
! 94: // |dam+-rxwpi| MOVE.WL <ea>,dst
! 95: //
! 96: // (たぶん別対応)
! 97: // | m -rxw | MOVEM list,<ea>
! 98: // | m -rxw | FMOVEM.X reg,<ea>
! 99: // | m -rxw | FSAVE <ea>
! 100: // | m+ rxwp | MOVEM <ea>,list
! 101: // | m+ rxwp | FMOVEM.X <ea>,reg
! 102: // | m+ rxwp | FRESTORE <ea>
! 103:
! 104: #include "mpu680x0.h"
! 105:
! 106: //
! 107: // Calc EA
! 108: //
! 109:
! 110: uint32
! 111: MPU680x0Device::cea_anin(int n)
! 112: {
! 113: CYCLE(2);
! 114: return internal_ea_anin(n);
! 115: }
! 116:
! 117: uint32
! 118: MPU680x0Device::cea_anpi_8(int n)
! 119: {
! 120: CYCLE(2);
! 121: return internal_ea_anpi_8(n);
! 122: }
! 123:
! 124: uint32
! 125: MPU680x0Device::cea_anpi_16(int n)
! 126: {
! 127: CYCLE(2);
! 128: return internal_ea_anpi_16(n);
! 129: }
! 130:
! 131: uint32
! 132: MPU680x0Device::cea_anpi_32(int n)
! 133: {
! 134: CYCLE(2);
! 135: return internal_ea_anpi_32(n);
! 136: }
! 137:
! 138: uint32
! 139: MPU680x0Device::cea_anpd_8(int n)
! 140: {
! 141: CYCLE(2);
! 142: return internal_ea_anpd_8(n);
! 143: }
! 144:
! 145: uint32
! 146: MPU680x0Device::cea_anpd_16(int n)
! 147: {
! 148: CYCLE(2);
! 149: return internal_ea_anpd_16(n);
! 150: }
! 151:
! 152: uint32
! 153: MPU680x0Device::cea_anpd_32(int n)
! 154: {
! 155: CYCLE(2);
! 156: return internal_ea_anpd_32(n);
! 157: }
! 158:
! 159: uint32
! 160: MPU680x0Device::cea_andi(int n)
! 161: {
! 162: CYCLE(2);
! 163: return internal_ea_andi(n);
! 164: }
! 165:
! 166: uint32
! 167: MPU680x0Device::cea_anix(int n)
! 168: {
! 169: CYCLE(10); // XXX 4,4-18,20
! 170: return internal_ea_anix(n);
! 171: }
! 172:
! 173: uint32
! 174: MPU680x0Device::cea_absw()
! 175: {
! 176: CYCLE(2);
! 177: return internal_ea_absw();
! 178: }
! 179:
! 180: uint32
! 181: MPU680x0Device::cea_absl()
! 182: {
! 183: CYCLE(4);
! 184: return internal_ea_absl();
! 185: }
! 186:
! 187: uint32
! 188: MPU680x0Device::cea_pcdi()
! 189: {
! 190: CYCLE(2);
! 191: return internal_ea_pcdi();
! 192: }
! 193:
! 194: uint32
! 195: MPU680x0Device::cea_pcix()
! 196: {
! 197: CYCLE(10); // XXX 4,4-18,20
! 198: return internal_ea_pcix();
! 199: }
! 200:
! 201: //
! 202: // Fetch EA
! 203: //
! 204:
! 205: inline uint32
! 206: MPU680x0Device::fea_anin()
! 207: {
! 208: CYCLE(3);
! 209: return internal_ea_anin(eanum(ir));
! 210: }
! 211:
! 212: inline uint32
! 213: MPU680x0Device::fea_anpi_8()
! 214: {
! 215: CYCLE(3);
! 216: return internal_ea_anpi_8(eanum(ir));
! 217: }
! 218:
! 219: inline uint32
! 220: MPU680x0Device::fea_anpi_16()
! 221: {
! 222: CYCLE(3);
! 223: return internal_ea_anpi_16(eanum(ir));
! 224: }
! 225:
! 226: inline uint32
! 227: MPU680x0Device::fea_anpi_32()
! 228: {
! 229: CYCLE(3);
! 230: return internal_ea_anpi_32(eanum(ir));
! 231: }
! 232:
! 233: inline uint32
! 234: MPU680x0Device::fea_anpd_8()
! 235: {
! 236: CYCLE(4);
! 237: return internal_ea_anpd_8(eanum(ir));
! 238: }
! 239:
! 240: inline uint32
! 241: MPU680x0Device::fea_anpd_16()
! 242: {
! 243: CYCLE(4);
! 244: return internal_ea_anpd_16(eanum(ir));
! 245: }
! 246:
! 247: inline uint32
! 248: MPU680x0Device::fea_anpd_32()
! 249: {
! 250: CYCLE(4);
! 251: return internal_ea_anpd_32(eanum(ir));
! 252: }
! 253:
! 254: inline uint32
! 255: MPU680x0Device::fea_andi()
! 256: {
! 257: CYCLE(4);
! 258: return internal_ea_andi(eanum(ir));
! 259: }
! 260:
! 261: inline uint32
! 262: MPU680x0Device::fea_anix()
! 263: {
! 264: CYCLE2(12, 14); // XXX 6,6-18,21
! 265: return internal_ea_anix(eanum(ir));
! 266: }
! 267:
! 268: inline uint32
! 269: MPU680x0Device::fea_absw()
! 270: {
! 271: CYCLE(4);
! 272: return internal_ea_absw();
! 273: }
! 274:
! 275: inline uint32
! 276: MPU680x0Device::fea_absl()
! 277: {
! 278: CYCLE2(4, 5);
! 279: return internal_ea_absl();
! 280: }
! 281:
! 282: inline uint32
! 283: MPU680x0Device::fea_pcdi()
! 284: {
! 285: CYCLE(4);
! 286: return internal_ea_pcdi();
! 287: }
! 288:
! 289: inline uint32
! 290: MPU680x0Device::fea_pcix()
! 291: {
! 292: CYCLE2(12, 14); // XXX 6,6-18,21
! 293: return internal_ea_pcix();
! 294: }
! 295:
! 296: inline void
! 297: MPU680x0Device::fea_imm_16()
! 298: {
! 299: CYCLE(2);
! 300: }
! 301:
! 302: inline void
! 303: MPU680x0Device::fea_imm_32()
! 304: {
! 305: CYCLE(4);
! 306: }
1.1 root 307:
308: //
309: // EA の拡張ワード
310: //
311:
312: uint32
1.1.1.4 ! root 313: MPU680x0Device::internal_ea_ix(uint32 anpc)
1.1 root 314: {
1.1.1.4 ! root 315: uint16 ext = fetch_16();
1.1 root 316: int rn = (ext >> 12) & 15;
317: bool idx_long = (ext & 0x0800);
318: int scale = (ext >> 9) & 3;
319:
320: if ((ext & 0x0100) == 0) {
321: // Brief extension
322: //
1.1.1.3 root 323: // F E D C B A 9 8 7 6 5 4 3 2 1 0
324: // +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
325: // | DA| n | WL| SCALE | 0 | disp |
326: // +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
1.1 root 327: //
328: // WL: インデックスレジスタ(Rn)のサイズ 1=.L 0=.W
329: // SCALE: スケールファクタ %00=*1 %01=*2 %10=*4 %11=*8
330:
331: CYCLE(4);
332: int32 disp = (int32)(int8)(ext & 0xff);
333: uint32 idx;
334:
335: if (idx_long) {
1.1.1.4 ! root 336: idx = reg.R[rn];
1.1 root 337: } else {
1.1.1.4 ! root 338: idx = (int32)(int16)(reg.R[rn] & 0xffff);
1.1 root 339: }
340: idx <<= scale;
341: return anpc + (int32)idx + disp;
342: } else {
343: // Full extension
344: //
1.1.1.3 root 345: // F E D C B A 9 8 7 6 5 4 3 2 1 0
346: // +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
347: // | DA| n | WL| SCALE | 1 | BS| IS| BDSZ | 0 | I/IS |
348: // +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+
1.1 root 349: //
350: // BS=1: ベースレジスタ・サプレス
351: // IS=1: インデックスオペランド・サプレス
352: // BDSZ: ベースディスプレースメントのサイズ %01=null %10=.W %11=.L
353: // I/IS: モード
354:
355: // クロックは概略値なので完全に正確ではないがまず基本は以下の2通り。
356: // メモリ間接なし (6, 6)
357: // メモリ間接あり (10, 10)
358: // これを元に必要に応じて以下をそれぞれ加算する。
359: // bd16 (+2, +3)
360: // bd32 (メモリ間接なし) (+4, +6)
361: // bd32 (メモリ間接あり) (+6, +6)
362: // outer (W/L 不問) (+2, +3)
363: // ただしここでは実行順の都合で bd32 はいずれも (+4, +6) とした。
364:
365: bool bs = (ext & 0x0080);
366: bool is = (ext & 0x0040);
367: int bdsize = (ext >> 4) & 3;
368: int iis = (ext & 7);
369:
370: // ベースレジスタ
371: if (bs) {
372: anpc = 0;
373: }
374:
375: // ベース・ディスプレースメント
376: uint32 base = 0;
377: switch (bdsize) {
378: case 0: // 予約
379: // XXX 未定義命令列になるんだろうか?
380: PANIC("BDSIZE==0 not impl");
381: case 1: // ベースはヌル
382: break;
383: case 2: // ベース.W
1.1.1.4 ! root 384: base = (int32)(int16)fetch_16();
1.1 root 385: CYCLE2(2, 3);
386: break;
387: case 3: // ベース.L
1.1.1.4 ! root 388: base = fetch_32();
1.1 root 389: CYCLE2(4, 6);
390: break;
391: default:
392: __unreachable();
393: }
394:
395: uint32 outer;
396: if (is == 0) {
397: // インデックス
398: uint32 idx = 0;
399: if (idx_long) {
1.1.1.4 ! root 400: idx = reg.R[rn];
1.1 root 401: } else {
1.1.1.4 ! root 402: idx = (int32)(int16)(reg.R[rn] & 0xffff);
1.1 root 403: }
404: idx <<= scale;
405:
406: switch (iis) {
407: case 0: // no memory indirection
408: CYCLE(6);
409: return anpc + base + idx;
410:
411: case 1: // indirect pre-index with null outer
412: CYCLE(10);
1.1.1.4 ! root 413: return read_32(anpc + base + idx);
1.1 root 414: case 2: // indirect pre-index with word outer
415: CYCLE2(10+2, 10+3);
1.1.1.4 ! root 416: outer = (int32)(int16)fetch_16();
! 417: return read_32(anpc + base + idx) + outer;
1.1 root 418: case 3: // indirect pre-index with long outer
419: CYCLE2(10+2, 10+3);
1.1.1.4 ! root 420: outer = fetch_32();
! 421: return read_32(anpc + base + idx) + outer;
1.1 root 422:
423: case 4:
424: PANIC("iis==4 reserved");
425:
426: case 5: // indirect post-index with null outer
427: CYCLE(10);
1.1.1.4 ! root 428: return read_32(anpc + base) + idx;
1.1 root 429: case 6: // indirect post-index with word outer
430: CYCLE2(10+2, 10+3);
1.1.1.4 ! root 431: outer = (int32)(int16)fetch_16();
! 432: return read_32(anpc + base) + idx + outer;
1.1 root 433: case 7: // indirect post-index with long outer
434: CYCLE2(10+2, 10+3);
1.1.1.4 ! root 435: outer = fetch_32();
! 436: return read_32(anpc + base) + idx + outer;
1.1 root 437: default:
438: __unreachable();
439: }
440: } else {
441: switch (iis) {
442: case 0: // no memory indirection
443: CYCLE(6);
444: return anpc + base;
445:
446: case 1: // memory indirect with null outer
447: CYCLE(10);
1.1.1.4 ! root 448: return read_32(anpc + base);
1.1 root 449: case 2: // memory indirect with word outer
450: CYCLE2(10+2, 10+3);
1.1.1.4 ! root 451: outer = (int32)(int16)fetch_16();
! 452: return read_32(anpc + base) + outer;
1.1 root 453: case 3: // memory indirect with long outer
454: CYCLE2(10+2, 10+3);
1.1.1.4 ! root 455: outer = fetch_32();
! 456: return read_32(anpc + base) + outer;
1.1 root 457: default:
458: PANIC("is==1 && iis>3 reserved");
459: }
460: }
461: }
462: }
463:
464: //
465: // Calc EA
466: //
467:
468: uint32
1.1.1.4 ! root 469: MPU680x0Device::cea_ctrl()
1.1 root 470: {
1.1.1.4 ! root 471: switch (eamode(ir)) {
1.1 root 472: case 2: // (An)
1.1.1.4 ! root 473: return cea_anin(eanum(ir));
1.1 root 474: case 5: // d16(An)
1.1.1.4 ! root 475: return cea_andi(eanum(ir));
1.1 root 476: case 6: // (An,IX)
1.1.1.4 ! root 477: return cea_anix(eanum(ir));
1.1 root 478: case 7:
1.1.1.4 ! root 479: switch (eanum(ir)) {
1.1 root 480: case 0: // Abs.W
1.1.1.4 ! root 481: return cea_absw();
1.1 root 482: case 1: // Abs.L
1.1.1.4 ! root 483: return cea_absl();
1.1 root 484: case 2: // d16(PC)
1.1.1.4 ! root 485: return cea_pcdi();
1.1 root 486: case 3: // (PC,IX)
1.1.1.4 ! root 487: return cea_pcix();
1.1 root 488: default:
489: break;
490: }
491: break;
492: }
493: // 不当命令
1.1.1.4 ! root 494: throw M68K::EXCEP_ILLEGAL;
1.1 root 495: }
496:
497: uint32
1.1.1.4 ! root 498: MPU680x0Device::cea_data_8()
1.1 root 499: {
1.1.1.4 ! root 500: switch (eamode(ir)) {
1.1 root 501: case 2: // (An)
1.1.1.4 ! root 502: return cea_anin(eanum(ir));
1.1 root 503: case 3: // (An)+
1.1.1.4 ! root 504: return cea_anpi_8(eanum(ir));
1.1 root 505: case 4: // -(An)
1.1.1.4 ! root 506: return cea_anpd_8(eanum(ir));
1.1 root 507: case 5: // d16(An)
1.1.1.4 ! root 508: return cea_andi(eanum(ir));
1.1 root 509: case 6: // (An,IX)
1.1.1.4 ! root 510: return cea_anix(eanum(ir));
1.1 root 511: case 7:
1.1.1.4 ! root 512: switch (eanum(ir)) {
1.1 root 513: case 0: // Abs.W
1.1.1.4 ! root 514: return cea_absw();
1.1 root 515: case 1: // Abs.L
1.1.1.4 ! root 516: return cea_absl();
1.1 root 517: default:
518: break;
519: }
520: break;
521: }
522: // 不当命令
1.1.1.4 ! root 523: throw M68K::EXCEP_ILLEGAL;
1.1 root 524: }
525:
526: uint32
1.1.1.4 ! root 527: MPU680x0Device::cea_data_16()
1.1 root 528: {
1.1.1.4 ! root 529: switch (eamode(ir)) {
1.1 root 530: case 2: // (An)
1.1.1.4 ! root 531: return cea_anin(eanum(ir));
1.1 root 532: case 3: // (An)+
1.1.1.4 ! root 533: return cea_anpi_16(eanum(ir));
1.1 root 534: case 4: // -(An)
1.1.1.4 ! root 535: return cea_anpd_16(eanum(ir));
1.1 root 536: case 5: // d16(An)
1.1.1.4 ! root 537: return cea_andi(eanum(ir));
1.1 root 538: case 6: // (An,IX)
1.1.1.4 ! root 539: return cea_anix(eanum(ir));
1.1 root 540: case 7:
1.1.1.4 ! root 541: switch (eanum(ir)) {
1.1 root 542: case 0: // Abs.W
1.1.1.4 ! root 543: return cea_absw();
1.1 root 544: case 1: // Abs.L
1.1.1.4 ! root 545: return cea_absl();
1.1 root 546: default:
547: break;
548: }
549: break;
550: }
551: // 不当命令
1.1.1.4 ! root 552: throw M68K::EXCEP_ILLEGAL;
1.1 root 553: }
554:
555: uint32
1.1.1.4 ! root 556: MPU680x0Device::cea_data_32()
1.1 root 557: {
1.1.1.4 ! root 558: switch (eamode(ir)) {
1.1 root 559: case 2: // (An)
1.1.1.4 ! root 560: return cea_anin(eanum(ir));
1.1 root 561: case 3: // (An)+
1.1.1.4 ! root 562: return cea_anpi_32(eanum(ir));
1.1 root 563: case 4: // -(An)
1.1.1.4 ! root 564: return cea_anpd_32(eanum(ir));
1.1 root 565: case 5: // d16(An)
1.1.1.4 ! root 566: return cea_andi(eanum(ir));
1.1 root 567: case 6: // (An,IX)
1.1.1.4 ! root 568: return cea_anix(eanum(ir));
1.1 root 569: case 7:
1.1.1.4 ! root 570: switch (eanum(ir)) {
1.1 root 571: case 0: // Abs.W
1.1.1.4 ! root 572: return cea_absw();
1.1 root 573: case 1: // Abs.L
1.1.1.4 ! root 574: return cea_absl();
1.1 root 575: default:
576: break;
577: }
578: break;
579: }
580: // 不当命令
1.1.1.4 ! root 581: throw M68K::EXCEP_ILLEGAL;
1.1 root 582: }
583:
584: // MMU からの呼び出し用。
585: uint32
1.1.1.4 ! root 586: MPU680x0Device::cea_copro()
1.1 root 587: {
1.1.1.4 ! root 588: switch (eamode(ir)) {
1.1 root 589: case 2: // (An)
590: CYCLE(4);
1.1.1.4 ! root 591: return internal_ea_anin(eanum(ir));
1.1 root 592: case 5: // d16(An)
593: CYCLE(4);
1.1.1.4 ! root 594: return internal_ea_andi(eanum(ir));
1.1 root 595: case 6: // (An,IX)
596: CYCLE(4);
1.1.1.4 ! root 597: return internal_ea_anix(eanum(ir));
1.1 root 598: case 7:
1.1.1.4 ! root 599: switch (eanum(ir)) {
1.1 root 600: case 0: // Abs.W
601: CYCLE(4);
1.1.1.4 ! root 602: return internal_ea_absw();
1.1 root 603: case 1: // Abs.L
604: CYCLE(6);
1.1.1.4 ! root 605: return internal_ea_absl();
1.1 root 606: default:
607: break;
608: }
609: break;
610: }
611: // 不当命令
1.1.1.4 ! root 612: throw M68K::EXCEP_ILLEGAL;
1.1 root 613: }
614:
615: //
616: // Fetch EA
617: //
618:
619: uint32
1.1.1.4 ! root 620: MPU680x0Device::fea_data_8()
1.1 root 621: {
622: uint32 ea;
623:
1.1.1.4 ! root 624: switch (eamode(ir)) {
1.1 root 625: case 0: // Dn
1.1.1.4 ! root 626: return reg.D[eanum(ir)] & 0xff;
1.1 root 627: case 2: // (An)
1.1.1.4 ! root 628: ea = fea_anin();
! 629: return read_8(ea);
1.1 root 630: case 3: // (An)+
1.1.1.4 ! root 631: ea = fea_anpi_8();
! 632: return read_8(ea);
1.1 root 633: case 4: // -(An)
1.1.1.4 ! root 634: ea = fea_anpd_8();
! 635: return read_8(ea);
1.1 root 636: case 5: // d16(An)
1.1.1.4 ! root 637: ea = fea_andi();
! 638: return read_8(ea);
1.1 root 639: case 6: // (An,IX)
1.1.1.4 ! root 640: ea = fea_anix();
! 641: return read_8(ea);
1.1 root 642: case 7:
1.1.1.4 ! root 643: switch (eanum(ir)) {
1.1 root 644: case 0: // Abs.W
1.1.1.4 ! root 645: ea = fea_absw();
! 646: return read_8(ea);
1.1 root 647: case 1: // Abs.L
1.1.1.4 ! root 648: ea = fea_absl();
! 649: return read_8(ea);
1.1 root 650: case 2: // d16(PC)
1.1.1.4 ! root 651: ea = fea_pcdi();
! 652: return read_8(ea);
1.1 root 653: case 3: // (PC,IX)
1.1.1.4 ! root 654: ea = fea_pcix();
! 655: return read_8(ea);
1.1 root 656: case 4: // #imm
1.1.1.4 ! root 657: fea_imm_16();
! 658: return fetch_16() & 0xff;
1.1 root 659: default:
660: break;
661: }
662: break;
663: default:
664: break;
665: }
666: // 不当命令
1.1.1.4 ! root 667: throw M68K::EXCEP_ILLEGAL;
1.1 root 668: }
669:
670: uint32
1.1.1.4 ! root 671: MPU680x0Device::fea_data_16()
1.1 root 672: {
673: uint32 ea;
674:
1.1.1.4 ! root 675: switch (eamode(ir)) {
1.1 root 676: case 0: // Dn
1.1.1.4 ! root 677: return reg.D[eanum(ir)] & 0xffff;
1.1 root 678: case 2: // (An)
1.1.1.4 ! root 679: ea = fea_anin();
! 680: return read_16(ea);
1.1 root 681: case 3: // (An)+
1.1.1.4 ! root 682: ea = fea_anpi_16();
! 683: return read_16(ea);
1.1 root 684: case 4: // -(An)
1.1.1.4 ! root 685: ea = fea_anpd_16();
! 686: return read_16(ea);
1.1 root 687: case 5: // d16(An)
1.1.1.4 ! root 688: ea = fea_andi();
! 689: return read_16(ea);
1.1 root 690: case 6: // (An,IX)
1.1.1.4 ! root 691: ea = fea_anix();
! 692: return read_16(ea);
1.1 root 693: case 7:
1.1.1.4 ! root 694: switch (eanum(ir)) {
1.1 root 695: case 0: // Abs.W
1.1.1.4 ! root 696: ea = fea_absw();
! 697: return read_16(ea);
1.1 root 698: case 1: // Abs.L
1.1.1.4 ! root 699: ea = fea_absl();
! 700: return read_16(ea);
1.1 root 701: case 2: // d16(PC)
1.1.1.4 ! root 702: ea = fea_pcdi();
! 703: return read_16(ea);
1.1 root 704: case 3: // (PC,IX)
1.1.1.4 ! root 705: ea = fea_pcix();
! 706: return read_16(ea);
1.1 root 707: case 4: // #imm
1.1.1.4 ! root 708: fea_imm_16();
! 709: return fetch_16();
1.1 root 710: default:
711: break;
712: }
713: break;
714: default:
715: break;
716: }
717: // 不当命令
1.1.1.4 ! root 718: throw M68K::EXCEP_ILLEGAL;
1.1 root 719: }
720:
721: uint32
1.1.1.4 ! root 722: MPU680x0Device::fea_data_32()
1.1 root 723: {
724: uint32 ea;
725:
1.1.1.4 ! root 726: switch (eamode(ir)) {
1.1 root 727: case 0: // Dn
1.1.1.4 ! root 728: return reg.D[eanum(ir)];
1.1 root 729: case 2: // (An)
1.1.1.4 ! root 730: ea = fea_anin();
! 731: return read_32(ea);
1.1 root 732: case 3: // (An)+
1.1.1.4 ! root 733: ea = fea_anpi_32();
! 734: return read_32(ea);
1.1 root 735: case 4: // -(An)
1.1.1.4 ! root 736: ea = fea_anpd_32();
! 737: return read_32(ea);
1.1 root 738: case 5: // d16(An)
1.1.1.4 ! root 739: ea = fea_andi();
! 740: return read_32(ea);
1.1 root 741: case 6: // (An,IX)
1.1.1.4 ! root 742: ea = fea_anix();
! 743: return read_32(ea);
1.1 root 744: case 7:
1.1.1.4 ! root 745: switch (eanum(ir)) {
1.1 root 746: case 0: // Abs.W
1.1.1.4 ! root 747: ea = fea_absw();
! 748: return read_32(ea);
1.1 root 749: case 1: // Abs.L
1.1.1.4 ! root 750: ea = fea_absl();
! 751: return read_32(ea);
1.1 root 752: case 2: // d16(PC)
1.1.1.4 ! root 753: ea = fea_pcdi();
! 754: return read_32(ea);
1.1 root 755: case 3: // (PC,IX)
1.1.1.4 ! root 756: ea = fea_pcix();
! 757: return read_32(ea);
1.1 root 758: case 4: // #imm
1.1.1.4 ! root 759: fea_imm_32();
! 760: return fetch_32();
1.1 root 761: default:
762: break;
763: }
764: break;
765: default:
766: break;
767: }
768: // 不当命令
1.1.1.4 ! root 769: throw M68K::EXCEP_ILLEGAL;
1.1 root 770: }
771:
772: uint32
1.1.1.4 ! root 773: MPU680x0Device::fea_all_8()
1.1 root 774: {
775: uint32 ea;
776:
1.1.1.4 ! root 777: switch (eamode(ir)) {
1.1 root 778: case 0: // Dn
1.1.1.4 ! root 779: return reg.D[eanum(ir)] & 0xff;
1.1 root 780: case 1: // An
781: // An.B は不当命令
782: break;
783: case 2: // (An)
1.1.1.4 ! root 784: ea = fea_anin();
! 785: return read_8(ea);
1.1 root 786: case 3: // (An)+
1.1.1.4 ! root 787: ea = fea_anpi_8();
! 788: return read_8(ea);
1.1 root 789: case 4: // -(An)
1.1.1.4 ! root 790: ea = fea_anpd_8();
! 791: return read_8(ea);
1.1 root 792: case 5: // d16(An)
1.1.1.4 ! root 793: ea = fea_andi();
! 794: return read_8(ea);
1.1 root 795: case 6: // (An,IX)
1.1.1.4 ! root 796: ea = fea_anix();
! 797: return read_8(ea);
1.1 root 798: case 7:
1.1.1.4 ! root 799: switch (eanum(ir)) {
1.1 root 800: case 0: // Abs.W
1.1.1.4 ! root 801: ea = fea_absw();
! 802: return read_8(ea);
1.1 root 803: case 1: // Abs.L
1.1.1.4 ! root 804: ea = fea_absl();
! 805: return read_8(ea);
1.1 root 806: case 2: // d16(PC)
1.1.1.4 ! root 807: ea = fea_pcdi();
! 808: return read_8(ea);
1.1 root 809: case 3: // (PC,IX)
1.1.1.4 ! root 810: ea = fea_pcix();
! 811: return read_8(ea);
1.1 root 812: case 4: // #imm
1.1.1.4 ! root 813: fea_imm_16();
! 814: return fetch_16() & 0xff;
1.1 root 815: default:
816: break;
817: }
818: break;
819: default:
820: break;
821: }
822: // 不当命令
1.1.1.4 ! root 823: throw M68K::EXCEP_ILLEGAL;
1.1 root 824: }
825:
826: uint32
1.1.1.4 ! root 827: MPU680x0Device::fea_all_16()
1.1 root 828: {
829: uint32 ea;
830:
1.1.1.4 ! root 831: switch (eamode(ir)) {
1.1 root 832: case 0: // Dn
833: case 1: // An
1.1.1.4 ! root 834: return reg.R[ir & 15] & 0xffff;
1.1 root 835: case 2: // (An)
1.1.1.4 ! root 836: ea = fea_anin();
! 837: return read_16(ea);
1.1 root 838: case 3: // (An)+
1.1.1.4 ! root 839: ea = fea_anpi_16();
! 840: return read_16(ea);
1.1 root 841: case 4: // -(An)
1.1.1.4 ! root 842: ea = fea_anpd_16();
! 843: return read_16(ea);
1.1 root 844: case 5: // d16(An)
1.1.1.4 ! root 845: ea = fea_andi();
! 846: return read_16(ea);
1.1 root 847: case 6: // (An,IX)
1.1.1.4 ! root 848: ea = fea_anix();
! 849: return read_16(ea);
1.1 root 850: case 7:
1.1.1.4 ! root 851: switch (eanum(ir)) {
1.1 root 852: case 0: // Abs.W
1.1.1.4 ! root 853: ea = fea_absw();
! 854: return read_16(ea);
1.1 root 855: case 1: // Abs.L
1.1.1.4 ! root 856: ea = fea_absl();
! 857: return read_16(ea);
1.1 root 858: case 2: // d16(PC)
1.1.1.4 ! root 859: ea = fea_pcdi();
! 860: return read_16(ea);
1.1 root 861: case 3: // (PC,IX)
1.1.1.4 ! root 862: ea = fea_pcix();
! 863: return read_16(ea);
1.1 root 864: case 4: // #imm
1.1.1.4 ! root 865: fea_imm_16();
! 866: return fetch_16();
1.1 root 867: default:
868: break;
869: }
870: break;
871: default:
872: break;
873: }
874: // 不当命令
1.1.1.4 ! root 875: throw M68K::EXCEP_ILLEGAL;
1.1 root 876: }
877:
878: uint32
1.1.1.4 ! root 879: MPU680x0Device::fea_all_32()
1.1 root 880: {
881: uint32 ea;
882:
1.1.1.4 ! root 883: switch (eamode(ir)) {
1.1 root 884: case 0: // Dn
885: case 1: // An
1.1.1.4 ! root 886: return reg.R[ir & 15];
1.1 root 887: case 2: // (An)
1.1.1.4 ! root 888: ea = fea_anin();
! 889: return read_32(ea);
1.1 root 890: case 3: // (An)+
1.1.1.4 ! root 891: ea = fea_anpi_32();
! 892: return read_32(ea);
1.1 root 893: case 4: // -(An)
1.1.1.4 ! root 894: ea = fea_anpd_32();
! 895: return read_32(ea);
1.1 root 896: case 5: // d16(An)
1.1.1.4 ! root 897: ea = fea_andi();
! 898: return read_32(ea);
1.1 root 899: case 6: // (An,IX)
1.1.1.4 ! root 900: ea = fea_anix();
! 901: return read_32(ea);
1.1 root 902: case 7:
1.1.1.4 ! root 903: switch (eanum(ir)) {
1.1 root 904: case 0: // Abs.W
1.1.1.4 ! root 905: ea = fea_absw();
! 906: return read_32(ea);
1.1 root 907: case 1: // Abs.L
1.1.1.4 ! root 908: ea = fea_absl();
! 909: return read_32(ea);
1.1 root 910: case 2: // d16(PC)
1.1.1.4 ! root 911: ea = fea_pcdi();
! 912: return read_32(ea);
1.1 root 913: case 3: // (PC,IX)
1.1.1.4 ! root 914: ea = fea_pcix();
! 915: return read_32(ea);
1.1 root 916: case 4: // #imm
1.1.1.4 ! root 917: fea_imm_32();
! 918: return fetch_32();
1.1 root 919: default:
920: break;
921: }
922: break;
923: default:
924: break;
925: }
926: // 不当命令
1.1.1.4 ! root 927: throw M68K::EXCEP_ILLEGAL;
1.1 root 928: }
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